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MICRO 31: Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
1998 Proceeding
Publisher:
  • IEEE Computer Society Press
  • Washington
  • DC
  • United States
Conference:
MICRO98: 31st International Symposium on Microarchitecture Dallas Texas USA
ISBN:
978-1-58113-016-4
Published:
01 November 1998
Sponsors:
SIGMICRO, IEEE-CS\TCMM

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Simple vector microprocessors for multimedia applications
Pages 25–36
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Analyzing the working set characteristics of branch execution
Pages 49–58
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The YAGS branch prediction scheme
Pages 69–77
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Task selection for a multiscalar processor
Pages 81–92
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Split-path enhanced pipeline scheduling for loops with control flows
Pages 93–102
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Effective cluster assignment for modulo scheduling
Pages 103–114
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Better global scheduling using path profiles
Pages 115–123
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Predictive techniques for aggressive load speculation
Pages 127–137
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Compiler-directed early load-address generation
Pages 138–147
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Load latency tolerance in dynamically scheduled processors
Pages 148–159
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Improving I/O performance with a conditional store buffer
Pages 160–169
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Code compression based on operand factorization
Pages 194–201
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Understanding the differences between value prediction and instruction reuse
Pages 205–215
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A dynamic multithreading processor
Pages 226–236
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The cascaded predictor: economical and adaptive branch target prediction
Pages 249–258
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Predicting indirect branches via data compression
Pages 272–281
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Precise register allocation for irregular architectures
Pages 297–307
Contributors
  • Texas Instruments
  • University of the West of England

Recommendations

Acceptance Rates

MICRO 31 Paper Acceptance Rate 28 of 108 submissions, 26%;
Overall Acceptance Rate 484 of 2,242 submissions, 22%
YearSubmittedAcceptedRate
MICRO-482836122%
MICRO-472795319%
MICRO-462393916%
MICRO 412104019%
MICRO 401663521%
MICRO 391744224%
MICRO 381472920%
MICRO 371582918%
MICRO 361343526%
MICRO 331103128%
MICRO 321312721%
MICRO 311082826%
MICRO 301033534%
Overall2,24248422%