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Master Thesis - Design of Low Drop-Out Voltage Regulator
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Design of A Low Drop-Out Voltage Regulator Using 0.13um CMOS
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Low Dropout Voltage Regulator Using 130 NM CMOS Technology
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Design Analysis of Low Drop-Out Voltage Regulator With Current Buffer Compensation
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Cost Accounting: © 2013 Prof. Dr. Dr. Herbert Nosko 32-016
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Module Handbook - MicrosystemsEngineering - MScPO2021-1
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