Digital Design with ASM Charts
SM Charts properties
ASM (Algorithmic State Machine)
Often used to design control units for digital
systems
Useful in the H/W design of digital systems
Easier to understand the operation
Leads directly to a hardware realization
Components of SM chart
Optional
State code
xxx
(true branch) (false branch) Conditional
State_name/ 1 0
condition Output list
Output list
(c) Conditional
(a) State box (b) Decision box
Output box
Flip Flops Combination logic elements Combination logic of
state bits and inputs
Equivalent SM Blocks
S1/Z1 Z2=1 if X1=0 S1/Z1 Z2=1 if X1=0
S2 if X2=0 S2 if X2=0
0 1 S3 if X2=1 0 1 S3 if X2=1
X1 X2
1
Z2 X1 X1
0 0
0 1 Z2 Z2
X2
S2/ S3/
S2/ S3/
(a)
(b)
Equivalent SM Charts for a combinational Network
S0/
0 1
S0/ A
1 1
A+BC C
0
0 1
Z1 B
0
Z1
(a) (b)
Z1=A+A`BC=A+BC
SM Block with feedback
-Every valid combination of input variables
must have exactly one exit path defined
-No internal feedback within an SM block
is allowed
S0/ S0/
0 0
x x
1 1
(a) Incorrect (b) Correct
ASMs representing simple FSMs
Algorithmic state machines can mo
del both Mealy and Moore Finite Sta
te Machines
They can also model machines that
are of the mixed type
Conversion of a state Graph to an SM chart
1/0 1/0
So/ S1/ S2/ 1/Z2
0/0
Za Zb Zc (a) State graph
0/0
0/Z1
00
S0/Za
Link 1
(b) Equivalent SM chart
x
0 1 01
S1/Zb
Link 2
x
0 1
11 Link 3
S2/Zc
0
x 1
Z1 Z2
Derivation of SM Charts
First, draw a block diagram of the system we are
controlling
Next, define the required input and output signals
to the control network
Then, construct an SM char that tests the input
signals and generates the proper sequence of
output signals
The algorithmic state machine (ASM) method is a
method for designing finite state machines (FSM).
Example 1 : Design a system to detect the occurrence of
the sequence: 00 00 11 10 on two inputs X1 and X2 and
output a binary 1 when the sequence is detected.
.
We will use this example to illustrate the ASM synthesis process.
ASM charts
Check that all
paths are
valid to
ensure the
SM chart is
correct!
Produce next state and output Karnaugh maps
Use D-type flip-flops and general logic gates
Example 2:
Convert the state diagram of Fig. below to ASM chart.
Example 3: Design a washing machine controller.
Description: The controller begins when it receives the
STRT (start) signal from the user. It fills the washer with
either cold or hot water (selected by the user) depending
on the SHOT input, where SHOT is True when hot water
is desired. The washer agitates until a timer indicates that
the cycle is finished. The controller then drains the soapy
water and fills the machine with cold water for the rinse
cycle. The washer agitates again until the timer indicates
that the cycle is finished. The controller drains the rinse
water and finally enters the spin cycle, spinning the
clothes dry until the timer indicates the end of the cycle. If
the off button is ever pushed, the washer holds the
current state until the start button is pressed again.
Note: 5 inputs could require 25 = 32 arrows going out of each
bubble in a state diagram. This is why we use an ASM chart.
Note: The STIME output must be synchronized (by adding a
D flip-flop) so that its effects on the timer do not take place
until a clock edge triggers the next state.
Implementation: -
• Assign states: Idle = 000, Agitate = 001, Drain = 010, Rinse1
= 011, Rinse2 = 100, SpinIt = 101 - Make Next State Truth
Table (NSTT)
• At this point, we could use K-maps and solve the
combinational logic.
• Instead, we will implement using a 256 x 8 ROM - Store the
NSTT in the ROM - Wire up inputs, outputs, and state
register.
