INIC-1608
USB to SATA Bridge
       Datasheet
     Version 1.02
    October 23, 2008
                       1
                                          Revision History
Revision     Date                                            Comments
 V1.00     07/06/2007   Initial Release
 V1.01     11/27/2007   add 5V to 3.3V regulator electrical specifications; add 3.3V to 1.8V regulator
                        electrical specifications
 V1.02     10/23/2008   Add SATA BIST to feature; update DC characteristic
                                                                                                     2
                                                                    Table of Contents
1.         Introduction ............................................................................................................................................................. 4
     1.1       Feature Summary.................................................................................................................... 4
     1.2       Firmware/Software Support .................................................................................................. 5
     1.3       Devices Support..................................................................................................................... 5
2.         INIC-1608 Block Diagram...................................................................................................................................... 6
3.         Pin-Out Diagram ..................................................................................................................................................... 7
4.         Pin Signal Description: (48-pin package)................................................................................................................ 8
     4.1        USB Interface ........................................................................................................................ 8
     4.2        SATA Interface (Analog pins) .............................................................................................. 8
     4.3        System Interface .................................................................................................................... 8
     4.4        Miscellaneous Interface ......................................................................................................... 8
     4.5        NVRAM Interface ................................................................................................................. 9
     4.6        GPIO Interface....................................................................................................................... 9
     4.7        Power Regulator pins ........................................................................................................... 9
     4.8        Power/GND ........................................................................................................................... 9
5.         Electrical Information ........................................................................................................................................... 10
     5.1        Absolute Maximum Ratings................................................................................................ 10
     5.2        Recommended Operating Conditions.................................................................................. 10
     5.3        General DC Characteristics ................................................................................................. 10
     5.4        DC Electrical Characteristics for 3.3V Operation ............................................................... 10
     5.5        DC Specification for LDO5033(5V to 3.3V regulator)....................................................... 11
6.         Packaging Specification ......................................................................................................................................... 12
                                                                                                                                                                    3
1.         Introduction
The INIC-1608 provides an advanced solution to connect SATA devices to USB Host with
integrated CPU and embedded SRAM/ROM. To provide high performance and cost effective
solution, the INIC-1608 integrates USB-PHY, Mass Storage Class Bulk-Only USB function, SATA
link/PHY core and microprocessor into a single ASIC. The INIC-1608 provides the data transfer
rate of up to 60 MB/sec connecting to a 1.5G SATA interface.
1.1       Feature Summary
      •    Integrates USB2.0 PHY IP core.
      •    Data transfer rate of up to 60 MB/sec.
      •    Integrated internal Turbo 8051 uP with 12KB embedded ROM and 2KB SRAM.
      •    External NVRAM supported.
      •    Support HID.
      •    Up to 8 GPIO pins.
      •    Only one external crystal.
      •    Supports SATA (bridged SATA) Hard Disk drives, CD-RW devices, DVDs, Removable
           media devices, BD (Blu-Ray Disc) drive
      •    USB 1.1 and USB 2.0 compliant.
      •    USB Mass Storage Class Bulk-Only Transport Specification Compliant.
      •    SATA specification 1.0, SATA II Compliant (Hot Plug is supported).
      •    Support SATA BIST through USB and SATA bus
      •    Support ATA/ATAPI device DMA and PIO mode.
      •    2k bytes of data buffer for data transfer.
      •    On-Chip 3.3V to 1.8V regulator and 5V to 3.3V regulator.
      •    48 pin LQFP
                                                                                      4
1.2       Firmware/Software Support
      •   USB Mass Storage Class Bulk-Only Transport support
      •   Provide software utilities for NVRAM upgraded.
1.3       Devices Support
      •   Hard disk drives
      •   CD-RW devices
      •   DVDs
      •   Removable media devices
      •   Blu-Ray Disk driver
                                                               5
2.     INIC-1608 Block Diagram
                                                                             SATA
                                                                             PHY                   Disk
                                   Registers
 USB
PORT          USB
              PHY
                                                        SATA
                                                        Control               SATA
                                                         Block                 Link
                                   Command
                                    Buffers                                   Layer
              USB
              Core
                                   Data Buffer
                                                                               SATA
                                   (2K Bytes)                                Transport
                                Data Flow Control                              Layer
                 uP8051                    ROM                   I2C                         NVRAM
                                          12 kbytes              Interface                    2k-bits
                     Figure1: USB to SATA Bridge Block Diagram
                                                                                         6
3.    Pin-Out Diagram
                      V       G       R       R       G         R         R        G       X       X        G        R
                      3       N       V       V       N         V         V        N       T       T        N        S
                      3       D       5       3       D         1         3        D       A       A        D        A
                                      I       3                 8         3                L       L                 T
                                              O                 O         I                O       I                 A
                      |       |       |       |       |         |         |        |       |       |        |        |
                      4       4       4       4       4         4         4        4       4       3        3        3
                      8       7       6       5       4         3         2        1       0       9        8        7
     P1_2    --- 1                                                                                                            36 --- V33
     P1_1    --- 2                                                                                                            35 --- V18
     P1_0    --- 3                                                                                                            34 --- V18
     V18     --- 4                                                                                                            33 --- GND
     GND     --- 5                                                                                                            32 --- TX0P
     REXT    --- 6                                                                                                            31 --- TX0N
     VD33P   --- 7
                                                              INIC-1608                                                       30 --- GND
     DP      --- 8                                                                                                            29 --- V18
     DM      --- 9                                                                                                            28 --- GND
     VS33P   --- 10                                                                                                           27 --- RX0N
     VDDU    --- 11                                                                                                           26 --- RX0P
     P3_0    --- 12                                                                                                           25 --- V18
                          1       1       1       1       1         1         1        2       2       2        2        2
                          3       4       5       6       7         8         9        0       1       2        3        4
                          |       |       |       |         |         |        |       |       |        |        |        |
                          G       V       P       P       P         S         S        T       T       T        V        G
                          N       3       1       O       1         D         C        E       E       E        1        N
                          D       3       |       R       |         A         K        S       S       S        8        D
                                          7       S       4                            T       T       T
                                                  T                                    0       1        2
                                                                                                                                            7
4.     Pin Signal Description: (48-pin package)
4.1     USB Interface
Signal Name      Pin Number         I/O     Driver Type       Description
DP                    8             I/O     USB high /full    High/Full speed D+ signal
                                            speed buffer
                                                 (D+)
DM                      9           I/O     USB high/full     High/Full speed D- signal
                                             speed buffer
                                                 (D-)
REXT_USB                6              A        Power         PLL voltage reference. Current source
                                                              for 330 ohm(1%) resistor connected to
                                                              AVSS
4.2     SATA Interface (Analog pins)
Signal Name       Pin Number        I/O      Driver Type      Description
TX0P                   32            O          SATA          Differential Transmit positive signal
(SATA Device)                                                 line
TX0N                    31             O          SATA        Differential Transmit negative signal
(SATA Device)                                                 line
RX0P                    26             I          SATA        Differential Receive positive signal
(SATA Device)                                                 line
RX0N                    27             I          SATA        Differential Receive negative signal
(SATA Device)                                                 line
XTALI                   39             I          PX1R        crystal oscillator input (25MHz)
XTALO                   40             O                      Crystal oscillator output
RSATA                   37             I                      External Reference Resister
                                                              (6.19 K ohm)
4.3     System Interface
Signal Name      Pin Number         I/O      Driver Type      Description
PORST                 16              I     Schmitt-trigger   Power On Reset. Active low
4.4     Miscellaneous Interface
Signal Name       Pin Number        I/O      Driver Type      Description
TestMode[2:0]       22,21,20          I         Internal      Test Mode Select
                                               pulldown       000: Normal
                                              77Kohm—         001: rom-bist
                                               312Kohm        010: tstpDO control by CPU
                                                              011: tstpDO monitor rom addr
                                                              111: USB PHY test
                                                              100: SATA PHY test
                                                              101: Scan Test
                                                              110: Mbist Test
                                                                                              8
4.5     NVRAM Interface
Signal Name      Pin Number     I/O    Driver Type      Description
SDA/                  18        I/O   Internal pullup   1. NRAM data input/output.
P1.6                                    94Kohm—         2. This pin also configured as P1.6 if
                                         261Kohm        NVRAM is not used.
SCK/                 19         I/O   Internal pullup   1. NVRAM clock.
P1.5                                    94Kohm—         2. This pin also configured as P1.5 if
                                         261Kohm        NVRAM is not used
4.6     GPIO Interface
Signal Name      Pin Number     I/O    Driver Type      Description
LED/P1.7              15        I/O   Internal pullup   LED: SATA Activity indicator.
                                        94Kohm—         Can be used as uP8051 port 1.7
                                         261Kohm
P3.0/VBUS            12         I/O   Schmitt-trigger   uP8051 I/O port 3.0, can be used as
                                                        VBUS detection
P1.4                 17         I/O   Internal pullup   uP8051 I/O port 1.4, can be used as
                                      94Kohm—           GPIOs
                                      261Kohm           OTB input if enable OTB
P1.2                 1          I/O   Internal pullup   uP8051 I/O port 1.2, can be used as
                                      94Kohm—           output GPIO
                                      261Kohm
P1.1                 2          I/O   Internal pullup   uP8051 I/O port 1.2, can be used as
                                      94Kohm—           output GPIO
                                      261Kohm
P1.0                 3          I/O   Internal pullup   uP8051 I/O port 1.0, can be used as
                                      94Kohm—           GPIOs
                                      261Kohm
4.7    Power Regulator pins
Signal Name      Pin Number     I/O    Driver Type      Description
RV33I                 42          I                     REG 3.3V input
RV18O                 43         O                      REG 1.8V output
GND                 44,41         I                     Ground for 2 Regulators
RV5I                  46          I                     REG 5V input
RV33O                 45         O                      REG 3.3V output
4.8     Power/GND
Signal Name       Pin Number    I/O    Driver Type      Description
V33                  14,48                              2 pins (Digital 3.3V) for core
V18                   4,23                              2 pins (Digital 1.8V) for core
GND                5,13,24,47                           4 pins
VD33P                   7                               For USB (3.3V)
VS33P                  10                               For USB (GND)
VDDU                   11                               For USB (1.8V)
V33                    36                               For SATA(3.3V)
V18               25,29,34,35                           For SATA(1.8V)
GND               28,30,33,38                           For SATA(GND)
                                                                                         9
5.          Electrical Information
5.1         Absolute Maximum Ratings
 Symbol         Parameter                                         Min           Max      Units
   Vcc          Power Supply                                      -0.3           3.6      V
   Vin          Input Voltage                                     -0.3         Vcc+0.3    V
  Vout          Output Voltage                                    -0.3         Vcc+0.3    V
  Tstg          Storage Temperature                               -55            150      °C
5.2         Recommended Operating Conditions
 Symbol         Parameter                                   Min          Typ       Max   Units
   Vcc          Power Supply                                3.0          3.3       3.6    V
   Vin          Input Voltage                                0             -       Vcc    V
   Tj           Commercial Junction Operating Temperature    0            25       115    °C
5.3         General DC Characteristics
 Symbol         Parameter                                   Min          Typ       Max   Units
    Iil         Input Leakage Current                        -1                     1     µA
   Ioz          Tristate Leakage Current                     -1                     1     µA
   Cin          Input Capacitance                                        2.8              pF
  Cout          Output Capacitance                          2.7                    4.9    pF
  Cbid          Bi-directional Buffer Capacitance           2.7                    4.9    pF
5.4         DC Electrical Characteristics for 3.3V Operation
       (Under Vcc=3.0-3.6V, Tj=0-115C)
 Symbol    Parameter                           Conditions   Min          Typ      Max    Units
   Vil     Input Low Voltage                     CMOS       -0.3                  0.8     V
   Vih     Input High Voltage                    CMOS       2.0                   5.5     V
   Vol     Output Low Voltage                  Ioh-2-24mA                         0.4     V
  Voh      Output High Voltage                    Ioh=2-    2.4                           V
                                                  24mA
      Ri        Input Pullup/pulldown          Vil=0/Vih=                75               kΩ
                Resistance                         Vcc
      Icc       Operating Supply Current        Vcc=3.3V                           150   mA
                                                                                               10
5.5 DC Specification for LDO5033 (5V to 3.3V regulator)
 Symbol    Parameter                 Conditions        Min           Typ          Max        Units
 VDD50     Input Voltage                                3.0                        6.0        V
 VDD33     Output Voltage            In regulation     3.135                      3.465       V
                                         region
           Maximum ripple on Vout     Tested with    40 mV p-p for f<160Mhz
                                     up to 200mv
                                      p-p voltage
                                       ripple on
                                        VDD50
           Startup time                VDD50 >                                     100         us
                                          Vop
  Ileak    Leakage Current             Regulator                                    4         uA
                                       disabled
  Cout     External capacitor                                                         1         uF
  Imax     Load current                  DC                0                        200        mA
           Hot plug protection and                   The regulator will not be affected by spikes
           spikes protection                         lass than 30ns and below 10V
                                                     The regulator should handle maximum 10
                                                     spikes in 1 ms duration
           Current limiting            Short             350                        680        mA
                                      circuit,
                                     VDD50=5V
5.6 Electrical Specification for VREG18 (3.3V to 1.8V regulator )
 Symbol    Parameter                 Conditions         Min          Typ          Max        Units
 AVCC      Power                                        3.0          3.3          3.6          V
  VREF     Output Voltage                               1.71         1.81         1.91         V
   Iout    Output current                                 -          150          160         mA
                                                                                                    11
6.   Packaging Specification
                               12