TPS65148

www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

Compact TFT LCD Bias IC for Monitor with VCOM Buffer, Voltage Regulator for Gamma
Buffer and Reset Function
Check for Samples: TPS65148

1FEATURES • VCOM Buffer

• 2.5V to 6V Input Voltage Range • Reset Function (XAO Signal)
• Up to 18V Boost Converter With 4A Switch • LCD Discharge Function
Current • Overvoltage Protection
• 630kHz/1.2MHz Selectable Switching • Overcurrent Protection
Frequency • Thermal Shutdown
• Adjustable Soft-Start for the Boost Converter • 32-Pin 5*5mm QFN Package
• Gate Driver for External Input-to-Output
Isolation Switch APPLICATIONS
• 0.5% Accuracy Voltage Regulator for Gamma • Monitor
Buffer • TV (5V Input Voltage)
• Gate Voltage Shaping

DESCRIPTION
The TPS65148 offers a compact power supply solution designed to supply the LCD bias voltages required by
TFT (Thin Film Transistor) LCD panels running from a typical 5 V supply rail. The device integrates a high power
step-up converter for VS (Source Driver voltage), an accurate voltage rail using an integrated LDO to supply the
Gamma Buffer (VREG_O) and a Vcom buffer driving the LCD backplane. In addition to that, a gate voltage shaping
block is integrated. The VGH signal (Gate Driver High voltage) supplied by an external positive charge pump, is
modulated into VGHM with high flexibility by using a logic input VFLK and an external discharge resistor
connected to the RE pin. Also, an external negative charge pump can be set using the boost converter of the
TPS65148 to generate VGL (Gate Driver Low voltage). The integrated reset function together with the LCD
discharge function available in the TPS65148 provide the signals enabling the discharge of the LCD TFT pixels
when powering-off. The device includes safety features like overcurrent protection (OCP) and short-circuit
protection (SCP) achieved by an external input-to-output isolation switch, as well as overvoltage protection (OVP)
and thermal shutdown.
Space between text and graphic
VIN Boost Converter
5V -
(Over Voltage Protection) VS
- 13.6 V/500 mA
(High Voltage Stress)
Gate Driver for Input-to-output
Isolation Switch GD
(Short Circuit Protection)
Gate Voltage Shaping
& VGHM
LCD Discharge 24 V/20mA
Function

Voltage Regulator VREG_O

for Gamma 12.5 V/30 mA
VCOM Buffer
VOPO
(unity gain)
±130mA

Reset Function XAO

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2009–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION (1)

TA ORDERING PACKAGE PACKAGE MARKING
–40°C to 85°C TPS65148RHB 32-pin QFN TPS65148

(1) The RHB package is available taped an reeled. For the most current package and ordering information, see the Package Option
Addendum at the end of this document, or see the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
Input voltage range VIN (2) –0.3 to 6.5 V
Voltage range on pins COMP, EN, FB, FREQ, GD, HVS, REG_FB, RHVS, SS, VDET, VDPM, VFLK, –0.3 to 6.5 V
XAO (2)
Voltage on pins OPI, OPO, REG_I, REG_O, SUP, SW (2) –0.3 to 20 V
Voltage on pins RE, VGH, VGHM (2) –0.3 to 36 V
ESD rating HBM 2 kV
ESD rating MM 200 V
ESD rating CDM 500 V
Continuous power dissipation See Thermal Information Table
Storage temperature range –65 to 150 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

THERMAL INFORMATION
TPS65148
THERMAL METRIC (1) RHB UNITS
32 PINS
qJA (2) Junction-to-ambient thermal resistance 37.1
qJCtop Junction-to-case (top) thermal resistance 38.7
qJB Junction-to-board thermal resistance 9.4
°C/W
yJT Junction-to-top characterization parameter 0.5
yJB Junction-to-board characterization parameter 10.4
qJCbot Junction-to-case (bottom) thermal resistance 2.6

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) qJA. given for High-K PCB board.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
VIN Input voltage range 2.5 6 V
VS, VSUP, Boost converter output voltage range. SUP pin and REG_I pin input supply voltage
7 18 V
VREG_I range
VGH Gate voltage shaping input voltage range 15 35 V
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C

2 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

ELECTRICAL CHARACTERISTICS
VIN = 5 V, VREG_I = VS = VSUP = 13.6 V, VREG_O = 12.5 V, VOPI = 5 V, VGH = 23 V, TA = –40°C to 85°C, typical values are at
TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.5 6 V
IQVIN Operating quiescent current into VIN Device not switching, VFB = 1.240 V + 5% 0.23 0.5 mA
IQSUP Operating quiescent current into SUP Device not switching, VFB = 1.240 V + 5% 3 6 mA
IQVGH Operating quiescent current into VGH VGH = 24 V, VFLK = 'high' 30 60 mA
IQREG_I Operating quiescent current into REG_I REG_O = 'open', VREG_FB = 1.240 V + 5% 0.05 3 mA
ISDVIN Shutdown current into VIN VIN = 6 V, EN = GND 35 70 mA
ISDSUP Shutdown current into SUP VIN = 6 V, EN = GND, VSUP = 6 V 1 2.5 mA
ISDVGH Shutdown current into VGH VIN = 6 V, EN = GND, VGH = 6 V 20 40 mA
ISDREG_I Shutdown current into REG_I VIN = 6 V, EN = GND, VREG_I = 6 V,
4 10 mA
VREG_O = 4.9 V
VIN rising 2.1 2.3
VUVLO Under-voltage lockout threshold V
Hysterisis 0.1
TSD Thermal shutdown Temperature rising 150 °C
TSDHYS Thermal shutdown hysteresis 14 °C
LOGIC SIGNALS EN, FREQ, VFLK, HVS
ILEAK Input leakage current EN = FREQ = VFLK = HVS = 6 V 0.1 mA
VIH Logic high input voltage VIN = 2.5 V to 6 V 2 V
VIL Logic low input voltage VIN = 2.5 V to 6 V 0.4 V
BOOST CONVERTER (VS)
VS Output voltage boost converter 18 V
VOVP Overvoltage protection VS rising 18.2 19 19.8 V
VFB Feedback regulation voltage 1.228 1.240 1.252 V
IFB Feedback input bias current VFB = 1.240V 0.1 mA
gm Transconductiance error amplifier gain 107 mA/V
VIN = VGS = 5 V, ISW = 'current limit' 0.12 0.18
rDS(on) N-channel MOSFET on-resistance Ω
VIN = VGS = 3.3 V, ISW = 'current limit' 0.14 0.22
ILEAK_SW SW leakage current EN = GND, VSW = 18.5 V 30 mA
ILIM N-Channel MOSFET current limit 4.0 4.8 5.6 A
ISS Softstart current VSS = 1.240 V 10 mA
FREQ = 'high' 0.9 1.2 1.5 MHz
f Switching frequency
FREQ = 'low' 470 630 790 kHZ
Line regulation VIN = 2.5 V to 6 V, IOUT = 1 mA 0.015 %/V
Load regulation IOUT = 0 A to 1.3 A 0.22 %/A
LDO - VOLTAGE REGULATOR FOR GAMMA BUFFER (VREG_O)
VREG_O LDO output voltage range 7 17.6 V
VREG_I = 10 V to 18V, REG_O = REG_FB,
1.228 1.240 1.252
IREG_O = 1 mA, TA = -40°C to 85°C
VREG_FB Feedback regulation voltage V
VREG_I = 10 V to 18V, REG_O = REG_FB,
1.234 1.240 1.246
IREG_O = 1 mA, TA = 25°C
IREG_FB Feedback input bias current VREG_FB = 1.240 V 0.1 mA
ISC_REG Short circuit current limit VREG_I = 18 V, REG_O = REG_FB = GND 90 mA
VDO Dropout voltage VREG_I = 18 V, IREG_O = 30 mA 400 mV
Line regulation VREG_I = 13.6 V to 18 V, IREG_O = 1 mA 0.003 %/V
Load regulation IREG_O = 1 mA to 50 mA 0.28 %/A
GATE VOLTAGE SHAPING (VGHM)
IDPM Capacitor charge current VDPM pin 20 mA
rDS(on)M1 VGH to VGHM rDS(on) (M1 PMOS) VFLK = 'high', IVGHM = 20 mA, VGH = 20 V 13 25 Ω
rDS(on)M2 VGHM to RE rDS(on) (M2 PMOS) VFLK = 'low', IVGHM = 20 mA, VGHM = 7.5 V 13 25 Ω

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5 V, VREG_I = VS = VSUP = 13.6 V, VREG_O = 12.5 V, VOPI = 5 V, VGH = 23 V, TA = –40°C to 85°C, typical values are at
TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RESET FUNCTION (XAO)
VIN_DET Operating voltage for VIN 1.6 6.0 V
VDET Threshold voltage Falling, VIN = 2.3 V 1.216 1.240 1.264 V
VDET_HYS Threshold hysterisis 65 mV
I XAO (ON) Sink current capability (1) V XAO(ON) = 0.5 V 1 mA
V XAO(ON) Low voltage level I XAO (ON)= 1 mA 0.5 V
ILEAK_XAO Leakage current V XAO = VIN = 3.3V 2 mA
VCOM BUFFER (VCOM)
VSUP VSUP supply range (2) VSUP = VS 7 18 V
VOFFSET Input offset voltage VCM = VOPI = VSUP/2 = 6.8 V –15 15 mV
IB Input bias current VCM = VOPI = VSUP/2 = 6.8 V -1 1 mA
VCM Common mode input voltage range VOFFSET = 10 mV, IOPO = 10 mA 1 VS-1.5 V
CMRR Common mode rejection ratio VCM = VOPI = VSUP/2 = 6.8 V, 1 MHz 66 dB
VOL Output voltage swing low IOPO = 10 mA 0.10 0.25 V
VOH Output voltage swing high IOPO = 10 mA VS - 1 VS - 0.65 V
Source (VOPI = VSUP/2 = 6.8 V, OPO = GND) 90 130
Isc Short circuit current Sink (VOPI = VSUP/2 = 6.8 V, 110 160 mA
VOPO = VSUP = 13.6 V)
Source (VOPI = VSUP/2 = 6.8, VOFFSET = 15 mV) 130
Io Output current mA
Sink (VOPI = VSUP/2 = 6.8, VOFFSET = 15 mV) 130
PSRR Power supply rejection ratio 40 dB
SR Slew rate AV = 1, VOPI = 2 VPP 60 V/ms
BW –3db bandwidth AV = 1, VOPI = 60 mVPP 60 MHz
GATE DRIVER (GD)
IGD Gate driver sink current EN = 'high' 10 mA
RGD Gate driver internal pull up resistance 5 kΩ
HIGH VOLTAGE STRESS TEST (HVS)
RHVS RHVS pull down resistance HVS = 'high', VIN = 2.5V to 6 V, IHVS = 100 µA 400 500 600 Ω
ILEAK_RHVS RHVS leakage current HVS = 'low', VRHVS = 5 V 0.1 mA

(1) External pull-up resistor to be chosen so that the current flowing into XAO Pin (V XAO = 0 V) when active is below I XAO_MIN = 1mA.
(2) Maximum output voltage limited by the Overvoltage Protection and not the maximum power switch rating of the boost converter.

4 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

PIN ASSIGNMENT

VGHM

COMP
VDPM

AGND
VGH

NC
RE

SS
32 31 30 29 28 27 26 25
REG_FB 1 24 FB

REG_O 2 23 RHVS

REG_I 3 22 NC

SUP 4 PowerPAD® 21 PGND

-
Exposed Thermal Die
OPO 5 20 PGND

OPI 6 19 SW

OPGND 7 18 SW

VFLK 8 17 GD
9 10 11 12 13 14 15 19
VDET

HVS
XAO

EN

AGND

VIN

VIN
FREQ

TERMINAL FUNCTIONS
PIN
I/O DESCRIPTION
NAME NO.
REG_FB 1 I Voltage regulator feedback pin.
REG_O 2 O Voltage regulator output pin.
REG_I 3 I Voltage regulator input pin.
SUP 4 I Input supply pin for the gate voltage shaping and operational amplifier blocks. Also overvoltage
protection sense pin. SUP pin must be supplied by VS voltage.
OPO 5 O VCOM Buffer output pin.
OPI 6 I VCOM Buffer input pin.
OPGND 7 VCOM Buffer analog ground.
VFLK 8 I Input pin for charge/discharge signal of VGHM. VFLK = 'low' discharges VGHM through RE pin.
XAO 9 O Reset function output pin (open-drain). XAO signal is active low.
VDET 10 I Reset function threshold pin. Connect a voltage divider to this pin to set the threshold voltage.
HVS 11 I High Voltage Stress function logic input pin. Apply a high logic voltage to enable this function
FREQ 12 I Boost converter frequency select pin. Oscillator is 630 kHz when FREQ is connected to GND and
1.2 MHz when FREQ is connected to VIN.
EN 13 I Shutdown control input. Apply a logic high voltage to enable the device.
AGND 14, 26, Analog ground.
exposed pad
VIN 15, 16 I Input supply pin.
GD 17 O Gate driver pin. Connect the gate of the boost converter's external input-to-output isolation switch to
this pin.
SW 18, 19 Switch pin of the boost converter.
PGND 20, 21 Power ground.
NC 22, 28 Not connected.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

TERMINAL FUNCTIONS (continued)

PIN
I/O DESCRIPTION
NAME NO.
RHVS 23 Voltage level set pin. Connect a resistor to this pin to set VS voltage when HVS = 'high'.
FB 24 I Boost converter feedback pin.
COMP 25 I/O Boost converter compensation pin.
SS 27 I/O Boost soft-start control pin. Connect a capacitor to this pin if a soft-start is needed. Open = no
soft-start.
VDPM 29 I/O Sets the delay to enable VGHM output. Pin for external capacitor. Floating if no delay needed.
VGH 30 I Input pin for the positive charge pump voltage.
VGHM 31 O Gate voltage shaping output pin.
RE 32 Slope adjustment pin for gate voltage shaping. Connect a resistor to this pin to set the discharging
slope of VGHM when VFLK = 'low'.

FUNCTIONAL BLOCK DIAGRAM

VIN VS

SW

SUP
SW
GD

EN

FREQ Boost Converter FB

(VS)
VIN RHVS
High Voltage
VIN Stress HVS
VS
Gate
Driver REG_I
VIN
VIN
XAO VREG_O
REG_O
LDO
Reset Function
(VREG_O)
VDET (XAO)
REG_FB

VGH

VGH
VS
VGHM VGHM
Gate Voltage
Shaping
RE
OPI (VGHM)

VCOM VFLK
VCOM (VCOM)
OPO

VDPM
OPGND

COMP

AGND

AGND

PGND

PGND
SS

6 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS
FIGURE
Efficiency vs. Load Current VIN = 5 V, VS = 13.6 V Figure 1
f = 630 kHz/1.2 MHz
Efficiency vs. Load Current VIN = 5 V, VS = 18 V Figure 2
f = 630 kHz/1.2 MHz
PWM Switching Discontinuous Conduction Mode VIN = 5 V, VS = 13.6 V/ 2 mA Figure 3
f = 630 kHz
PWM Switching Continuous Conduction Mode VIN = 5 V, VS = 13.6 V/ 500 mA Figure 4
f = 630 kHz
Boost Frequency vs. Load Current VIN = 5 V, VS = 13.6 V Figure 5
f= 630 kHz/1.2 MHz
Boost Frequency vs. Supply Voltage VS = 13.6 V/100 mA Figure 6
f = 630 kHz/1.2 MHz
Load Transient Response Boost Converter VIN = 5 V, VS = 13.6 V Figure 7
High Frequency (1.2 MHz) IOUT = 50 mA ~ 400 mA, f = 1.2 MHz
Load Transient Response Boost Converter VIN = 5 V, VS = 13.6 V Figure 8
Low Frequency (630 KHz) IOUT = 50 mA ~ 400 mA, f = 630 kHz
Boost Converter Output Current Capability VIN = 5 V, VS = 9 V, 13.6 V, 15 V, 18 V Figure 9
f = 1.2 MHz, L = 4.7 µH
Soft-start Boost Converter VIN = 5 V, VS = 13.6 V, IOUT = 600 mA Figure 10
Overvoltage Protection Boost Converter (OVP) VIN = 5 V, VS = 13.6 V Figure 11
Load Transient Response LDO VLVIN = 5 V, VS = 13.6 V Figure 12
VREG_O = 12.5 V, ILVOUT = 5 mA - 30 mA
Gate Voltage Shaping VGH = 23 V Figure 13
XAO Signal and LCD Discharge Function Figure 14
Power On Sequencing Figure 15
Power Off Sequencing Figure 16
Short Circuit Protection ( < 114 ms) Figure 17
Short Circuit Protection ( > 114 ms) Figure 18

For all the following graphics, the inductors used for the measurements are CDRH127 (L = 4.7 µF) for
f = 1.2 MHz, and CDRH127LD (L = 10 µF) for f = 630 kHz.
EFFICIENCY EFFICIENCY
vs vs
LOAD CURRENT (Vs = 13.6 V) Load Current (Vs = 18 V)
100 100
f = 630 kHz f = 630 kHz
90 L = 10 µ H L = 10 µ H
90

80 f = 1.2 MHz f = 1.2 MHz

80
L = 4.7 µ H L = 4.7 µ H
70 70
Efficiency - [%]
Efficiency - [%]

60 60
50 50
40 40

30 30

20 20
V IN = 5 V V IN = 5 V
10 10 V S = 18 V
V S = 13.6 V
0 0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 0.2 0.4 0.6 0.8 1.0

IOUT - Load current - [A] IOUT - Load current - [A]

Figure 1. Figure 2.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 7

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

BOOST CONVERTER PWM SWITCHING BOOST CONVERTER PWM SWITCHING

DISCONTINUOUS CONDUCTION MODE CONTINUOUS CONDUCTION MODE

V SW V SW
10 V/div 10 V/div

V S_AC V S_AC
50 mV/div
50 mV/div
VIN = 5 V
VS = 13.6 V/2 mA
f = 630 kHz
VIN = 5 V
IL IL
VS = 13.6 V/500 mA
500 mA/div 1 A/div
f = 630 kHz

1 µs/div 1 µs/div
Figure 3. Figure 4.

BOOST CONVERTER FREQUENCY BOOST CONVERTER FREQUENCY

vs vs
LOAD CURRENT SUPPLY VOLTAGE
1600 1400
FREQ = VIN
1400 FREQ = VIN
1200 L = 4.7 µH
L = 4.7 µH
1200
f - frequency - [kHz]

1000
f - frequency - [kHz]

1000
800 FREQ = GND
FREQ = GND L = 10 µH
800
L = 10 µH
600
600

400 400
VIN = 5 V
200 VS = 13.6 V 200
VS = 13.6 V/100 mA
0
0 0.2 0.4 0.6 0.8 1
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
IOUT - Load current - [A]
VIN - Supply voltage - [V]

Figure 5. Figure 6.

LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE

BOOST CONVERTER - HIGH FREQUENCY (1.2 MHz) BOOST CONVERTER - LOW FREQUENCY (630 kHz)
VIN = 5 V VIN = 5 V
VS = 13.6 V VS = 13.6 V

V S_AC V S_AC
200 mV/div 200 mV/div
COUT = 40 µF COUT = 40 µF
L = 4.7 µH L = 10 µH
RCOMP = 47 kΩ RCOMP = 47 kΩ
CCOMP = 3.3 nF CCOMP = 3.3 nF

IOUT IOUT
200 mA/div 200 mA/div

IOUT = 50 mA – 400 mA IOUT = 50 mA – 400 mA

200 µs/div 200 µs/div

Figure 7. Figure 8.

8 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

BOOST CONVERTER BOOST CONVERTER

OUTPUT CURRENT CAPABILITY SOFT-START
3.0 V IN
5 V/div

2.5
EN VIN = 5 V
5 V/div
VS = 13.6 V / 600 mA (resistive)
IOUT - Load current - [A]

2.0 VS = 18 V
CSS = 100 nF
GD
VS = 9 V VS = 15 V 10 V/div
1.5
V S = 13.6 V

1.0 VS
10 V/div
VIN = 5 V
0.5
f = 1.2 MHz IL

L = 4.7 µH 1 A/div
0.0 2 ms/div
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VIN - Supply voltage - [V]

Figure 9. Figure 10.

OVERVOLTAGE PROTECTION LOAD TRANSIENT RESPONSE

BOOST CONVERTER (OVP) VOLTAGE REGULATOR FOR GAMMA BUFFER

FB shorted V IN = 5 V
to GND V REG_O = 12.5 V
GD
for > 55ms COUT = 1 µF
VREG_O_AC
5 V/div
50 mV/div

VS
10 V/div

VSW IREG_O
10 V/div 10 mA/div

IREG_O = 5 mA – 30 mA

20 ms/div 200 µs/div

Figure 11. Figure 12.

XAO SIGNAL AND

GATE VOLTAGE SHAPING LCD DISCHARGE FUNCTION

V GHM = 23 V down to GND VDET_threshold

V IN
reached
RE = 80 k Ω 5 V/div
VFLK VS
5 V/div 10 V/div

XAO
5 V/div

VGHM
VGH
10 V/div
10 V/div
VGHM = VGH
VGHM
10 V/div

400 µs/div 2 ms/div

Figure 13. Figure 14.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 9

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

POWER ON SEQUENCING POWER OFF SEQUENCING

V IN V IN
5 V/div 5 V/div
GD GD
5 V/div 5 V/div

VS Boost PG VS
10 V/div 10 V/div

VCOM VCOM
10 V/div 10 V/div

VREG_O VREG_O
10 V/div 10 V/div

VGHM VGHM
20 V/div 20 V/div
Delay set by CDPM
4 ms/div 4 ms/div
Figure 15. Figure 16.

SHORT CIRCUIT PROTECTION SHORT CIRCUIT PROTECTION

(< 114 ms) (> 114 ms)

VS VS
10 V/div 10 V/div

2 ms
GD GD
5 V/div 5 V/div

55 ms 55 ms

XAO XAO
5 V/div
5 V/div

40 ms/div 40 ms/div
Figure 17. Figure 18.

10 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

APPLICATION INFORMATION

BOOST CONVERTER
VIN VS

EN VIN VIN GD SW SW

Gate Driver SUP

FREQ (Short Circuit OVP
Protection)

SUP FB

SS Current limit
and
Soft Start

Toff Generator

Bias Vref = 1.24 V

UVLO
Thermal Shutdown HVS
Ton
Gate Driver of
PWM
Power
Generator
COMP Transistor

FB
GM Amplifier

RHVS
HVS
Vref

PGND PGND

Figure 19. Boost converter block diagram

The boost converter is designed for output voltages up to 18 V with a switch peak current limit of 4 A minimum.
The device, which operates in a current mode scheme with quasi-constant frequency, is externally compensated
for maximum flexibility and stability. The switching frequency is selectable between 630 kHz and 1.2 MHz and
the minimum input voltage is 2.5 V. To limit the inrush current at start-up a soft-start pin is available.
TPS65148 boost converter’s novel topology using adaptive off-time provides superior load and line transient
responses and operates also over a wider range of applications than conventional converters.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 11

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

BOOST CONVERTER DESIGN PROCEDURE

The first step in the design procedure is to verify whether the maximum possible output current of the boost
converter supports the specific application requirements. A simple approach is to estimate the converter
efficiency, by taking the efficiency numbers from the provided efficiency curves or to use a worst case
assumption for the expected efficiency, e.g. 85%.
V ´h
1. Duty Cycle: D = IN
VS (1)
VIN_min ´ D
2. Inductor ripple current: ΔIL =
f ´L (2)
æ ΔIL ö
3. Maximum output current: IOUT_max = ç ILIM_min - ´ (1 - D)
è 2 ÷ø (3)
ΔIL I
4. Peak switch current: Iswpeak = + OUT
2 1- D (4)
Iswpeak = Converter switch current (must be < ILIM_min = 4 A)
f = Converter switching frequency (typically 1.2 MHz or 630 kHz)
L = Selected inductor value (from the Inductor Selection section)
h = Estimated converter efficiency (use the number from the efficiency plots or 85% as an estimation)
ΔIL = Inductor peak-to-peak ripple current

The peak switch current is the steady state current that the integrated switch, inductor and external Schottky
diode have to be able to handle. The calculation must be done for the minimum input voltage where the peak
switch current is highest.

Inductor Selection
The main parameter for the inductor selection is the saturation current of the inductor which should be higher
than the peak switch current as calculated above with additional margin to cover for heavy load transients. An
alternative, more conservative, is to choose the inductor with a saturation current at least as high as the
maximum switch current limit of 5.6 A. Another important parameter is the inductor DC resistance. Usually the
lower the DC resistance the higher the efficiency. It is important to note that the inductor DC resistance is not the
only parameter determining the efficiency. Especially for a boost converter where the inductor is the energy
storage element, the type and core material of the inductor influences the efficiency as well. At high switching
frequencies of 1.2 MHz inductor core losses, proximity effects and skin effects become more important. Usually
an inductor with a larger form factor gives higher efficiency. The efficiency difference between different inductors
can vary between 2% to 10%. For the TPS65148, inductor values between 3.3 mH and 6.8 mH are a good choice
with a switching frequency of 1.2 MHz. At 630 kHz, inductors between 7 mH and 13 mH are recommended.
Isat > Iswpeak imperatively. Possible inductors are shown in Table 1.

Table 1. Inductor Selection

L COMPONENT SUPPLIER COMPONENT CODE SIZE DCR TYP Isat
(mH) (LxWxH mm) (mΩ) (A)
1.2 MHz
6.8 Epcos B82464G4682M 10.4 x 10.4 x 4.9 20 4.3
4.7 Coiltronics UP2B-4R7-R 14 x 10.4 x 6 16.5 4.2
4.7 Sumida CDRH124NP-4R7M 12.3 x 12.3 x 4.5 18 5.7
4.7 Sumida CDRH127NP-4R7N 12.3 × 12.3 × 8 11.7 6.8
630 kHz
10 Coilcraft DS3316P-103ML 12.95 × 9.4 × 5.08 80 3.5
10 Sumida CDRH8D43NP-100N 8.3 × 8.3 × 4.5 29 4.0
10 Sumida CDRH127NP-100N 12.3 × 12.3 × 8 16 5.4
10 Sumida CDRH127/LDNP-100M 12.3 × 12.3 × 8 15 6.7

12 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

Rectifier Diode Selection

To achieve high efficiency a Schottky type should be used for the rectifier diode. The reverse voltage rating
should be higher than the maximum output voltage of the converter. The averaged rectified forward current IF,
the Schottky diode needs to be rated for, is equal to the output current IOUT:
IF = IOUT (5)
Usually a Schottky diode with 2 A maximum average rectified forward current rating is sufficient for most of the
applications. Also, the Schottky rectifier has to be able to dissipate the power. The dissipated power is the
average rectified forward current times the diode forward voltage VF.
PD = IF × VF
Typically the diode should be able to dissipate around 500mW depending on the load current and forward
voltage.

Table 2. Rectifier Diode Selection

CURRENT VR VF / IF COMPONENT SUPPLIER COMPONENT CODE PACKAGE TYPE
RATING lF
2A 20 V 0.44 V/2 A Vishay SL22 SMA
2A 20 V 0.5 V/2 A Vishay SS22 SMA

Setting the Output Voltage

The output voltage is set by an external resistor divider. Typically, a minimum current of 50 mA flowing through
the feedback divider is enough to cover the noise fluctuation. The resistors are then calculated with 70 µA as:
VS

VFB æ V ö R1
R2 = » 18 kΩ R1 = R2 ´ ç S - 1÷
70 μA è VFB ø VFB
R2

with VFB = 1.240 V (6)

Soft-Start (Boost Converter)

To minimize the inrush current during start-up an external capacitor connected to the soft-start pin SS is used to
slowly ramp up the internal current limit of the boost converter by charging it with a constant current of typically
10 µA. The inductor peak current limit is directly dependent on the SS voltage and the maximum load current is
available after the soft-start is completed (VSS = 0.8 V) or VS has reached its Power Good value, 90% of its
nominal value. The larger the capacitor, the slower the ramp of the current limit and the longer the soft-start time.
A 100-nF capacitor is usually sufficient for most of the applications. When the EN pin is pulled low, the soft-start
capacitor is discharged to ground.

Frequency Select Pin (FREQ)

The digital frequency select pin FREQ allows to set the switching frequency of the device to 630 kHz (FREQ =
'low') or 1.2 MHz (FREQ = 'high'). A higher switching frequency improves the load transient response but
reduces slightly the efficiency. The other benefit of a higher switching frequency is a lower output voltage ripple.
Usually, it is recommended to use 1.2 MHz switching frequency unless light load efficiency is of major concern.

Compensation (COMP)
The regulation loop can be compensated by adjusting the external components connected to the COMP pin. The
COMP pin is the output of the internal transconductance error amplifier. The compensation capacitor will adjust
the low frequency gain and the resistor value will adjust the high frequency gain. Lower output voltages require a
higher gain and therefore a lower compensation capacitor value. A good start, that will work for the majority of
the applications is RCOMP = 47 kΩ and CCOMP = 3.3 nF.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 13

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

Input Capacitor Selection

For good input voltage filtering low ESR ceramic capacitors are recommended. TPS65148 has an analog input
VIN. A 1-mF bypass is required as close as possible from VIN to GND.
Two 10-mF (or one 22-µF) ceramic input capacitor is sufficient for most of the applications. For better input
voltage filtering this value can be increased. Refer to Table 3 and typical applications for input capacitor
recommendations.

Output Capacitor Selection

For best output voltage filtering a low ESR output capacitor is recommended. Four 10-µF (or two 22-µF) ceramic
output capacitors work for most of the applications. Higher capacitor values can be used to improve the load
transient response. Refer to Table 3 for the selection of the output capacitor.

Table 3. Rectifier Input and Output Capacitor Selection

CAPACITOR VOLTAGE COMPONENT SUPPLIER COMPONENT CODE COMMENTS
RATING
10 mF/0805 10 V Taiyo Yuden LMK212BJ106KD CIN
1 mF/0603 10 V Taiyo Yuden EMK107BJ105KA VIN bypass
10 mF/1206 25 V Taiyo Yuden TMK316BJ106ML COUT

To calculate the output voltage ripple, the following equations can be used:
V - VIN IOUT
DVC = S ´ DVC_ESR = Iswpeak ´ RC_ESR
VS ´ f C (7)
ΔVC_ESR can be neglected in many cases since ceramic capacitors provide very low ESR.

Undervoltage Lockout (UVLO)

To avoid misoperation of the device at low input voltages an undervoltage lockout is included that disables the
device, if the input voltage falls below 2.0 V.

Gate Drive Pin (GD)

The Gate Drive (GD) allows controlling an external isolation P-channel MOSFET switch. Using a 1-nF capacitor
is recommend between the source and the gate of the FET to properly turn it on. GD pin is pulled low when the
input voltage is above the undervoltage lockout threshold (UVLO) and when enable (EN) is 'high'. The gate drive
has an internal pull up resistor to VIN of typically 5 kΩ. The external P-channel MOSFET must be chosen with
VT < VIN_min in order to be properly turned on.

Overvoltage Protection (OVP)

The main boost converter has an integrated overvoltage protection to prevent the Power Switch from exceeding
the absolute maximum switch voltage rating at pin SW in case the feedback (FB) pin is floating or shorted to
GND. In such an event, the output voltage rises and is monitored with the OVP comparator over the SUP pin. As
soon as the comparator trips at typically 19 V, the boost converter turns the N-Channel MOSFET off. The output
voltage falls below the overvoltage threshold and the converter starts switching again. If the voltage on the FB
pin is below 90% of its typical value (1.240 V) for more than 55 ms, the device is latched down. The input voltage
VIN needs to be cycled to restart the device. In order to detect the overvoltage, the SUP pin needs to be
connected to output voltage of the boost converter VS. XAO output is independent from OVP.

Short Circuit Protection (SCP)

At start-up, as soon as the UVLO is reached and the EN signal is high, the GD pin is pulled 'low'. The feedback
voltage of the boost converter VFB as well as the SUP pin voltage (VS) are sensed. After 2ms, if the voltage on
SUP pin has not risen or the FB voltage is below 90% of its typical value (1.240 V), then the GD pin is pulled
high for 55ms. After 3 tries, if the device is still in short circuit, it is latched down. The input voltage VIN needs to
be cycled to restart the device. The SCP is also valid during normal operation.

14 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

Over Current Protection (OCP)

If the FB voltage is below 90% of its typical value (1.240 V) for more than 55 ms, the GD pin is pulled 'high' and
the device latched down. The input voltage VIN needs to be cycled to restart the device.

HIGH VOLTAGE STRESS (HVS) FOR THE BOOST CONVERTER

The TPS65148 incorporates a High Voltage Stress test enabled by pulling the logic pin HVS 'high'. The output
voltage of the boost converter VS is then set to a higher output voltage compared to the nominal programmed
output voltage. If unregulated external charge pumps are connected via the boost converter, their outputs will
increase as VS increases. This stress voltage is flexible and set by the resistor connected to RHVS pin. With
HVS = 'high' the RHVS pin is pulled to GND. The external resistor connected between FB and RHVS (as shown
in Figure 19) is therefore put in parallel to the low-side resistor of the boost converter's feedback divider. The
output voltage for the boost converter during HVS test is calculated as:
VS

R1+ R2 || R12 R1´ R2

VS_HVS = VFB ´ R12 = R1
R2 || R12 æ VS_HVS ö
ç - 1÷ ´ R2 - R1 VFB
è VFB ø R12 R2

with VFB = 1.240 V (8)

If the VGH voltage needs to be set to a higher value by using the HVS test, VGH must be connected to VGH pin
without a regulation stage. The VGH voltage will then be equal to VS_HVS times 2 or 3 (depending if a doubler or
tripler mode is used for the external positive charge pump). The same circuit changes can be held on the
negative charge pump as well if required.

CAUTION
Special caution must be taken in order to limit the voltage on the VGH pin to 35V
(maximum recommended voltage).

VOLTAGE REGULATOR FOR GAMMA BUFFER

TPS65148 includes a voltage regulator (Low Dropout Linear Regulator, LDO) to supply the Gamma Buffer with a
very stable voltage. The LDO is designed to operate typically with a 4.7 µF ceramic output capacitor (any value
between 1 µF and 15 µF works properly) and a ceramic bypass capacitor of minimum 1 µF on its input REG_I
connected to ground. The output of the boost converter VS is usually connected to the input REG_I. The LDO
has an internal softstart feature of 2 ms maximum to limit the inrush current. As for the boost converter, a
minimum current of 50 µA flowing through the feedback divider is usually enough to cover the noise fluctuation.
The resistors are then calculated with 70 µA as:
VREG_O

VREG_FB æ VREG_O ö R10

R11 = » 18 kW R10 = R11 ´ ç - 1÷
70 μA ç VREG_FB ÷ VREG_FB
è ø
R11

with VREG_FB = 1.240 V (9)

VCOM BUFFER
The VCOM Buffer power supply pin is the SUP pin connected to the boost converter VS. To achieve good
performance and minimize the output noise, a 1 mF ceramic bypass capacitor is required directly from the SUP
pin to ground. The input positive pin OPI is either supplied through a resistive divider from VS or from an external
PMIC. The buffer is not designed to drive high capacitive loads; therefore it is recommended to connect a series
resistor at the output to provide stable operation when driving a high capacitive load. With a 3.3 Ω series resistor,
a capacitive load of 10 nF can be driven, which is usually sufficient for typical LCD applications.
Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

EXTERNAL CHARGE PUMPS

External Positive Charge Pump

The external positive charge pump provides with the below configuration (figure Figure 20) an output voltage VGH
of maximum 3 times the output voltage of the Boost converter VS. The first stage provides roughly 3*VS in that
configuration, and the second stage is used as regulation whose output voltage is selectable. The operation of
the charge pump driver can be understood best with Figure 20 which shows an extract of the positive charge
pump driver circuit out of the typical application. The voltage on the collector of the bipolar transistor is slightly
equal to 3*VS–4*VF. The next stage regulates the output voltage VGH. A Zener diode clamps the voltage at the
desired output value and a bipolar transistor is used to provide better load regulation as well as to reduce the
quiescent current. Finally the output voltage on VGH will be equal to VZ–Vbe.
VGH
T2 ~ 32V / 20mA
3. VS
BC850B
C23
C22 470 nF
470 nF D8
R15
BAT54S 4.3 kW
C21
D9
2. VS 1 mF/
BAT54S 50 V
C20
C19 470 nF
D5
470 nF
D7
BAT54S BZX84C
33V
VIN D6
2.5 V to 6 V L
VS
13.6V / 500mA
Q1 D1

Figure 20. Positive Charge Pump

Doubler Mode: if the VGH voltage can be reached using doubler mode, then the configuration is the same than
the one shown in Figure 28.

External Negative Charge Pump

The external negative charge pump works also with two stages (charge pump and regulation). The charge pump
provides a negative regulated output voltage. Figure 21 shows the operation details of the negative charge
pump. With the first stage, the voltage on the collector of the bipolar transistor is equal to –VS+VF .
The next stage regulates the output voltage VGL. A resistor and a Zener diode are used to clamp the voltage to
the desired output value. The bipolar transistor is used to provide better load regulation as well as to reduce the
quiescent current. The output voltage on VGL will be equal to -VZ–Vbe.

16 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

VGL
T1
~ -7 V/20 mA BC857B -VS

D3
R14 C18
C17 BAT54S 470 nF
5.6 kW
C16 470 nF D4
1 mF/
16 V
D2
BZX84C VIN VS
7V5 2.5 V to 6 V 13.6V / 500mA

Q1 D1

Figure 21. Negative Charge Pump

Components Selection

Capacitors (Charge Pumps)

For best output voltage filtering a low ESR output capacitor is recommended. Ceramic capacitors have a low
ESR value but depending on the application tantalum capacitors can be used as well.
The rated voltage of the capacitor has to be able to withstand the voltage across it. Capacitors rated at 50 V are
enough for most of the applications. Typically a 470-nF capacitance is sufficient for the flying capacitors whereas
bigger values like 1 µF or more can be used for the output capacitors to reduce the output voltage ripple.

CAPACITOR COMPONENT SUPPLIER COMPONENT CODE COMMENTS

100 nF/0603 Taiyo Yuden HMK107BJ104KA Flying Cap
470 nF/0805 Taiyo Yuden UMK212BJ474KG Output Cap 1
1 mF/1210 Taiyo Yuden HMK325BJ105KN Output Cap 2

Diodes (Charge Pumps)

For high efficiency, one has to minimize the forward voltage drop of the diodes. Schottky diodes are
recommended. The reverse voltage rating must withstand the maximum output voltage VS of the boost converter.
Usually a Schottky diode with 200 mA average forward rectified current is suitable for most of the applications.

CURRENT VR VF / IF COMPONENT COMPONENT PACKAGE

RATING IF SUPPLIER CODE TYPE
200 mA 30 V 0.5V / 30mA International Rectifier BAT54S SOT23

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

GATE VOLTAGE SHAPING FUNCTION

External Positive
Charge Pump

VIN VS

SW SW SUP

Power Transistor
Boost Converter
VGH

M1
VGHM
VFLK Gate Voltage
Shaping
(GVS)
M2 RE

VDPM Re

PGND AGND

Figure 22. Gate Voltage Shaping Block Diagram

The Gate Voltage Shaping is controlled by the flicker input signal VFLK, except during start-up where it is kept at
low state, whatever the VFLK signal is. The VGHM output is enabled once the VDPM voltage is higher than Vref
= 1.240 V. The capacitor connected to VDPM (C13 on Figure 27) pin sets the delay from the boost converter
Power Good (90% of its nominal value).
I ´ tDPM 20 m A ´ tDPM
CVDPM = DPM =
Vref 1.240 V (10)
VFLK = 'high' → VGHM = VGH
VFLK = 'low' → VGHM discharges through Re resistor
The slope at which VGHM discharges is set by the external resistor connected to RE, the internal MOSFET rDS(on)
(typically 13Ω for M2 – see Figure 22) and by the external gate line capacitance connected to VGHM pin.
Boost
Power Good
VFLK VFLK = “high”

Unknown state

VFLK = “low”
Delay set by
VDPM
VGH

Slope set by
VGHM Re
0V

Figure 23. Gate Voltage Shaping Timing

18 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

If RE is connected with a resistor to ground (see Figure 23), when VFLK = 'low' VGHM will discharge from VGH
down to 0V. Since 5 x t (t = R x C) are needed to fully discharge C through R, we can define the time-constant
of the gate voltage shaping block as follow:
t = (Re + rDS(on)M2) × CVGHM
Therefore, if the discharge of CVGHM should finish during VFLK = 'low':
t VFLK =' low '
t discharge = 5 ´ t = t VFLK =' low ' Þ RE = - rDS(on)M2
5 ´ CVGHM (11)

NOTE
CVGHM and RVGHM form the parasitic RC network of a pixel gate line of the panel. If they
are not known, they can be ignored at the beginning and estimated from the discharge
slope of VGHM signal.

VS

VGHM VS
Re

M2 Re’
Option 2
RE Option 3

Option 1
Re

Re

Figure 24. Discharge Path Options for VGHM

Options 2 and 3 from Figure 24 work like option 1 explained above. When M2 is turned on, VGHM discharges with
a slope set by Re from VGH level down to VS in option 2 configuration and down to the voltage set by the resistor
divider in option 3 configuration. The discharging slope is set by Re resistor(s).

NOTE
When options 2 or 3 are used, VGHM is not held to 0V at startup but to the voltage set on
RE pin by the resistors Re and Re’.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 19

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

RESET FUNCTION
The device has an integrated reset function with an open-drain output capable of sinking 1 mA. The reset
function monitors the voltage applied to its sense input VDET. As soon as the voltage on VDET falls below the
threshold voltage VDET_threshold of typically 1.240 V, the reset function asserts its reset signal by pulling XAO low.
Typically, a minimum current of 50mA flowing through the feedback divider when VDET voltage trips the
reference voltage of 1.240 V is required to cover the noise fluctuation. Therefore, to select R4, one has to set the
input voltage limit (VIN_LIM) at which the reset function will pull XAO to low state. VIN_LIM must be higher than the
UVLO threshold. The resistors are then calculated with 70 µA as:
VIN

VDET æ VIN_LIM ö R4
R5 = » 18 kW R4 = R5 ´ ç - 1÷ VDET
70 μA è VDET ø
R5

with VDET = 1.240 V (12)

The reset function is operational for VIN ≥ 1.6V:

VDET
VDET_threshold+ hys

VDET_threshold
Min. Operating
voltage
VIN = 1.6 V
GND

XAO

Unknown
state

GND

Figure 25. Voltage Detection and XAO Pin

The reset function is configured as a standard open-drain output and requires a pull-up resistor. The resistor R
XAO , which must be connected between the XAO pin and a positive voltage VX greater than 2V - 'high' logic level
- e.g. VIN, can be chosen as follows:
V V - 2V
R XAO_min > X & R XAO_max < X
1 mA 2 mA (13)

THERMAL SHUTDOWN
A thermal shutdown is implemented to prevent damages because of excessive heat and power dissipation.
Typically the thermal shutdown threshold for the junction temperature is 150 °C. When the thermal shutdown is
triggered the device stops operating until the junction temperature falls below typically 136 °C. Then the device
starts switching again. The XAO signal is independent of the thermal shutdown.

20 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

POWER SEQUENCING
When EN is high and the input voltage VIN reaches the Under Voltage Lockout (UVLO), the device is enabled
and the GD pin is pulled low. The boost converter starts switching and the VCOM buffer is enabled. As soon as
VS of the boost converter reaches its Power Good, the voltage regulator for the gamma buffer is enabled and the
delay enabling the gate voltage shaping block starts. Once this delay has passed, the VGHM pin output is
enabled.
1. GD
2. Boost converter & VCOM Buffer
3. Voltage regulator for Gamma Buffer
4. VGHM (after proper delay)
Device Device
ENABLED DISABLED

UVLO
VDET_THRESHOLD
VIN UVLO

EN

GD

BOOST

VCOM

VGH (external)

VGL (external)

REG_O

VDPM Vref = 1.240 V

VFLK Unknown state Unknown state

Delay set
by VDPM Co
nn
e
VG cted
= H to
Slope set Di LC
VGHM s
by Re Fu cha D
nc rg
tio e
n

Figure 26. Sequencing TPS65148

Power off sequencing and LCD discharge function

When the input voltage VIN falls below a predefined threshold (set by VDET_THRESHOLD - see Figure 26 ), XAO is
driven low and VGHM is driven to VGH. (Note that when VIN falls below the UVLO threshold, all IC functions are
disabled except XAO and VGHM). Since VGHM is connected to VGH, it tracks the output of the positive charge
pump as it decays. This feature, together with XAO can be used to discharge the panel by turning on all the pixel
TFTs and discharging them into the gradually decaying VGHM voltage. VGHM is held low during power-up.

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 21

Product Folder Link(s) :TPS65148
TPS65148
SLVS904A – MAY 2009 – REVISED JANUARY 2011 www.ti.com

APPLICATION INFORMATION

Q L D1 VS
VIN
FDS4435 4.7µH SL22 13.6V / 500mA
2.5V to 6.0V

C3 C5~8
C1~2 C4
1nF 4*10µF/
2*10µF/ 10µF/
10V 10V 25V C9
1µF/
P P P P 25V

SW

SUP
SW
GD
R1
EN
180kW
FREQ Boost Converter FB
(VS) R12 R2
VIN RHVS 56kW 18kW
C10
High Voltage
1µF/ HVS
VIN Stress
10V P
VS
Gate
Driver REG_I
VIN
C15
VIN R3 1µF/
2.7kW P 25V VREG_O
XAO 12.5V /15mA
REG_O
R4 LDO
Reset Function
27kW (VREG_O)
VDET (XAO) R10 C14
REG_FB 91kW 4.7µF/
R5 25V
18kW R11 P
10kW
VGH

VGH
VS
VGHM
Gate Voltage VGHM
R6 Shaping ~ 23V / 20mA
30kW RE
OPI (VGHM)
R9
R7 VCOM VCOM VFLK 80kW
18kW 5V / 100mA OPO (VCOM)
P

VDPM
OPGND

COMP

AGND

AGND

PGND

PGND

C13
SS

100nF

R8
47kW C12 P P
C11 100nF
3.3nF

Figure 27. TPS65148 Typical Application

22 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS65148

 TPS65148
www.ti.com SLVS904A – MAY 2009 – REVISED JANUARY 2011

VGH
T2 ~ 23V / 20mA
BC850B
VGL
C18 C19
~ -7V / 20mA T1 D3 R15
470nF 470nF D5 C20
BC857B
470nF 2kW C21
BAT54S
1µF/
R14 C17 BAT54S D7 50V
C16 470nF D6 BZX84C
5.6kW
1µF/ 24V P
P
16V D2 D4
BZX84C
P 7V5 P P

L D1 VS
VIN Q
4.7µH SL22 13.6V / 500mA
2.5V to 6.0V FDS4435

C3 C5~8
C1~2 C4
1nF 4*10µF/
2*10µF/ 10µF/
10V 10V 25V C9
1µF/
P P P P
25V

SW

SUP
SW
GD

R1
EN
180kW
FREQ Boost Converter FB
(VS) R12 R2
VIN RHVS 56kW 18kW
C10
High Voltage
1µF/ HVS
VIN Stress
10V P
VS
Gate
Driver REG_I
VIN
C15
VIN R3 1µF/
2.7kW P 25V VREG_O
XAO 12.5V /15mA
REG_O
R4 LDO
Reset Function
27kW (VREG_O)
VDET (XAO) R10 C14
REG_FB 91kW 4.7µF/
R5 25V
18kW R11 P

10kW
VGH

VGH
VS
VGHM
Gate Voltage VGHM
R6 Shaping ~ 23V / 20mA
30kW RE
OPI (VGHM)
R9
R7 VCOM VCOM VFLK 80kW
18kW 5V / 100mA OPO (VCOM)
P

VDPM
OPGND

COMP

AGND

AGND

PGND

PGND

C13
SS

100nF

R8
47kW C12 P P
C11 100nF
3.3nF

Figure 28. TPS65148 Typical Application with Positive Charge Pump in Doubler Mode Configuration

Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 23

Product Folder Link(s) :TPS65148
 PACKAGE OPTION ADDENDUM

www.ti.com 4-Mar-2016

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

TPS65148RHBR ACTIVE VQFN RHB 32 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS
& no Sb/Br) 65148

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 4-Mar-2016

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jan-2014

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS65148RHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jan-2014

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS65148RHBR VQFN RHB 32 3000 367.0 367.0 35.0

Pack Materials-Page 2
 IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated