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Trainee Design Engineer Role

The document describes a job opening for a Trainee Design Engineer position at TESSOLVE SEMICONDUCTORS. The role offers a CTC of Rs. 2 Lakhs per year and requires a 6 month probation period. Key responsibilities include having basic knowledge of ATE boards and design processes, understanding customer requirements, schematic capture and layout design, DRC checks, stackup design, and communication skills. The ideal candidate will have an ECE, EEE, or E&I degree and be willing to take on additional responsibilities.

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SHAIK ROSHAN
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170 views2 pages

Trainee Design Engineer Role

The document describes a job opening for a Trainee Design Engineer position at TESSOLVE SEMICONDUCTORS. The role offers a CTC of Rs. 2 Lakhs per year and requires a 6 month probation period. Key responsibilities include having basic knowledge of ATE boards and design processes, understanding customer requirements, schematic capture and layout design, DRC checks, stackup design, and communication skills. The ideal candidate will have an ECE, EEE, or E&I degree and be willing to take on additional responsibilities.

Uploaded by

SHAIK ROSHAN
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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TESSOLVE SEMICONDUCTORS

Job Title: Trainee - Design Engineer

Probation Period : 6 months

CTC: Rs. 2 Lakhs/annum

Branches: ECE, EEE, E&I

Job Description for Design Engineer:

1. Should have basic knowledge of 2 ATE types.


2. Basic knowledge in application/Characterization/ EVM boards/ Burn in
board/ Flexible board
3. Should be familiar with customer’s specific design guidelines.
4. Should be able to analyze and understand the customer requirements
from the inputs and be aware of all the checkpoints in QC checklist and
ability to validate the design against the checklist.
5. Should be able to do the following aspects
6. To create symbol and footprint as per standard.
7. Identify the components and their parameters for generating the BOM
as per standard.
8. Capture the schematic.
9. Analyze and identify the schematic circuits and errors in the customer
schematic.
10. Design the layout from placement to Gerber generation.
11. Work on the DRC constraint setting for placement and routing.
12. The placement implementing DFA constraint and with the signal flow
as in the circuit and customer requirement.
13. Create the fabrication details by understanding the fab process and
requirements.
14. Basicgerber checks using CAM tool.
15. Design the stack up with impedance calculations using Polar Calculator.
16. Create a balanced stack up considering the required parameters.
17. Calculate trace width / via requirements based on current rating
requirements.
18. Should have knowledge on design requirement for high voltage and
high current application.
19. Should be able to communicate to the customer directly through mail.

Should be able to work across the teams in Tessolve.


20. Willingness to take additional responsibility.
21. Time management.

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