A Low Power, High Gain 2.4/5.
2 GHz Concurrent
Dual-Band Low Noise Amplifier
Hossein Khosravi Salman Zandian Abolfazl Bijari
Department of Electrical and Computer Department of Electrical and Computer Department of Electrical and Computer
Engineering Engineering Engineering
University of Birjand University of Birjand University of Birjand
Birjand, Iran Birjand, Iran Birjand, Iran
h.khosravi95@birjand.ac.ir salman.zandian@birjand.ac.ir a.bijari@birjand.ac.ir
Nabeeh Kandalaft
Electrical and Computer Engineering
Department
Grand Valley State University
Grand Rapids, Michigan, USA
kandalan@gvsu.edu
Abstract— This paper introduces a high gain and low power of the RF front end receiver. An alternative method employs the
concurrent dual-band low-noise amplifier (LNA) operating in the switched capacitors, or switched inductors, in the input/output
2.4/5.2-GHz which can be used for wireless local area network networks [9-12]. The switching method cannot provide a
(WLAN) applications. The proposed dual-band LNA consists of a suitable match for both frequency bands, and it also limits the
wideband LNA and notch filters. The wideband LNA employs receiver to one frequency band at a time. The conventional
current-reused technique to reduce power consumption and design is concurrent dual-band LNA [13-16], that is able to
provide flat gain over wide bandwidth. By applying notch filters provide a better trade-off between noise figure, power and gain.
at the first stage output and the second stage input of the wideband Hashemi et. al [14] employs the cascode structure to provide
LNA, the dual-band frequency response is formed. The dual-band
high gain and suitable reverse isolation . By using a parallel
LNA has been designed and simulated in RF-TSMC 0.18µm
CMOS technology by Advanced Designed System (ADS). The
combination of bandstop and bandpass filters in output matching
power consumption is 2.25 mW in both bands with 1.8 V supply network the frequency response is shaped. This dual-band LNA
voltage. At 2.4 GHz, simulation results exhibit a noise figure (NF) exhibits high gain and low power. However, mixture of these
of 1.8 dB, a power gain (S21) of 15.9 dB and an input return loss filters in output matching network caused unbalanced amplitude
(S11) of -14 dB. In addition, it features a NF of 2.7 dB, a power of the gain. In this paper, a low power, high gain concurrent
gain of 14.3 dB and an input return loss of -12.8 dB at 5.2 GHz. dual-band LNA based on current-reused technique, is designed
for WLAN applications, which can operate at 2.4/5.2GHz.
Keywords—Concurrent; Current-rused; Dual-band; Low
power; Low noise amplifier (LNA)
This paper is organized as follows. Section II covers the
design procedure in details, as well as input impedance
I. INTRODUCTION matching, voltage gain and noise figure (NF). Simulation results
are shown in Section III and finally Section IV concludes this
Dual-band and multi-band transceivers are emerging to paper.
extend communication systems functionalities [1-2]. In recent
years, wireless local area networks (WLANs) have been widely II. CIRCUIT DESIGN
used in offices and homes to provide a multi-standard receivers
and high data rate. Therefore, it is necessary to have a RF front- The schematic of the proposed dual-band LNA is shown in
end receiver, which able to support multi-standard, multi-band. Fig. 1. It consists of two common source (CS) stages and notch
One of the most challenges for the multi-standard, multi band filters. The first stage (CS) has high gain at lower frequencies
receivers is the design of low noise amplifiers (LNAs). As LNAs and provides wide input matching by using an additional
are the first active stage in a chain of the receiver circuits, they capacitance (C1) and inductances (Ls and L1), which are
determine the overall dual-band receiver performance. connected with M1 in parallel and in series, respectively. The
second stage employs a current-reuse topology to minimize
The noise of the LNA directly effects the performance of the power consumption and increase the gain. Since the DC current
receiver. Therefore, the gain of LNA should be large enough to of transistor M3 is reused by M2, no further driving currents are
overcome the noise of next stages and low enough to satisfy the required for M1. The resistive feedback and series inductors of
requirements for the linear behavior of following stages [3]. A L6 are applied to provide simultaneous input matching and wide
simple way to design a dual-band LNA is to use two narrow bandwidth. The notch filters of L2-C2 and L3-C3 are used to
band LNAs which are constructed in parallel position [4-8]. The achieve the concurrent dual-band LNA frequency response. The
performance of each frequency band can be optimized. But this DC bias isolation was implemented using the capacitances C4-8
approach requires a large chip area and increases the complexity
978-1-7281-0554-3/19/$31.00 ©2019 IEEE
0788
B. input matching and Gain
Simultaneous dual-band input matching can be achieved by
adding an additional capacitance (C1) and inductances (L4, L1)
connected with M1 in parallel and in series, respectively. In Fig.
3, the simplified small signal equivalent circuit is shown. This is
used to derive the input impedance of the proposed LNA. Based
on the small-signal model and neglecting the gate-to-drain
capacitance (Cgd), the input impedance, ZIN, can be expressed as
follows:
1
= +( + ) + (3)
+ +
Fig. 1. Schematic of the proposed dual-band LNA
A. Notch filters
Fig. 2 shows the frequency response (|S21|) of the proposed
dual-band LNA. The wideband LNA is designed to obtain a
rather flat gain from f1=2 GHz to f2=5.5 GHz. The concurrent
dual-band LNA is then achieved by applying shunt and series
LC tanks in the second stage input network, the notch frequency
of f3 is near the shunt notch filter .The frequency of f4 is Fig. 3. Small signal equivalent circuit of the input stage
recognized by the series notch filter in the first stage output
network. Where, gm1 and Cgs1 are the gate-to-source capacitance and
transconductance of M1. As seen in (3), Leq=L1+L4 and
Ceq=C1+Cgs1 are the dominant parameters in deciding the
resonant frequency (f0) of the input matching impedance. This
can be written as:
1
= (4)
2
The quality factor of input matching network can be
expressed as:
1
= (5)
2
In the 2–5.5 GHz LNA, the parallel LC tank consisting of
Leq and Ceq resonates around 3 GHz, and provides a wideband
input matching. Thus, the dimensions and bias current of M1, L4
and C1 should be set to satisfy the matching condition as follows:
Fig. 2. Frequency response (|S21|) of the proposed LNA
The notch frequencies (f3, f4) can be obtained as follows: = (6)
1
= (1) Where, RS is the terminating source resistance. Based on the
2 small-signal analysis, the voltage gain of the first stage (Av1) can
1 be derived as:
= (2)
2
≅− (7)
( + ) +1
In order to achieve the desired input matching and high gain
at both operating frequencies, the resonance frequency of the
notch filters are designed to have the lowest impact in the 2.4 Where, ZL is loading effect from the second stage that can be
GHz and 5.2 GHz frequency bands. represented as follows:
0789
1 , ≅ ×
≅ (8)
( + )
+ +1
(13)
Assuming a small value for 1/(gm2+gm3), Av1 can be = 1
+1 +1
simplified as:
1
≅− × (9) C. Noise Analysis
+ +1
In order to analyze the noise performance of the proposed
LNA, the two stages of the LNA in a separated form are shown
Therefore, Av1 has a resonant frequency of f0. Subsequently, in Fig. 5. The overall noise figure (NF) of the LNA can be
the lower band of the dual-band LNA can be shaped by tuning derived from the following equation:
the f0. In the second stage of the wideband LNA, a resistive
current-reuse amplifier is designed for further signal 1 , (14)
amplification at high frequencies. To control the upper band of =
dual-band LNA, a series peaking inductor L6 is implemented. ,
Where, vn,out is the output voltage noise, and Avs is the voltage
gain from vs to vo. By assuming the series (RSi) and equivalent
parallel (RPi) resistances of the inductors, Avs is derived as
follows:
=
( ( + )+ ) (15)
( + )
×
(1 + ( + ) )
Fig. 4. Small signal equivalent circuit of the second stage
From the small signal model of the second stage shown in
Fig. 4, the voltage gain of second stage (Av2) can be expressed
as:
≅− ( + )
+1 (10)
+
×
+1
Where, gm2 and gm3 are the transconductance of M2 and M3,
respectively. As seen in equation (11), AV2 has two resonant
frequencies as follows:
(a)
1 1
= (11)
2
1 1
=
2 (12)
+
It is noted that fp<fZ, therefore, the upper band of the dual-
band LNA (5.2 GHz) can be shaped by proper setting of fZ. To
achieve a higher gain from the upper band, gm2 and gm3 can be
tuned. Hence, the overall voltage gain (Avt) can be expressed as (b)
follows: Fig. 5. Equivalent circuits for noise analysis (a) input stage, (b) second stage
0790
For simplicity, it is assumed that RS1<<RS and consequently, Fig. 7 shows the simulated power gain (S21) and input return
NF is described by the following equation: loss (S11) at both bands. When operating at 2.4 GHz, the dual-
band LNA has a power gain of 15.9 dB and an input return loss
of -14dB. The band at 5.2 GHz exhibits a power gain of 14.3 dB
≅1+ + (16) and an input return loss (S11) of -12.8 dB. The linearity of the
dual-band LNA is tested by feeding two tones with 4 MHz
+ 1+ + frequency spacing. The input of third-order intercept point (IIP3)
at 2.4 GHz and 5.2 GHz are about -9 dBm and -14 dBm are
shown in Fig. 8, respectively.
+ +
( + ) ( + ) 20
15
Where, γ is the MOS transistor thermal noise coefficient, α
is defined as the ratio of gm to the zero-bias drain conductance 10
gd0. As observed, the noise performance of the first stage 5
S21 (dB)
determines the NF from the ratio of the inductor series resistance 0
(RS4/RS1). In parallel, decreasing RS4/RS1 would significantly -5
decrease the NF. -10
III. SIMULATION RESULTS PREPARE -15
-20
The proposed dual-band LNA is designed in the RF-TSMC
1 2 3 4 5 6 7 8
CMOS 0.18 μm technology by Advanced Design System Frequency (GHz)
(ADS). Using a voltage supply of 1.8 V, the proposed LNA 0
power consumption is 2.25 mW. Table 1 shows the results of the
simulated dual-band LNA are summarized in Table 1.
-5
To satisfy gain, input matching impedance, and the NF, the
width of transistors were selected taking into consideration the S11 (dB)
over drive voltages, power consumption and the required
-10
transconductance. Fig. 6 illustrates the simulated noise figure
(NF) at both bands where NF at 2.4 GHz band is 1.8 dB, and at
5.2 GHz band is 2.7 dB.
-15
1 2 3 4 5 6 7 8
TABLE I. COMPONENT VALUE Frequency (GHz)
M1 (64×7.5×0.18) Fig. 7. Simulated S-parameters of the dual-band LNA
Transistor
M2 (61×1.5×0.18) 20
(Finger×W(μm)×L(μm)) Fund
M3 (10×1.5×0.18) 10
IM3
L1 1.9 0
L2 3.8
Output Power (dBm)
-10
L3 8.4 -20
Inductance (nH)
L4 5 -30
L5 4.7 -40
L6 7.4 -50
C1 0.14 -60
C2 0.65
Capacitance (pF) -70
C3 0.15
-80
C4-7 5 -40 -35 -30 -25 -20 -15 -10 -5 0
R1 20 Input Power (dBm)
Resistance(KΩ)
R2 1.9 (a)
Bias (V) VG1 0.5
20
25 Fund
IM3
0
Output Power (dBm)
20
-20
Noise figure(dB)
15
-40
10
-60
5
-80
-40 -35 -30 -25 -20 -15 -10 -5 0
0
1 2 3 4 5 6 7 8 Input Power (dBm)
Frequency(GHz)
(b)
Fig. 6. Simulated noise figure (NF) Fig. 8. Simulated IIP3 (a) at 2.4-GHz band (b) at 5.2-GHz band
0791
The simulated results of the proposed LNA with reported
dual-band LNA are summarized in Table 2. It can be seen, the
proposed design shows high gain, low power dissipation and | |
[ ]= (17)
good input matching, as well as moderate linearity. To evaluate (| | − 1) × [ ]
the performance of dual-band LNAs for their maximum power
gain, NF and power dissipation, the figure of merit (FOM) is
defined as follows:
TABLE II. SUMMARY OF LNA PERFORMANCE AND COMPARISON TO PREVIOS WORKS
Tech f0 S11 S21 NF VDD Power
Reference FOM
(µm) (GHz) (dB) (dB) (dB) (V) (mW)
0.9 -33 16.5 1.35 1.8 3.6 4.6
[1] 0.18
1.7 -30 11 2.37 1.8 3.6 3
2.4 <-10 10.4 3.2 1 2.3 4.5
[7] 0.18
5.2 <-10 11 3.5 1 2.3 4.7
2.4 -10.1 10.1 2.9 1.8 11.7 0.86
[10] 0.18
5 -11 10.9 3.7 1.8 5.7 1.9
2.4 -25 14 2.3 2.5 10 1.4
[14] 0.35
5.2 -15 15.5 4.5 2.5 10 1.5
2.4 -16.8 19.3 3.2 1.2 2.4 8
[15] 0.13
5.2 -19.4 17.5 3.3 1.2 2.4 7.3
2.4 -14 15.9 1.8 1.8 2.25 7
This work 0.18
5.2 -12.8 14.3 2.7 1.8 2.25 6.4
IV. CONCLUSION [7] O. Eslamifar and R. S. Shirazi, “Design a dual-band low-power CMOS
low noise amplifier for use in WLAN applications,” in Electrical
“In conclusion, a low power and high gain concurrent Engineering (ICEE), 2014 22nd Iranian Conference on,, pp. 101-105,
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wireless local area networks (WLAN).” The current-reuse [8] J. Imbornone, J.-M. Mourant, and T. Tewksbury, “Fully differential
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