IST 2009 - International Workshop on Imaging Systems and Techniques

Shenzhen, China
May 11-12, 2009

Design and Characteristics Measurement

of a High-speed CMOS Imaging System

Yuanyuan Shang Yong Guan, Xiaoxu Zhao, Shudong Zhang, Hui Liu
College of Information Engineering, College of Information Engineering,
Capital Normal University Capital Normal University
Haidian Dist., Beijing, China, 100048
syy@bao.ac.cn

Abstract—This paper introduces the design of a high-speed 2K × uniformity, and quantum efficiency. They should be first
2K CMOS imaging system that is part of a Wide Field Monitor measured to estimate whether the imager can satisfy the
System proposed in China recent years. The CMOS sensor used performance requirements of whole system. In this paper, we
in this imaging system is LUPA-4000 from Cypress corp. This present the characteristics measurement method of CMOS
CMOS camera is composed of an analogue system and a digital
imagers. As to CMOS imagers, column and pixel amplifiers
embedded system. The digital embedded system integrated with
an NIOS II soft-core processor serves as the control and data are not shared by all pixels [4]. Single pixel test method is
acquisition system of the camera. In addition, research on developed to evaluate a CMOS imager in consideration of the
characteristics measurement for CMOS imagers was carried out, random offset, gain variations, and nonlinearity introduced by
including readout noise, linearity, quantum efficiency, pixel non- the CMOS APS readout circuit. A platform to evaluate CMOS
uniformity, dark current, full-well capacity, and gain. The imager in the laboratory is developed and introduced in detail,
photon transfer technique is adopted to evaluate the gain and too.
readout noise. At last, the evaluation results of the high-speed In the last part of this paper, the measurement results for the
CMOS imaging system are shown. The results indicate that this high-speed CMOS imaging system with a 25 MHz pixel rate
high-speed CMOS camera can meet the requirements of the
whole Wide Field Monitor System.
are presented. The results showed a predominance of this
CMOS imaging system in terms of a relatively low noise level
Keywords-CMOS imager, Readout noise, Linearity, Quantum under high readout speed.
efficiency, Full-well capacity
II. DESIGN OF THE HIGH-SPEED CMOS IMAGING SYSTEM
I. INTRODUCTION The imaging sensor used in this camera is a 2K × 2K
Complementary Metal Oxide Semiconductor (CMOS) LUPA-4000 CMOS APS, with two parallel outputs. To satisfy
imagers as a solid state array develop rapidly. It plays a more the requirement of the whole system, the CMOS camera runs at
and more important role in scientific application for its 25 MHz pixel rate with 84 ms temporal resolution. It can
attractive features, such as high radiation resistance, large achieve a frame-rate of 12 fps in full resolution.
dynamic range, high pixel rate, and low power consumption
This high-speed CMOS imaging system is composed of
[1-3]. In order to obtain high spatial and temporal resolution
two components: the analogue system and the digital controller
images with wide field of view in remote sensing application,
with an NIOS II soft-core embedded processor based on an
a Wide Field Monitor System has been put forward in China
ALTERA FPGA device. The analogue system includes a power
recent years. It is made of a main optical system with 1 m
and bias voltage circuit. The digital embedded controller
diameter, a correlation tracker, 32 high-speed CMOS imaging
integrates an NIOS II soft-core CPU as its main processor [5].
systems, and 32 CCD imaging systems.
The digital system includes several functions such as
This paper first discusses the design of the high-speed
generating all digital control signals for LUPA-4000 CMOS
CMOS imaging system. It is based on 2K×2K CMOS sensor,
sensor, receiving data from the sensor and then transmitting
fabricated by Cypress with 12um×12um pixel size. The
images to the host computer through the Ethernet port,
requirements of the CMOS imaging system are as follows: the
receiving commands, and sending commands. It includes the
sensor responds to the wavelength from 500 nm to 800 nm;
following necessary peripheral circuits: (1) A 4K FIFO-
the image format is 2K × 2K with temporal resolution smaller
memory for an image readout buffer. (2) A 16M SDRAM for
than 100 ms; the linearity is better than 99% in a range of
the image memory with 16 bits width. (3) A net protocol IC
signal levels from bias to 90% of full-well capacity; and the
LAN91C111, a 8M Flash and so on [6]. The digital controller
readout noise is less than 80 electrons at 25 MHz pixel rate.
is connected to a host computer through 100 Mbps Ethernet to
In addition, some characteristics of CMOS imagers are
receive commands and transmit images. The main architecture
very important to an imaging system, including readout noise,
of the CMOS camera is shown in fig. 1.
gain, linearity, dark current, full-well capacity, pixel non-

978-1-4244-3483-1/09/$25.00 ©2009 IEEE

 Digital Circuit of the number of electrons input generated in pixel to A/D
Analog
Circuit
units (ADU) output. For CMOS imagers, several sources of
FIFO
16bit Ether- noise contribute to the total system noise, including the signal
Power LUPA- NIOSⅡ net shot noise, readout noise and fixed pattern noise [12]. In order
×4k
and 4000
Bias
CPU P to eliminate the contribution of fixed pattern noise to the
CMOS C
Circuit Sensor Timing whole system noise, we use the single pixel photon transfer
Control technique to evaluate the readout noise and gain of each pixel
Circuit of CMOS imagers. Because of the Poisson statistics of shot
noise, it should be proportional to the square-root of the output
Figure 1. The main architecture of the CMOS imaging system signal. The equation of the photon transfer technique is
described as
The digital control system of the CMOS camera is realized G = S (δ 2N − δ 2R ) , (1)
with an NIOS II embedded system based on System on a
Programmable Chip (SOPC) technology. The NIOS II where G is the gain, S is the mean output signal, δ N is the total
embedded soft-core CPU is selected as the main processor of system noise and δ R is the readout noise. S must be the signal
the CMOS camera for its high performance and flexibility. It
value with bias signal subtracted. S is linearly related to δ 2 N as
is a 32 bit RISC processor with the pipeline technology,
providing a full instruction set, 32 general-purpose registers, δ 2N = k ⋅S +δ 2R , (2)
floating point instructions, and so on, with performance up to
250 Dhrystone MIPS [7-8]. The Lightweight TCP/IP Stack is where 1 k is the gain G and δ R is the readout noise.
included in the NIOS II processor to provide powerful In order to test gain and readout noise of each pixel of
network communication abilities [9]. CMOS imagers, several image groups at different exposure
The SOPC technology is also used in the camera design. It time must be sampled first. A figure is plotted to describe δ 2 N
is an FPGA-based technology that enables any hardware
system being programmed and implemented based on a as a function of S. The intercept of the curve is δ 2 R and the
programmable Logic Device (PLD) [10]. The NIOS II slope is 1/G. Photon transfer curves of all other pixels are also
embedded processor, FPGA logic, and FIFO memory are all be obtained to measure the readout noise and gain. And then,
customized and implemented on one FPGA chip in the camera frequency distribution histograms are obtained based on
digital control system, and this makes the process of camera statistics of all these results. The values appeared most
digital system design effective and flexible. frequently are the evaluation results of readout noise and gain
for the CMOS imager.

III. MEASUREMENT METHODS OF CMOS IMAGERS B. Quantum efficiency

Some parameters of CMOS imagers, such as readout noise, Quantum efficiency (QE) describes the response of a
linearity, full-well capacity, gain, and quantum efficiency, are CMOS imager to different wavelengths of light. Quantum
very important to an imaging system. Considering the random efficiency of any pixel of CMOS imagers can be derived from
offset, gain variations, and nonlinearity introduced by the S ⋅G ⋅ E p
CMOS APS readout circuit, we proposed a single pixel test QE = , (3)
T ⋅W ⋅ A
method to characterize a CMOS imager.
where S is the mean pixel output of signal (ADU) over an area
A platform to evaluate a CMOS imager in the laboratory
of 1 cm2, G is the gain of the pixel (e-/ADU), Ep is the energy
was developed. The test platform is composed of a light source,
of one photon of the wavelength to be tested (J), T is the
an integrating sphere, a monochromator, an S380
exposure time (s), W is the irradiance flux of the uniform
galvanometer, a filter set, and so on. The stable light source is
illumination at the position of the CMOS surface (w/cm2), and
formed by a model ARC/TS-428, a filter set and a
A is the area of one pixel (cm2). Among all these parameters, W
monochromator ARC/SP-150M. ARC/TS-428 is 250-watt light
is the most complex one to measure. It is tested by two
source that can supply the light sources for 350 nm to 2.5 µm.
photodiodes, the standard probe and the monitoring probe. The
A uniform light field is produced by the integrating sphere with
equation to calculate W is given by
150 mm diameter. The ununiformity of the illumination is
approximately 1% [11]. The signal intensity for the QE I
measurement is acquired by exposing the sensor to a uniform W＝ WS , (4)
IS
monochromatic light field.
where WS is the power value of the incident light on 1 cm2 area
A. Readout noise and gain displayed by a calibrated standard probe, IS is the current
Photon transfer technique for single pixel is developed to measured by the monitoring probe when it is attached to a port
measure the readout noise and gain of CMOS imagers. on the integrating sphere to observe the intensity shift of the
Readout noise is the random noise measured at the output of a testing light, and I is the current measured by the monitoring
camera system in dark conditions. Gain is defined as the ratio probe while exposing the CMOS camera.
 The measurement accuracy of W is related with the sensor was operated at 25 MHz pixel readout rate. And the
following factors [13]. The first one is calibration uncertainty CMOS sensor will be cooled to reduce dark current in our
of the standard probe. The second one is readout stability of the future work.
two probes. The root mean square (RMS) is about 5
A. Gain and readout Noise
magnitudes lower than the readout values. So the two probes
are with high stability. The third one is the position precision 1000 frame of images were got with stepped exposure
while placing the standard probe. With the help of a distance- times and fixed illumination to measure gain and readout noise.
measuring microscope, the position error can be controlled They were evaluated using the single pixel photon transfer
within 0.5 mm [11]. The total effects of all factors result in an technique. Fig.2 is the photon transfer curve of one pixel of
error of around 1% in the W measuring. LUPA-4000 CMOS imager. The gain is about 52 e-/ADU and
the gain error is about 0.6 e-/ADU. The readout noise is 72 e-
As the QE varies from pixel to pixel, frequency distribution and its error is about 2 e-.
histograms are obtained based on statistics of all these results. We made statistics of gain and readout noise of all pixels.
The values with the highest appearing frequency are selected as Histogram presented in fig. 3 shows the results. The gain
evaluation results of QE for the CMOS imager. appeared most frequently is 51.5 e-/ADU and the readout
noise is 69 e-.
C. Linearity and full-well capacity Photon Transfer Curve
16
For each pixel of CMOS images, we need to plot the noise = 72.491 e-
average signal as a function of integration time and do linear gain = 52.052 e-/ADU
14
fitting to evaluate linearity and full-well performance. Full-well
capacity is the maximum charge level that a pixel can hold.

Variance (ADU*ADU)
12
The linearity parameter of a CMOS represents the relationship
between the input signal and output signal of CMOS imagers.
10
To measure linearity and full-well capacity, a series of images
ranging from the bias level to near-saturation level is acquired
8
with stepped exposure times and fixed illumination. A figure is
then plotted to describe the average signal versus exposure
time. The linearity performance of the CMOS is the coefficient 6

of correlation between average signal and exposure time. At

the same time, full-well capacity can be calculated as gain 4
0 100 200 300 400 500 600 700
multiplied by the output digital value at the start of saturation. Output Signal (ADU)
Figure 2. The photon transfer curve of one pixel of LUPA-4000.
D. Dark current
To measure the performance of dark current, a number of x 10
5
Statistic of gain and readout noise
non-illuminated images must be acquired. The integration 10
Number of Pixels

time must be set to make sure that the chip is not in saturation
and it is also important to ensure complete darkness of the Gain
5
sensor. Then the pixel-per-pixel averages may be calculated to
obtain an averaged frame with bias being subtracted from.
E. Pixel non-uniformity 0
40 5 45 50 55 60 65
Pixel non-uniformity is the variation in pixel sensitivity to x 10 Gain (e-/ADU)
incident photons. The pixel non-uniformity of CMOS imager 10
Number of Pixels

can be evaluated using flat field. It is described as the equation Readout noise
RMS ( A)
Nonuniformity = , (5) 5
A
where RMS ( A) is root mean square of all flat field pixels, A is
the average signal level. 0
55 60 65 70 75 80 85
Readout noise (e-)
Figure 3. Statistics of gain and readout noise of all pixels.
IV. EVALUATION RESULTS
Using these methods, we evaluated the high-speed 2K × The measurement error of the gain is around 1% using the
2K LUPA-4000 CMOS imaging system to get its single pixel photon transfer technique, but sometimes the error
characteristic parameters. Some key performance of the readout noise is relatively large, especially with high
measurements of LUPA-4000 CMOS imager will be signal level. Based on some experiment data, we found that
summarized and discussed in this part. All measurements were the error of the readout noise can be controlled around 1.5%
performed at an operating Room Temperature and the CMOS
when the signal level is below half of full-well capacity using D. Pixel non-uniformity
this technique. We acquired a number of successive images with the
B. Quantum efficiency sensor flat illuminated and calculate the pixel-per-pixel
averages to obtain an averaged frame. Using this method
The spectral response of the LUPA-4000 CMOS imager
effect of temporal noise can be reduced. Fig.6 presents part of
was investigated. The signal intensity for the measurement
the surface picture of the averaged image. The pixel non-
was acquired by exposing the camera to a calibrated uniform
uniformity is approximately 2.17% in RMS value calculated
monochromatic light field of tuneable wavelength. The
from the area uniformly illuminated. The fixed pattern noise
measured quantum efficiency at different wavelengths is
of the CMOS image sensor is also observed as pixel non-
shown in fig. 4. The LUPA-4000 CMOS sensor responds to
uniformity. Furthermore, several “dark” pixels which are
wavelengths from 400 nm to 900 nm. The peak quantum
manufacturing problems in this CMOS imager are detected as
efficiency is 34% at 650 nm. The accuracy of the QE
shown in this figure.
measurement was also evaluated. After considerations as
comprehensive as possible, the accuracy can reach 2.3% [11].
Spectral Response of LUPA-4000
35

30
Quantum Efficiency (%)

25

20

15

10
400 500 600 700 800 900
Wavelength (nm) Figure 6. Part of the surface picture of LUPA-4000 CMOS imager.
Figure 4. The spectral response of LUPA-4000 CMOS imager at different
wavelengths.
V. CONCLUSION AND DISCUSSION
C. Linearity and full-well capacity The Wide Field Monitor System is a Chinese remote
In order to test the full-well capacity accurately, it is sensing project. This paper describes the design of the high-
important to ensure that the pixel reaches the full-well speed CMOS camera, which is an important part of this
condition before the A/D converter starts to saturate. Fig. 5 system. The camera is based on 2K × 2K LUPA-4000 CMOS
shows the linear response curve of one pixel. It has good sensor from Cypress Corp. and is composed of a digital
linearity performance, which is about 99.3% before saturation. control system and an analogue system. The digital control
In addition, the gain of this pixel is about 51.7 e-/ADU and the system is based on an NIOS II embedded soft-core processor.
pixel starts to reach saturation near 1015 ADU, so the full-well In addition, some research on characteristics measurement
capacity is about 52476 e-. for CMOS imagers was carried out, including readout noise,
Linear response of LUPA-4000 CMOS camera linearity, quantum efficiency, pixel non-uniformity, dark
current, full-well capacity, and gain. The Readout noise and
1000 gain were measured by the photon transfer technique. The
evaluation method of quantum efficiency is also discussed in
Mean Output signal(ADU)

800 detail. A platform for the evaluation was also developed. The
test platform is composed of a light source (ARC/TS-428), an
600
integrating sphere with 150 mm diameter, a monochromator
(ARC/SP-150M), an S380 galvanometer, and a filter set. In
the last part of the paper, some evaluation results of this
400
CMOS camera at 25 MHz pixel rate are presented. The
camera runs at a frame-rate of 12 fps in 2K × 2K resolution
200 with 84 ms temporal resolution. The full-well capacity is
52476 e–. The peak quantum efficiency is 34% at 650 nm. The
readout noise is around 69 e-. The results show that this high-
1000 1500 2000 2500 3000
Expsoure time (ms) speed CMOS camera achieves high performance and can
Figure 5. The linear response curve of one pixel of LUPA-4000. satisfy the requirements of the Wide Field Monitor System.
 ACKNOWLEDGMENT [5] Henzinger T.A., Sifakis J., The Discipline of Embedded Systems
Design, IEEE Computer, Volume 40, Issue 10, Oct. 2007, pp. 32-40
We would like to express our thanks to Prof. B. Li, Prof. Q. [6] J. Den, S. Wang, Y. Shang, et al, “An Infrared Imaging System Based
Song, Dr. D. Li and Prof. B. Ye for their helps. We gratefully on SWIR FPA of SOFRADIR”, Proceeding of SPIE 2006
acknowledge the Detector Research Lab of National [7] Tong J G, Anderson I D L and Khalid M A S, “Soft-core processors for
embedded systems Conf. Proc. On Microelectronics”, 2006, pp. 170-173
Astronomical Observatories, Chinese Academy of Science. [8] Ni F L, Jin M H and Xie Z W, “A highly integrated joint servo system
This work was supported by a grant from the National Natural based on FPGA with Nios II processor”, Conf. Proc. On Mechatronics
Science Foundation of China (No. 10603009) and Beijing and Automation, 2006, pp. 973-978
Nova Program (No. 2008B57). [9] Luo Y and Han X J, “Design and implementation of embedded
transmission control protocol/internet protocol network based on
system-on-programmable chip Semiconductor Photonics and
Technology”, 2008, Vol14, pp. 167-173
[10] McAllister J, Woods R , Reilly D , Fischaber S and Hasson R, Rapid
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