Chapter 2

Introduction to computer organization

2.1 Functional Units

CPU – Central Processing Unit, which includes:
o ALU – Arithmetic and Logic Unit
o Set of registers (including program counter keeping the address of the next
instruction to be performed)
o Control Unit – decoding instructions and controlling internal data movement
among different CPU parts
o Interface Unit – moves data between CPU and other hardware components

Memory
o The Main Memory – Primary Storage or RAM – Random Access Memory
 Holds data or a piece of a program code (instructions)
 Consists of a large number of cells, each individually addressable.
 Cell is called “byte” and consists of 8 bits (binary elements holding 0 or
1)
 Usually a word consists of 4 bytes.
 In most cases – volatile memory
o The Multilevel Cache - An intermediate stage between ultra-fast registers (inside
CPU) and much slower main memory.
 Most actively used information in the main memory is duplicated in the
cache, which is faster, but of much lesser capacity.

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2.2.System Buses
2.2.1 Memory Bus

The memory bus is the set of wires that is used to carry memory addresses and data to and from the
system RAM. The memory bus in most PCs is also shared with the processor bus, connecting the
system memory to the processor and the system chipset. The memory bus is part of the PC's hierarchy
of buses, which are high-speed communications channels used within the computer to transfer
information between its components.

The memory bus is made up of two parts:

Data bus: carries actual memory data within the PC

Address bus: selects the memory address that the data will come from or go to on a read or write

2.2.2 I/O Bus

The I/O bus facilitates communication between CPU and all the interface units.

I/O bus is of two types:

Isolated I/O
o Separate I/O read/write control lines in addition to memory read/write control lines
o Separate (isolated) memory and I/O address spaces
o Distinct input and output instructions
Memory-mapped I/O
o A single set of read/write control lines (no distinction between memory and I/O
transfer)
o Memory and I/O addresses share the common address space which reduces memory
address range available
o No specific input or output instruction, as a result the same memory reference
instructions can be used for I/O transfers
o Considerable flexibility in handling I/O operations

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2.3 Memory Subsystem Organization

2.3.1. Memory Hierarchy

Memory Hierarchy is to obtain the highest possible access speed while minimizing the total cost of the
memory system.

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2.3.2. Memory Location: Address Map

Address space assignment to each memory chip. Example: 512 bytes RAM and 512 bytes ROM.

Hexa Address bus

Component
10 9 8 7 6 5 4 3 2 1
address
RAM 1 0000 - 007F 0 0 0 x x x x x x x

RAM 2 0080 - 00FF 0 0 1 x x x x x x x

RAM 3 0100 - 017F 0 1 0 x x x x x x x

RAM 4 0180 - 01FF 0 1 1 x x x x x x x

ROM 0200 - 03FF 1 x x x x x x x x x

2.3.3.Types of Memory

Main Memory
o Consists of RAM and ROM chips
o Holds instructions and data for the programs in execution
o Volatile
o Fast access
o Small storage capacity

Chip select 1 CS1

Chip select 2 CS2
Read RD 128 x 8 8-bit data bus
RAM
Write WR
7-bit address AD

Typical RAM chip

Chip select 1 CS1

Chip select 2 CS2
512 x 8 8-bit data bus
ROM

9-bit address AD

Typical ROM chip

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 Auxiliary Memory
o Information organized on magnetic tapes
o Auxiliary memory holds programs and data for future use
o Non-volatile – data remains even when the memory device is taken off-power
o Slower access rates
o Greater storage capacity
Associative Memory
o Accessed by the content of the data rather than by an address
o Also called Content Addressable Memory (CAM)
o Used in very high speed searching applications
o Much faster than RAM in virtually all search applications
o Higher costs

Argument register(A)

Key register (K)

Match Register

Input Associative memory

array and logic
M
Read m words
Write n bits per word

CAM Hardware Organization

Cache Memory
o Cache is a fast small capacity memory that should hold those information which are
most likely to be accessed
o The property of Locality of Reference makes the Cache memory systems work

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 o Locality of Reference - The references to memory at any given time interval tend to be
confined within a localized areas. This area contains a set of information and the
membership changes gradually as time goes by.
 Temporal Locality - The information which will be used in near future is likely
to be in use already
 Spatial Locality - If a word is accessed, adjacent(near) words are likely accessed
soon

2.4 I/O Subsystem Organization and Interfacing

2.4.1. A Model of I/O Subsystem Organization

User Processes

Directory Management

File System
Logical I/O Communication
Architecture

Physical Organization

Device I/O

Scheduling & Control

Hardware

Local peripheral device Communications port File System

2.4.2. I/O Interface

Provides a method for transferring information between internal storage (such as memory and
CPU registers) and external I/O devices
Resolves the differences between the computer and peripheral devices
 Peripherals - Electromechanical Devices
 CPU or Memory - Electronic Device

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  Data Transfer Rate
o Peripherals - Usually slower
o CPU or Memory - Usually faster than peripherals; Some Synchronization
mechanism may be needed
 unit of Information
o Peripherals – Byte, Block, etc.
o CPU or Memory – Word

I/O data
Port A
register
Bidirectional Bus
data bus buffers I/O data
Port B
In register
te
CPU
Chip select
CS rn
I/O
Register select Control Control
RS1 al
Timing register
Register select
RS0 and b Device
I/O read Control u
RD s Status
I/O write Status
WR register

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 End chapter quizzes

Q1.Control unit basically

a) Decode instruction
b) Moves the data
c) It is a logical unit
d) Used to save the data in register

Q2. CPU does not include

a) ALU
b) Registers
c) Control Unit
d) System Bus

Q3. Memory bus is made up of two parts

a) Data Bus and Address bus

b) Data bus and I/O bus
c) Main memory and address bus
d) Address bus and I/O bus

Q4. RAM and ROM chip

a) Volatile and Non volatile

b) Non volatile and Volatile
c) Both are volatile
d) Both are non volatile

Q5. I/O interface work for

a) Synchronization
b) Transferring information
c) Managing memory
d) Process management

Q6. Special high speed memory

a) Auxiliary memory
b) Main memory

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 c) Associative memory
d) Cache memory

Q7.Memory is assigned with help of

a) Memory location
b) Memory management
c) Memory address map
d) By assignment

Q8. CPU- Central Processing Unit has how many parts

a) 5 parts
b) 4 parts
c) 3 parts
d) 2 parts

Q9. Associative Memory is also known as

a) RAM
b) ROM
c) CAD
d) CAM

Q10. What is the basic function of I/O.

a) Connect to CPU
b) Connect to Memory
c) Connect to Output Devices
d) Connect to ROM

ANSWERS

1. c, 2.d, 3.a, 4.a, 5.b, 6.d, 7.c, 8.b, 9.d, 10. c

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