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Verification of KVL and KCL

The document describes an experiment to verify Kirchhoff's voltage law (KVL) and Kirchhoff's current law (KCL) in electrical circuits. It provides the necessary apparatus, circuit diagrams, procedures, observations tables, and theoretical calculations to test KVL and KCL. KVL states that the sum of voltages around any closed loop is zero, and KCL states that the algebraic sum of currents entering and leaving any node is zero. The experiment aims to experimentally validate these two fundamental circuit laws.

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Varun Vadluri
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23K views3 pages

Verification of KVL and KCL

The document describes an experiment to verify Kirchhoff's voltage law (KVL) and Kirchhoff's current law (KCL) in electrical circuits. It provides the necessary apparatus, circuit diagrams, procedures, observations tables, and theoretical calculations to test KVL and KCL. KVL states that the sum of voltages around any closed loop is zero, and KCL states that the algebraic sum of currents entering and leaving any node is zero. The experiment aims to experimentally validate these two fundamental circuit laws.

Uploaded by

Varun Vadluri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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BASIC ELECTRICAL ENGINEERING LAB EEE DEPARTMENT

EXPERIMENT NO-2
VERIFICATION OF KVL AND KCL

AIM: To Verify Kirchhoff’s Voltage Law and Kirchhoff’s Current Law

APPARATUS REQUIRED:

S.No NAME RANGE TYPE QUANTITY


1 Ammeter (0- 200)mA MC 3
2 Voltmeter (0-30)V MC 3
1 KΩ 1
3 Resistors 2.2 KΩ - 2
3.3KΩ 1
4 Breadboard - - 1
Regulated power Supply
5 (0-30)V - 1
(R.P.S)
6 Connecting wires - - Required number

STATEMENTS:
KIRCHOFF’S VOLTAGE LAW: It states that the algebraic sum of all the branch
voltages around any closed path in a circuit is always zero at all instants of time.
KIRCHOFF’S CURRENT LAW: It states that the sum of the currents entering into
any node is equal to the sum of the currents leaving the node.
PROCEDURE :
For KVL:
1. Connect the circuit as per the circuit diagram shown in figure(1)
2. Apply 10V and measure the voltage drop across each resistor
3. Verify whether the source voltage is equal to the sum of voltage drops or not. If
equal KVL is verified
4. Repeat the same procedure by applying 15V and 18V

For KCL:
1. Connect the circuit as per the circuit diagram shown in figure (2)
2. Apply 10V and measure the currents in each branch
3. Verify whether the source current is equal to the sum of the branch currents or
not. If equal KCL is verified
4. Repeat the same procedure by applying 15V and 18V

MALLA REDDY ENGINEERING COLLEGE & MANAGEMENT SCIENCES Page 4


BASIC ELECTRICAL ENGINEERING LAB EEE DEPARTMENT

THEORITICAL CIRCUITS:
FOR KVL:

figure (a)
FOR KCL:

figure (b)

PRACTICAL CIRCUITS:
FOR KVL:

Figure (1)
FOR KCL:

Figure (2)

MALLA REDDY ENGINEERING COLLEGE & MANAGEMENT SCIENCES Page 5


BASIC ELECTRICAL ENGINEERING LAB EEE DEPARTMENT

THEORITICAL CALCULATIONS:
FOR KVL:
Vs = V1+V2+V3
V1=IR1; V2=IR2; V3=IR3;
I=VS/Req
FOR KCL:
Consider voltage at node 1 as V1
I1+I2+I3 = 0
I1=(Vs-V1)/R1 ; I2=(0-V1)/R3; I3=(0-V1)/R2
OBSERVATION TABLE:
FOR KVL:
S.No Vs(v) V1 (v) V2 (V) V3 (V) Vs=V1+V2+V3
1 10
2 15
3 18

FOR KCL:
S.No Vs(v) I1(mA) I2(mA) I3(mA) I 1= I2+I3
1 10
2 15
3 18

PRECAUTIONS:
1. Avoid loose connections
2. Take readings without parallax error
3. Set the ammeter pointer at zero position

RESULT:

VIVA-VOCE QUESTIONS:
1. Define KVL and KCL
2. Give the limitations of KCL and KVL

APPLICATIONS:
• The current distribution in various branches of a circuit can easily be found out
by applying Kirchhoff Current law at different nodes or junction points in the
circuit.

• After that Kirchhoff Voltage law is applied, each possible loop in the circuit
generates algebraic equation for every loop.

By solving all these equations, one can easily find out different unknown currents,
voltages and resistances in the circuits.

MALLA REDDY ENGINEERING COLLEGE & MANAGEMENT SCIENCES Page 6

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