Department of ECE

MODULE IV FINITE WORD LENGTH EFFECTS

Representation of numbers - Fixed point and binary floating point number representation -
comparison, errors due to truncation and rounding- off, Quantization noise - derivation for
quantization noise power at the input and output of a digital filter, Co-efficient quantization error
-product quantization error, Round-off effects in digital filters, Limit cycle oscillation .

Finite Word length Effects:

 In the design of FIR Filters, The filter coefficients are determined by the system transfer functions. These
filter co-efficient are quantized/truncated while implementing DSP System because of finite length registers.
 Only Finite numbers of bits are used to perform arithmetic operations. Typical word length is 16 bits,
24 bits, 32 bits etc.
 This finite word length introduces an error which can affect the performance of the DSP system.
 The main errors are
1. Input quantization error
2. Co-efficient quantization error
3. Overflow & round off error (Product Quantization error)
 The effect of error introduced by a signal process depend upon number of factors including the
1. Type of arithmetic
2. Quality of input signal
3. Type of algorithm implemented
1. Input quantization error
 The conversion of continuous-time input signal into digital value produces an error which is known as
input quantization error.
 This error arises due to the representation of the input signal by a fixed number of digits in A/D
conversion process.
2. Co-efficient quantization error
 The filter coefficients are compared to infinite precision. If they are quantized the frequency response of
the resulting filter may differ from the desired frequency response.
i.e poles of the desired filter may change leading to instability.
3. Product Quantization error
 It arises at the output of the multiplier
 When a ‘b’ bit data is multiplied with another ‘b’ bit coefficient the product (‘2b’ bits) should be stored
in ‘b’ bits register. The multiplier Output must be rounded or truncated to ‘b’ bits. This known as
overflow and round off error.

1
*****************************************************************************************
Types of number representation:
There are two common forms that are used to represent the numbers in a digital or any other digital hardware.
1. Fixed point representation
2. Floating point representation

Explain the various formulas of the fixed point representation of binary numbers.

1. Fixed point representation

 In the fixed point arithmetic, the position of the binary point is fixed. The bit to the right represents the
fractional part of the number and to those to the left represents the integer part.
 For example, the binary number 01.1100 has the value 1.75 in decimal.
(0*21) + (1*20) + (1*2-1) + (1*2-2) + (0*2-3) = 1.75
In general, we can represent the fixed point number ‘N’ to any desired accuracy by the series
n2
N   Ci r i
i  ni

Where, r is called as radix.

 If r=10, the representation is known as decimal representation having numbers from 0 to 9. In this
representation the number
12
30.285   C 10
i  3
i
i

= (3*101 )+ (0*100)+ (2*10-1)+(8*10-2)+(5*10-3)

 If r=2, the representation is known as binary representation with two numbers 0 to 1.
 For example, the binary number
110.010 = (1*22 ) + (1*21) + (0*20) + (0*2-1) + (1*2-2) + (0*2-3) = 6.25
Examples:
Convert the decimal number 30.275 to binary form
0.275 * 2 0.55 0
0.55 * 2 1.10 1
0.10 * 2 0.20 0
0.20 * 2 0.40 0
0.40 * 2 0.80 0
0.80 * 2 1.60 1
0.60 * 2 1.20 1
0.20 * 2 0.40 0
(30.275)10 = (11110.01000110)2

2
In fixed point arithmetic =, the negative numbers are represented by 3 forms.
1. Sign-magnitude form
2. One’s complement form
3. Two’s complement form
1.1 Sign-magnitude form:
 Here an additional bit called sign bit is added as MSB.
o If this bit is zero  It is a positive number
o If this bit is one  It is a positive number
 For example
o 1.75 is represented as 01.110000.
o -1.75 is represented as 11.110000
1.2 One’s complement form:
 Here the positive number is represented same as that in sign magnitude form.
 But the negative number is obtained by complementing all the bits of the positive number
 For eg: the decimal number -0.875 can be represented as
o (0.875)10=(0.111000)2
o (-0.875)10=(1.000111)2 0.111000
↓ ↓↓↓↓↓↓ (Complement each bit)
1.000111
1.3 Two’s complement form:
 Here the positive numbers are represented as same in sign magnitude and one’s complement form.
 The negative numbers are obtained by complementing all the bits of the positive number and adding
one to the least significant bit
(0.875)10=(0.111000)2
↓ ↓↓↓↓↓↓ (Complement each bit)
1.000111
+ 1
1.001000
(-0.875)10=(1.001000)2
Examples:
 Find the sign magnitude, 1’s complement, 2’s complement for the given numbers.
7
1. 
32
7
2. 
8
7
3. 
8
7
1. 
32
0.21875 * 2 0.43750 0
0.43750 * 2 0.87500 0
0.87500* 2  1.750000 1
0.75* 2 1.50 1
0.50* 2 1.00 1
7
 =(-0.21875)10 =(1.00111)2
32
Sign magnitude form = 1.00111
1’s complement form = 1.11000
2’s complement form = 1.11001

3
 7
2. 
8
0.875 * 2 1.75 1
0.750 * 2 1.500 1
0.500 * 2 1.000 1
7
 =(-0.875)10 =(0.111)2
8
Sign magnitude form = 0.111
1’s complement form = 1.000
2’s complement form = 1.001
7
3. 
8
Sign magnitude form = 0.111
1’s complement form = 0.111
2’s complement form = 0.111

Addition of two fixed point numbers:

 Add (0.5)10 + (0.125)10
(0.5)10 = (0.100)2
(0.125)10 = (0.001)2
(0.101)2 = (0.625)10
 Addition of two fixed point numbers causes an overflow.
For example
(0.100)2
(0.101)2
(1.001)2 = (-0.125)10 in sign magnitude form

Subtraction of two fixed point numbers:

 Subtraction of two numbers can be easily performed easily by using two’s complement representation.
 Subtract 0.25 from 0.5
0.25 * 2 0.50 0 Sign magnitude form = (0.010)2
0.50 * 2 1.00 1 1’s complement form = (1.101)2
0.00 * 2 0.00 0 2’s complement form = (1.110)2
(0.5)10 = (0.100)2
-(0.25)10 = (1.110)2 Two’s complement of -0.25
(10.010)2
Here the carry is generated after the addition. Neglect the carry bit to get the result in decimal.
(0.010)2 = (0.25)10
 Subtract 0.5 from 0.25
0.5 * 2 1.00 1 Sign magnitude form = (0.100)2
0.00 * 2 0.00 0 1’s complement form = (1.011)2
0.00 * 2 0.00 0 2’s complement form = (1.100)2
(0.25)10 = (0.010)2
-(0.5)10 = (1.100)2
(1.110)2
Here the carry is not generated after the addition. So the result is negative.
Multiplication in fixed point arithmetic:

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 Here the sign magnitude components are separated.
 The magnitudes of the numbers are multiplied. Then the sign of the product is determined and applied to
the result.
 In the fixed point arithmetic, multiplication of two fractions results in a fraction.
 For multiplications with fractions, overflow can never occur.
 Eg:
(0.1001)2 * (0.0011)2 = (0.00011011)2
2. Floating point representation
 Here, a number ‘x’ is represented by
X=M.re
Where, M  Mantissa which requires a sign bit for representing positive number and negative
numbers.
R  base (or) radix
e  exponent which require an additional and it may be either positive or negative.
o For eg, 278 can be represented in floating point representation.
278 X 1000
278 = = 0.278*103
1000
0.278  Mantissa (M)
10  base (or) radix (r)
3  exponents (e)
 Similarly, to represent a binary floating point number
X=M.2e in which the fractional part of a number should fall (or) lie in the range of 1/2 to 1.
5 X 8
5 = 0.625 X23
8
Mantissa (M) = 0.625
Base (or) radix (r) = 2
Exponent (e) = 3
 Some decimal numbers and their floating point representations are given below:
4.5  0.5625 X 23 =0.1001 X 2011
1.5  0.75 X 21 =0.1100 X 2001
6.5  0.8125 X 23 =0.1100 X 2011
0.625  0.625 X 20 =0.1010 X 2000
 Negative floating point numbers are generally represented by considering the mantissa as a fixed point
number. The sign of the floating point number is obtained from the first bit of mantissa.
 To represent floating point in multiplication

Consider X 1  M 1r e1
X 2  M 2 r e2
X1 X 2   M1 * M 2  r  
e1
 e2

Example
12
Given X 1  3.5 * 10 , X 2  4.75 * 10 . Find the product X 1 X 2
6

X=(3.5 X 4.75) 10(-12+6)

= (16.625)10-6  in decimal
In binary: (1.5)10 X (1.25)10 = (210.75) X (210.625)
= 2001 X 0.1100 X 2001 X 0.1010
= 2010 X 0.01111
Addition and subtraction:

5
 Here the exponent of a smaller number is adjusted until it matches the exponent of a larger number.
 Then, the mantissa are added or subtracted
 The resulting representation is rescaled so that its mantissa lies in the range 0.5 to 1.
 Eg: Add (3.0)10 & (0.125)10
(3.0)10 =2010 X 0.1100 = r e1 X M 1
(0.125)10 =2000 X 0.0010 = r e2 X M 2
Now adjust e2 Such that e1=e2
(0.125)10 =2010 X 0.0000100
Addition 2010 (0.110000 + 0.0000100) 2010 X 0.110010
Subraction 2010 X 1.001101
Compare floating point with fixed point arithmetic.(2 Mark)
Sl.No Fixed point arithmetic Floating point arithmetic
1 Fast operation Slow operation
2 Relatively economical More expensive because of costlier hardware
3 Small dynamic range Increased Dynamic range
4 Round off errors occurs only for Round off errors can occur with addition and
addition multiplication
5 Overflow occur in addition Overflow does not arise
6 Used in small computers Used in large general purpose computers.
***************************************************************************************
Quantization:
*Discuss the various methods of quantization.
*Derive the expression for rounding and truncation errors
* Discuss in detail about Quantization error that occurs due to finite word length of registers.
The common methods of quantization are
1. Truncation
2. Rounding
1. Truncation

The abrupt termination of given number having a large string of bits (or)

Truncation is a process of discarding all bits less significant than the LSB that is retained.

Suppose if we truncate the following binary number from 8 bits to 4 bits, we obtain
 0.00110011 to 0.0011
(8 bits) (4 bits)
 1.01001001 to 1.0100
(8 bits) (4 bits)

When we truncate the number, the signal value is approximated by the highest quantization level that is
not greater than the signal.
2. Rounding (or) Round off

Rounding is the process of reducing the size of a binary number to finite word size of ‘b’ bits such that
the rounded b-bit number is closest to the original unquantised number.
Error Due to truncation and rounding:

While storing (or) computation on a number we face registers length problems. Hence given number is
quantized to truncation (or) round off.
i.e. Number of bits in the original number is reduced register length.
Truncation error in sign magnitude form:

Consider a 5 bit number which has value of
0.110012  (0.7815)10

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
This 5 bit number is truncated to a 4 bit number
0.11002  (0.75)10
i.e. 5 bit number 0.11001 has ‘l’ bits
4 bit number 0.1100 has ‘b’ bits

Truncation error, et = 0.1100 – 0.11001
= -0.00001  (-0.03125)10

Here original length is ‘l’ bits. (l=5). The truncated length is ‘b’ bits.

The truncation error, et = 2-b-2-l
= -(2-l-2-b)
et = -(2-5-2-4) = -2-1

The truncation error for a positive number is
  2  b  2  l   et  0  Non causal

The truncation error for a negative number is
0  et   2  b  2  l   Causal
Truncation error in two’s complement:

For a positive number, the truncation results in a smaller number and hence remains same as in the case
of sign magnitude form.

For a negative number, the truncation produces negative error in two’s complement

 2 b  2 l   et   2  b  2  l 
Round off error (Error due to rounding):
Let us consider a number with original length as ‘5’ bits and round off length as ‘4’ bits.

0.11001 Round
 offto
 0.1101
b l
Now error due to rounding e = 2  2
 r
2
Where bNumber of bits to the right of binary point after rounding
LNumber of bits to the right of binary point before rounding
Rounding off error for positive Number:

2 b  2 l
  er  0
2
Rounding off error for negative Number:

2 b  2 l
0  er 
2
For two’s complement

2 b  2 l 2 b  2 l
  er 
2 2
***************************************************************************************

7
Quantization Noise:
*Derive the expression for signal to quantization noise ratio
*What is called Quantization Noise? Derive the expression for quantization noise power.

The analog signal is converted into digital signal by ADC


At first, the signal x(t) is sampled at regular intervals t=nT, where n=0,1,2… to create sequence x(n).

This is done by a sampler.
Then the numeric equivalent of each sample x(n) is expressed by a finite number of bits giving the

sequence xq(n)
The difference signal e(n)= xq(n)- x(n) is called quantization noise (or) A/D conversion noise.

Let us assume a sinusoidal signal varying between +1 & -1 having a dynamic range 2

ADC employs (b+1) bits including sign bit. In this case, the number of levels available for quantizing

x(n) is 2b+1.
The interval between the successive levels is

q  2
2 b 1
 2 b
Where q  quantization step size
-3
If b=3 bits, then q=2 =0.125
***************************************************************************************
Quantization Noise power: (12 Mark)(Both Input &Output noise power)
Input Quantization error:

*Derive the equation for quantization noise power (or) Steady state Input Noise Power.

Probability density function for round off error in A/D conversion is

8
 q q
If rounding is used for quantization, which is bounded by   e n   , then the error lies between
2 2
q to q with equal probability, where q quantization step size.

2 2
Properties of analog to digital conversion error, e(n):
1. The error sequence e(n) is a sample sequence of a stationary random process.
2. The error sequence is uncorrelated with x(n) and other signals in the system.
3. The error is a white noise process with uniform amplitude probability distribution over the range of
quantization error.
The variance of e(n) is given by
 
 2  E e 2  n   E 2  e n   ---------------------------->(1)
e

 
Where E e  n  Average of e2(n)
2

E  e n   Mean value of e(n).

q q
For rounding, e(n) lies between  and with equal probability
2 2


E e 2  n    e  n  p  e  de ---------------------------->(2)
2



1 q q
p e   ,   e n   ---------------------------->(3)
q 2 2
Substituting (3) in (2)
q

  e
2
E e 2  n  2
 n  1 de
q q

2
q

 
2
1
E e 2  n   e  n de ------------------------------->(4)
2

q q

2

E  e n    0
E 2  e n    0 ------------------------------------------->(5)
Substituting (4) and (5) in (1)
q
2
1
 e2   e 2  n  de  0
q q

2
q
1  e3  2
  
q  3  q
2

1  q   q 
3 3

       
3q  2   2  

9
 1  q 3   q3 
      
3q  8   8 
1  q 3   q 3 
     
3q  8   8 
1  2q 3 
  
3q  8 
q2
 e2  ------------------------------------------------->(6)
12
1
In general, b
 2 b  q -------------------------------------------->(7)
2

 2

2  b 2

e
12
2 2b
 e2  ----------------------------------------------->(8)
12
Equation (8) is known as the steady state noise power due to input quantization.
R
q b  in two’s complement representation.
2
R
q b  in sign magnitude (or) one’s complement representation.
2 1
R  Range of analog signal to be quantized.

**************************************************************************************

Steady state Output Noise power:

After quantization, we have noise power  e as input noise power. Therefore, Output noise power of system
2

is given by
 
 eo2   e2  h 2  n   ------------------------------------>(9)
 n 0 

where h(n)  impulse response of the system.

Let error E(n) be output noise power due to quantization
Error E  n   e n   h n 

  h  n  e n  k 
k 0

The variance of error E(n) is called output noise power,  e2 .

By using Parseval’s theorem,

10
 
 eo
2
  e2  h 2  n 
n 0

 H  Z H Z  z
1 dZ 1
  e2
2j
Where the closed contour integration is evaluated using the method of residue by taking only the poles
that lie inside the unit circle.


Z transform of h(n), HZ   h n  z n

n 0
 

Z transform of h2(n) = Z[h2(n)]   h  nz

n 0
2 n
  h n  h n  z
n 0
n
-------------------->(10)
1
By Inverse Z transform, h n    H  Z Z
n 1
dZ -------------------------------->(11)
2j
Substituting (11) in (10)
 
1
 h  nz
n 0
2 n

n 0 2j  H  Z Z
n 1
dZ h n  z  n

1   1 
  H  Z   h n  Z  dZ
2j  n0 

1  
 dZ
 h  n   2j  H  Z   h n  Z
n 0
2

n 0
1
 Z n

  

1
2j  H  Z   h n  Z
n
  1
Z 1 dZ 
 n 0 

 h  n   2j  H  Z  H  Z  Z ----------------------------------->(12)

2 1 dZ 1

n 0

Substituting (12) in (9)

 1 
 eo   e2   H  Z  H  Z Z
2 1 1
dZ 
 2j 

Problem:
The output signal of an A/D converter is passed through a first order low pass filter, with
transfer function given by
H ( z) 
1  a  z for 0  a  1.
Find the steady state output noise power due to quantization at the
za
output of the digital filter.
Solution:
1
2j c
 e2   e2 H ( z ) H ( z 1 ) z 1dz

Given H(z) 
1  a z H(z 1 ) 
1  a  z 1
( z  a) z 1
 a
Substituting H(z) and H(z 1 ) in equation (1), we have
 e 2  1  a  z 1  a  z 1 1  e2  1  a  2 dz
e  
2
 z dz  z 1
2j c ( z  a )  z  a 
1
2j c ( z  a )  z  a 
1

11
 2 1 
  e  residue of H(z) H(z 1 ) z 1at z  a  residue of H(z) H(z 1 ) z 1at z  
 a 
2
  e  z  a 
1  a  2 z 1  0
  z  a   z 1  a  
2  1  a   2  1  a  
2
  e  1   e 
  z  a  

 1  a  
2 2 b
Where,  e 
2

12

***********************************************************************************
***

Find the steady state variance of the noise in the output due to quantization of input for the first
order filter.

y ( n )  ay ( n  1)  x (n )

Solution:
The impulse response for the above filter is given by h(n)  a n u (n)

 2   e2  h 2 ( n)
k 0

  e2  a 2 n
k 0

  1  a 2  a 4  .... 
2
e

1
  e2
1  a2
2 2 b  1 
 (or )
12 1  a 2 

Taking Z-transform on both sides we have

Y ( z )  az 1Y ( z )  X ( z )
Y ( z) 1 z
H ( z)   
X ( z ) 1  az 1 za
z 1
H ( z 1 ) 
z 1  a
We know
1
 2   e2 

2 j c
H ( z ) H ( z 1 )z 1 dz

Substituting H ( z ) and H ( z 1 ) value s in the above equation we get

1 z z 1
   z 1 dz
2 2
 
2 j c z  a z  a
e 1

1 z 1
2 j c ( z  a)( z 1  a )
 2   e2 dz

12
  z 1 
 residue of 1
at z  a 
( z  a)( z  a)
  e2  
 z 1 
  residue of at z  1 / a 
 ( z  a )( z 1  a ) 

 z 1 
   ( z  a)
2
e 
 ( z  a )( z 1  a ) z  a    e2
a 1
  e2
1
1
a a 1  a2

***********************************************************************************

****

Problem:

The output of the A/D converter is applied to a digital filter with the system function
0.45Z
HZ 
Z  0.72

Find the output noise power of the digital filter, when the input signal is quantized to 7 bits.

Given:
0.45Z
HZ 
Z  0.72

Solution:
0.45 Z 1
 
H  Z  H Z 1 Z 1 
0.45Z
 1  Z 1
Z  0.72 Z  0.72
0.45 2 Z 1

 Z  0.72  1  0.72 
Z 
0.2025Z 1

 Z  0.72  1  0.72Z 
 Z 
0.2025Z 1 Z

 Z  0.72  Z  1 
 0.72 
 0.28125

 Z  0.72  Z  1.3889

13
 -1 -1
1 2
Now the poles of H (Z)H(Z )Z are p =0.72 , p =1.3889

Output noise power due to input quantization

 1 
 eo   e2   H  Z  H  Z Z
2 1 1
dZ 
 2j 


  e2  Re s H  Z  H  Z 1  Z 1 
N

i 1 z  pi

   
N
  e2  Re s H  Z  H Z 1 Z 1
i 1 z  pi
-1 -1
1, 2,….. n
Where p p p are the poles of H(Z)H(Z ) Z that lies inside the unit circle in z-plane.

 0.28125
 eo
2
  e2   Z  0.72  
 Z  0.72 Z  1.3889 Z  0.72

 0.28125
  e2 
0.72  1.3889
 0.4205 e2

***********************************************************************************
****

*************************************************************************************
Co-efficient quantization error
 We know that the IIR Filter is characterized by the system function
M

b z k
k

HZ  k 0
N
1   a k z k
k 1

 After quantizing ,
M

 b  k q z k
 H  Z  q  k 0
N
1    ak  q z k
k 1

Where  ak  q a k  a k
 bk  q b k  bk

14
 The quantization of filter coefficients alters the positions of the poles and zeros in z-plane.
1. If the poles of desired filter lie close to the unit circle, then the quantized filter poles may lie
outside the unit circle leading into instability of filter.
2. Deviation in poles and zeros also lead to deviation in frequency response.
***********************************************************************************
****

Round off effects and overflow in digital filter:

Explain in detail about round off effects in digital filters.

 The presence of one or more quantizer in the realization of a digital filter results in a non-linear
device.
i.e. recursive digital filter may exhibit undesirable oscillations in its output
 In the finite arithmetic operations, some registers may overflow if the input signal level becomes
large.
 These overflow represents non-linear distortion leading to limit cycle oscillations
 There are two types of limit cycle oscillations which includes
1. Zero input limit cycle oscillations (Low amplitude compared to overflow limit cycle
oscillations)
2. Over flow limit cycle oscillations.
Zero input limit cycle oscillations
 The arithmetic operations produces oscillations even when the input is zero or some non zero
constant values. Such oscillations are called zero input limit cycle oscillations.
Overflow limit cycle oscillations
 The limit cycle occurs due to the overflow of adder is known as overflow limit cycle oscillations.
Dead Band:
The limit cycle occurs as a result of quantization effect in multiplication. The amplitude of the
output during a limit cycle is confined to a range of values called the dead band of the filter.
2 b
y(n  1)  2
1  a 
Consider a first order filter
y  n   ay  n  1  x n  ;
n >0

After rounding the product

y q  n   Q a  y  n  1   x n  ;

The round off error

2 b 2 b
  er 
2 2
r
where, e difference between the quantized value and the actual value.
2 b
Q ay  n  1  ay n  1  
2

The dead band of the filter for the limit cycle oscillations are
 y  n  1 a0
Q ay  n  1   
 y  n  1 a0

15
 y(n  1)  a y(n  1) 
2 b
2
2b
y(n  1) 1  a  
2
2 b
Dead band of the filter, y(n  1)  2
1  a 
***********************************************************************************
***

Problem: Consider a 1st order FIR system equation y (n)  x(n)  ay (n  1) with
0.875 , n  0
x ( n)  
0 , otherwise

Find the limit cycle effect and the dead band. Assume b=4 and a=0.95.

Solution:

Given:
0.875 , n  0
x(n)  
0 , otherwise

2 b 2 4
Dead band    0.625
21  a  21  0.95 
y ( n )  x ( n )  0.95 y ( n  1)
Q ay ( n  1)
n x(n) y ( n  1) ay ( n  1) y ( n )  x ( n )  Q ay ( n  1)
(round off to 4-bits)
0 0.875 0 0 0.0000 y(0)=0.875
0.875 * 0.95
  0.1101 2
1 0 0.875   0.83125 10 y(1)=0.8125
 0.8125
  0.11010  2
0.8125 * 0.95
  0.1100  2
2 0 0.8125   0.77187  10 y ( 2)  0.75
  0.110001 2
 0.75
0.75 * 0.95
  0.1011 2
3 0 0.75   0.7125 10 y (3)  0.6875
 0.6875
  0.1011011  2
0.6875 * 0.95
  0.1010 2
4 0 0.6875   0.653125 10 y ( 4)  0.625
  0.101001 2
 0.625
0.625 * 0.95
  0.1010 2
5 0 0.625   0.59375 10 y (5)  0.625
 0.625
  0.10011 2
0.625 * 0.95
  0.1010 2
6 0 0.625   0.59375 10 y (6)  0.625
 0.625
  0.10011 2
Conclusion:
The dead band of the filter is 0.625. When n  5 the output remains constant at 0.625
causing limit cycle oscillations.

16
***********************************************************************************
****

Overflow Limit cycle oscillations:

What are called overflow oscillations? How it can be prevented?

 We know that the limit cycle oscillation is caused by rounding the result of multiplication.
 The limit cycle occurs due to the overflow of adder is known as overflow limit cycle oscillations.
 Several types of limit cycle oscillations are caused by addition, which makes the filter output
oscillate between maximum and minimum amplitudes.
 Let us consider 2 positive numbers n1 & n2
n1=0.1117/8
n2=0.1106/8
n1 + n2=1.101-5/8 in sign magnitude form.
The sum is wrongly interpreted as a negative number.
 The transfer characteristics of an saturation adder is shown in fig below
where n  The input to the adder
f(n)  The corresponding output

Saturation adder transfer characteristics

 From the transfer characteristics, we find that when overflow occurs, the sum of adder is set equal
to the maximum value.
***********************************************************************************
****

Consider the recursive filter shown in fig. The input x(n) has a range of values of ±100V,
represented by 8 bits. Compute the variance of output due to A/D conversion process.

Solution:
Given the range is ±100V
The difference equation of the system is given by y (n)  0.8 y (n  1)  x(n) , whose impulse response h
(n) can be obtained as

17
h( n)  (0.8) n u ( n)
range of the signal
quantization step size 
No. of quantization levels
200

28
 0.78125
Variance of the error signal
q2
 e2 
12
(0.78125) 2

12
 e  0.05086
2

Variance of output

 2   e2  h2 (n)
n0

 (0.05086)  (0.8) 2 n
n 0

0.05086
  0.14128
1  (0.8) 2

***********************************************************************************

****

Problem:

The input to the system y(n)=0.999y(n-1)+x(n) is applied to an ADC. What is the power produced
by the quantization noise at the output of the filter if the input is quantized to a) 8 bits b)16 bits.

Solution:
y (n)=0.999y(n-1)+x(n)
Taking z-transform on both sides

Y (z) =0.999z-1Y (z) +X (z)

Y ( z) 1
H ( z)  
X ( z ) 1  0.999 z 1

z z 1
H ( z ) H ( z 1 ) z 1  ( )( 1 ) z 1
z  0.999 z  0.999
z 1

1
( z  0.999)( 0.999)( z  )
0.999
0.001

( z  0.999)( z  0.001)

18
 output noise power due  2 1
  eoi   e  H ( z)H ( z
1
2
)z 1 dz
to input quantization  2 j c
N
  e2  Re s  H ( z ) H ( z 1 ) z 1 
i 1 z  pi
N
  e2   ( z  pi ) H ( z ) H ( z 1 ) z 1 
i 1 z  pi

Where p1, p2,……pN are poles of H (z)H(z-1)z-1, that lies inside the unit circle in z-plane.
0.001
eoi 2  e2 ( z  0.999)( )
( z  0.999)( z  0.001) z 0.999
 e2 500.25

a) b+1=8 bits(Assuming including sign bit)

22(7)
 2  (500.25)  2.544 103
12

b) b+1=16 bits
2 2(15)
 2  (500.25)  3.882  10 8
12
***********************************************************************************
****
Problem:
A LTI system is characterized by the difference equation y(n)=0.68y(n-1)+0.5x(n).
The input signal x(n) has a range of -5V to +5V, represented by 8-bits. Find the quantization step
size, variance of the error signal and variance of the quantization noise at the output.
Solution:
Given
Range R=-5V to +5V = 5-(-5) =10
Size of binary, B= 8 bits (including sign bit)
Quantization step size,
R 10
q  8  8  0.0390625
2 2
q 2 0.03906252
var iance of error signal ,  e2    1.27116 *10 4
12 12
The difference equation governing the LTI system is
Y (n) =0.68y (n-1) +0.15x (n)
On taking z transform of above equation we get

19
Y ( z )  0.68 z 1Y ( z )  0.15 X ( z )
Y ( z )  0.68 z 1Y ( z )  0.15 X ( z )
Y ( z )[1  0.68 z 1 ]  0.15 X ( z )
Y ( z) 0.15

X ( z ) 1  0.68 z 1
Y (z) 0.15
H ( z)  
X ( z ) 1  0.68 z 1
0.15 0.15
H ( z ) H ( z 1 ) z  1  1
* * z 1
1  0.68 z 1  0.68 z
0.225 z 1
H ( z ) H ( z 1 ) z  1 
 0.68   1 
1    0.68   z  
 z   0.68 
0.0331z 1 0.0331z 1
H ( z ) H ( z 1 ) z  1  
 z  0.68   z  0.68   z  1.4706 
   z  1.4706 
 z 
Now, poles of H (z) H (z ) z-1 are p1=0.68, p2=1.4706
-1

Here, p1=0.68 is the only pole that lies inside the unit circle in z-plane
Variance of the input quantization noise at the output.
1
 eoi   e2  H ( z ) H ( z 1 )z 1dz
2

2 j  c

N
 eoi
2
  e2  
 Res H ( z ) H ( z ) z 
1 1

i 1 z  pi
N
 eoi
2
  e2  
 ( z  pi ) H ( z ) H ( z ) z 
1 1

i 1 z  pi

0.0331
 eoi
2
  e2 ( z  0.68) *
( z  0.68)( z  1.4706) z  0.68

0.0331
 eoi
2
  e2 *  0.0419 e2
(0.68  1.4706)
 eoi
2
 0.0419 *1.2716 *10 4
 eoi
2
 5.328 *106

20
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