Ulrich L. Rohde, N1UL and Ajay K.

Poddar, AC2KG
990 Cape Marco Drive Merida, Penthouse 2, 2 River Drive, Elmwood, NJ 07407-1828;
Marco Island, FL 34145; ka2weu@aol.com akpoddar@synergymwave.com

An Optimized Grounded Base

Oscillator Design for VHF/UHF
Phase noise in oscillators, along with frequency stability and
efficiency, is an important parameter in oscillator design.

The design of VHF/UHF oscillators has been described in

many books and journals with most of the emphasis on frequency C1
stability and to some smaller part on output/efficiency. Since the
introduction of reliable phase noise measurements and the ability to C3 = C3 C3B
predict/simulate the phase noise, the improvement of this important BRF193
parameter with the help of CAD and analytic equations has gained
more attention. The vast majority of early publications focused on
RE C2 C3A
designs using small signal approaches, which give non-reliable
answers for output frequency, output power and phase noise. The LE P1
purpose of this paper is to validate the large signal time domain C3B
approach using the grounded base oscillator rather than the Colpitts
oscillator. The key contributions are: (1) to predict the phase noise RB1
correctly using the large signal time domain calculations (Bessel
functions) and nonlinear CAD simulators and derive a set of algebraic
equations for the noise calculations (many of the CAD tools give
incorrect answers about the phase noise), and (2) to provide a set Cc
CB RB2
of empirical equations to guide the synthesis of such “optimized”
oscillators. This novel design concept using a time domain approach
provides both the best output power and the best phase noise. Bias
VDC
To have a point of reference the traditional small signal approach
is first used followed by the novel approach shown here to get the QX1803-RohdePoddar01
optimum design. Using a mix of linear equations and one large
signal parameter (gm), the important noise parameters are calculated
Figure 1 — Typical configuration of grounded base oscillator circuit.
and validated. Finally, based on this, a very simple but powerfully
scalable set of formulas for the oscillator synthesis is shown, that
provides extremely good results. In addition to this, the design
complete survey5 – 19 of configurations and applications is referenced
principle for fixed or narrowband oscillator discussed here also
in the Notes. The design methodology works over a 3:1 frequency
applies to the broadband VCO design. We have shown that this design
tuning range20-23.
methodology works over a multi-octave tuning range.
Several books on the topic of oscillators have been published in the
recent years, and the most popular ones are listed in the Notes. Many
Reference Circuit of the authors have attempted to predict the oscillator’s performance
A very popular circuit for VHF/UHF oscillators is the grounded based on a set of linear calculation including using the Leeson model
base configuration, which is shown in Figure 1. Its phase noise can [See Leeson24. — Ed.] or similar methods to determine the phase
be made very good, since the RF voltage swing at the collector can noise25, 26. The problem is that there are important input parameters
be close to the supply voltage. The circuit is simple and has been required, such as the large signal noise figure of the transistor, output
used for decades. The oscillator function is based on the principle power and operating Q. These are typically guessed, but not known.
that power from the output is taken and fed to the emitter. This The first successful attempt to determine the large signal phase noise
feedback arrangement generates a negative resistance at the output, was by Rizzoli, et al.6 and Annzil, et al.7.
compensating the losses of the output-tuned circuit, and starts But these approaches were not useful without a CAD tool and
oscillating and then stabilizing the oscillation amplitude1 – 4. A don’t give any design guides. Another interesting phenomenon that

QEX May/June 2018 15

has been overlooked by the linear approach is that prediction of the The 10 mA operating point was selected for a stable transistor
exact oscillator frequency that can be far off compared to the actual cut-off frequency fT. For more output power 30 mA is a better choice.
frequency of oscillation. Figure 2 shows the circuit generating the small signal [Y]
The recent book by Gonzalez8 gives an interesting overview of parameters using the Ansoft Designer CAD and the time domain
designing oscillators using linear calculations and CAD, but his model.
design does not provide the optimum solution. To demonstrate this The CAD software generates the Y-parameters based on the following
we are going to first use his way to design a 144 MHz Oscillator. The definition in Figure 3(a).
resulting circuit neither gives the best output power nor the best phase
noise and, at high frequencies, requires values for the capacitors,  I1  Y11 Y12  V1 
which cannot be easily realized because of parasitic effects. Figure  I  = Y Y  V 
1 shows the typical configuration of the grounded base oscillator  2   21 22   2 
circuit.
This oscillator type works well from RF frequencies like 10 MHz We obtain:
to above 1000 MHz. We will now follow the method of Gonzalez. For Y11 =G11 + jB11 =(279.08 − j 95.07) mS
large signal conditions see Clarke11. Kenneth Clarke was probably the Y21 =G21 + jB21 = (−271.32 + j100.77) mS
first to publish the effect of the collector current conducting angle of Y12 = (−1030 + j 78.06) mS
G12 + jB12 =
an oscillator, but makes no mentioning of the relationship of it on the
phase noise, which is done by Johnson10. Y22 =G22 + jB22 =(1020 + j 536.14) mS

The [Y] parameters

The first step is to determine the small signal [Y] parameters for Parallel Feedback Oscillator Topology
the transistor BFR 193 (Infineon), at the frequency of 144MHz, and The feedback arrangement shown in Figure 3(b) is the standard
the operating point: Ic = 10 mA, IB = 24 mA, Vbe = 0.64V, Vce = 8.8 V feedback Oscillator topology using parallel elements. Theoretically
the grounded base configuration can be rotated to be the Colpitts
circuit. This statement is often found in the literature, see Kotzebue
1F 1F and Parrish5. It is based on the black box theory. If we look at the
BRF193
performance, it is not correct that a mathematical rotation yields
P1 P2
the same performance. In the case of the Colpitts Oscillator the RF
320 Ω
voltage swing is now limited by the base emitter and emitter to ground
1H
voltage and as a result there is less energy stored in the circuit and
because of loading the operational Q can be less than in the grounded
29 kΩ base configuration. Here Vcb is about 12 V. Also Y22cb is less than Y22ce,
resulting less loading. The Colpitts oscillator is popular because of
its simplicity, and its perceived high isolation as the output power is
taken at the collector. However, due to the strong Miller effect at very
220 pF 20 kΩ
1F
high frequencies, this is not a true statement. These comments set
aside the general approach in the time domain shown here is valid not
only for the Colpitts Oscillator but other derivatives.
12 VDC The necessary oscillation condition for the parallel feedback
Bias oscillators as shown in Figure 3(b) can be described by
Ie = VccRe
– Vce
= 12320
– 8.8
= 10 mA

Yout + Y3 ⇒ 0
QX1803-RohdePoddar02

Figure 2 — Small signal Y parameter generating circuit with CAD

using Infineon time domain model

Y2
Bipolar
I1 I2

V1 [Y] V2 [Y]

Y1 Y3

QX1803-RohdePoddar03a

Yout
Figure 3(a) — Y-parameters based this definition.

Figure 3(b) — Parallel feedback oscillator topology. QX1803-RohdePoddar03b

16 QEX May/June 2018

 This condition can be expressed as The optimum values of the real and imaginary part of the output
admittance are
Y + Y + Y Y12 − Y2 
Det  11 1 2 =0 * * *
Y −
 21 2 Y Y22 + Y2 + Y3 
Yout
= [Gout + jBout ]

[Y12 − Y2 ][Y21 − Y2 ] where

Y3 =
−[Y22 + Y2 ] + *
Gout and Bout
*
are values for conjugate matching.
[Y11 + Y1 + Y2 ]
 (G + G21 ) 2 + ( B21 − B12 ) 2 
where Yij (i, j = 1, 2) are the small signal [Y] parameters of the *
G=
out G22 −  12 
bipolar or FET model.  4G11 
Calculation of the feedback network values [linear case] ≈ −74.5 ×10−3
As shown in Figure 3(b), the active 2-port network, together
with the feedback elements Y1 and Y2, are considered as a one-port
negative resistance oscillator circuit. The following is an example needed to compensate the resonator losses ,
of an oscillator design using the small signal parameter determined
above at 8.8 V and 10 mA at 144 MHz. The output admittance Yout is *  G − G12   (G12 + G21 ) * 
Bout = B22 +  21  + G22 − Gout 
Yout = −Y3  B21 − B12   2 
[Y12 − Y2 ][Y21 − Y2 ]  B + B12 
⇒ [Y22 + Y2 ] − +  21
[Y11 + Y1 + Y2 ] 2 
 
The optimum values of feedback element are calculated from the ≈ 214.74 ×10−3
* *
expression of B1 and B2 , and for 10 mA are:

C3 ≈ 237 pF
  B12 + B21  
 B11 +  2   1
    =ω0 ; C ≈ 471 pF
B1* = −   2π LC
+  G21 − G12   G12 + G21 + G  
   11  =For f 0 144 MHz, L 3 ≈ 2.59 nH
  B21 − B12   2  
Figure 4 shows the 144MHz oscillator circuit using the small
jB1* = jωC1 signal Y parameter for establishing oscillation conditions. The
required values for this parallel feedback topology are: 478 pF for
C1 @ 478 pF
the feedback capacitor, 459 pF for the emitter to ground, the inductor
B2* @ 417 × 10−3 3.2 nH, and 186 pF for C3A and C3B. The bypass capacitors Cb and Cc
should be about 220 pF.
jB2* = jωC 2 However, it is practically impossible to manufacture capacitors
above 200 pF to be capacitive at these frequencies. The best but
C 2 @ 459 pF awkward method then is to use a few capacitors in parallel.

C1 Osc. Ptr.
478 pF

BRF193

C2 372 pF
320 Ω
459 pF 3.2 nH
144 MHz P1
Q = 200
372 pF

29 kΩ

Figure 4 — 144 MHz oscillator

reference circuit for the evaluation 220 pF
220 pF 20 kΩ
of the linear approach.

12 VDC
Bias

QX1803-RohdePoddar04

QEX May/June 2018 17

 –75

–100

Phase Noise (dBc / Hz)

–125
Ic = 10 mA

–150
Ic = 30 mA

–175

–200
0.0001 0.001 0.01 0.1 1 10
Frequency (MHz)
QX1803-RohdePoddar05

Figure 5 — Phase noise plot of 144 MHz oscillator reference circuit for the evaluation of the linear approach (both 10 mA and 30 mA cases).
The 30 mA case gives 10 dB lower phase noise than the 10 mA case.

For 30 mA,
20

Y11 =G11 + jB11 =(437 − j 295) mS 10

0
Y21 =
G21 + jB21 =
(−427 + j 296) mS
dBm (PO1)

–10
Y12 = (−1670 + j 757) mS
G12 + jB12 =
–20

Y22 =G22 + jB22 =(1650 − j146) mS –30

For f0 = 144 MHz and 30 mA, the component values are –40
L = 3.77 nH, C1 = 518 pF, C2 = 503 pF, C3 = 69 pF, C = 324 pF, 100 150 200 250 300 350 400 450
needless to say C1 and C2 are paralleled capacitors in the vicinity of
Frequency (MHz)
100 pF each.
QX1803-RohdePoddar06
Figure 5 shows the simulated plot of the phase noise. The “linear
“calculation indicates a resonant frequency of 143.2 MHz, while
the non-linear harmonic balance (HB) analysis supplies the correct Figure 6 — RF output power of 144 MHz oscillator reference circuit
for the evaluation of the linear approach Both 10 mA (solid) and 30
frequency of 144.2 MHz (quite a difference in percent) and an output mA (dashed) are shown. For 30 mA, 12dB more power is available,
power of just 5.1 dBm, as seen in Figure 6. This value is determined now a total of approximately 18 dBm.
using the HB programs Ansoft Designer (Nexxim). ADS gives the
same answer. These CAD tools deviate less then 1 dB from measured
results, if the input Spice type parameters for the transistor are was reliable. Therefore we took a few critical circuits, running from
accurate. crystal oscillators to VCOs and evaluated them again. These were
Large signal and noise analysis available during the development of the Designer CAD tool, and we
There were a variety of efforts made to deal with the large signal re-measured them, with more refined test equipment like the R&S
conditions, like the time domain approach. Equation (10) in Johnson10 FSUP 26 and its necessary options. We have shown12, 13 that the
is a first successful attempt to deal with the calculations of the output accuracy of the prediction was within 0.5 dB of the measured results.
power with reasonable effort. There are many problems associated During this effort to analyze the noise in oscillators with a set of
with both the large signal analysis as well as the noise analysis. From equations using a minimum of expensive CAD tools, we found this
an experimental point of view it is virtually impossible to build all was possible. These equations9 will be used here.
possible variations. So we were trying to determine if the Ansoft
Designer, whose large signal noise analysis development we were A Novel Approach using the time-domain analysis for
involved with, would give us the correct prediction. We were aware obtaining the best phase noise and output power.
that all researchers would primarily look for measured data (which The hunt for a combined low phase noise can be followed
we will show) and yet we had to convince them that our CAD tool through the literature. Designers have published recipes, like the

18 QEX May/June 2018

QEX May/June 2018 19
use of low noise transistors, high Q circuit, and other things, but the This assumes an ideal intrinsic transistor. To perform the transition
consequences of the large signal operation and the resulting phase from the intrinsic to extrinsic transistor, we add the parasitics
noise had not been fully understood. A complete mathematical (package effects, lead inductance and bond wires) by correcting the
treatment follows for a 144 MHz oscillator. final results for capacitances and inductances. The ft of the transistor
Design steps used is high enough so a phase shift correction for gm is not necessary
Step 1 — Calculation of the output power for the selected dc at this frequencies (VHF).
operating conditions. The value of n can be in the range of n [n1, n2], where n1 is 2 and n2
We select the same circuit as above, and set fo = 144 MHz. is 5 for a drive level x = 15 (low phase noise performance).
The RF output current is: Assume n = 5, the values of C1 and C2 can be calculated to be
I RF=
(t ) I c (t ) @ I e (t ) C2 1 C
= ⇒ C2 = 1
 ∝
I ( x)  C1 + C 2 n n −1
= I dc 1 + 2∑ n cos(nωt ) 
 1 I 0 ( x )  C1 C C
−3 C2 = = 1 ⇒ 1 =4
10 10 [1 + 6.6]x =15
=× n −1 4 C2
⇒ I RF (t ) =
60 mA peak amplitude

where x is normalized drive level The ratio of the capacitor C1 to C2 is 4.

Step 3 — Calculation of C1 and C2.
qV1 The value of C1 is selected for proper loading, therefore
=x = ; V1 Drive signal
kT Y
XC1 > Y11 ≈ C1 > 11
ω
Considering 50 W load, the RF output power is calculated: Y21 2G m ( x)
⇒ C1 > @ C1 ≥
ω ω
VRF ( f=
0) I RF × 50 −3
2 × 20 ×10
⇒ C1 > ≈ 44 pF
=60 ×10−3 × 50 2 × π ×144 ×106
= 3 V peak amplitde
For C1/C2 = 4, C2 @ 11 pF.
No Vce saturation assumed.
The oscillator output power at 144 MHz is then Step 4 — Calculation of C3 and C4.
For optimum phase noise and power output,
2
VRF ( f0 )
Pout ( f 0 ) =
2 RL C3 ≥ 2C2 ⇒ C3 =
22 pF ,
9
= = 90= mW 19.5 dBm and the capacitive transformer tapping ratio m (C3/C4) should be
2 × 50
greater than 10, therefore the impedance transformation is greater
than 100. For C3 =22 pF, C4 is 220 pF.
Step 2 — Calculation of the large signal transconductance for the
normalized drive level x = 15

.Y I dc I dc Step 5 — Calculation of L.
21 =
small signal = = gm
kT / q VT 1
ω0 = ;
3 ×10−3 2π LC
gm
⇒= ≈ 115 mS
26 mV C CT + C3 ;
=
C1 × C2
where k is the Boltzman constant, and T = 298 K. CT
= ⇒ C ≈ 30 pF
C1 + C 2

For f0 = 144 MHz,
1
The large signal transconductance Gm is now =L3 ≈ 39 nH
(2π ×144 ×106 ) 2 × 29 ×10−12

qI dc  2 I1 ( x)  Step 6 — Calculation of the [L/C] ratio.

Y 21 = G=
m ( x)
large-signal  
kTx  I 0 ( x)  n =1 The energy stored across the resonator circuit for a given
conduction angle and drive level is dependent on the characteristic
 2 I1 ( x) 
gm impedance,
=  
x
 I 0 ( x)  n =1
L(nH)
≈ 20 mS (for x ≈ 15) =Z0 = 1200
C (pF)

20 QEX May/June 2018

 For optimum phase noise and output power, Z should be greater The total effect of all the four noise sources can be expressed as
than 3.
For example, the L/C ratio for a good approach is PN (ω=
0 + Dω ) [ PN inr (ω0 + ω )]
+[ PNVbn (ω0 + ω )]
L3 39 × 10−9
= = 13 ⇒ p > 10 +[ PN ibn (ω0 + ω )]
C3 30 × 10−10
+[ PN icn (ω0 + ω )]
Validation — We now use the same test circuit and apply the
“new” component values just calculated. where
Phase Noise Calculation Kf = Flicker noise constant
We have shown9 the phase noise calculations for the Colpitts AF = Flicker noise exponent.
oscillator. These calculations can also be used to get the phase noise CC
Ceff = C + 1 2
of this circuit. It agrees well with both measurements and simulations C1 + C2
using the harmonic balance simulator Ansoft Designer (Nexxim).
The individual phase noise contribution can be described by Note that the effect of the loading of the Q of the resonator is
calculated by the noise transfer function multiplied with the noise
4 KT
[ NFTinr (ω0 )] sources.
2
PN inr (ω0 + Dω ) =
RP The phase noise contribution from the different noise sources for
2 the parallel tuned Colpitts oscillator circuit at Df = 10 kHz from the
4 KT  1  1   ω0   oscillator frequency f0 = 144 MHz will now be computed.
=    
RP 2
  2 jω0 Ceff   Dω   Circuit parameters
Base resistance of transistor rb = 6.14 W.
→ Phase noise contribution from the resonator tank. Parallel loss resistance of the resonator RP = 7056 W.
PNVbn (ω0 + Dω ) = 4 KTrb [ NFTVbn (ω0 ) ]
2 Q of the resonator = 200 (Q of the inductor at 144 MHz)
Resonator inductance = 39 nH
2
 1  C + C2   1   ω0   Resonator capacitance = 22 F
= 4 KTrb   1    Collector current of the transistor Ic = 10 mA
 2  C2   2 jQ   Dω   Base current of the transistor Ib = 85 mA.
Flicker noise exponent AF = 2
→ Phase noise contribution from the base resistance. Flicker noise constant Kf = 10‑7
Feedback factor n = 5.
Phase noise at 10 kHz is
PN ibn (ω0 + Dω ) = 2qI b [ NFTibn (ω0 ) ]
2
PN inr (ω0 + 10 kHz) ≈ −134.2 dBc/Hz
2
PNVbn (ω0 + 10 kHz) ≈ −151 dBc/Hz
 1  C2   1   ω0  
PN ( ibn +ifn ) (ω0 + 10 kHz) ≈ −169.6 dBc/Hz
= 2qI b     
 2  C1 + C2   jω0QCeff   Dω   PN icn (ω0 + 10 kHz) ≈ −150.6 dBc/Hz

The total sum of all the four noise sources can be expressed as
→ Phase noise contribution from the base current.
K f I bAF PN (ω=
0 + Dω ) [ PN inr (ω0 + ω )]
[ NFibn (ω0 )]
2
PN ifn (ω0 + Dω ) =
fm +[ PNVbn (ω0 + ω )]
2
K f I bAF  1  C2   1   ω0   +[ PN ibn (ω0 + ω )]
=     
f m  2  C1 + C2   j 2ω0QCeff   Dω   +[ PN icn (ω0 + ω )] @ −134.1 dBc/Hz

Note that the noise contribution from the resonator at this offset
→ Phase noise contribution from the flicker noise of the transistor. is the same as the flicker noise contribution from the transistor. For
low-Q cases, this can be identified as the flicker corner frequency.
PN icn (ω0 + Dω ) = 2qI c [ NFTicn (ω0 ) ]
2
Phase noise at 100 Hz is
2 PN inr (ω0 + 100 Hz) ≈ −94.2 dBc/Hz
 1  C   1   ω0   PNVbn (ω0 + 100 Hz) ≈ −111 dBc/Hz
= 2qI c   1
   PN ( ibn +ifn ) (ω0 + 100 Hz) ≈ −124.1 dBc/Hz
 2  C1 + C2   2 jω0QCeff   Dω   PN icn (ω0 + 100 Hz) ≈ −110.6 dBc/Hz

→ Phase noise contribution from the collector current.

QEX May/June 2018 21

 C1 Osc. Ptr.
11 pF

BRF193

C2 22 pF
320 Ω
44 pF 39 nH
144 MHz P1
Q = 200
220 pF

29 kΩ

1000 pF
220 pF 20 kΩ

12 VDC
Bias

QX1803-RohdePoddar07

Figure 7 — 144 MHz oscillator reference circuit for the evaluation of the time domain approach.

The total sum of all the four noise sources can be expressed as
PN (ω=
0 + Dω ) [ PN inr (ω0 + ω )]

+ [ PNVbn (ω0 + ω )]
+ [ PN ibn (ω0 + ω )]
+ [ PN icn (ω0 + ω )]
@ −94.1 dBc/Hz
It appears that the flicker noise and the noise from the resonator
are the limiting factors for the overall phase noise performance of the
oscillator circuit.
Figure 7 shows the schematic and Figure 8 shows the layout of the
144 MHz oscillator using time domain parameters at Ic = 10 mA. The
oscillator circuit shown in Figure 7 uses a lumped inductor of 39 nH
and an unloaded Q of 200 at the operating frequency. Even at these
frequency the layout is quite critical. The Figure 8 layout shows an
assembly of component where the lead inductances have been kept
small. The inductor is a standard off the shelf component.
Figures 9 shows the CAD simulated phase noise plot, and Figure
10 shows the measured phase noise plot. The simulated and the
validated output power now is 11.55 dBm (a 6 dB improvement
compared to the linear case), and at 10 kHz offset from the carrier
frequency the phase noise has been improved to be –135 dBc/Hz from
previously –122 dBc/Hz, a 13 dB improvement. The outputs at the Figure 8 — Layout of 144 MHz oscillator circuit using LC lumped
second and third harmonics are about ‑28 dBm and ‑34 dBm. inductor capacitor resonator network
Using our phase noise calculation approach as shown above, the
result is –134 dBc/Hz and –94 dBc/Hz at 10 kHz and 100 Hz offset.
All three results, calculated, simulated, and measured result closely
agrees within 1 dB. Many designers may not have access to CAD
tools with oscillator noise calculation, and therefore this approach is keep the dc dissipation of the device in mind, as the CAD approach
extremely useful and cost saving. does not flag a misuse of the device.
If we now operate the same transistor at 30 mA, the phase noise at
10 kHz offset will be further improved to –144 dBc/Hz and the output
Second Example: 433MHz oscillator circuit
power is increased to 20 dBm. This shows that for low phase noise
We use the same transistor (BFR193) with, Vce = 8.8V,
design a more powerful transistor is a good choice. It is important to
Ic = 10 mA, IB = 85 mA, Vbe = 0.67 V, and we now obtain:

22 QEX May/June 2018

=C1 3.3
= pF, C2 13 pF, offset), we need to ask why. The phase noise and the carrier frequency
=C3 A 7.5
= pF, C 3 B 75 pF, are related in a quadratic function. This means three times increase
in frequency results in 9 dB degradation in phase noise for 432 MHz
LE = 13 nH, oscillator circuit in comparison to 144 MHz oscillator as shown
RE = 320 W, RB1 = 29000 W, in Figure 7. Therefore, phase noise performance for 432 MHz
= RB 2 20000 W, oscillator circuit should be ‑126 dBc/Hz instead of ‑100 dBc/Hz at
10 kHz offset (CAD simulated). The answer is that even in grounded
= CB 220 = pF, Cc 1000 pF, base condition, large signal Re[Y22] loads the parallel tuned circuit
Vdc = 12 V significantly resulting in a lower dynamic operating Q. We must find
a work around for this.
The phase noise and the Q are related in a quadratic function.
resulting an output power of 11.9 dBm and a phase noise of This means two times the Q results in 12 dB improvements. Since
‑100 dBc/Hz at 10 kHz offset from the carrier. Since the 144 MHz we lost 26 dB, we need to improve the dynamic loaded operating Q
was about 35 dB better in the phase noise (‑135  dBc/Hz at 10 kHz approximately 20 times. As this is not possible, there may be more

–80

PN = –135 dBc / Hz @ 10 kHz offset from carrier frequency 144 MHz

–100
Phase Noise (dBc / Hz)

–120

–140

–160

–180
0.0001 0.001 0.01 0.1 1 10
Frequency (MHz)
QX1803-RohdePoddar09

Figure 9 — Phase noise plot of 144 MHz oscillator reference circuit for the evaluation of the time domain approach.

–80

–100
Phase Noise (dBc / Hz)

–120
Linear (144 MHz Oscillator)

–140

Time Domain (144 MHz Oscillator)

–160

–180
0.001 0.01 0.1 1 10
Frequency (MHz)
QX1803-RohdePoddar10

Figure 10 — The measured phase noise plot for 144 MHz oscillator (linear and time domain).

QEX May/June 2018 23

 Osc. Ptr.

4 pF
42.5 nH 5 pF

P1
BRF193

42.5 nH 80 pF
40 pF
4000 nH
12 kΩ

38 Ω

220 pF 400 pF
220 pF 3 kΩ

12 VDC
Bias

QX1803-RohdePoddar11

Figure 11 — Schematic of 432 MHz grounded base oscillator using tapped inductor (30 mA).

effects than just the Q deterioration. The answer is, “the collector relationship between the values of the capacitance of the tuned circuit
emitter capacitance dynamically detunes the circuit periodically”. A and the two feedback capacitors, the collector emitter capacitor
solution for this problem is tapping the inductor, therefore decreasing and the emitter to ground capacitor. The following shows the set
the influence of the transistor. We will show this now. of recommended steps for easy design of such oscillator. Figure 14
shows the typical grounded base oscillator for demonstrating the
Modified Circuit for UHF (432 MHz) and Higher Current simple design rules where CE and CF are the feedback capacitors that
If we inspect Y22 of our transistor at 432 MHz and at 30 mA, we
will see that the loading of the tank circuit decreases the operating Q
significantly. The way around this to apply a center tapped inductor.
As the coupling at these frequencies from winding to winding is not
extremely high, actually two separate identical inductors can be used
successfully.
Figure 11 shows the schematic of a 432 MHz grounded base
oscillator using the tapped inductor. This is a modification of the
circuit we have used previously. In the case of a VCO, it would be
advantageous to use a different output coupling scheme because in
this configuration, the loading would vary with frequency. This can
easily be achieved by adding some inductive coupling to the circuit.
In case of a printed resonator this can be accomplished quite simply.
Figure 12 shows the layout of the 433 MHz oscillator circuit using
buried printed coupled line resonator network (stripline resonator:
middle layer). The actual resonator would not be visible if the
oscillator is visually inspected.
Figure 13 shows the simulated phase noise plot. It shows the
expected noise degradation of 9 dB, as the frequency is approximately
three times higher. The resulting simulated output power at 432 MHz
is 16 dBm, compared to 18 dBm at 144 MHz. This is due to internal
package parasitics, which could not be compensated externally. The
second harmonic is suppressed by 38 dB; this is due to the higher
operating Q.

Circuit Design Guidelines

The results we have obtained so far were based on mathematical Figure 12 — Layout of the 432 MHz oscillator circuit using buried
calculations. Some of these calculations are difficult to obtain. printed couple line resonator network (stripline resonator in the
However, by inspecting the resulting circuits, there are certain middle layer).

24 QEX May/June 2018

 –75

–100

Phase Noise (dBc / Hz)

–125

–150

–175

–200
0.0001 0.001 0.01 0.1 1 10 100
Frequency (MHz)
QX1803-RohdePoddar13

Figure 13 — The simulated phase noise plot of 432 MHz grounded base oscillator using tapped inductors.

CF
=L 1200 × C
⇒ LE = 1200 × CL∗
L = 1200 1
C f =
BRF193 2π LC
1
=
RE CE CA 2π 1200
LE P1 ∗ C C
CL = CL + E F
CB CE + CF

RB1 where CE (C1) and CF (C2) are feedback capacitors.

CL = CA × CB
CA + CB
C ACB ;
CL =
C A + CB
Cc
CB RB2
where CA (C1) and CF (C2) are feedback capacitors.
Bias CB = 10 C A .
VDC To examine the accuracy of this simple approach, let us take the
same 144 MHz grounded base oscillator as shown in Figure 7.
QX1803-RohdePoddar14
Example: The 144 MHz Grounded Base Oscillator
1
Figure 14 — Typical configuration of grounded base oscillator circuit. = CL∗ ⇒ C @ 31 pF
2π f 1200
1
generates the negative resistance to compensates the loss resistance of = LL ⇒ L @ 39 nH
(2π f ) 2 C
the resonator network comprised of LE and CL∗ .
CF = 0.3 × CL∗ @ 11 pF
CL =2 × CF @ 22 pF
Simple Design Rules With an Example: CE =4 × CF @ 44 pF
By setting the L/C ratio to a fixed value of 1200 (this is done for C A = 22 pF
optimum energy storage, group delay and energy transfer for a given CB = 220 pF
cycle in the resonator network), the following should be used.
These results are comparable with the results above and the
calculation is frequency scalable with minor corrections possibly,
L  LE 
= =  1200 if necessary. Other alternative short formulas based on linear
C  CL∗  Grounded − Base approximations and published in the literature may not deliver the
same high performance.
⇒ Z=
0 1200 @ 34.6 W

QEX May/June 2018 25

 published over 300 scientific papers in professional journals and
Summary conference proceedings. He is a recipient of IEEE 2015 IEEE IFCS W.G.
Today’s applications, both commercial and consumer, require low Cady Award, 2015 IEEE R1 Scientific innovation Award, and 2009 IEEE
cost high performance oscillators and the design time is also very R1 Scientific Contributions Award. Dr. Poddar has been actively involved
critical. The approach shown here meets these requirements and gives for more than 30 years in charitable and volunteer service (Red Cross,
detailed guidelines for better performing oscillators. The concept Tsunami Relief, and Blind Community) for public causes.
is explained in detail and validated. This is only one of the many
applications for which this technique is applicable. Furthermore, by Notes
translating this design to integrated circuits very high performance
but very low cost oscillators can be made. From a theoretical point,
1
F. E. Terman , Radio Engineers Handbook, pp. 498 ff, McGraw-Hill Inc,
NY, 1943, ASIN: B000GWIWFM.
we found it surprising that simple equations could be found which 2
F. Langford-Smith, Editor, Radiotron Designers Handbook, pp. 947 ff.,
optimized the design and accurately predicted the phase noise. Electron Tube Div. RCA, Harrison, NJ, 1954, ASIN: B000JILVH4.
For the determination of the output power, a nonlinear CAD tool
3
L. J. Giacoletto, Electronics Designers Handbook, p. 16-1, McGraw Hill
Book Company, Inc, NY, 1977.
is recommended if the frequencies are higher than 500 MHz. Our 4
F. Vilbig, Lehrbuch der Hochfrequenztechnik, Vol. 2, pp. 235,
example has shown that at frequencies below 200 MHz the output Akademische Verlagsgesellschaft Becker & Erler Kom.-Ges.,
power can be determined quite accurately using this approach. 1937/1942, ISBN: 9780070231498.
To make this oscillator part of a PLL synthesizer, electronic tuning
5
K. L. Kotzebue and W. J. Parrish, “The use of large signal S-Parameters
in microwave oscillator design,” in Proc. 1975 Int. Microwave Symp. On
is required. The output capacitor should then have a set of tuning diodes Circuits and Systems.
in parallel , with light coupling , to properly select the tuning range. 6
V. Rizzoli, A. Neri, A. Costanzo, F. Mastri, “Modern Harmonic-Balance
Techniques for Oscillator Analysis and Optimization,” in RF and
Prof. Dr.-lng. habil. Dr. h.c. mult. Ulrich L. Rohde, N1UL, is the Microwave Oscillator Design, ed. M. Odyniec, Artech House, 2002.
7
W. Anzill, F.X. Kaertner, P. Russer, “Simulation of the Single-Sideband
Chairman of Synergy Microwave Corp., Paterson, NJ; President of Phase Noise of Oscillators,” Second International Workshop of
Communications Consulting Corporation, serving as an honorary Integrated Nonlinear Microwave and Millimeterwave Circuits, 1992.
member of the Senate of the German Joint Forces University Munich; 8
G. Gonzalez, Foundations of Oscillator Circuit Design, Artech House,
honorary member of the Senate of the Brandenburg University of Inc., 2007, ISBN 10: 1-5963-162-0.
Technology Cottbus-Senftenberg, Germany; past member of the Board
9
U. L. Rohde, A. K. Poddar, and G. Boeck, The Design of Modern
Microwave Oscillator for Wireless Applications Theory and
of Directors of Ansoft Corporation, Pittsburgh, PA; and is a partner of Optimization, ISBN 0-471-72342-8.
Rohde & Schwarz, Munich, Germany. He presented numerous lectures 10
K. M. Johnson, “Large Signal GaAs MESFET Oscillator Design”, IEEE
worldwide regarding communications theory and digital frequency Trans. on MTT-27, No. 3, Mar 1979.
synthesizers. Dr. Rohde has published more than 300 scientific papers in 11
K. K. Clarke, “Design of Self-Limiting Transistor Sine-Wave Oscillator”,
professional journals and several books and book chapters, and several IEEE Transaction on Circuit and Systems, [legacy, pre-1988], vol. 13,
Issue 1, Mar 1966, pp. 58-63.
dozen patents. Dr. Rohde is a Fellow Member of the IEEE, Member of the 12
U. L. Rohde and J. Whitaker, Communication Receivers: DSP,
IEEE Technical Committee for HF, VHF, and UHF Technology MTT- 17, Software Radios, and Design, Third Edition, McGraw-Hill, pp.413-
Member of the IEEE Signal Generation and Frequency Conversion MTT- 422, 2001, ISBN:0-07-136121-9.
22, Member of the Board of Trustees Fraunhofer Gesellchaft (EMFT) 13
U. L. Rohde and D. P. Newkirk, RF/Microwave Circuit Design For
for Modular Solid State Technology, Member of the Board of Friends of Wireless Applications, 2000, pp.798-812, 413- 422, ISBN:0-471-
29818-2.
the Bavarian Academy of Science and Humanity, and Honorary Member 14
M. Gitterman, The Noisy Oscillator The First Hundred Years, From
of the Academy of Science, all in Munich, Eta Kappa Nu Honor Society, Einstein Until Now, World Scientific Publishing Co., 2005, ISBN 981-
Executive Association of the Graduate School of Business­Columbia 256-512-4.
University, NY, the Armed Forces Communications & Electronics 15
M. Tiebout, Low Power VCO Design in CMOS, Springer Series in
Association, Fellow of the Radio Club of America, former Chairman of Advanced Microelectronics, Springer Berlin Heidelberg 2006, World
the Electrical and Computer Engineering Advisory Board at New Jersey Scientific, Singapore 596224, 2005, ISBN: 3-540-24324-0.
16
E. Camargo, Design of FET Frequency Multipliers and Harmonic
Institute of Technology, IFCS C. B. Sawyer Award recipient, IFCS I. I. Oscillators, Artech House, Inc, 1998, ISBN 0-89006-481-4.
Rabi Award recipient, Honorary Professor at IIT Delhi, India, Chief 17
R.l W. Rhea, Oscillator Design And Computer Simulation, Second
Judge of IEEE IMS 2014 Student Design Competition, and PhD Defense Edition, SciTech Publishing, 911 Paverstone Dr., Raleigh, NV 27615,
Committee Member at UCLA and Drexel University. His hobbies include 2006, ISBN: 1-884932-30-4.
sailing, US Merchant Marine Officer, Master of Steam or Motor Vessels, 18
M. Odyniec, Editor, RF And Microwave Oscillator Design, Artech
photography and licensed Amateur Radio operating since 1956 (DJ2LR House, Inc., 2002, ISBN 1-58053-320-5.
and N1UL). 19
Peter Vizmuller, RF Design Guide: Systems, Circuits and Equations,
Artech House, 1995, ISBN 0-890006-754-6.
Dr. Ajay Poddar, AC2KG, is an IEEE Fellow, technological leader,
20
U. L. Rohde and A. K. Poddar, “Impact of Device Scaling on Oscillator/
VCO Phase Noise in SiGe HBTs,” International Semiconductor Device
and distinguished scientist. He graduated from IIT Delhi, India; Research Symposium, ISDRS 2005, USA, December 7-9, 2005.
Doctorate (Dr.-Ing.) from TU-Berlin, Germany; Post Doctorate (Dr.- 21
U. L. Rohde and A. K. Poddar, “Reconfigurable Concurrent Oscillators
Ing. habil) from Brandenburg Technology University, Cottbus, Germany. For Multi-Band Multi-Mode Wireless Communication Systems”, IEEE
From 1990 until 2001 he has worked as Senior Scientist and Program Sarnoff Symposium, Princeton, NJ, 30 April - 02 May 2007.
Manager at Defense Research & Development Organization (DRDO) 22
U. L. Rohde and A. K. Poddar,” Wideband voltage controlled oscil-
India. From 2001, he has been working as a Chief Scientist at Synergy lators employing evanescent mode coupled resonators,” US Patent
Microwave, responsible for design and development of frequency 7,180,381, Feb 2, 2007.
generating and time keeping electronics, RF-MEMS based microwave/ 23
U. L. Rohde, A. K. Poddar, and R. Rebel,” Integrated Low Noise
millimeter wave components, Negative Index inspired Metamaterial- Microwave Wideband Push- Push VCO”, US Patent 7,088,189, Aug
2006.
Mobius resonators for sensors, and Optoelectronics for industrial, 24
D. B. Leeson, “A Simple Model of Feedback Oscillator Noise
medical, and space applications. Dr. Poddar is a full professor at Oradea Spectrum”, Proceedings of the IEEE, Feb. 1966, 54 (2), pp. 329–330.
University, Romania and Guest lecturer at Technical University, Munich, 25
www.microwavejournal.com/articles/29151-noise-analysis-then-
Germany, and PhD advisor at several universities worldwide. He has and-today?v=preview.
received over dozen awards for scientific and technological innovations, 26
Ulrich L. Rohde and Anisha M. Apte, "Everything You Always Wanted
over two dozen patents, authored/coauthored 6 technical books, and to Know About Colpitts Oscillators", IEEE Microwave Magazine, Aug.
2016, pp. 59-76.

26 QEX May/June 2018