1986 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO.

9, SEPTEMBER 2014

Model-Based Nonlinear Embedding for

Power-Amplifier Design
Haedong Jang, Student Member, IEEE, Patrick Roblin, Member, IEEE, and Zhijian Xie, Member, IEEE

Abstract—A fully model-based nonlinear embedding device [6]. Furthermore, the intrinsic gate and drain voltages, which
model including low- and high-frequency dispersion effects is can cause unwanted forward gate to source conduction or re-
implemented for the Angelov device model and successfully verse breakdown in high electron-mobility field-effect devices,
demonstrated for load modulation power-amplifier (PA) applica-
tions. Using this nonlinear embedding device model, any desired are unknown to designers solely relying on load–pull measure-
PA mode of operation at the current source plane can be pro- ments [7].
jected to the external reference planes to synthesize the required Over the past decades, vector large-signal network analyzers
multi-harmonic source and load terminations. A 2-D identifica- (LSNAs) have made available to the designers, calibrated
tion of the intrinsic PA operation modes is performed first at time-domain voltage and current waveforms in the RF fre-
the current source reference planes. For intrinsic modes defined
without lossy parasitics, most of the required source impedance quency range at the external device planes [8]. Using this
terminations will exhibit a substantial negative resistance after technology, significant advances in large-signal modeling,
projection to the external reference planes. These terminations can model validation, and de-embedding methodologies have also
then be implemented by active harmonic injection at the input. been reported [9]–[14]. Thanks to those modeling efforts, the
It is verified experimentally for a 15-W GaN HEMT class-AB behavior of the devices at the intrinsic reference planes are
mode that, using the second harmonic injection synthesized by
the embedding device model at the input, yields an improved becoming more accessible to designers. Nevertheless, conven-
drain efficiency of up to 5% in agreement with the simulation. A tional PA design techniques rely on external driving sources
figure-of-merit is also introduced to evaluate the efficacy of the and loads to iteratively optimize the internal waveforms. On
nonlinear embedding PA design methodology in achieving the the contrary, Raffo et al. started the PA design process from
targeted intrinsic mode operation given the model accuracy. the intrinsic reference plane and embedded the nonlinear or
Index Terms—De-embedding, embedding, harmonic load–pull, linear parasitic components on top of the intrinsic load lines, to
large-signal model, load modulation, load synthesis, nonlinear, predict the input impedance and necessary harmonic loads at
power amplifier (PA).
the extrinsic reference planes (ERPs) [7], [15]. This technique
has been successfully applied to the design of class-E [16] and
I. INTRODUCTION class-F [17], [18] amplifiers. Detail embedding/de-embedding
methods circumventing low-frequency dispersions were re-
ported in [19]–[22]. In these methods, the intrinsic operation
W AVEFORM engineering has been introduced for im-
proving the efficiency of RF power amplifiers (PAs) by
minimizing the heat dissipation in active devices [1]. Also, con-
mode is established by means of low-frequency measurements.
In this paper, a fully model-based embedding approach will
be pursued for the non-quasi-static Angelov (Chalmers) model
tinuous class J/F modes have been recently proposed for wide-
[23], [24]. Beside its non-quasi-static topology and drain delay
band operation [2], [3]. However, the waveforms at the mea-
accounting for high-frequency dispersion, the Angelov model
surement reference planes (MRPs) are significantly distorted by
includes an electrothermal memory sub-circuit accounting for
linear/nonlinear parasitic components and packages, making it
low-frequency dispersion, as shown in Fig. 1(b). Memory ef-
difficult to directly apply these theories [4], [5]. Conventionally,
fects associated with traps could also be included in the circuit
harmonic source/load–pull measurements were performed to lo-
topology [25], [26]. In the strictly model-based nonlinear-em-
cate the optimal external loads in terms of performance figures
bedding approach pursued in this paper, the memory-effects af-
of merit such as output power or efficiency. However, load–pull
fecting the device characteristics (I–V and Q–V) are indeed in-
measurement data do not provide the intrinsic waveforms or the
tended to be directly calculated by the device model itself. This
PA mode of operation without de-embedding the measured data
contrasts with the low-frequency measurement approach where
the IV characteristic are acquired experimentally at a specific
Manuscript received October 25, 2013; revised January 26, 2014, April 21,
operating point and device temperature. On the other hand, pro-
2014, and May 30, 2014; accepted June 13, 2014. Date of publication July 10,
2014; date of current version September 02, 2014. This work was supported in vided the model accounts for all low-frequency memory effects
part by the National Science Foundation under Grant ECS 1129013. in the device, the model-based nonlinear-embedding approach
H. Jang and P. Roblin are with the Department of Electrical and Computer
is applicable to all operating points, device temperatures, and
Engineering, The Ohio State University, Columbus, OH 43210 USA (e-mail:
jang.131@osu.edu roblin@ece.osu.edu). dynamic load lines possible for the intrinsic device.
Z. Xie is with the Department of Electrical Engineering, North Carolina A&T To facilitate the projection of the transistor intrinsic mode of
University, Greensboro, NC 271411 USA.
operation to the external reference planes we shall introduce in
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. this paper an embedding transfer network (ETN), as shown in
Digital Object Identifier 10.1109/TMTT.2014.2333498 Fig. 1(b). An ETN is a nonlinear multi-port network used for the

0018-9480 © 2014 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/
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JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1987

determined using a load–pull at the fundamental while using

all possible combinations of lossless second and third harmonic
impedance terminations. A correlation with the traditional PA
mode classification will also be attempted.
The second issue encountered for nonlinear embedding PA
design not discussed in the literature is that most of the input and
output harmonic impedances generated by the external load syn-
thesis, will exhibit negative resistances making them unrealiz-
able using passive circuits. To address this issue, an impedance
re-normalization method will be introduced to find practical
passive lossless terminations for which the intrinsic load line
is not significantly affected. In both: 1) the external source/
load synthesis and 2) the impedance re-normalization steps, the
degradation in the PAE or output power can be monitored. For
the device designer, steps 1) and 2) yield important technology
information on the impact that the linear and nonlinear para-
sitics have upon the device performance. For the PA designer,
step 1) will provide ways to improve the PA performance, as is
discussed next.
Initially the impedance re-normalization step will be used
such that only passive lossless terminations will be considered
for the harmonics at the input and output reference planes. How-
ever, active harmonic impedances at the input could be imple-
mented with the use of a proper PA driver. In the literature, the
optimization of the input harmonic termination [27] or the in-
jection of second harmonic for efficiency improvement were re-
ported by sweeping the injected harmonic amplitude and phase
[28], [29], and optimizing the internal waveforms [30], [31].
The embedding device model introduced in this work provides
us with the means to actually synthesize the harmonic injec-
tions (amplitude and phase) required to implement the desired
internal mode.
To experimentally study the nonlinear embedding PA design
methodology, we will focus on the synthesis of constant drain-
efficiency class-B modes of operation intended for the design
of a load-modulation PA. A commercial packaged GaN device
with 15-W peak power will be used for these studies. The in-
Fig. 1. (a) Circuits for the device model. (b) Embedding device model. ternal PA design will be next projected to the external reference
(c) De-embedding device model. The input and output variables are grouped planes using the embedding device model of Fig. 1(b). The tran-
together and marked as Inputs (in red in online version) and Outputs (in blue sistor will then be experimentally tested for actual impedance
in online version), respectively.
terminations approximating the synthesized and re-normalized
output impedances. Finally, a figure-of-merit will be introduced
to estimate the efficacy of the nonlinear embedding PA design
synthesis of the required multi-harmonic source and load termi-
methodology in controlling the intrinsic device operation in a
nations at the external reference planes. This embedding device
real device given the model accuracy.
model once developed will be verified in simulation to yield
Furthermore, to demonstrate another application of the non-
exact results (up to numerical precision) at all reference planes
linear embedding PA design methodology, we will inject at the
when driving the normal device model shown in Fig. 1(a). Note
transistor external input, a second-harmonic excitation with the
that the embedding device model for the Angelov model will be
phase and amplitude determined by the ETN in order to im-
posted at publication online.1
plement the targeted internal mode of operation. The nonlinear
The first issue encountered for nonlinear embedding PA de-
embedding PA design methodology will then be experimen-
sign is that of the selection of the PA mode of operation at the
tally validated by comparing the predicted and measured varia-
intrinsic transistor level. Classes are usually defined for ideal
tion of the output power and PAE versus incident power under
piece-wise linear [5] dc–IV characteristics and some adapta-
load modulation in the presence of constructive and destructive
tion is needed for realistic nonlinear device IV characteristics.
second harmonic injection.
In this work, both the fundamental impedance yielding max-
In accordance with our discussion and the literature review,
imum power added efficiency (PAE) and output power will be
this paper is organized as follows. The harmonic load–pull at
1[Online]. Available: http://www2.ece.ohio-state.edu/~roblin/NSFweb.html the intrinsic reference planes for mapping and identifying the
1988 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

Fig. 2. Packaged large-signal equivalent circuit using Angelov model equations is used for loads synthesis process. The red (in online version), light blue (in
online version), dark blue (in online version), and black boxes defines the CRP, ERP, PRP, and MRP, respectively.

intrinsic transistor operation modes and the mode projection to Note also that use is made of the notation and to
the external reference planes will be presented in Section II. An indicate the time- and frequency-domain voltages, respectively,
overview of the model extraction performed will be presented in
Section III. The performance of the PA under load modulation
and input harmonic injection will be first studied in simulation
in Section IV, and compared to the measurements in Section V.
Conclusions will then be drawn in Section VI. The intrinsic device operation can be fully controlled by the
designer by applying any type of excitation between the in-
trinsic gate and source and between the drain and source. This
II. INTERNAL DESIGN AND EMBEDDING PROCESS includes, for example, the self-consistent case of a dc supply
voltage and arbitrary harmonic impedance terminations applied
A. Embedding Nonlinear Parasitics between the drain and source terminals. The resulting outputs
from the intrinsic device operation simulation include the in-
The circuit topology used for this work including the intrinsic
trinsic drain currents , the drain voltage , and the gate
device model, the linear and nonlinear parasitic networks, the
voltage , as shown in Fig. 1. Note that only the drain dc–IV
package circuit model, and the device access circuit is shown in
is included among the device dc current
Fig. 2. The packaged device is mounted on a circuit board and
sources. Thus, the dc gate current leakage is assumed to be part
connected to the RF connectors via access lines. The RF mea-
of the parasitic network and the intrinsic gate current at the CRP
surements are performed at the connector levels, which define
is zero and not needed.
the MRP. The reference plane outside the package is referred to
Given the desired intrinsic voltages and and cur-
as the package reference plane (PRP), while the reference plane
rent , the required branch currents through the nonlinear
inside the package is referred to as the ERP. The intrinsic non-
and linear parasitic elements and the required node voltages to
linear drain current at the current source reference plane (CRP)
maintain the intrinsic operation can be readily calculated. In this
is a function of the intrinsic node voltages and and
work, this embedding process is done with the help of a multi-
the junction temperature,
port circuit, the so-called ETN of Fig. 1(b), which is composed
itself of multiple linear/nonlinear parasitic sub-circuits of the
(1)
device model, as shown in Fig. 3. It shows the complete ETN
for the intrinsic mode projection from the CRP to the ERP.
Note that high-frequency dispersion effect associated with the
Note that this embedding process, which thus works in the
drain propagation delay is included as part of the intrinsic de-
reverse direction of de-embedding, encompasses nonlinear el-
vice model. The thermal network, which is shown in a sepa-
ements accounting with non-quasi-static effects, as shown in
rate CRP box on Fig. 2, is actually part of the intrinsic device
Fig. 3(a) and (b). General equations for a quasi-static model are
model. The instantaneous dissipated power is a function
given in [7]. For the non-quasi-static Angelov model, the fol-
of the intrinsic voltages and currents. Other low-frequency dis-
lowing self-consistent equations needs to be solved:
persion effects like trapping could also be included. Thus, the
intrinsic device model is not necessarily memoryless like the
intrinsic IV characteristics, but may include low-frequency dis-
persion and high-frequency dispersion effects. It is further noted
that the charges and , which shunt the diodes and (2a)
, are connected in series with the resistance and , re-
spectively. Thus, the Angelov device model cannot be separated
in a pure resistive and capacitive core and the embedding device
model will rely instead on the defined current reference plane. (2b)
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1989

Once the external voltage and currents (flowing into the de-
vice) are obtained, the complete set of external sources and loads
can be calculated in the frequency domain for each harmonic
(for on the source side) using the usual formula

(3)

The exact same internal mode of operation can then be verified

to be obtained from the original device model in Fig. 2 when
the multi-harmonic gate and drain voltages and dc biases syn-
thesized by the embedding device model of Fig. 1(b) are exter-
nally applied to the device model of Fig. 1(a). In this regard, the
embedding device model and its associated ETN generate exact
synthesis results as far as the model is concerned.
Alternatively the impedance terminations and
can be used for the harmonic when the real part
of the impedances are positive. Otherwise for impedances with
a negative real part, active sources are required. The presence
of such negative resistances then becomes a source of concern
as conventional amplifiers are usually driven by the dc supply,
the fundamental input excitation, and passive harmonic load
terminations. This issue will be addressed in more detail in
Section II-B.

B. Intrinsic Operation Mode Identification and Projection

This section presents an example of PA mode mapping and
identification at the CRP and projection to the PRPs using the
embedding device model. The device model and embedding de-
vice model for the Angelov model were implemented in Ag-
ilent ADS using equation-based symbolically defined devices
(SDDs). The package, parasitics, and model coefficients them-
selves used in this section are from [24]. Harmonic load–pull
Fig. 3. ETN and de-embedding transfer network (DTN) for the intrinsic mode simulations at the fundamental frequency were performed in
projection from the intrinsic to the ERPs. The sub-circuits common to the ETN
and DTNs are shown in (a). The current equations and the thermal sub-circuits,
Agilent Technologies’ Advanced Design System (ADS) at the
which are specific to the ETN and DTN, are shown in (b) and (c), respectively intrinsic reference plane for all passive load while using
(a) Common circuits. (b) Embedding only. (c) De-embedding only. lossless load termination for the harmonics, to find the fun-
damental load providing either maximum PAE or maximum
output power. To map all possible lossless load terminations
where and are the channel resistances in series with for the harmonics, the second and third harmonic phases of the
the charges and establishing the non-quasi-static RC load reflections were swept while keeping their ampli-
channel charging times. As mentioned in [7], these equations tude unity: (lossless). The drain was biased at
can be iteratively solved using, for example, the harmonic-bal- 28 V, the gate at 4.5 V, and 40-mA drain current. The input
ance method [32]. The additional dispersive sub-circuits shown was excited by an RF voltage source with an amplitude of 3.5 V
in Fig. 3(a)–(c) are similarly analyzed. at 2 GHz. The analysis reported here is limited to the second
The sum of all the drain branch currents, i.e., , is then used and third harmonic. The higher harmonics were assumed to be
to drive the drain parasitic sub-circuit and in Fig. 3(a). shorted, although other options were considered (not reported
Similarly the sum of all the source branch currents, i.e., , here).
is used to drive the source parasitic sub-circuit and in The maximum PAE is plotted in Fig. 4(a) in the harmonic
Fig. 3(a). phase space for the fundamental load maxi-
This nonlinear embedding is performed by a circuit simu- mizing the PAE: . The maximum output
lator, typically a harmonic-balance simulator. The simulation of power is also plotted in Fig. 4(b) in the harmonic phase space
the embedding device model yields both the external voltages, for the fundamental load maximizing the output
and , and the external currents, and , required for power: . and are the phases of the
achieving the desired internal operation at the intrinsic reference second and third harmonic load reflection coefficients
plane. Since like the device model, the embedding device model and , respectively.
is packaged as a standalone circuit, its operation is transparent The phase location of the conventional modes of class B/J,
to the designer who does not need to have access to its internal quasi-class F, and the recently proposed continuous J modes ( ,
node and components, which may remain proprietary if needed. black) are indicated in Fig. 4. Also located are the B F ,
1990 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

Fig. 4. Results of harmonic load–pull simulations at the intrinsic reference

plane to maximize: (a) the PAE and (b) the output power using only the in-
trinsic IV model at 2 GHz.

the inverse class B/F, as well as the quasi-continuous class F ( ,

black). Wide flattop (light color) areas of high PAE are observed
for this device. However, noticeably different results may result
if the designer elects to use different lossless terminations for
the fourth and higher harmonics.
The black line marked E and E indicates the condi-
tions when capacitive or inductive loads are used for the second
and third harmonics as is the case for class E and inverse class
E, respectively. In Fig. 4(a), the line connecting the two points
associated with class F and inverse class F and intersecting with
the class-E-like mode in the middle provides a robust high-effi-
ciency operation with wide design choices. This mode was no-
ticed in the literature [33], [35], and a similar area was called the
“EF plateau” in [33]. Note that an absolute classification of the
transistor modes is not possible since those are defined for ideal Fig. 5. Optimal source and load
devices and the device used here features a realistic IV charac- terminations maximizing the PAE once embedded to the PRP by the ETN are
teristic exhibiting a finite knee voltage, nonzero drain conduc- shown in Smith charts (a) and (b), respectively, at 2 GHz. The intrinsic har-
monic phases and at the CRP (and its various PA modes) are remapped
tance, and gate–voltage-dependent transconductance. as indicated in (c) into the extrinsic and phase space at the PRP.
The harmonic load–pull results were projected to the PRP
using the nonlinear ETN including the fundamental, second, and
third harmonics, as shown in Fig. 5(a) and (b) for the source and harmonic lossless terminations are indicated by the circles (ma-
load, respectively. The optimal fundamental load and source ter- genta in online version) in Fig. 5(a) and (b). Note that the and
mination required for maximum PAE for all second and third phases were swept in a uniform harmonic grid at the CRP
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1991

with steps of 10 . This mapping reveals a strong asymmetry in

the distribution of the terminations around the Smith chart at
the PRP resulting in uneven harmonic loading sensitivity. The
fundamental loads ( , magenta in online version) in Fig. 5(a)
are rotated by nearly 100 due to the parasitics. The class B is
singled out by a thick black circle, triangle, and diamond for the
fundamental, second, and third harmonics, respectively.
Fig. 5(c) focuses on the phase remapping of the intrinsic har-
monic phase and at the CRP into the extrinsic and
phase space at the PRP. As can be seen, the external grid has a
nonuniform density compared to the uniform grid used for the Fig. 6. Extracted Angelov model is compared to the original CREE model in
terms of power spectrum: (a) up to third harmonics and waveforms (b) at the
internal harmonics. Highlighted are the location of the intrinsic bias condition marked with dotted ellipse in (a).
open ( , magenta in online version), short ( , red in online
version) terminations, and other identified modes ( , black and
, black) at the PRP. The extrema of the variable from the
III. DEVICE MODEL EXTRACTION
continuous mode class J/F [2], [3], which has a finite second
harmonic sweep range, are marked with solid black diamonds In the remainder of this paper, we will apply the nonlinear em-
and squares, respectively. bedding PA design methodology to a 15-W peak power pack-
Most of the synthesized external harmonic loads exhibit a aged GaN power device (CGH27015F, CREE Inc.). The An-
negative resistance needed to compensate for the loss in the re- gelov device model and embedding device model presented in
sistive parasitics. The synthesized external supply dc voltage is Figs. 1 and 2, respectively, are used for this purpose. The needed
also higher than the internally applied dc voltage. However, a Angelov model parameters for this transistor were extracted
few of the harmonic terminations marked by solid triangles (red using the Agilent commercial device modeling software Inte-
in online version) for the second harmonic and solid diamonds grated Circuit Characterization and Analysis Program (ICCAP).
(blue in online version) for the third harmonic in Fig. 5(b) fall The required dc characteristics and small-signal -parameter
inside the Smith chart and thus exhibit a positive resistance. It data were generated in ADS from the device model provided
can be verified that they are associated with low PAEs, as indi- by CREE for the CGH27015F transistor.
cated by the filled white triangles and diamonds in Fig. 4(a). The following steps were used for this model extraction.
In summary, in this section we have presented the nonlinear First, the package was de-embedded in ADS using the package
embedding PA design methodology for the design of the PA model (440166) provided for this device. Gate and drain
arbitrary mode of operation (class) after having developed voltage sweeps ranging from 8 to 0 V and 2 to 56 V, re-
an embedding device model for the non-quasi-static Angelov spectively, were used for the intrinsic device modeling. For the
model. In the first step of the nonlinear embedding PA design, a gate–voltage-dependent nonlinear capacitances, the gate was
load–pull at the fundamental frequency is performed at the CRP swept from 5 to 1 V with 0-V drain voltage from 100 MHz
for a specific choice of lossless harmonic termination so as to to 10.1 GHz. The drain voltage was swept from 0 to 56 V
select the targeted intrinsic mode of operation providing either with 0-V gate voltage in the same frequency range for the ex-
maximum output power or maximum efficiency. Repeating traction of the nonlinear drain voltage-dependent capacitance.
this process for all second and third harmonics (2-D) lossless So-called cold field-effect transistor (cold-FET) [36] data were
termination possible, all the optimal 2-D intrinsic mode can be also acquired for series parasitics extraction from simulations
mapped. In addition to the well-known PA modes (B, F, J, E), in the frequency range of 100 MHz to 2.1 GHz. The data was
a continuum of unreported high-performance intrinsic modes acquired at the temperature of 25 C and the same temperature
available to the designer is identified. In the second step of was maintained throughout the measurement in Section V. The
the nonlinear embedding PA design, the projection of these thermal resistance of 8.0 C/W from the data sheet was used
intrinsic mode from the CRPs to the ERP is performed with and was not separately extracted.
the embedding device model to synthesize the exact required The integrated charge Angelov model was used in the sim-
source and load terminations to achieve the desired intrinsic ulation considering the importance of charge conservation in
mode of operation. Performing this projection for all second the harmonic-balance solvers. The extracted model was imple-
and third harmonics (2-D) lossless termination possible, it is ob- mented in the Agilent ADS using SDDs and compared with the
served that most of the required multi-harmonic source and load original CREE model, as shown in Fig. 6. For comparison, the
terminations exhibit a negative resistance. This result, which drain voltage was fixed at 28 V and the gate voltage was swept
was observed in all other devices tested, is to be expected since from 4.0 to 1.5 V around the threshold voltage of 2.9 V.
the mode projection synthesizes the multi-harmonic source and Power spectra to the third harmonic were compared to each
load terminations, which compensate among other things for other. The extracted model (solid lines) agree reasonably well
the loss of the parasitics network. The techniques of: 1) active with the CREE model (dotted lines) above the threshold voltage,
harmonic injection and 2) harmonic load re-normalization will but does exhibit some deviation below it in the subthreshold re-
be investigated in the remainder of this paper to address the gion. Voltage and current waveforms generated at the bias con-
negative resistance issue and present practical applications of dition marked with dotted ellipse in Fig. 6(a) exhibit good agree-
the nonlinear embedding PA design methodology. ment, as depicted in Fig. 6(b). Therefore, the device model is
1992 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

expected to give reasonable predictions for class-B, class-AB,

and class-A bias conditions. Furthermore, we shall see that a
high fidelity model is not critically required to obtain good re-
sults with the nonlinear embedding PA design technique.

IV. DESIGN OF A LOAD-MODULATED CLASS-B PA

A. Constant Efficiency Load Modulation Design

To validate the nonlinear embedding PA design technique,
a class-B PA intended for load modulation ( varying with
) will now be designed at the CRP. For improved linearity,
we assume that the operation is limited to the linear (saturation)
IV region with the load lines touching the knee of the IV. When
using a piecewise-linear IV model with a constant knee voltage
, the drain efficiency is given by

(4)

where is the RF output power, is the supplied dc

power, is the amplitude of the drain current at the
fundamental frequency, and is the output load at the
fundamental frequency and the drain bias. From (4), we
deduce that the efficiency will remain constant if the product
of the fundamental load and the fundamental output current,
, is kept constant for all incident powers.
Therefore, a constant drain-efficiency can theoretically be re-
alized by selecting the loads to be inversely proportionally to
the drain current

(5)

Fig. 7. Simulated fundamental load, output current, and output voltage at

This design was applied to the extracted Angelov device model 2 GHz satisfying the constant drain efficiency criteria, are plotted in (a) versus
at the intrinsic reference plane to achieve in simulation a peak incident power for the extracted Angelov device model. The currents and loads
power of 10 W. The intrinsic IV model was biased with a drain were normalized by their values at maximum output power. The simulated
output power and drain efficiencies are plotted in (b) versus incident power for
voltage of 27.5 V and a gate voltage of 2.9 V resulting in 104 the extracted Angelov device model at both the current source and PRPs.
mA of drain current (with no RF applied) for class-AB oper-
ation. Fig. 7(a) shows the simulated internal loads and current
relationship when the products of the normalized currents and being shorted and the current waveforms approach half-recti-
loads are kept equal to “1.” In Fig. 7(b), the actual intrinsic fied sinusoidal waves. Being able to shape the intrinsic load lines
output power and the intrinsic drain efficiency are and waveforms during the design process is one of the targets of
plotted versus incident power. The peak power is 40 dBm as the nonlinear embedding PA design method for more effective
designed and reduces quasi-linearly with reduced excitations. waveform engineering. Fig. 7(b) compares the internal and ex-
As intended, the drain efficiency remains nearly constant over ternal drain efficiencies. The internal efficiency was calculated
the 26–29-dBm incident power range and slightly decreases at at the CRP and the external efficiency was calculated at the PRP
lower incident power. The drain efficiency decreases noticeably after the mode projection process with the ETN. Due to the lossy
by 7% for lower incident powers when using the Angelov in- parasitic components, the external efficiency is lower than the
trinsic IV model. This is due in part to the gradual transcon- internal efficiency by about 4%.
ductance reduction at gate voltages approaching the threshold
voltage.
B. External Projection of Internal Operation
Fig. 8(a) and (e) shows the designed intrinsic load lines and
waveforms, respectively, obtained in simulation. The intrinsic The current source PA design is embedded to the various ref-
dc–IV curves obtained from the transistor model at the same erence planes (ERP, PRP, and MRP) using the ETN so as to pre-
reference planes as the load lines are provided as references. dict the input excitations and loads at each harmonic, which are
The six different load lines correspond to the six power levels in required to synthesize the desired internal PA operation at the
Fig. 7. The load lines are reaching the IV knee at low drain volt- CRP. The drain voltage (solid lines , red in online version)
ages for each load as intended. The intrinsic voltage waveform and drain current (solid lines , blue in online version) wave-
clearly exhibits a sinusoidal waveform due to the harmonics forms, source , and load reflection coefficients,
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1993

Fig. 8. Simulated 2-GHz load lines and waveforms at the CRPs (a) and (e), respectively, are embedded to the ERPs in (b) and (f), the PRPs in (c) and (g), and the
MRPs at the connectors (d) and (h). (a) and (e) Current source. (b) and (f) Extrinsic. (c) and (g) At package. (d) and (h) At connector.

Fig. 9. Simulated 2-GHz intrinsic load and source reflection coefficients shown in (a) and (e), respectively, at the CRP, are successively mapped using the
ETN to each of the external reference planes: in (b) and (f) for the ERP in (c) and (g) for the PRP, and in (d) and (h) for the MRP. (a) and (e) Current source.
(b) and (f) Extrinsic. (c) and (g) At package. (d) and (h) At connector.

generated during the embedding process, are shown at each of The source reflection coefficients are calculated in the fre-
the reference planes of interest in Figs. 8 and 9, respectively. quency domain using
As can be seen in Fig. 9(a) and (e), the second and third har-
monic source and load reflection coefficients are “ 1” (short) at (6)
the intrinsic reference plane, as expected for an ideal class-B op-
eration. The fundamental loads, , have only real compo- where and are gate voltage and current phasors and is
nents at the intrinsic reference plane, as shown in Fig. 9(a). The the reference impedance. Since are “0” given the tran-
six circles (red in online version) correspond to the loads at the sistor IV model used at the CRP has infinite input impedance
six considered power levels. The arrow in the figure is showing at all harmonics, and since a generator is only connected at the
the required variation of the loads as the input and output power fundamental frequency, we have
are increased. for and , as shown in Fig. 9(e).
1994 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

When the contribution of the nonlinear and linear parasitic

components are accounted for by the ETN, the load lines and
the reflection coefficients at the ERP are, respectively, distorted
and rotated, as shown in the second column of the Figs. 8 and 9.
The third columns of Figs. 8 and 9 show the effect of the package
parasitics at the PRP). The third harmonic reflection coefficients
can be seen to be rotating faster in terms of phase than the second
harmonic, as expected. The last columns show the results at the
MRP after adding the access lines and connectors. A transmis-
sion-reflection-line (TRL) calibration kit was built and charac-
terized using -parameter measurements. It was found that the
proper estimation of the indeterminate sign of the test bed
in the TRL deembedding [34] was critical to obtain the correct
phases for the odd harmonics relative to the even harmonics.
The measured error box of the access line and the connectors
was imported in ADS for simulation. The TRL data were ac- Fig. 10. Measured PAE and output power versus the fundamental incident
quired in the range of 0.6–8.5 GHz covering up to the fourth power are compared to the simulation results for the extracted
harmonic to obtain reasonable accuracy in measurements [35]. Angelov model (dashed lines) and the original CREE model (solid lines) for
three different injections of the second harmonic at 2 GHz: without injection
It should be noted that in Fig. 9(h) remains inside ( ), injection with constructive phase ( ,“constructive”) and injection with
of the Smith chart. However, the second and third harmonic destructive phase ( ,“destructive”).
reflection coefficients in Fig. 9(h) become larger than
“1.” This issue is discussed in more detail in Section IV-C.
gelov extracted device model using the ETN, the effect of the
C. Input Second Harmonic Injection harmonic injection on the PAE is also similarly noticeable for
The ideal class-B condition, defined at the intrinsic reference the CREE model.
plane, requires an internal harmonic short. Therefore, the har- In this work, it has been assumed so far that by optimizing
monic power dissipated internally needs to be effectively re- the power efficiency of the intrinsic device, the power efficiency
generated at the ERP. Harmonic injection from the source side of the extrinsic device will be optimal. This assumption is well
is thus required even though the class-B operation at the CRP justified in the case where the power dissipated in the parasitic
does not by itself require any harmonic excitation. Also, since network is a small fraction of the power dissipated by the in-
some of the parasitic components are lossy, higher harmonic in- trinsic device. This is partly verified in the device studied here
jection power than can be obtained from passive harmonic ter- where the average intrinsic efficiency is about 65% and the av-
minations may be required, resulting in the harmonic reflection erage drain extrinsic efficiency is about 61%. To verify that the
coefficients being outside of the Smith chart. The embedding ETN indeed predicts the optimal phase for the second harmonic
device model provides in Fig. 9(h) the exact amount of har- injection, a sweep of the phase is desirable. For this experi-
monic excitations or reflection co- ment, the input power at the fundamental was selected to corre-
efficients from the source to keep the desired internal spond to one of the six power levels considered (fourth one with
class-B operation. dBm). The second harmonic amplitude was kept
Simulations were conducted in addition to the previous load to the value dBc predicted by the
modulation conditions for three different cases: (a) with no har- embedding device model and the phase was swept from 180
monic injection and with second harmonic injection, (b) with to 180 [39].
the ETN predicted phase, and (c) with the opposite ETN phase Fig. 11 shows the simulated sinusoidal variation of the PAE
(180 shift). The input harmonic excitations and loads predicted with the second harmonic phase obtained using a solid line (blue
by the Angelov embedding device model were applied to two in online version) for the Angelov model. The prediction of the
models, the extracted Angelov model and the original CREE embedding device model for the optimal phase and its opposite
device model. The simulation results show a significant impact (180 shifted) are indeed verified to correspond to the maximum
of the harmonic injection on the PAE and negligible effect on the and minimum, respectively, of the phase sweep. Note that nearly
output power, as shown in Fig. 10. As can be seen in Fig. 10, the same results are predicted by the CREE device (dashed line,
the output powers overlap with each other for the three cases. magenta in online version in Fig. 11) using the prediction of the
On the other hand, the PAE exhibits a distinct improvement in Angelov embedding device model.
a constructive way (solid and dashed lines with triangles, ma- These various simulation predictions we have obtained from
genta in online version) compared to the fundamental only ex- the Angelov and CREE models will now be compared to mea-
citation (lines with circles, red in online version) without any sured experimental data in Section IV-D.
harmonic injection. On the contrary, when the phase was oppo-
site (180 ) to the predicted ETN phase, the PAE was decreased, D. Intrinsic Versus Extrinsic Harmonic Terminations
the harmonic injection working in a destructive way (lines with As mentioned in Section IV-C, the predicted harmonic
nabla, blue in online version). Even though the excitation and sources and loads are usually active with some of them falling
loads applied to the CREE model were predicted from the An- inside the Smith chart.
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1995

Fig. 13. Intrinsic load lines are compared for the two cases of shorted har-
Fig. 11. Phase of the injected second harmonic at 4 GHz was swept in simula- monics at intrinsic reference planes and ERPs.
tion and measurement. The extracted model (solid line, blue, in online version)
and the CREE model (dashed-line, magenta, in online version) were used in the
simulations.
mode projection at high frequencies. Indeed harmonic termi-
nation placed at the low-frequency ERP will permit the mode
mapping to partially offset the series feedback introduced by
the source resistance .
To illustrate it, consider in simulation the case of a transistor
operating in class B where the harmonic shorts are applied
intrinsically (CRP) or extrinsically (low-frequency ERP). The
extrinsic series resistances were
used in Fig. 12(b). The very small gate leakage current can be
ignored. The fundamental RF gate drive and the device biasing
were adjusted for the device to have approximately the same
intrinsic mode of operation in both cases. Indeed, as shown in
Fig. 13, due to the small parasitic resistances, the intrinsic load
lines constructed with the extrinsic harmonic shorts closely
overlap with those obtained with the intrinsic harmonic shorts
even though the intrinsic harmonic voltages are not perfectly
suppressed when using low-frequency extrinsic harmonic
shorts.
The obtained intrinsic voltages and and current
were then used in both cases by the nonlinear ETN to pre-
dict the extrinsic harmonic terminations (reflection coefficients)
required at 2 GHz to maintain their respective intrinsic mode
of operation. Note that the exact same Angelov ETN of Fig. 3
Fig. 12. Lossless harmonic terminations can be applied at: (a) the current refer-
was used for both cases. The results are summarized in Table I.
ence plane (CRP) with no parasitics or at (b) the low-frequency ERPs (low-fre- From this table, it is verified that harmonic load reflection coef-
quency ERP) using only resistive parasitics. ficients of similar amplitudes slightly above one (negative resis-
tance) are observed in both the intrinsic and extrinsic harmonic
short cases. However, as expected, harmonic source reflection
The results presented in Section IV-C focused on using ac- coefficients with substantially smaller amplitude are observed
tive harmonic injection to synthesize the desired intrinsic mode in the extrinsic harmonic short case compared to the intrinsic
of operation while improving the device efficiency. In such a short case while still being larger than one.
case, to obtain the most optimal intrinsic mode of operation, the
harmonic terminations were directly applied at the CRP of the E. Harmonic Reflection Coefficient Re-Normalization
intrinsic device, as shown in Fig. 12(a). As mentioned in the previous sections, the projected har-
However, the designer is free to select any circuit for the monic sources and loads are usually active even when using ex-
mode mapping and thus can include the resistive parasitics of trinsic harmonic terminations for the mode mapping. Three dif-
the device, as shown in Fig. 12(b). When passive harmonic ferent re-normalization approaches for the harmonic reflection
loads are to be used, harmonic termination placed at the low- coefficients were investigated to implement the closest lossless
frequency ERP will provide a way to reduce the negative re- harmonic terminations. First, the magnitude was reduced while
sistances in the source harmonic termination when doing the the phase was kept the same as shown in (7). For the other two
1996 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

TABLE I
SIMULATED SECOND AND THIRD HARMONIC REFLECTION COEFFICIENTS PROJECTED TO THE ERPs AT 2 GHz BY
THE EMBEDDING DEVICE MODEL FOR BOTH OF THE INTRINSIC AND EXTRINSIC HARMONIC SHORT CASES

Fig. 15. Passive harmonic load–pull measurement setup with an LSNA was
used for the linear load-modulation. It was combined with an ASP for the second
harmonic injection at the input.

Fig. 14. Photograph of the test bed used for measuring the 15-W peak power 3.5-A saturated drain current. The device-under-test (DUT)
GaN device (CGH27015F, CREE Inc.) [39]. A pressure bar (removed in the
photograph) was used to electrically connect the device leads to the microstrip was mounted on a copper heat sink, which sat on a thermal
lines of the test-bed. chuck with controlled temperature. All the measurements were
performed at a chuck temperature of 25 C.
Fig. 15 shows the passive harmonic load–pull setup used
cases, the magnitude was reduced following either a constant with an LSNA (MT4463A) to verify the linear load modulation
reactance circle or a constant susceptance circle on the Smith design. The harmonic injection measurements were conducted
chart, as expressed by (8) and (9), respectively. In these two using the Agilent ESG4438C and Anritsu MG3692A signal
cases, the phase of the reflection coefficients will vary, sources combined with a diplexer. A triplexer (Maury Mi-
crowave, 9677G, 7 mm) working at 2 GHz was connected with
(7) two sliding shorts for the second and third harmonic loads and
an automatic mechanical tuner for the fundamental load.
(8)
B. Experiment Conditions
(9) The excitation powers and loads predicted by the embedding
device model were applied to the DUT. Six fundamental loads
The three methodologies were found in practice to exhibit a and associated harmonic conditions for the linear load modula-
similar performance in terms of PAE for the DUT considered. tion operation were implemented using the passive tuners to be
Experimental results will be presented in Section V. as close as possible to the ones predicted by the embedding de-
vice model given the loss in the test bed. This yielded the load
terminations shown in Fig. 16, which were applied to the output
V. MEASUREMENTS AND DISCUSSION of the DUT.
As mentioned in Section IV-B, the predicted harmonic
A. Measurement Setup
sources and loads are usually active although some of them do
The 15-W peak power commercial GaN device fall inside the Smith chart, but close to the edge. Furthermore,
(CGH27015F, CREE Inc.) shown in Fig. 14 in its test bed was in practical passive load–pull systems, the amplitude of the
used for both the (a) linear load-modulation class-B design harmonic load reflections, which can be attained at the MRP,
with constant efficiency and (b) the second harmonic injection is limited to a maximum value by the loss
for PAE improvement. The packaged (440166) device provides in the various cables, 7-mm junctions, triplexer, and sliding
2-W average power with 28-V drain voltage. It provides short tuners. The re-normalization approach of (7) modified to
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1997

Fig. 17. Fundamental and second: (a) harmonic amplitude and (b) phase at
Fig. 16. Experimental harmonic loads provided by the passive tuners 2 GHz versus the fundamental incident power as predicted by the class-B pro-
at the MRP and applied to the DUT. , jection with the embedding device model and actual values used in the measure-
. The fundamental loads provided from low to ment. The predicted phase ( ) are labeled as “constructive” and the opposite
high power were , , , , phase ( ) as “destructive.” The amplitude of the fundamental is also shown for
, and at 2 GHz. reference.

for each fundamental incident power levels, the required am-

account for the maximum magnitude reflection available from
plitudes, and phases of the second harmonic synthesized by the
the test bed was used:
embedding device model when targeting an intrinsic class-B op-
eration. The actual amplitude and constructive phase used in the
experiment for the expected PAE enhancement are shown using
(10) triangles (red in online version) in Fig. 17. Also shown for com-
parison are the amplitude and phase of the second harmonic
Using the sliding shorts, the phases of the second (nabla symbols, blue in online version) versus incident power
and third harmonic load reflection coefficients were set to used in the experiment for the expected PAE degradation.
the values predicted by the ETN while letting the amplitudes
C. Measured Results and Discussion
be the maximum attainable value at the MRP given
the loss in the test bed. The resulting actual loads used are The measured PAE results are plotted for comparison on
shown in Fig. 16. It should be noted that the same reduced top of the simulated results in Fig. 10. The incident power
amplitude for the harmonic passive harmonic loads have been was varied with the load as intended in the in-
applied as well to the simulations for a more meaningful ternal design. The measured PAE clearly exhibits the targeted
comparison with measurements. quasi-constant efficiency from 26- to 29-dBm incident power
For the second harmonic injection, the synthesized input fun- and gradually degraded below 26 dBm, as in the original simu-
damental and second harmonic excitations obtained from the lations. As previously mentioned, the same actual load/source
embedding device model are shown in Fig. 17 using symbols. terminations were used in simulation as in the experiment. As
Fig. 17(a) gives the intended values for the load modulation am- in the simulation, the effect of the second harmonic injection
plitude of the fundamental and second harmonic injected versus on the PAE is evident for the three cases. When the injected
incident fundamental power, and Fig. 17(b) gives the predicted second harmonic is canceling the nonlinear parasitic network
second harmonic phases versus incident fundamental power for phase shift, a PAE improvement varying from 2% at high power
a second harmonic injection yielding an improved PAE (bottom to 5% at low power is observed. On the other hand, when the
“constructive”) and for a second harmonic injection with the op- injected phase adds to the nonlinear parasitic network phase
posite phase (top ,“destructive”) yielding a degraded PAE. shift, a PAE degradation is observed, which varies from 4% at
For the second harmonic input injection experiment, an active high power to 6% at low power. Thus, Fig. 10 indicates that up
source–pull (ASP) was used for the source side. As shown in to 12% in efficiency loss is possible relative to the maximum
Fig. 15, the second harmonic RF source was integrated with the efficiency case if a destructive second harmonic is accidentally
fundamental input source using a diplexer. The two RF sources injected by the PA driver.
shared a 10-MHz reference signal for phase locking. The tar- Among the three injection cases, the PAE reduction from high
geted phase differences, , at the MRP were to low power is the smallest when the second harmonic is in-
obtained by tuning the phase of the second source. This phase jected with a “constructive” phase; yielding less than 4% ef-
tuning combined with amplitude tuning enable to implement ficiency variation with incident power. On the contrary, the PA
1998 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

features as much as 9% PAE variation with incident power when

the second harmonic is injected with a destructive phase. There-
fore, the measured and simulated results show that the intrinsic
constant efficiency design can be better realized by applying the
external loads and excitation conditions predicted by the pro-
posed intrinsic to extrinsic mode projection method (nonlinear
embedding PA design) using the embedding device model. Fur-
thermore, the harmonic cancellation at the input not only im-
proves the efficiency, but also is effective for maintaining a con-
stant efficiency over a wider range on incident power.
In Section IV-C, it was verified in Fig. 11 using simulation,
that the optimal phase and its opposite phase (180 shift) pre-
dicted by the embedding device model, did indeed correspond
to the maximum and minimum PAE observed, respectively,
when performing a continuous second harmonic phase sweep. Fig. 18. Loads were deembedded from the measured data. The fundamental
loads are compared to the intrinsic designed loads selected for load
In order to verify that these simulation results also hold experi- modulation at 2 GHz.
mentally, the fundamental amplitude was selected to be one (the
fourth one) of the six load-modulation power levels studied.
Thus, the fundamental amplitude with dBm
ment whereas the exact harmonic terminations predicted by the
was used together with the second harmonic amplitude set to
embedding device model were applied in simulation at both the
dBc as predicted by the embedding
source (input) and drain (output) sides.
device model. An automatic phase sweeping measurement
The measured loads were de-embedded using the extracted
using a frequency offset for the second harmonic [38], [39],
Angelov model parameters in Fig. 18. The fundamental loads
also known as real-time active source–pull (RTASP), was
agree well with the intended intrinsic loads for the load modula-
used for this independent measurement. Fig. 11 compares
the measured PAE (circles, red in online version) versus the tion design. The second and third harmonic loads are all located
relative swept second harmonic phases to in proximity to the short position given the limited magnitude
the simulated ones using the Angelov (solid line, blue in online achievable by the passive load–pull test bed used.
version) and CREE (dashed line, magenta in online version) The Angelov embedding device model synthesizes the exact
models. As can be seen, this RTASP experiment reports a loads required for defining the desired intrinsic mode of opera-
maximum PAE at around a 70 range and a minimum PA at tion of the Angelov device model. However, since the Angelov
around 100 . These RTASP results approximately agree with model does not perfectly represent the device, the desired in-
the experimental and simulation results in Fig. 11 obtained, trinsic load lines targeted might not be well realized within the
respectively, using: 1) continuous wave (CW) active load–pull measured device. Furthermore, the external sources and termi-
measurements or 2) simulation predictions using the embed- nations, which are required to drive the device, are not also per-
ding device model. For comparison, the CW ASP results of fectly implemented either. To evaluate the accuracy of the non-
Fig. 10 are also shown using a square (red in online version) linear embedding PA design methodology, a figure-of-merit is
in Fig. 11, which gives a closer agreement to the simulation. needed and is implemented as described in Section V-D.
The discrepancy between the CW ASP measurements and the
modulated RTASP measurements is mostly due to errors in D. Figure-of-Merit for Nonlinear Embedding PA Design
power calibration and time synchronization between the RF
To develop a figure-of-merit at the intrinsic load line level, it
and baseband signals in RTASP.
is first necessary to deembed the measured data [10]–[12]. To
The measured output power in Fig. 10 (bottom line) also
perform the required nonlinear deembedding of the measured
agrees very well with the simulated results of the CREE
data, the DTN shown in Fig. 1(c) will be used. This DTN per-
model for all three cases. Only the fundamental and
constructive cases are shown. The extracted model (dashed forms the reverse operation of the ETN to calculate the current
lines) predicted a slightly lower output power than the CREE voltages and currents at the CRPs given the voltages and cur-
model and the measured data. The accuracy of the prediction rents measured at the MRPs. Note that the device temperature
of the harmonic loads and second harmonic injection could be is also calculated by the DTN as it is used by the charges in the
improved by using a better extraction for the Angelov model. nonlinear parasitic networks. The ETN must then make use of
It is to be noted that the Angelov model plays a key role in the device thermal network model to calculate the device tem-
this work since the required load harmonic termination and perature from the power dissipated by the device.
second harmonic injection at the input were synthesized using The de-embedded intrinsic gate current should be zero
the Angelov embedding device model reported in this paper. after de-embedding, considering the infinite input impedance
Note that the small decrease, about 3% of the maximum mea- of the intrinsic current source at the gate terminal. Therefore,
sured efficiency in Fig. 10 relative to the maximum simulated the residual intrinsic gate currents after de-embedding
efficiency achievable shown in Fig. 7, is due to the use of lossy can be used as an indicator of the modeling and deembedding
harmonic terminations on the drain side (output) in the measure- accuracy.
JANG et al.: MODEL-BASED NONLINEAR EMBEDDING FOR PA DESIGN 1999

TABLE II
RMS VALUES FOR THE CURRENT, VOLTAGE, AND GEOMETRICAL DEVIATIONS
OF THE SIMULATED INTRINSIC LOAD LINES FROM THE MEASURED
AND DEEMBEDDED INTRINSIC LOAD LINES

In order to quantify the intrinsic load line deviations between

Fig. 19. Intrinsic load lines deembedded from the measured output voltages the various techniques, a normalized root mean square (rms)
and currents at 2 GHz are compared to the simulated intrinsic load lines using
the extracted Angelov (blue line in online version) and CREE (magenta line in will be used as a figure-of-merit for each incident power level,
online version) models.

(11)
Once the nonlinear DTN is available, it can be used to
estimate the actual intrinsic load lines implemented for the load where can either be the drain current or drain voltage, and
modulation operation by the nonlinear embedding PA design represent the measured and simulated data, respectively, and
technique. Fig. 19 compares the intrinsic load lines de-em- is the number of samples per one cycle. The time-domain
bedded ( , red in online version) from the measured voltages voltage and current waveforms were normalized in magni-
and currents to the ones obtained using circuit simulations tude by their time-domain peak values . The various mea-
with the Angelov (solid line, blue in online version) and CREE surements were also synchronized using time alignment such
(dashed line, magenta in online version) models. Two intrinsic that the phase of the fundamental voltage excitation at port 1 be
load lines among the previous six loads considered are singled set to zero in all techniques
out: one for the highest power (top) and the other one for the
lowest power (bottom).
The intrinsic load lines are directly accessible in the extracted (12)
Angelov model implemented in the circuit simulator. For the
CREE model, the device manufacturer (CREE Inc.) provided
where is the time-domain peak value, is the phase
a new six-port model with ports giving access to the internal
of the fundamental voltage, and is the number of harmonics
voltages and currents at the current source planes [40]. In the
used. The geometric mean ( ) of the voltage and current rms
harmonic-balance simulations, the Angelov and CREE models
values was also calculated to provide a single comprehensive
were both terminated at the output by the practical measured figure-of-merit for the deviation between the measured and sim-
loads shown in Fig. 16. The measured fundamental ulated load lines
excitation was applied at the input while the higher
input harmonics were terminated by the test-bed reflection
coefficients as in the no-harmonic injection case in (13)
Fig. 10. The simulations and the de-embedding of the measured
data were performed using four harmonics to match the number The calculated results are summarized in Table II. The
of harmonics measured. smaller numbers obtained for the geometric mean of the CREE
model compared to that of the extracted Angelov model are
The intrinsic de-embedded load lines from the measured data
indicative of the better fit provided by this model in agreement
reveal that the intended load modulation for the various input
with Fig. 19. Further improvement in modeling accuracy will
excitation power levels are indeed achieved and agree reason-
help reduce these rms errors. Parts of the limitation of the
ably well with the simulated load lines (Angelov and CREE) present model is that the Angelov model used in this paper does
within the modeling accuracy range. The difference between the not account for the nonlinear influence of the trapping effects
Angelov (solid line, blue in online version) and CREE (dashed [41]. In [7], this was fully addressed for the case where the
line, magenta in online version) models is a direct measure of memory effects are located in the intrinsic FET by using the
the Angelov model extraction accuracy since that model was measured low-frequency RF load line. Alternately the effective
extracted from the CREE model. The measured voltages and intrinsic IV characteristics including memory effects used by
currents that were de-embedded using the Angelov based DTN the device can be extracted from nonlinear RF measurements
are also affected by the Angelov model extraction accuracy. [9]–[14], [42].
2000 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

VI. CONCLUSION However, to be successful with real devices, the nonlinear

embedding PA design methodology requires that a sufficiently
In this paper, the nonlinear embedding PA design technique accurate device model be available. Since no nonlinear device
in [7], which starts from the intrinsic reference plane, was model can be expected to perfectly represent a real device,
applied to the non-quasi-static Angelov model. A nonlinear given both the process fluctuations and the model’s limitation,
ETN was developed for the Angelov model for this purpose. a figure-of-merit was introduced for quantifying the efficacy
Using this ETN, an embedding device model was realized, of the nonlinear embedding PA design methodology. This
which permits to project the desired load lines at the CRP figure-of-merit relies on the nonlinear RF measurements for
to the ERPs (ERP, PRP, MRP). This projection synthesizes estimating the impact of the model accuracy on the intrinsic
the external terminations, which exactly maintain the desired load lines actually synthesized. In this work, an accuracy
intrinsic PA mode of operation. However, it was found that the figure-of-merit, varying from 4.6% to 2.7% from low to high
active injection of harmonics is usually required to offset the incident powers, was obtained for the intrinsic loadlines despite
harmonic power losses due to the nonlinear parasitics. Various using an embedding device model based on the rather coarse
impedance termination re-normalization techniques were then Angelov model extraction. This indicates that a high-fidelity
tested and demonstrated in simulations and measurements to model is not critically required to obtain useful results with
yield acceptable results. Alternatively, the embedding device the embedding nonlinear PA design technique. Provided the
model provides the designer with the precise higher harmonic required confidence level is attained, waveform and load-line
(amplitude and phase) required to be injected at the input and engineering at the intrinsic level using the nonlinear embedding
output to achieve perfect intrinsic PA operation. This technique PA design approach then becomes more readily achievable
was verified experimentally with the injection of a second har- when using an nonlinear embedding device model implemented
monic at the input for a class-B PA relying on load modulation. in a circuit simulator. As an example, the embedding device
The measured load modulation characteristics and harmonic model reported in this paper was applied to the design of a Do-
input injection results validate the use of the proposed nonlinear herty PA for the synthesis of the multi-harmonic terminations
embedding process for the Angelov model including harmonics. for the auxiliary and main amplifiers [43].
The harmonic cancellation at the input not only improves the It should be noted that, once developed, the internal working
efficiency, but also is effective for maintaining a more constant and circuit parameters of the embedding device model do not
efficiency. The constructive phase also exhibited a 5% smaller need to be disclosed and the intellectual property associated
efficiency variation upon the incident power compared to the with the device technology can thus remain protected. In view
destructive case. The analysis shows also that the inadvertent of the significant timesaving advantages of the nonlinear em-
injection of a destructive second harmonic from the PA driver bedding PA design technique, it is suggested that it would be a
can even lead to a 10% lower efficiency relatively to the optimal great benefit to the PA designer community if device manufac-
case. turers were to make embedding device model available.
Unlike load–pull at the external reference planes, which is
a mode-blind optimization, the large-signal model-based har-
monic source or load synthesis with the proposed embedding ACKNOWLEDGMENT
device model and associated ETN, provides the PA designers The authors would like to thank CREE Inc., Durham, NC,
with full control as to the operation of the device at the intrinsic USA, for providing the GaN HEMT transistors and the six-port
reference plane. The resulting increased controls and insights model used in this study, and E. Schmidt, Agilent Technolo-
into the PA operation should provide for faster design and wider gies, Santa Clara, CA, USA, for support provided for ICCAP.
design choices leading to a more efficient and robust design. In- Thanks also go to Y. Ko, The Ohio State University, Columbus,
deed the benefit of starting with a harmonic load–pull simulation OH, USA, and A. Zárate-de Landa, CICESE, Ensenada Baja
at the intrinsic reference plane is to directly select the desired California, México, for supporting measurements and thru-re-
internal mode of operation of the transistor for the external ap- flect line (TRL) calibration kits. The authors are also grateful to
plication at hand. the anonymous reviewers for in depth feedback and invaluable
The nonlinear embedding PA design technique also has the suggestions for improving this paper’s manuscript.
potential to greatly simplify and accelerate the design process
for multi-harmonic PA design. Indeed for the design of a PA for
a given power excitation with a specific class of operation (e.g., REFERENCES
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[2] S. C. Cripps, P. J. Tasker, A. L. Clarke, J. Lees, and J. Benedikt, “On
replaces the source–pulls and load–pulls ( the continuity of high efficiency modes in linear RF power amplifiers,”
dimension parameter sweep) performed at the external refer- IEEE Microw. Wireless Compon. Lett., vol. 19, no. 10, pp. 665–667,
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[22] A. Raffo, V. Vadalà, and G. Vannini, Microwave De-embedding: From Haedong Jang (S’09) was born in Wonju, Korea,
Theory to Application. Oxford, U.K.: Academic, 2014, ch. 9. in 1971. He received the B.S. degree in electrical
[23] I. Angelov, L. Bengtsson, and M. Garcia, “Extensions of the Chalmers engineering from Kangwon National University,
nonlinear HEMT and MESFET model,” IEEE Trans. Microw. Theory Chuncheon, Korea, in 1994, the M.S. and Ph.D.
Techn., vol. 44, no. 10, pp. 1664–1674, Dec. 1996. (ABD) degrees in electrical and computer engi-
[24] I. Angelov, “Empirical nonlinear IV and capacitance LS models and neering from Inha University, Incheon, Korea,
model implementation,” in MOS-AK GSA Workshop, Dec. 2009, pp. in 2005 and 2008, respectively, and is currently
1–51. working toward the Ph.D. degree in electrical and
[25] C. K. Yang, P. Roblin, D. Groote, S. Ringel, S. Rajan, J.-P. Teyssier, computer engineering at The Ohio State University,
C. Poblenz, Y. Pei, J. Speck, and U. K. Mishra, “Pulsed-IV pulsed-RF Columbus, OH, USA.
cold-FET parasitic extraction of biased AlGaN/GaN HEMTs using In 1996, he joined a nonprofit governmental organ-
large signal network analyzer,” IEEE Trans. Microw. Theory Techn., ization, Small Business Corporation, Shiheung, Korea. He was a Product De-
vol. 58, no. 5, pp. 1077–1088, May 2010. velopment Assistant Consultant until 2007, and had been involved in over 100
2002 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 9, SEPTEMBER 2014

commercialized consumer product developments. His main interests include both undergraduate and graduate students. He is the lead author of a textbook on
PAs design, nonlinear devices characterization, modeling, and PAs lineariza- high-speed heterostructure devices published by Cambridge University Press.
tion. His current research topic focuses on model-based high average efficiency His current research interests include the measurement, modeling, design, and
PAs design. linearization of nonlinear RF devices and circuits such as oscillators, mixers,
Mr. Jang was a corecipient of First Place in the 2012 IEEE Microwave Theory and PAs.
and Techniques Society (IEEE MTT-S) International Microwave Symposium
(IMS) student development of a Large-Signal Network-Analyzer Round-Robin
Design Competition.
Zhijian Xie (M’01) was born in Jilin, China, in
1969. He received the B.S and M.S. degrees in
solid-state physics from the University of Science
Patrick Roblin (M’85) was born in Paris, France, and Technology of China, Hefei, China, in 1992 and
in September 1958. He received the Maitrise de 1995, respectively, and the Ph.D. degree in electrical
Physics degree from the Louis Pasteur University, engineering from Princeton University, Princeton,
Strasbourg, France, in 1980, and the M.S. and D.Sc. NJ, USA, in 2001.
degrees in electrical engineering from Washington He is currently an Assistant Professor of electrical
University, St. Louis, MO, USA, in 1982 and 1984, and computer engineering with the Department of
respectively. North Carolina Agricultural and Technical State
In 1984, he joined the Department of Electrical (North Carolina A&T State University) University,
Engineering, The Ohio State University (OSU), Greensboro, NC, USA. Prior to joining North Carolina A&T State University,
Columbus, OH, USA, as an Assistant Professor, and he worked eight years in the semiconductor industry with DSM Solutions Inc.
is currently a Professor. He is the founder of the (now SuVolta Inc.), RF Micro Devices Inc., and Agere systems Inc., in the field
Non-Linear RF Research Laboratory, OSU. With OSU, he has developed two of semiconductor and RF devices.
educational RF/microwave laboratories and associated curriculum for training