6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C C

B B

A A
TITLE & REV:

SC6531_PLATFORM_REFERENCE_SCH_V1.0.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

2012/08/31 Hardware RD.

DATED:
EQA: COMPANY:
2012/08/31
Spreadtrum communications, Inc.
APPROVED: DATED:

2012/08/31 CONFIDENTIAL AND PROPRIETARY SHEET: 1 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

DBB
D U0100-A D
ASIC-SC6531-233-0.5

V13 A9 FLASH_EN
[6] QPI_CSN0 ESMCSN0 RF_VBS0/GPIO_43
U14 D9
QPI_CSN1 ESMCSN1 RF_VBS1/GPIO_44 RF_VBS1 [5]
E10

RF_CTRL
SPI FLASH
RF_VBS2/GPIO_45 RF_VBS2 [5]
W15

(VMEMS)

(VDDIO)
[6] QPI_IO0 ESMD0 C8
RF_VBS3/GPIO_46 GPIO_46
T15
[6] QPI_IO1 ESMD1 D8
U15 RF_RSV/GPIO_47 FM_LNA_EN [17]
[6] QPI_IO2 ESMD2 E8
V16 RF_PAEN/GPIO_48 TX_EN [5]
[6] QPI_IO3 ESMD3

(VDDIO)
V15 T13

JTAG
[6] QPI_CLK ESMCLK MTMS/CCIRVS(SSN)/GPIO_19/BT_MTMS TP_SDA
U13
MTDI/CCIRD0(SDI)/GPIO_20/BT_MTDI TP_SCL
E12 V12
[9,20] CCIR_D0 CCIRD[0](SDI)/GPIO_96 MTCK/CLK32KO/CCIRCK(SCK)/GPIO_21/BT_MTCK TP_RST
C11 W12
[9,20] CCIR_D1 CCIRD[1]/GPIO_64 MTDO/SDA2_1/GPIO_22/BT_MTDO/BTU02TXD FM_SDA2 [17]
B10 T14
[9,20] CCIR_D2 CCIRD[2]/GPIO_52 MTRSTN/SCL2_1/GPIO_23/BT_MTRSTN/BTU02RXD FM_SCL2 [17]
B11
[9,20] CCIR_D3 CCIRD[3]/GPIO_51
C12 N18
[9,20] CCIR_D4 CCIRD[4]/GPIO_36 U0RXD/GPIO_95/BT_U0_0_RXD/BT_U1_0_RXD BB_U0RXD
A11 M18
[9,20] CCIR_D5 CCIRD[5]/GPIO_35 U0TXD/GPIO_94/BT_U0_0_TXD/BT_U1_0_TXD BB_U0TXD
B12 L20

UART
(VDDIO)
[9,20] CCIR_D6 CCIRD[6]/GPIO_34 U0CTS/U1_0_RXD/GPIO_4 U1RXD [12]
A12 N19
[9,20] CCIR_D7 CCIRD[7]/GPIO_50 U0RTS/U1_0_TXD/GPIO_5 U1TXD [12]

B9

[9] CCRI_PCLK_0
[9] CCRI_MCLK
C10
CCIRMCK/CLK_32K_O/GPIO_66

CCIRCK(SCK)/GPIO_73
IISDI/GPIO_6/WIFI_ACTIVE

IISDO/GPIO_7/BT_ACTIVE
L21

L19
LED_EN1

LED_EN2
BT STATUS
D12

IIS
CCIR

(VDDIO)
[9,20] CCIR_HS

(VCAM)
CCIRHS/GPIO_65 K19
E11 IISCLK/GPIO_8/BT_STATUS
[9,20] CCIR_VS CCIRVS(SSN)/GPIO_74 K21 3728_PD
C9 IISLRCK/GPIO_9
[9] CCIR_BACK_PWD CAM_PD/GPIO_37 K20 FM_32K
D10 IISMCK/CLK_32K_O/CLK_MCU_DIV/GPIO_75
[17]
[9] CCIR_RSTN CAM_RSTN/GPIO_38

C [9,20] SDA
C13

B14
SDA0_0/GPIO_33 TP_XL
D6

C7
TP_XL [8]
C
[9,20] SCL SCL0_0/GPIO_32 TP_XR TP_XR [8]

TP
D7
TP_YU TP_YU [8]
C16 B8
[8] LCD_FMARK FMARK/GPIO_79 TP_YD TP_YD [8]

B15
[8] LCM_WEN LCMWR/SPI0_2_DO/SPI1_2_DO/GPIO_40 E18
D14 SIMCLK0/GPIO_81 SIM1_CLK [14]

SIM0
(VSIM0)
[8] LCM_RDN LCMRD/SPI0_2_DI/SPI1_2_DI/GPIO_39 F18
SIMDA0/GPIO_82 SIM1_IO [14]

DIGITAL
E13
[8] LCM_CSN LCMCS0/SPI0_2_CS0/SPI1_2_CS0/GPIO_42 D18
C14 SIMRST0/GPIO_80 SIM1_RST [14]
LCMCS1/CLK_32K_O/SPI1_2_CS1/GPIO_49
C15
[8] LCM_CD LCMCD/SPI0_2_CLK/SPI1_2_CLK/GPIO_41 F20
SIMCLK1/GPIO_85 SIM2_CLK [14]
D13

SIM1
(VDDIO)

(VSIM1)
[8] LCMRSTN LCMRSTN/GPIO_62 E19
LCM

LCM_D[00:07] SIMDA1/GPIO_83 SIM2_IO [14]

LCM_D00 C21 E20
LCMD[0]/SPI0_1_DI/SPI1_1_DI/GPIO_53 SIMRST1/GPIO_84 SIM2_RST [14]
LCM_D01 C20
LCMD[1]/SPI0_1_DO/SPI1_1_DO/GPIO_54
LCM_D02 C19 D19
LCMD[2]/SPI0_1_CLK/SPI1_1_CLK/GPIO_55 SIMCLK2/SPI1_0_CLK/GPIO_17/SCL1_1 SIM3_CLK
SIM2
(VSIM2)

LCM_D03 C18 F19

LCMD[3]/SPI0_1_CS0/SPI1_1_CS0/GPIO_56 SIMDA2/SPI1_0_DO/U1_2_TXD/GPIO_15/SDA1_1 SIM3_IO
LCM_D04 B20 F21
LCMD[4]/SPI0_1_CS1/SPI1_1_CS1/GPIO_57 SIMRST2/SPI1_0_DI/U1_2_RXD/GPIO_16 SIM3_RST
LCM_D05 B19
LCMD[5]/SPI0_1_CD/SPI1_1_CD/GPIO_58
LCM_D06 D17 J20
LCMD[6]/SPI0_2_CD/SPI1_2_CD/GPIO_59 SPI1_0_CS0/GPIO_18/BT_STATUS/SPI0_3_CS1 ATV_RSTN [20]
LCM_D07 B18
LCMD[7]/SDA0_1/GPIO_60 B16
A17 SPI0_3_CS0/GPIO_14 BB_SPI_CS
SPI
(VDDIO)

LCMD[8]/FMARK/SCL0_1/GPIO_61 C17
SPI0_3_CLK/GPIO_69 BB_SPI_CLK
A16
D15 SPI0_3_DI/LCMD17/GPIO_78 BB_SPI_DI
[10] ASEN_INT1 GPIO_70/LCMD9 A15
B17 SPI0_3_DO/LCMD16/GPIO_77 BB_SPI_DO
[10] ASEN_INT2 GPIO_71/LCMD10
[10] G_SENSER_PWR D16
GPIO_72/LCMD11 U20
SD_CMD/U1_1_TXD/SPI0_0_DO/GPIO_10 SD_CMD [14,15]
GPIO
(VDDIO)

H19
AUDIO_PA_EN GPIO_0/LCMD9 R20
G21 SD_D0/U1_1_RXD/SPI0_0_DI/GPIO_11 SD_D0 [14,15]
WIFI_POWER_ON GPIO_1/LCMD10 R19
SD_D1/GPIO_67 SD_D1 [14,15]
H18
SDIO
(VDDSD)

[9] CCIR_FRONT_PWD GPIO_2/LCMD11 T20

SD_D2/GPIO_68 SD_D2 [14,15]
B [20] ATV_PWRON G20

G19
GPIO_3/SPI1_0_CD/FMARK
SD_D3/SPI0_0_CS0/GPIO_13
P21
SD_D3 [14,15] B
WIFI_CLK_REQUEST GPIO_63/WIFI_XTL_EN R21
SD_CLK/SPI0_0_CLK/GPIO_12 SD_CLK0 [14,15]

V20 U21
[13] KEYIN0 KEYIN[0]/GPIO_91 (VDDIO) SD_CLK1/SPI0_0_CD/GPIO_97/EXTINT1 TP_EINT
T19
[13] KEYIN1 KEYIN[1]/GPIO_92
U19 J18
[13] KEYIN2 KEYIN[2]/GPIO_93 EXTINT0/PWM HEADSET_DETECT
V18 VDDRTC
[13] KEYIN3 KEYIN[3]/GPIO_76 B3 C100 100PF
T18 RSTN
[13] KEYIN4 KEYIN[4]/GPIO_30/SDA1_0 U3
V19 TESTRSTN
KEYIN[5]/GPIO_31/SCL1_0 V3
SYSTEM

1K
W19 PBINT PBINT [13]
KEYPAD
(VDDIO)

KEYIN[6]/SDA2_0/GPIO_28/LCMD12 E9
R18 PRODT
WIFI_PWD KEYIN[7]/SCL2_0/GPIO_29/LCMD13
K8

R101
T16 LDOMEMSB LDOMEMSB [6]
[13] KEYOUT0 KEYOUT[0]/GPIO_86 T3
U16 BOND_RST_SEL
[13] KEYOUT1 KEYOUT[1]/GPIO_87
T17
[13] KEYOUT2 KEYOUT[2]/GPIO_88
W17
[13] KEYOUT3 KEYOUT[3]/GPIO_89/WIFI_ACTIVE
V17 M19
(VDDIO)

[13] KEYOUT4 KEYOUT[4]/GPIO_90/BT_ACTIVE CLK_AUX/GPIO_24 ATV_EN_LDO [20]

CLK
PWM

KEYOUT5 U17
KEYOUT[5]/GPIO_26/LCMD14 J19
U18 PWM/CLK_AUX/CCIRCK/GPIO_25 ATV_CCIR_PCLK [20]
KEYOUT6 KEYOUT[6]/GPIO_27/LCMD15

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 1 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

ABB
[12] TORCH_EN

[9] FLASH_LIGHT
U2
1
2 1 REF_INP [3]

XTAL-CRYSTAL-SQ3D02600B2IBA
3 2
3

4
32K_OUT

X202
32K_IN
SAW-LFB212G45CL1D172

WHTLED_1
[8] VDDRTC
R209 6.2K

2
VR201
R4 NF
C203 0.01uF REF_INN [3]
1 2
C200
10uF U201
IC-BT-SAW-BP1608

H5

L3

L4

J4

J5

H4

G4

V9

W9

K2

H1
2 4
IN/OUT IN/OUT

WHTLED_RSET

WHTLED_IB0

WHTLED_IB1

WHTLED_IB2

WHTLED_IB3

WHTLED_IB4

WHTLED_IB5

RTC32KI

RTC32KO

VDDRTC

VBATBK

GND

GND
MICBIAS

3
C206 1uF M10
MICBIAS L10 C227 1uF
EXT_CAP

C [7] MICP
T9

R9
MICP WHTLED RTC
K1 C210 1.0nh
C
[7] MICN MICN BT_RF BT_RF [18]
AUXMICBIAS

NF

NF
L1

BT
VSSBTRF

Close to BB
P13

C208

C209
AUXMICBIAS

V11
AUXMICP AUXMICP L5 C220 39NH C230 100PF R204 0

FM
FM_RF FM_ANT [12,17,20]

10pF

10PF
U11
AUXMICN AUXMICN

FM_ANT1 [17]

C222

C221
R210 1K R12
[7,12] HEADMIC_IN HEADMIC_IN M1
US/EGSM_RX_P EGSM_RX_P [5]
U10 N1 EGSM_RX_N [5]
[7] HEADMICP HEADMICP US/EGSM_RX_N
V10
[7] HEADMICN HEADMICN

R1 DCS_RX_P [5]
DCS/PCS_RX_P
T11 P1 DCS_RX_N [5]
[17,20] AIL AIL1 DCS/PCS_RX_N

AUDIO
T12

RF
[17,20] AIR AIR1 U0100-B
ASIC-SC6531-233-0.5 T1 USEGSM_TX [5]
US/EGSM_TX

T5
[7] HEADPHL HEAD_P_L U1
DCS/PCS_TX DCSPCS_TX [5]

[7] HEADPHR
T6
HEAD_P_R ANALOG
R3
PAGSM RF_RAMP [5]
P8
[7] EARP EARP
N8
[7] EARN EARN F2
REF_IN+ REF_INP [3]
F1
L8 REF_IN- REF_INN [3]
AUXSPP AORP
AUXSPN L7
AORN
G2
REF1_OUT CLK_26M_WIFI
[7] OUTPPA W3
OUTPPA G1
REF2_OUT ATV_26M [20]
B [7] OUTNPA
W4
OUTNPA
USB ADCI B
C207 1uF W11
PA_VCOM

C205 0.1uF
PADP_USB

PADM_USB
VDDUSB

ADCI0

ADCI1

ADCI2

ADCI3
P20

N20

P19

C2

C3

B2

A3

C202 1uF
1.5K

33

33

BAT_TEMP_ADC
R202
R200

R201

[11]
[12] USB_DP

[12] USB_DM

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 2 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

POWER

D D

VBAT U0100-C
ASIC-SC6531-233-0.5

P4 W7 C301 1uF
VBAT AVDDVB

1uF
P5

VB
VBAT
VMEM_SPI
V8 C300 2.2uF

VBAT
VDDAO

C336
1 2

4.7uF
TVS300

V5
VBATPA
W5 L14
VBATPA VMEMS

C318

1uF
VMEM_1V8
VDDCORE_1V1 R300 VDDIO_2V8

C313
V6 L13

DC2DC
VBATBUCK VDD18
C320 2.2uF
1uF C330
L300 2.2uH W6 B7
LX VDD28 VSIM1
C317 1uF
C333 4.7uF

C334 0.01uF
V7 A6 VSIM2
VFB VDDSIM0

1uF
C6
E1 VDDSIM1

POWER OUT

C355
[11] VBAT_SENSE VBATSEN

1uF
CHARGE
C [11] ISENSE
D1
ISENSE
VDDSIM2
B6 C

C312
[11] CHG_DRV C1
VDRV VDDSD
D2
[11,12] VCHG VCHG
B4
VDDSD VCAM_ANA_2V8

1uF
R5
VSS
J16
VSS

C356
C5
N13 VDDCAMA
VSS

1uF
VCAM_CORE_1V8
L12
VSS H3

POWER
VDDCAMD

C316
N10
VSS C303 1uF WIFI_3V3
G16
VSS
V21 A8
VSS VDD33
M11
VSS VRF_2V8
N15
VSS V2
L17 VDDRF C315 2.2uF
VSS
1 2
L15

GND
VSS J3 C342 33PF
J10 VDDRF_BYP
VSS
N12
VSS H2 C344 1uF
K11 VDD_DCXO
VSS
M16 VDDCORE_1V1
VSS
W21
VSS H15 C338 1uF
W20 VDD_D
VSS POWER IN
W1
VSS_RF VDDIO_2V8
W2
VSS_RF
V1 H14
VSS_RF VDDIO
C310 0.1uF
M5
VSS_RF
P2
VSS_RF T8
CURR.

F4 KP_OUT KPLED_CTRL [13]

SINK

VSS_RF
T2 U9
VSS_RF VIBR VIB_CTRL [16]
B B
T4 A1
VSSPA NC
U4 A2
VSSPA NC
A21
NC
NC

U6 A20
VSSDCDC NC
B21
NC
H9 B1
AVSS NC

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 3 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

[3] DCS_RX_N
L404 3.3nH

1.2pf
C402
[3] DCS_RX_P PCS/DCS_RX [5]
L403 3.3nH C424 27pf
27nH

D 1.2pf D

NF
2

NF
2
C419

C418
1

1
L401

C403

[3] EGSM_RX_N
L406 7.5nH

3.9pf
C406

[3] EGSM_RX_P EGSM/GSM_RX [5]

L405 7.5nH C411 27pf
3.9pf
27nH

2
NF

2
NF
L402

C410

C417

C416
1

C C

VBAT

R416

47pF
10uF

0.1uF
0R ANTENNA

C408
ANTENNA
ANT401 ANT402

C409
C407
Matching circuit

22PF
6
5

120nH
GND L408

GND4

L409
GND3

C455
J400 R436 0
C401 27pF 2 1
MHC1
RF-IN ANT
120nH

GND1

GND2
TEST C454 22PF

NF
3

NF
NF
[2] RF_VBS2

NF

L422
L421
C5
[2] RF_VBS1

C400
[2] TX_EN
R401 15K
[3] RF_RAMP
47pF(NF)

47pF(NF)

47pF(NF)
C412

B B
47pF

C413

C414

C415

17

16

15

10

13
9
NF

VRAMP

TXEN

CTL0

CTL1

VBATT

ANT
NF

NF

LOGIC STATE VRAMP TXEN CTL1 CTL0

C3

C426

OFF X 0 0 0
RX1 X 0 1 0
R415 0 C405 47pF 5 RX2 X 0 1 1 19
[3] USEGSM_TX RFIN_LB LB_TX
HB_TX
PwrCtrl
PwrCtrl
1
1
1
1
0
1
RX2 PCS/DCS_RX [5]

U0403
RF-PA-SC2661D HS8292U
SC2661D
R417 0 C404 27pF 2 20
[3] DCSPCS_TX RFIN_HB RX1 EGSM/GSM_RX [5]
NF
NF

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
C452
C4

11

12

14

18

21

22

23

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 4 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C C

SPI Flash VBAT

SPI Flash

2K(NF)
VMEM_SPI
2.2uF

R501
2

[2] LDOMEMSB
C500
1

U500
MEM-NOR-W25Q32DWZPIG

0
[2] QPI_CSN0 1 8
CS VCC
2 7
[2] QPI_IO1 DO(IO1) HOLD(IO3) QPI_IO3 [2]

R500
3 6
[2] QPI_IO2 WP(IO2) CLK QPI_CLK [2]
4 DI(IO0) 5
GND QPI_IO0 [2]
GND
9

LDOMEMSB VMEM
0 1.8V
1 3V
B B
8

1
6

4
VCC

CS#
CLK

VSS
Serial Flash
WP#(DQ2)
DI(DQ0)
DO(DQ1)

NC(DQ3)
U500A

5
2
3
7

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 5 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

MAIN MIC Near to Microphone

MICBIAS

R600 510

1.5K
100PF

R602
C603
D Near to BB D

RECEIVER
C601 0.022uF R604 0 MIC-FPC
[3] MICP
2 REC402

100PF
AUDIO-SPEAKER-XHYQ2021A-02-9130-2
1
1

C600
0.022uF MIC600 2
C602 R605 0
[3]MICN R613 0
[3] EARP

1.5K

100PF
1
2 +

2.2uF
-

C604

R603
R601 510 RCV602

C609
R614 0
[3] EARN

VR600

VR601

VR602

VR603
Near to Receiver

C C

Speaker
C632
100pF

+
-
SP201

33PF
33PF

VR605
VR604
C634
C633
GND GND GND

EAR-MIC VDDIO_2V8
Near to IO

1
1

R620
R619

NF
R606 2K

NF
B B

2
2
1uF
C615

47pF

Internal PA
C614

C610 0.022uF
[3]HEADMICP
2K
C613

Near to BB
100PF

R608

[3,7] OUTPPA OUTPPA[3,7]

100PF
C611 0.022uF
[3]HEADMICN HEADMIC_IN [3,12]

C621
47pF

[3,7] OUTNPA OUTNPA [3,7]

C612

AB类

[3] HEADPHR
C617 22uF(NF) R609 33
HP_R [12]
Close to BB
A A
47pF
C619

TITLE & REV:

C618 22uF(NF) R610 33

[3] HEADPHL HP_L [12]
DOCUMENT NO.:
47pF

HEADPHONE
DESIGNER: DATED: DEPARTMENT:
C620

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 6 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

LCM&TP VDDIO_2V8

J6 TFT1P3605

1 [2,8] LCM_CSN LCM_CSN [2,8]

DB0
2 [2,8] LCM_CD LCM_CD [2,8]
DB1
3 [2,8] LCM_WEN LCM_WEN [2,8]
DB2
4 [2,8] LCM_RDN LCM_RDN [2,8]
DB3
5
GND
6
NC
[2,8] LCM_CSN 7
/CS
[2,8] LCM_CD 8
RS
[2,8] LCM_WEN 9
/WR
[2,8] LCM_RDN 10
/RD
11
IM0
[8] TP_XL' 12
X+
[8] TP_YU' 13
Y+
[8] TP_XR' 14
X-
[8] TP_YD' 15
Y-
[4,5,6,8,9,11,12,13,16,20] VBAT 16
LED_A
C [3,8] WHTLED_1 17
LED-1 C
18
LED-2
19
LED-3
20
LED-4
[2] 21
LCD_FMARK FLM
22
DB4
[2,8] LCM_D00 23
DB8
[2,8] LCM_D01 24
DB9
[2,8] LCM_D02 25 VDDIO_2V8
DB10 LCMRSTN [2,8]
[4,7,8,10,17]
[2,8] LCM_D03 26
DB11
[2,8] LCM_D04 27
DB12
[2,8] LCM_D05 28

C701
DB13

0.1uF
[2,8] LCM_D06 29
DB14

VR704
[2,8] LCM_D07 30
DB15
[2,8] LCMRSTN 31
/RESET
32
VCC
33
IOVCC

VR705
34
GND
35
DB5
J700
36 1
DB6 BL_K WHTLED_1 [3,8]
2
37 BL_A 3 VBAT [4,5,6,8,9,11,12,13,16,20]
DB7 GND 4 [4,7,8,10,17]
VDD(2.8V) 5 VDDIO_2V8
IOVCC(1.8/2.8V) 6
NC 7
CS LCM_CSN [2,8]
8
RSTB 9 LCMRSTN [2,8]
RS LCM_CD [2,8]
10 LCM_WEN [2,8]
WRB 11
RDB LCM_RDN [2,8]
TP_XL' [8] 12
DB7 13 LCM_D07 [2,8]
TP_YU' [8] DB6 14 LCM_D06 [2,8]
DB5 15 LCM_D05 [2,8]
TP_XR' [8] DB4 LCM_D04 [2,8]
16

B B
DB3 17 LCM_D03 [2,8]
TP_YD' [8] DB2 18 LCM_D02 [2,8]
DB1 19 LCM_D01 [2,8]
DB0 LCM_D00 [2,8]
20
GND 21
YD(Y-) TP_YD' [8]
22 TP_YU' [8]
YU(Y+) 23
XL(X-) TP_XL' [8]
24 TP_XR' [8]
XR(X+)
2678-LCD-24PIN
R700 10
[2] TP_XL
R701 10
[2] TP_YU
R702 10
[2] TP_XR
R703 10
[2] TP_YD
VR700

VR701

VR702

VR703

假TP用

A A
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DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 7 OF 19

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Camera
D D

C807
C802

NF
NF
VCAM_CORE_1V8 J5 J3

1 1
[2] CCIR_BACK_PWD AGND AGND
2 2
[2,20] CCIR_HS AVDD AVDD
3 3
[2,20] CCIR_VS DGND DGND
4 4
[2] CCIR_RSTN DOVDD_2V8 DOVDD_2V8
VCAM_ANA_2V8 5 5
C 6
DVDD_1V8

RESET
6
DVDD_1V8

RESET
C
7 7
PWDN_B PWDN_B CCIR_FRONT_PWD [2]
8 8
VSYNC VSYNC
[2] CCRI_PCLK_0 9 9
HREF HREF
10 10
PCLK PCLK
11 11
[2,9] CCRI_MCLK XCLK XCLK
12 12
[2,9,20] SDA Y7 Y7
13 13
[2,9,20] SCL Y6 Y6
14 14
[2,20] CCIR_D7 Y5 Y5
15 15
[2,20] CCIR_D6 Y4 Y4
16 16
[2,20] CCIR_D5 Y3 Y3
17 17
[2,20] CCIR_D4 Y2 Y2
[2,20] CCIR_D3 18 18
Y1 Y1

[2,20] 19 19
CCIR_D2 Y0 Y0
[2,20] 20 20
CCIR_D1 SDA SDA
21 21
[2,20] CCIR_D0 SCL SCL
10 22 22
[3] FLASH_LIGHT LED- LED-
R801 23 23
[4,5,6,8,11,12,13,16,20] VBAT LED+ LED+
24 24
PWDN_F PWDN_F
C801

2677-CAMERA 2677-CAMERA
NF
C800

C804
C803
1uF

NF
NF

VCAM_CORE_1V8
VCAM_ANA_2V8

B B

0.1uF
0.1uF
C806

C808
VCAM_ANA_2V8

R803 NF
[2,9,20] SCL

R804 NF
[2,9,20] SDA
[2,9] CCRI_MCLK CCRI_MCLK
[2,9]
2K

pay attention to the CCIR_PCLK layout and 0ohm

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

Hardware RD.
DATED:
EQA: COMPANY:

Spreadtrum communications, Inc.

APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 7 OF 19

 6 5 4 3 2 1
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LTR ECO NO: APPROVED: DATE:

D D

Ambient Light Sensor

G Sensor
with Proximity Sensor
[4,7,8,17] VDDIO_2V8

G_SENSER_PWR [2]

C C
ASEN_INT2
[2]

ASEN_INT1
[2]

2D SENSOR

B B

A A
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APPROVED: DATED:

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LTR ECO NO: APPROVED: DATE:

D D

CHARGE
R1000 33
[4] VBAT_SENSE

[4] ISENSE R1001 33

VCHG VBAT

Q201

1 8 R1002 0.36
A C

C C
A K
0.1uF

2 7
A C
S
3 6
S D
C1000

4 5
[4] CHG_DRV G D
D

TRANSISTOR-PWR_MOS-TPCF8B01

All trace connectted to the MOSFET should be as wide as possible

BAT CON.
B B
VMEM_1V8

VBAT
100K

120K
2

BAT_CON
J1001
1
2
3
R3

47pF
1

R6 510
VR1000

BAT_TEMP_ADC
10uF

C1002
C1001

[3] 1 2
1
470pF
220K

2
2

C7
1
R5
1

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LTR ECO NO: APPROVED: DATE:

D D

IO Boot select:
U1TXD = low --> boot from USB
U1TXD= high --> boot from NOR or UART
NOTE: keyin0 & keyout0 pressed when power up will also lead to USB boot
VCHG

J1101

1
VCHG 6
GND
2 7
[3,12] USB_DM DM GND
8
3 GND
[3,12] USB_DP DP 9
GND
4 10
[12] TX NC GND

31420000032(NF)
11
5 GND
GND

UAF95-05254-1500

NF
C1102

TVS1100

VR1104
VR1105

VR1106
C C

RX

TX

[12]
R1106
U1TXD
[2]
1K
TP_TXD
R1107
U1RXD [2]
1K
TP_RXD

VBAT

TP_GND

Audio Jack TP_VBAT

USB_DM [3,12]
TP_TXD1

USB_DP [3,12]

B B
TP_RXD1
CON-HEADSET-D3.5-7616

+ 1 MK3
R1102 0 3 HL 4 - 2
[7] HP_L HR
J1 VBAT MK1
R1103 0
[7] HP_R LED-204-15/F2C3-4RTA(UN)/RT1 [4,5,6,8,9,11,12,13,16,20]
MIC 2
R1104 0
J1100

[3,7] HEADMIC_IN C908 MK2

NF
1
GND
[3,17,20] FM_ANT
1000ohm
NF

33
TORCH_EN
[3]
C1101

R805
R1108
VR1100

VR1102

VR1103

C811
22pF

A A
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APPROVED: DATED:

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LTR ECO NO: APPROVED: DATE:

Press this button when power up will make the phone boot from USB

[2] KEYOUT4
[2] KEYOUT0 [2] KEYOUT1
[2] KEYOUT2 [2] KEYOUT3

D D
KEYPAD
Press this button when power up
C1011
33pF
C1012
33pF
C1003
33pF C1004
33pF
C1005
33pF

will make the phone boot from USB

[2] KEYIN0

1
MUSIC
C1006

S1022
2

2
33pF

down
S1013

S1008

S1019
3

1
S1018
*

2
1

1
[2] KEYIN1 1

C1007
2

2
33pF

2
CALL1
S1009

S1015
0

S1006
5

S1016

S1023
4
1

1
[2] KEYIN2
1

C1008
2

2
S1001

33pF
#

C C
S1002

S1003

S1012
9

7
2

1
[2] KEYIN3

C1009
33pF
2
2

2
2

CALL2
left
RS

up

S1005
S1020

S1011
S1017

1
1

1
1

[2] KEYIN4

C1010
33pF
2

2
2
right

VBAT
menu
LS

S1010

S1007
S1014

S1000
2
1

1
1

D1018

D1017

D1016

D1015

D1014

D1013

D1

D2

D3
1

1
1

2
2

2
B B
KPLED_CTRL
[4]

27pF(NF)
2
C1013
1
PBINT:Low active
TP_ONKEY

S1
PWRKEY

2 1

PWRKEY [2] PBINT

R1200 1K
VR1200

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LTR ECO NO: APPROVED: DATE:

D D

SIM

VSIM2'

VSIM1'

SIM1_IO'
SIM2_IO'

SIM1_CLK'
SIM2_CLK'
SIM1_RST'
SIM2_RST'

C C

27pF

27pF
1uF
NF
NF

NF

1uF
27PF

NF

NF

NF
C1900

C1901

C1902

C1903

C1904

C1909
C1908
27PF

C1906
C1905

C1907
SIM CARD1 SIM CARD2

[2,15]

[2,15]
[4,15]

[2,15]

[2,15]
[2,15]
[2,15]

SD_CLK0
SD_CMD
SD_D3

SD_D0
VDDSD

SD_D1
SD_D2
SIM1 SIM2

11

12

13

14

15

16

17

18
DATA2

CD/DATA3

CMD

VDD

CLK

GND

DATA0
DATA1
R1 0 7 20 R1904 0
[4] VSIM1 VCC-A VCC-B VSIM2 [4]
R2 0 8 19 R1905 0 [2]
[2] SIM1_RST RST-A RST-B SIM2_RST

B [2] SIM1_CLK
R7 0 9

6
CLK-A
J1300 S19-0B20F36A
CLK-B
10

3
R1906 0
SIM2_CLK [2] B
GND-A GND-B
5 2
VPP-A VPP-B
R8 0 4 1 R1907 0
DATA-A DATA-B SIM2_IO [2]
[2] SIM1_IO

GND

GND

GND
GND

NF
24

23

22

21
NF

C2
C1

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APPROVED: DATED:

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 6 5 4 3 2 1
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LTR ECO NO: APPROVED: DATE:

D D

T-FLASH VDDSD

0.1uF
NF

C14001
R14001
[2,14] SD_D2

[2,14] SD_D3

C [2,14] SD_CMD
C
[2,14] SD_CLK0

[2,14] SD_D0

SD_D1
[2,14]

B B

A A
TITLE & REV:

SC6800H_SP6804H_SCH_V1.0.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

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DATED:
EQA: COMPANY:

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APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 13 OF 19

 6 5 4 3 2 1
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LTR ECO NO: APPROVED: DATE:

D D

VIBRATOR VBAT

C1123
NF

Motor
MT1100

[4]
C1124
VIB_CTRL NF
C C

should afford 100mA current

B B

A A
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LTR ECO NO: APPROVED: DATE:

D D

100nF C1249 AIL [3,20]

E1 100nF
AIR [3,20]
ANT1 ANTENNA
C1248

12

11

10
U1202

GND

GPIO2

GND
C 1
LNAN LOUT
9 C
C1243 100pF 2 8
LNAP 13 ROUT
3 GND 7
SCLK VDD

SDIO

RCLK

VIO
IC-FM-5802NM

6
[3,12,20] FM_ANT
R1247 NF
*用用用BK的FM芯芯芯芯芯芯芯芯芯芯芯芯R1246贴1K磁磁

VDDIO_2V8
R1245
[2] FM_32K

C1245
5.1K

100nF
VDDIO_2V8

R1206 4.7K

R1207 4.7K

FM_SCL2
FM_SDA2
[2]

[2]
[4,7,8,10,17]
B1201 0 VDDIO_2V8

FM ANT LNA
100nF
C1209

GSM_ANT
[5] R1221 10K high active
B FM_LNA_EN [2] B
1

L1205
VCC

EN

0 47nH 33nH C1208 47nF

GSM_ANT L1206 3 S7177 6
RF_IN RF_OUT FM_ANT1 [3]
R1205
C1217 47nF
GND

GND

U1203
2

L1207
120nH
NF
22pF
C1207

A A
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APPROVED: DATED:

CONFIDENTIAL AND PROPRIETARY SHEET: 15 OF 19

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LTR ECO NO: APPROVED: DATE:

D D

BT

C C
E2
ANT1 ANTENNA

R1700 0
[3] BT_RF

R1701
NF
B B

A A
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LTR ECO NO: APPROVED: DATE:

D
WIFI D

C C

B B

A A
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LTR ECO NO: APPROVED: DATE:

D
ATV D
B1302
VCAM_ANA_2V8 [4,9,20]
B1301 SZ1005G750T
[20] 1P2V
SZ1005G750T

6.8nF
[20] [4,9,20] VCAM_ANA_2V8 VCAM_ANA_2V8
1uF 1P2V

C1340
1uF 0.1uF 0.1uF
C1339

C1337 C1330 C1329

VBAT

IC到电容的TRACE不芯低于12MIL

C1350
FM_ANT
[3,12,17]

VDD_VCO 29

32

27

12

17

24
2
VDD_RF1 1

VDD_AMS

VDDA_IO

VDD_LDO

VDDIO1

VDDIO2

VDDC
1uF
28
VREG_LDO
[2] ATV_PWRON
5 R1315
I2C_SDA SDA [2,9]

R1331
I2C_SCL
6 470

470
R1316
SCL [2,9]
ALL 470R
0
ANT_TV1
NC ANTENNA

22pF 9
I2S_DATA
L1310 3 11
RF1_IN I2S_SCLK ATV_ADACRIGHT [20]
16 ATV_ADACLEFT [20]
C1323 9.1nH I2S_MCLK
8
I2S_LRCLK
U1301 7 R1311 470
VSYNC CCIR_VS [2,9]
TVS1302

R1312

NF
C1310
10 470
HSYNC CCIR_HS [2,9]

8.2PF
C1311
18 R1310 33
PCLK ATV_CCIR_PCLK [2]
23 CCIR_D7
D7 470
22 R1309 CCIR_D6
C D6
D5
21 R1308
470
470
CCIR_D5 C
20 R1307 CCIR_D4
D4 470
19 R1306 CCIR_D3
D3 470
15 R1305 CCIR_D2
D2
14 R1304 470
D1 CCIR_D1
470
CLOSE TO ANTENNA D0
13 R1303
30 470 CCIR_D0
XO_P R1302

TEST_MODE
26 ATV_EN_LDO
EN_LDO [2]
31
XO_N 25
RESET ATV_RSTN

GND
[2]

IC-ATV-NMI601BBA CCIR_D[0:7]

33

4
0R

C1318 C1319 ATV_26M [3] 1.2V LDO 与2.8V分开，2.8V在CAMERA开启芯一起存在

1nF

B B

R1317 1K C1308 22nF

[20] ATV_ADACLEFT AIL [3,17]
22nF
C1304

电容电电电100nF

R1318 1K C1309 22nF

[20] ATV_ADACRIGHT AIR [3,17]
22nF
C1305

A A
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LTR ECO NO: APPROVED: DATE:

CHANGE NOTES
D D

C C

B B

A A
TITLE & REV:

DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

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DATED:
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CONFIDENTIAL AND PROPRIETARY SHEET: 19 OF 19