An Inductorless Wideband Balun-LNA
in 65nm CMOS with balanced output
S.C. Blaakmeer, E.A.M. Klumperink, B. Nauta D.M.W. Leenaerts
University of Twente, IC-Design Group NXP Semiconductors, Research
Enschede, The Netherlands Eindhoven, The Netherlands
Abstract — An inductorless LNA with active balun is designed 1.2 V
for multi-standard radio applications between 100MHz and RCG RCS
6GHz. It exploits a combination of a common gate stage and a
common source stage with replica biasing to maximize balanced MSFCG
operation. The NF is designed to be around 3dB by using the Replica
CG-stage (1:10)
noise canceling technique. Its best performance is achieved MSFCS
VRepl
between 300MHz to 3.5GHz with gain and phase errors below
0.3dB and ±2degrees, 15dB gain, S11<-14dB, IIP3 = 0dBm and
Diff. Port
IIP2 higher than +20dBm at a total power consumption of 21mW.
The circuit is fabricated in a baseline 65nm CMOS process, with
50 ȍ
RL
an active area of only 0.01mm2. The circuit simultaneously MCG VBiasCG BiasT
50 ȍ
achieves impedance matching, noise canceling and a well RL
balanced output. RS LBond MCS
50 ȍ
VS BiasT
CExt RB
I. INTRODUCTION IBiasSF IBiasSF
Upcoming software-defined and multi-standard radio
architectures demand wideband LNAs [1]. In contrast to a Figure 1. Schematic of the Inductorless Wideband Balun-LNA; the circuit
within dashed box is integrated on chip.
multi-LNA solution, a wideband LNA is flexible and efficient
in terms of area, power and costs. Single-ended input LNAs increase, area-consuming integrated inductors become
are preferred to save I/O pins and because antennas and RF increasingly expensive. Thus, for CMOS processes an
filters usually produce single ended signals. On the other hand, inductorless implementation is strongly preferred.
differential signaling in the receive chain is preferred in order This paper presents an inductorless Balun-LNA with a well
to reduce second order distortion and to reject power supply balanced output signal. The wideband circuit is designed in a
and substrate noise. Thus, at some point in the receive chain a baseline 65nm CMOS process with a 1.2V supply voltage,
balun is needed to convert the single-ended RF signal into a aiming for high linearity. The circuit is described in section II.
differential signal. Off-chip baluns with low losses are Section III describes that noise canceling of the input transistor
typically narrowband so that several baluns would be required noise and a balanced output signal can be obtained
in case of wideband operation. On the other hand, wideband simultaneously, using the Noise Canceling Technique. Section
passive baluns typically have high loss, degrading the overall IV gives the measurement results. Finally the conclusions are
NF of a receiver significantly. drawn in Section V.
Combining the balun and LNA functionality into a single
integrated circuit is an attractive option to realize a wideband
low noise receiver front-end. Only a few wideband LNA-balun II. CIRCUIT DESCRIPTION
combinations with sufficient low noise figure for multi-band Fig. 1 shows the balun-LNA circuit based on the topology
receivers have been published [1-3]. These circuits all exploit proposed, but not implemented on silicon, in [4]. The circuit
the noise canceling topology published in [4, Fig. 4b]. inside the dashed box is implemented on silicon. The input
Although these circuits have a single-ended input and signal is amplified via two paths, a non-inverting Common
differential ouput, the (im)balance of the output signal is not Gate (CG) path and an inverting Common Source (CS) path.
reported. Furthermore, the circuit in [1, Fig. 8a] inherently has The voltage gains of these two paths are designed to be equal,
a gain difference between its two paths, leading to an giving the balun function. The outputs of both amplifier paths
unbalanced output signal. Both paths use an equal load resistor are buffered by identical source-followers, both having 50ȍ
(RL), however, the transconductance (gm) differs more than a output impedance. The source-followers are currently used as
factor of 2, leading to a gain difference (∆gm·RL) of at least measurement buffers; in a complete receiver design they can
6dB. Next to this, the circuits in [1-3] all use integrated drive a mixer. To maximize balanced operation, the DC-levels
inductors. As in newer CMOS technologies the area-costs
1-4244-1125-4/07/$25.00 ©2007 IEEE. 364
vnoise,D Noise Signal
R CG
~1mm
MCG +)
inoise
vout
vnoise,S
Zin = 1 / gmCG -)
RS AV
vsignal
Ibias
vout : Active Area:
Signal Differential
110µm × 80µm
Noise MCG Common-Mode (canceled)
Figure 2. The Noise Canceling Technique applied to a CG-stage. Figure 3. Die photo of the bonded Wideband Balun-LNA.
at the gates of the source followers are chosen equal. This is depends on the CG-transconductance (gmCG) and RS:
achieved by AC-coupling the output of the CS-stage to its α = 1 / (1+gmCG·RS). The noise of MCG can be canceled when
source-follower and generating the DC-level (VRepl) by a it becomes a common-mode signal at the differential output
scaled-replica of the CG-stage. The cut-off frequency of the (vout). Therefore, the gain of the CS-stage should be equal to:
AC-coupling is designed to be at 10MHz. This is more than a AV = vD,noise / vS,noise = –RCG / RS. In order to match to the
decade below the intended operation frequency, which keeps source impedance, the CG-transconductance should be equal
the error in phase difference of the two paths within a few to: gmCG = 1/RS. The required gain of the CS-stage can be
degrees of 180º. rewritten as: AV = –gmCG·RCG, this equals the gain of the CG-
The CG-stage inherently gives a broadband input match. stage, except for the inversion. Thus, at the output (vout), the
The real part of the input impedance of the LNA is mainly set signal is fully differential (well balanced) and the noise of MCG
by 1/gmCG of transistor MCG in parallel with resistor RB. When is common-mode signal, which is canceled when taking the
the input impedance is matched to the source impedance differential output.
(gmCG ≈ 1/RS, for RB >> RS), the noise of MCG is the dominant
factor in NF. Without taking any measures its noise would set
IV. MEASUREMENTS
the lower limit of the Noise Figure (NF) to ~4dB. However, by
applying the Noise Canceling Technique [4], the noise of the The LNA, which has an active area of only 110µm × 80µm,
CG-transistor can be canceled at the differential output. This has been fabricated in a baseline 65nm CMOS process and is
Noise Canceling Technique is explained briefly in the next mounted on a PCB. The in- and outputs are bonded, the supply
section. and bias are applied using a probe, see Fig. 3.
Since the noise of MCG can be canceled, the noise of MCS
A. Gain, Input-match and Isolation
remains. However, here the transconductance (gmCS) can be
chosen larger than 1/RS while the input match is still performed Fig. 4 shows the measured single-ended input to differential
by MCG. The transconductance of MCS (gmCS) is chosen 5 times output S-parameter gain, Sds21. This parameter characterizes
higher than gmCG to limit its noise contribution. The resistor RB the gain of the LNA using a 50ȍ single-ended input port and a
acts as a current source and is chosen 7 times higher than RS, 100ȍ differential output port. In practical use, the LNA will
thereby limiting its noise contribution. usually be followed by an on-chip mixer with a voltage-type
input, and matching to 50ȍ at the outputs is not needed. The
most meaningful gain parameter is then the (unloaded) voltage
III. SIMULTANEOUS NOISE CANCELING AND BALANCING
gain. To convert Sds21 into voltage gain, 6dB needs to be added
In this paper we dimension the CG-CS topology in such a to account for the voltage-halving at the matched output, and
way that simultaneous impedance matching, noise canceling an additional 3dB to take the conversion from 50ȍ input to
and a balanced output signal are obtained. A balanced output 100ȍ output into account. Thus, the voltage gain is within
requires the gains of the two paths to be equal. 15.1dB ± 0.5dB from 100MHz up to 2.5GHz. The 3dB
Fig. 2 shows a simplified schematic of the circuit. The bandwidth is 5.2GHz. Fig. 4 shows that S11 is below
voltage amplifier (AV) represents the CS-stage (MCS and RCS) -10dB up to 6.2GHz. The resonance of the input bondwire
of Fig. 1 and RB is replaced by an ideal current source (Ibias). inductance (~1nH) and an external capacitor (600fF) broadens
The noise generated by MCG can be represented by a current the input match with a few GHz.
source (inoise). This current generates a voltage at the source- The common and differential output to single-ended input
node of MCG (vS,noise=α·inoise·RS) and a fully correlated voltage isolations (Ssc12 and Ssd12) are better than -30dB and -40dB
at its drain (vD,noise=–α·inoise·RCG) in anti-phase. The factor α respectively.
365
8 2
7
6
Sds21 [dB]
5 Measurements
4 Sds21 = 6.6 dB 1
Gain Imbalance [dB]
3
2
AV = 15.6 dB
1 +0.3dB
0
0
0
Simulated -0.3dB
-5
Measured
-10
S11 [dB]
-1
-15 Simulation
-20
-25
-30 -2
100M 1G 10G 100M 1G 10G
Freq [Hz] Freq [Hz]
Figure 4. Simulated and measured S-parameters, Figure 6. Gain imbalance, simulated and measured (20 samples).
Sds21 (Gain: single-ended in, differential out) and S11
190
6
5 Simulation
Phase Imbalance [deg]
185
Measured Simulated
4
+2deg
NF [dB]
3 180
-2deg
2 Measurements
NFmin
175
1
0
170
100M 1G 10G
100M 1G 10G
Freq [Hz]
Freq [Hz]
Figure 5. Measured Noise Figure, simulated NF and NFmin. Figure 7. Phase imbalance, simulated and measured (20 samples).
possible, e.g. via the bias of the CS or GS stage or via the bulk
B. Noise Figure
of the CG transistor.
Fig. 5 shows that the measured Noise Figure (NF) is below
D. Linearity
3.5dB from 0.2 to 5.2GHz and below 4dB from 0.1 to 6GHz.
An advantageous property of the Noise Canceling technique is Wideband standards like WiMedia-UWB and DVB-H
that the power and noise matching can be obtained require wideband RF-frontends with high linearity. For 2nd
simultaneously [4]. The simulated NF equals the simulated order distortion, a narrowband receiver is only sensitive to the
NFmin over a large bandwidth and only starts to deviate at effects of an interfering modulated carrier which leaks trough
higher frequencies due to the increasing impedance mismatch the mixer, corrupting the signal at the mixer output. Next to
at the input. The increase of NFmin at low frequencies is due to this effect, a wideband receiver also has to deal with
1/f-noise, the increase at high frequencies is due to the drop in interferers that have sum or difference frequencies equal to the
gain. wanted signal frequency, corrupting the signal already in the
LNA. Analysis of interferer scenarios for two wideband
C. Gain and Phase Imbalance
standards, WiMedia-UWB and DVB-H, show that the
The balun performance was characterized on 20 samples at required IIP2 of the LNA is around +20dBm.
nominal bias conditions, equal to the simulation conditions. Fig. 8 plots the 2nd order and 3rd order intercept points
These measurements were preformed using wafer-probing. versus the frequency of one of the intermodulation tones. To
The gain and phase imbalance measurements are shown in Fig. determine the IIP2, one fixed 900MHz tone (e.g. GSM) is
6 and Fig. 7. In the band from 300MHz to 3.5GHz the gain used, whereas another input tone is swept in frequency. For
imbalance is smaller than ±0.3dB and the phase imbalance intermodulation frequencies below 900MHz the difference
remains within ±2degrees. The somewhat larger spread in frequency is taken, for frequencies above 900MHz the sum
phase difference in the 300–800MHz range is caused by a frequency is taken as the intermodulation frequency.
resonance-effect in the output cables and non-optimal probe The IIP3 is determined using two closely spaced tones and
contacting. If desired, fine tuning of the balun functionality is is around 0dBm. The increase in IIP3 with frequency can be
explained by the increasing impedance mismatch at the input.
366
TABLE I. COMPARISON OF BALUN-LNAS, PASSIVE BALUNS AND INDUCTORLESS SINGLE-ENDED LNAS.
Freq. Pdiss # coils Gain Phase
NF Gain IIP2 IIP3 Proc.2)
Ref Band (core) area Balun? imbal. imbal.
[dB] AV [dB] [dBm] [dBm] Vsupply
[GHz] [mW] [mm2] [dB] [deg]
13 – 21 65nm –
This Work 0.2 – 5.2 < 3.5 > +20 >0 YES < 0.3 <2
15.6 (14) 1.2V 0.009
[1] JSSC 90nm 2
0.8 – 6 <3.5 18 – 20 ? >-3.5 12.5 YES > 6 3) ?
2006 2.5V ?
[2] CICC +4 +1 0.18µm 4
0.9 – 5 < 3.5 18 – 19 12 YES ? ?
2005 (sim) (sim) 1.8V ~0.4
[3] RFIC 18 – 16.2 90nm 1
2.7 – 4.5 <5 ? -8 YES ? ?
2005 19.6 (12.6) 1.2V 0.2
[5] MTT-S 1) Sds21 passive 0.18µm 2
0.8 – 2.5 <4 high high YES < 0.4 < 3.2
2005 ≈ -4 balun - 0.073
[6] MTT-S Sds21 passive GaAs 6
1.5 – 3.5 < 1 1) high high YES < 1.3 <4
2005 ≈ -1 balun - 0.42
[4] JSSC 0.25µm –
0.2 – 2.0 < 2.4 10 – 14 +12 0 35 NO N/A N/A
2004 2.5V 0.075
[7] ISSCC 90nm –
0.5 – 8.2 < 2.6 22 – 25 ? -4 / -16 42 NO N/A N/A
2006 2.7V 0.025
1) 2) 3)
Insertion Loss CMOS unless specified differently As derived from component values in schematic
30 implemented in CMOS [5] and GaAs [6] and two wideband
25 inductorless single-ended LNAs [4,7]. The proposed balun-
IIP2
LNA is more wideband than the passive integrated baluns
IIP2 & IIP3 [dBm]
20
[5,6] while showing smaller gain and phase imbalances. The
15 LNA performance of the implemented circuit is competitive to
10 non-balun LNAs [4] and [7]. The circuit is integrated in a
digital baseline 65nm process using a 1.2V supply voltage.
5
IIP3 Still, at this low supply voltage, it achieves high linearity and
0 the active area is small, as no integrated inductors are required.
-5 In contrast to [1] the balun-LNA presented in this work
108 109 1010 simultaneously achieves impedance matching, noise canceling
Intermodulation frequency [Hz] and a well balanced output.
Figure 8. IIP2 and IIP3 versus intermodulation frequency.
The high IIP2 of more than +20dBm over the full
100M–10GHz range can be explained as follows. The non-
linear currents which the CG-transistor produces are canceled
in exactly the same way as its noise is canceled. This is
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