INTEGRATED CIRCUITS

DATA SHEET

SAA5244A
Integrated VIP and teletext decoder
(IVT1.1)
Product specification March 1992
File under Integrated Circuits, IC02
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

FEATURES
• Complete teletext decoder including page memory in a
single 40-pin DIL package
• Single +5 V power supply
• Digital data slicer and display clock phase-locked loop
reduces peripheral components to a minimum
• Both video and scan related synchronization modes are DESCRIPTION
supported
The Integrated VIP and Teletext (IVT1.1) is a teletext
• On board single page memory including extension
decoder (contained within a single-chip package) for
packets for FASTEXT
decoding 625-line based World System Teletext
• Single page acquisition system transmissions. The teletext decoder hardware is based on
• RGB interface to standard colour decoder ICs, push-pull a reduced function version of the device SAA5246
output drive (IVT1.0).
• Data capture performance similar to SAA5231 (VIP2) The Video Input Processor (VIP) section of the device
uses mixed analog and digital designs for the data slicer
• Simple software control via I2C-bus
and the display clock phase-locked loop functions. As a
• Option for five national languages result the number of external components is greatly
• 32 supplementary characters for on-screen displays reduced and no critical or adjustable components are
required. A single page static RAM is incorporated in the
• Optional storage of packet 24 in the display memory
device thereby giving a genuine single-chip teletext
• Page links in packets 27 and 8/30 are Hamming decoder device.
decoded
• Separate text and video signal quality detectors,
625/525 video status and language version all readable
via I2C-bus
• Automatic ODD/EVEN output control with manual
override
• Control of display PLL free-run and rolling header via
I2C-bus
• VCS to SCS mode for stable 525 line status display

ORDERING INFORMATION

EXTENDED TYPE PACKAGE

NUMBER PINS PIN POSITION MATERIAL CODE
SAA5244AP 40 DIL plastic SOT129(1)
SAA5244AGP 44 QFP plastic SOT205A(2)
Notes
1. SOT129-1; 1996 December 16.
2. SOT205-1; 1996 December 16.

March 1992 2
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

VDD positive supply voltage 4.5 5 5.5 V
IDD supply current − 74 148 mA
Vsyn sync amplitude 0.1 0.3 0.6 V
Vvid video amplitude 0.7 1 1.4 V
fXTAL crystal frequency − 27 − MHz
Tamb operating ambient temperature range −20 − 70 °C

March 1992 3
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Y BLAN COR RGBREF RGB ODD / EVEN

handbook, full pagewidth

23 19 21 18 15-17 22

DISPLAY

PAGE
MEMORY

DATA
TELETEXT
SLICER
ACQUISITION
AND
AND
CLOCK
DECODING
REGENERATOR

25
2 SDA
I C-BUS
INTERFACE 24
SCL

DCVBS
1 VDD
5 10
V SS VDD
SAA5244A
ANALOG 14
VSS
TO TIMING 20
DIGITAL CHAIN
CONVERTER
6
REF

2 INPUT DISPLAY
OSCOUT CLOCK
CRYSTAL CLAMP
3 AND SYNC PHASE
OSCILLATOR
OSCIN SEPARATOR LOCKED
LOOP

4 7 9 8 11 13 12
MLA228 - 1

OSCGND BLACK IREF CVBS POL VCR / FFB STTV / LFB

Fig.1 Block diagram for SOT129 (DIL40) package.

March 1992 4
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

PINNING

SYMBOL SOT129 SOT205A DESCRIPTION

VDD 1 18 +5 V supply
OSCOUT 2 19 27 MHz crystal oscillator output
OSCIN 3 20 27 MHz crystal oscillator input
OSCGND 4 21 0 V crystal oscillator ground
VSS 5 22 0 V ground
REF− − − negative reference voltage for the ADC. The pin should be connected to 0 V
REF+ 6 23 positive reference voltage for the ADC. The pin should be connected to +5 V
BLACK 7 24 video black level storage pin, connected to ground via a 100 nF capacitor
CVBS 8 25 composite video input pin. A positive-going 1 V (peak-to-peak) input is required,
connected via a 100 nF capacitor
IREF 9 26 reference current input pin, connected to ground via a 27 kΩ resistor
VDD 10 27 +5 V supply
POL 11 28 STTV/LFB/FFB polarity selection pin
STTV/LFB 12 29 sync to TV output pin/line flyback input pin. Function controlled by an internal
register bit (scan sync mode)
VCR/FFB 13 32 PLL time constant switch/field flyback input pin. Function controlled by an
internal register bit (scan sync mode)
VSS 14 33 0 V ground
R 15 34 dot rate character output of the RED colour information
G 16 35 dot rate character output of the GREEN colour information
B 17 36 dot rate character output of the BLUE colour information
RGBREF 18 37 input DC voltage to define the output high level on the RGB pins
BLAN 19 38 dot rate fast blanking output
VSS 20 39 0 V ground
COR 21 40 programmable output to provide contrast reduction of the TV picture for mixed
text and picture displays or when viewing newsflash/subtitle pages; open drain
output
ODD/EVEN 22 41 25 Hz output synchronized with the CVBS input’s field sync pulses to produce a
non-interlaced display by adjustment of the vertical deflection currents
Y 23 42 dot rate character output of teletext foreground colour information open drain
output
SCL 24 43 serial clock input for the I2C-bus. It can still be driven during power-down of the
device
SDA 25 44 serial data port for the I2C-bus; open drain output. It can still be driven during
power-down of the device
n.c. − 4 to 7 not connected
30, 31
i.c. 26 to 40 1 to 3 internally connected. Must be left open-circuit in application
8 to 17

March 1992 5
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

handbook, halfpage
VDD 1 40

OSCOUT 2 39

OSCIN 3 38

OSCGND 4 37

VSS 5 36

REF 6 35

BLACK 7 34

CVBS 8 33 i.c.

IREF 9 32

VDD 10 31
SAA5244A
POL 11 30

STTV / LFB 12 29

VCR / FFB 13 28

VSS 14 27

R 15 26

G 16 25 SDA

B 17 24 SCL

RGBREF 18 23 Y

BLAN 19 22 ODD / EVEN

VSS 20 21 COR
MLA035 - 3

Fig.2 Pin configuration; SOT129 (DIL40).

March 1992 6
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

41 ODD / EVEN

37 RGBREF
38 BLAN
SDA

39 V SS
40 COR
43 SCL

35 G

34 R
42 Y

36 B
handbook, full pagewidth
index
44

corner

1 33 VSS

i.c. 2 32 VCR / FFB

3 31 n.c.
4 30 n.c.
5 29 STTV / LFB
n.c.
6 SAA5244A 28 POL

7 27 VDD
8 26 IREF

9 25 CVBS
i.c.
10 24 BLACK

11 23 REF
OSCIN 20

OSCGND 21
V SS 22
12
13

14

15

16

17
V DD 18

OSCOUT 19
i.c.

MLA227 - 2

Fig.3 Pin configuration; SOT205A (QFPL44).

March 1992 7
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER MIN. MAX. UNIT
VDD supply voltage (all supplies) −0.3 6.5 V
VI input voltage (any input) −0.3 VDD+0.5 V
VO output voltage (any output) −0.3 VDD+0.5 V
IO output current (each output) − ±10 mA
IIOK DC input or output diode current − ±20 mA
Tamb operating ambient temperature range −20 70 °C
Tstg storage temperature range −55 125 °C
Vstat electrostatic handling
human body model (note 1) −2000 2000 V

Note
1. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor;
this produces a single discharge transient. Reference Philips Semiconductors test method UZW-B0/FQ-A302
(compatible with MIL-STD method 3015.7).

Failure Rate
The failure rate at Tamb = 55 °C will be a maximum of 1000 FITS (1 FIT = 1 x 10−9 failures per hour).

March 1992 8
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

CHARACTERISTICS
VDD = 5 V ± 10%; Tamb = −20 to +70 °C, unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply
VDD supply voltage range (VDD−VSS) 4.5 5 5.5 V
IDD total supply current − 74 148 mA
Inputs
CVBS
Vsyn sync amplitude 0.1 0.3 0.6 V
tsyn delay from CVBS to TCS −150 0 150 ns
output from STTV buffer
(nominal video, average of
leading/trailing edge)
tsyd change in sync delay between 0 − 25 ns
all black and all white video
input at nominal levels
Vvid(p-p) video input amplitude 0.7 1 1.4 V
(peak-to-peak)
display PLL catching range ±7 − − %
Zsrc source impedance − − 250 Ω
CI input capacitance − − 10 pF
IREF
Rg resistor to ground − 27 − kΩ
POL
VIL input voltage LOW −0.3 − 0.8 V
VIH input voltage HIGH 2.0 − VDD+0.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
CI input capacitance − − 10 pF
LFB
VIL input voltage LOW −0.3 − 0.8 V
VIH input voltage HIGH 2.0 − VDD+0.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
II input current note 1 −1 − 1 mA
tLFB delay between LFB front edge − 250 − ns
and input video line sync
VCR/FFB
VIL input voltage LOW −0.3 − 0.8 V
VIH input voltage HIGH 2.0 − VDD+.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
II input current note 1 −1 − 1 mA

March 1992 9
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Inputs
RGBREF (NOTE 2)
VI input voltage −0.3 − VDD+0.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
IDC DC current − − 10 mA
SCL
VIL input voltage LOW −0.3 − 1.5 V
VIH input voltage HIGH 3.0 − VDD+0.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
fSCL clock frequency 0 − 100 kHz
tr input rise time 10% to 90% − − 2 µs
tf input fall time 90% to 10% − − 2 µs
CI input capacitance − − 10 pF
Inputs/outputs
CRYSTAL OSCILLATOR (OSCIN; OSCOUT)
fXTAL crystal frequency − 27 − MHz
Gv small signal voltage gain 3.5 − − −
Gm mutual conductance f = 100 kHz 1.5 − − mA/V
Cl input capacitance − − 10 pF
CFB feedback capacitance − − 5 pF
BLACK
Cblk storage capacitor to ground − 100 − nF
ILI input leakage current VI = 0 to VDD −10 − 10 µA
SDA
VIL input voltage LOW −0.3 − 1.5 V
VIH input voltage HIGH 3.0 − VDD+0.5 V
ILI input leakage current VI = 0 to VDD −10 − 10 µA
Cl input capacitance − − 10 pF
tr input rise time 10% to 90% − − 2 µs
tf input fall time 90% to 10% − − 2 µs
VOL output voltage LOW IOL = 3 mA 0 − 0.5 V
tf output fall time 3 to 1 V − − 200 ns
CL load capacitance − − 400 pF

March 1992 10
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Outputs
STTV
Gstt gain of STTV relative to video 0.9 1.0 1.1
input
Vtcs TCS amplitude 0.2 0.3 0.45 V
VDCs DC shift between TCS output − − 0.15 V
and nominal video output
IO output drive current − − 3.0 mA
CL load capacitance − − 100 pF
R, G AND B
VOL output voltage LOW IOL = 2 mA 0 − 0.2 V
VOH output voltage HIGH IOH = −1.6 mA; RGBREF RGBREF RGBREF V
RGBREF ≤ −0.25 V +0.25 V
VDD−2 V
Zo output impedance − − 200 Ω
CL load capacitance − − 50 pF
IDC DC current − − −3.3 mA
tr output rise time 10% to 90% − − 20 ns
tf output fall time 90% to 10% − − 20 ns
BLAN
VOL output voltage LOW IOL = 1.6 mA 0 − 0.4 V
VOH output voltage HIGH IOH = −0.2 mA; 1.1 − − V
VDD = 4.5 V
VOH output voltage HIGH IOH = 0 mA; − − 2.8 V
VDD = 5.5 V
VOH allowed voltage at pin with external pull-up − − VDD V
CL load capacitance − − 50 pF
tr output rise time 10% to 90% − − 20 ns
tf output fall time 90% to 10% − − 20 ns
ODD/EVEN
VOL output voltage LOW IOL = 1.6 mA 0 − 0.4 V
VOH output voltage HIGH IOH = −1.6 mA VDD−0.4 − VDD V
CL load capacitance − − 120 pF
tr output rise time 0.6 to 2.2 V − − 50 ns
tf output fall time 2.2 to 0.6 V − − 50 ns

March 1992 11
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Outputs
COR AND Y (OPEN DRAIN)
VOH pull-up voltage at pin − − VDD V
VOL output voltage LOW IOL = 5 mA 0 − 1.0 V
CL load capacitance − − 25 pF
tf output fall time load resistor of − − 50 ns
1.2 kΩ to VDD;
measured between
VDD −0.5 and 1.5 V
ILO output leakage current VI = 0 to VDD −10 − 10 µA
TSK skew delay between display − − 20 ns
outputs R, G, B, COR, Y and
BLAN
Timing
I2C-BUS
tLOW clock LOW period 4 − − µs
tHIGH clock HIGH period 4 − − µs
tSU;DAT data set-up time 250 − − ns
tHD;DAT data hold time 170 − − ns
tSU;STO set-up time from clock HIGH 4 − − µs
to STOP
tBUF START set-up time following a 4 − − µs
STOP
tHD;STA START hold time 4 − − µs
tSU;STA START set-up time following 4 − − µs
clock LOW-to-HIGH transition
Notes to the characteristics
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
Series current limiting resistors must be used to limit the input currents to ± 1 mA.
2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the R, G
and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.

March 1992 12
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March 1992

Philips Semiconductors
(IVT1.1)
Integrated VIP and teletext decoder
0 4.66 64 µs

LSP
(Line Sync Pulse)

0 2.33 32 34.33 64 µs

EP
(Equalizing Pulse)

0 27.33 32 59.33 64 µs

BP
(Broad Pulse)
[1]
13

621 622 623 624 625

(308) (309) (310) (311) (312) 1 2 3 4 5 6 7

TCS interlaced

309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)

TCS interlaced

308 309 310 311 312 1 2 3 4 5 6 7

TCS non-interlaced

MLA037 - 2
[2]
handbook, full pagewidth

Product specification
SAA5244A
[1] LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP.
[2] Line numbers placed in the middle of the line. Equivalent count numbers in brackets.

Fig.4 Composite sync waveforms.

Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

LSP
handbook, full pagewidth
(TCS)
0 4.66 64 µs
40 µs

R, G, B, Y
display period
(1)

0 16.67 (a) LINE RATE 56.67 µs

lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)

R, G, B, Y
(1) display period

(b) FIELD RATE

0 41 291 312
line numbers
MLA662 - 1

(1) also BLAN in character and box blanking

Fig.5 Display output timing (a) line rate (b) field rate.

handbook, full pagewidth

SDA

t BUF t LOW tf

SCL

t HD;STA t HIGH
tr
t HD;DAT
t SU;DAT

SDA

MBC764
t SU;STA
t SU;STO

Fig.6 I2C-bus timing.

March 1992 14
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March 1992

Philips Semiconductors
(IVT1.1)
Integrated VIP and teletext decoder
FIRST FIELD START (EVEN)

621 622 623 624 625

(308) (309) (310) (311) (312) 1 2 3 4 5 6 7

TCS interlaced

ODD/EVEN output
(normal sync mode) 2 µs

ODD/EVEN output
(normal sync mode 48 µs
when VCS to SCS
mode active)

ODD/EVEN output
(slave sync mode) 31 µs
15

SECOND FIELD START (ODD)

309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)

TCS interlaced

ODD/EVEN output 2 µs
(normal sync mode)

ODD/EVEN output
(normal sync mode 16 µs
when VCS to SCS
mode active)

Product specification
SAA5244A
ODD/EVEN output 31 µs
(slave sync mode)
MBA073 - 4
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.

Fig.7 ODD/EVEN timing.

Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

APPLICATION INFORMATION

handbook, full pagewidth

V DD
40
1

39
OSCOUT
2 38
C3 C2 C1
C4 L1
37
1 nF 4.7 µH 15 p 10 p 100 nF OSCIN
3
36
R1
3.3
kΩ OSCGND 35
4
X1
27 MHz, 3rd Overtone VSS 34
5
100 nF REF+
VDD 6 33 i.c.
C7 100 nF
VSS VSS 7 32
BLACK
CVBS 8
C8 VSS 31
100 100 nF
nF 9 SAA5244A
R17 27 kΩ IREF 30
V DD 10
POL 29
11

STTV / LFB 12 28
V DDD
VCR / FFB 13 27
LK2 LK1
VSS 14 25

R 15
(1) R9 25 SDA
G 16
R10 24 SCL
B 17
(1) 23 Y
RGBREF
VSS 18
(1)
BLAN 19 22 ODD / EVEN

VSS 20 21 COR
2.7 k Ω
2.7 kΩ
MLA054 - 5

VDD
VDD

(1) Value dependent on application.

Fig.8 Application diagram.

March 1992 16
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

SAA5244A page memory organization

The organization of the page memory is shown in Fig.9. The device provides an additional row as compared with first
generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page;
row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.

fixed character
written by IVT hardware
alphanumerics white for normal 8 characters
7 characters alphanumerics green when looking always rolling
for status for display page (time)
ROW
7 1 24 8 0
1
24 characters from page header 2
rolling when display page looked for 3
4

MAIN PAGE DISPLAY AREA

5
to
20

21
PACKET X / 22 22
PACKET X / 23 23
PACKET X / 24 STORED HERE IF R0D7 = 1 24
10 14 25
10 bytes for 14 bytes
received free for use
page information by microcontroller MBA274

Fig.9 Basic page memory organization.

Row 0:
Row 0 is for the page header. The first seven columns (0
to 6) are free for status messages. The eighth is an
alphanumeric white or green control character, written ROW
automatically by SAA5244A to give a green rolling header
PACKET X / 24 if R0D7 = 0 0
when a page is being looked for. The last eight characters
are for rolling time. PACKET X / 27 / 0 1
PACKETS 8 / 30 / 0 to 15 2
Row 25:
MBA275 - 2
The first 10 bytes of row 25 contain control data relating to
the received page as shown in Table 1. The remaining 14
bytes are free for use by the microcomputer.
Fig.10 Organization of the extension memory.

March 1992 17
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Table 1 Row 25 received control data format

D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0
D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0
D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0
D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0
D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND 0
D5 0 0 0 0 0 0 0 0 0 PBLF
D6 0 0 0 0 0 0 0 0 0 0
D7 0 0 0 0 0 0 0 0 0 0

Column 0 1 2 3 4 5 6 7 8 9

Where:
Page number
MAG magazine
PU page units
PT page tens
PBLF page being looked for
FOUND LOW for page has been found
HAM.ER Hamming error in corresponding byte
Page sub-code
MU minutes units
MT minutes tens
HU hours units
HT hours tens
C4-C14 transmitted control bits.

March 1992 18
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Register maps
SAA5244A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in Table 3.

Table 2 Register map

REGISTER D7 D6 D5 D4 D3 D2 D1 D0
Adv. 0 X24 FREE AUTO DISABLE − DISABLE − R11/R11B
control POS RUN PLL ODD/ HDR ODD/ SELECT
EVEN ROLL EVEN
Mode 1 VCS TO − ACQ − DEW/ TCS T1 T0
SCS ON/OFF FULL ON
FIELD
Page 2 − − − − TB START START START
request COLUMN COLUMN COLUMN
address SC2 SC1 SC0
Page 3 − − − PRD4 PRD3 PRD2 PRD1 PRD0
request
data
− − − − − − − −
Display 5 BKGND BKGND COR COR TEXT TEXT PON PON
control OUT IN OUT IN OUT IN OUT IN
(normal)
Display 6 BKGND BKGND COR COR TEXT TEXT PON PON
control OUT IN OUT IN OUT IN OUT IN
(newsflash
/subtitle)
Display 7 STATUS CURSOR REVEAL BOTTOM DOUBLE BOX BOX BOX
mode TOP ON ON HALF HEIGHT 24 1-23 0
− − − − − − − −
Cursor 9 SUPPL. CLEAR A0 R4 R3 R2 R1 R0
row BLAST MEM.
Cursor 10 SUPPL. SUPPL. C5 C4 C3 C2 C1 C0
column ROW 24 ROW 0
Cursor 11 − D6 D5 D4 D3 D2 D1 D0
data
Device 11B 625/525 ROM ROM ROM ROM ROM TEXT VCS
status SYNC VER R4 VER R3 VER R2 VER R1 VER R0 SIGNAL SIGNAL
QUALITY QUALITY

Notes to Table 2
1. ‘− ‘ indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 to D1 of registers R1, R5 and R6
which are set to logic 1.
3. All memory is cleared to ‘space’ (00100000) on power-up, except row 0 column 7 chapter 0, which is ‘alpha’ white
(00000111) as the acquisition circuit is enabled but the page is on hold.
4. TB must be set to logic 0 for normal operation.
5. The I2C slave address is 0010001

March 1992 19
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

REGISTER DESCRIPTION

R0 ADVANCED CONTROL - auto increments to Register 1

R11/R11B Selects reading of R11 or R11B
SELECT
DISABLE Forces ODD/EVEN output LOW when logic 1
ODD/EVEN
DISABLE HDR Disables green rolling header and time
ROLL
AUTO ODD/EVEN When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0
FREE RUN PLL Will force the PLL to free run in all conditions
X24 POS Automatic display of FASTEXT prompt row when logic 1
R1 MODE - auto increments to Register 2
T0, T1 Interlace/non-interlace 312/313 line control (see Table 4)
TCS ON Text composite sync or direct sync select
DEW/FULL FIELD Field-flyback or full channel mode
ACQ ON/OFF Acquisition circuits turned off when logic 1
VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal
R2 PAGE REQUEST ADDRESS - auto increments to Register 3
COL SC0 - SC2 Point to start column for page request data (see Table 3)
TB Must be logic 0 for normal operation
R3 PAGE REQUEST DATA - does not auto increment (see Table 3)

R5 NORMAL DISPLAY CONTROL - auto increments to Register 6

R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto increments to Register 7
PON Picture on
TEXT Text on
COR Contrast reduction on
BKGND Background colour on
These functions have IN and OUT referring to inside and outside the boxing function respectively.
R7 DISPLAY MODE - does not auto increment
BOX ON 0 Boxing function allowed on Row 0
BOX ON 1-23 Boxing function allowed on Row 1-23
BOX ON 24 Boxing function allowed on Row 24
DOUBLE HEIGHT To display double height text
BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1
REVEAL ON To reveal concealed text
CURSOR ON To display cursor
STATUS TOP Row 25 displayed above or below the main text

March 1992 20
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

R9 CURSOR ROW - auto increments to Register 10

R0 to R4 Active row for data written to or read from memory via the I2C-bus
A0 Selects display memory page (when = 0) or extension packet memory (when = 1)
CLEAR MEM. When set to 1, clears the display memory.
This bit is automatically reset
SUPPL. BLAST When set to 1, column 4b and 5b (of Table 6) are mapped into 4 and 5 respectively, replacing
blast-through alphanumerics in graphics mode
R10 CURSOR COLUMN - auto increments to Register 11 or 11B
C0 to C5 Active column for data written to or read from memory via the I2C-bus
SUPPL. ROW 0 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively,
just for row 0 columns 0 to 7
SUPPL. ROW 24 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively
just for row 24
R11 CURSOR DATA - does not auto increment
D0 to D6 Data read from/written to memory via I2C, at location pointed to by R9 and R10.
This location automatically increments each time R11 is accessed
R11B DEVICE STATUS - does not auto increment
VCS SIGNAL Indicates that the video signal quality is good and PLL is phase locked to input video when = 1
QUALITY
TEXT SIGNAL If a good teletext signal is being received when = 1
QUALITY
ROM VER R0 to Indicated language/ROM variant. For Western European = 01000
R4
625/525 SYNC If the input video is a 525 line signal when = 1

March 1992 21
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Table 3 Register map for page requests (R3)

START
PRD4 PRD3 PRD2 PRD1 PRD0
COLUMN
0 Do care
Magazine HOLD MAG2 MAG1 MAG0
1 Do care
Page tens PT3 PT2 PT1 PT0
2 Do care
Page units PU3 PU2 PU1 PU0
3 Do care
Hours tens X X HT1 HT0
4 Do care
Hours units HU3 HU2 HU1 HU0
5 Do care
Minutes tens X MT2 MT1 MT0
6 Do care
Minutes units MU3 MU2 MU1 MU0

Notes to Table 3
1. Abbreviations are as for Table 1 except for DO CARE bits.
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page
requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, ‘normal’ or ‘timed page’
selection.
3. If HOLD is set LOW, the page is held and not updated.
4. Columns auto-increment on successive I2C-bus transmission bytes.
Table 4 Interlace/non-interlace 312/313 line control (T0 and T1)
T1 T0 RESULT
0 0 interlaced 312.5/312.5 lines
0 1 non-interlaced 312/313 lines (note 1)
1 0 non-interlaced 312/312 lines (note 1)
1 1 scan-locked

Note to Table 4
1. Reverts to interlaced mode if a newsflash or subtitle is being displayed.

March 1992 22
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Table 5 Crystal characteristics

SYMBOL PARAMETER MIN. TYP. MAX. UNIT
Crystal (27 MHz, 3rd overtone)
C1 series capacitance − 1.7 − pF
C0 parallel capacitance − 5.2 − pF
CL load capacitance − 20 − pF
Rr resonant resistance − − 50 Ω
R1 series resistance − 20 − Ω
Xa ageing − − ±5 10−6/yr
Xj adjustment tolerance − − ±25 10−6
Xd drift − − ±25 10−6

handbook, full pagewidth

1 SAA5244A

CRYSTAL
OSCILLATOR
1 nF 4.7 µH 15 p 10 p 100 nF
3

3.3 kΩ 27 MHz

MLA036 - 5

Fig.11 Crystal oscillator application diagram.

CLOCK SYSTEMS
Crystal oscillator
The crystal is a conventional 2-pin design operating at
27 MHz. It is capable of oscillating with both fundamental
and third overtone mode crystals. External components
should be used to suppress the fundamental output of
the third overtone, as shown in Fig.11. The crystal
characteristics are given in Table 5.

March 1992 23
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Character sets national option characters as indicated in Table 8 with

reference to their table position in the basic character
The WST specification allows the selection of national
matrix illustrated in Table 7. The SAA5244A automatically
character sets via the page header transmission bits, C12
decodes transmission bits C12 to C14. Table 6 illustrates
to C14. The basic 96 character sets differ only in 13
the character matrices.

MLA663
handbook, full pagewidth

alphanumerics and alphanumerics alphanumerics or alphanumerics

graphics 'space' character blast-through character
character 1011010 alphanumerics 1111111
0000010 character
0001001

contiguous separated separated contiguous

graphics character graphics character graphics character graphics character
0110111 0110111 1111111 1111111
background display
= colour = colour

Fig.12 Character format.

March 1992 24
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Table 6 SAA5244P/A character data input decoding

B b7
0 0 0 0 0 0 1 1 1 1
I
b6
T 0 0 1 1 1 1 0 0 1 1 AVAILABLE AS
S b5 NATIONAL OPTIONS
0 1 0 0 1 1 0 1 0 1
ONLY
b4 b3 b2 b1
column
r 0 1 2 2a 3 3a 4 4b 5 5b 6 6a 7 7a
o
w alpha -
graphics
0 0 0 0 0 numerics
black
black

alpha -
graphics
0 0 0 1 1 numerics
red
red

alpha - graphics
0 0 1 0 2 numerics green
green

alpha - graphics
0 0 1 1 3 numerics yellow
yellow

alpha -
numerics graphics
0 1 0 0 4
blue blue

alpha -
graphics
0 1 0 1 5 numerics
magenta
magenta

alpha -
graphics
0 1 1 0 6 numerics
cyan
cyan

alpha - graphics
0 1 1 1 7 numerics white
white

conceal
1 0 0 0 8 flash display

1 0 0 1 9 steady contiguous
graphics

separated
1 0 1 0 10 end box
graphics

1 0 1 1 11 start box ESC

normal black
1 1 0 0 12 back -
hight
ground
new
1 1 0 1 double back -
13
height ground

hold
1 1 1 0 14 SO
graphics
book, full pagewidth

release
1 1 1 1 15 SI
graphics

MBA266 - 1

Notes to Table 6 - For character version number (01000) see Register 11B
1. * These control characters are reserved for compatibility with other data codes.
2. ** These control characters are presumed before each row begins.
3. + Columns 4b and 5b can only be accessed when supplementary character bits are set (see Registers 9 and 10).
4. Control characters shown in columns 0 and 1 are normally displayed as spaces.
5. Characters may be referred to by column and row, For example 2/5 refers to %.

March 1992 25
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

6. Black represents displayed colour. White represents background.

7. Character rectangle shown as follows:
8. The SAA5244A national option characters are illustrated in Table 8.
9. Characters 4b/11, 4b/12, 5b/10, 5b/11 and 5b/12 are special characters for combining with character 4b/10.
10. National option characters will be developed according to the setting of control bits C12 to C14. These will be mapped
into the basic code table into positions shown in Table 8.
11. Columns 4b and 5b are mapped into 4 and 5 respectively (replacing blast-through alphanumerics in the graphics
mode) when enabled by R9 bit D7 set to 1.
12. Columns 4b and 5b are mapped into columns 6 and 7 respectively when enabled by R10 bit D6 (row 0 columns 0
to 7) and R10 bit D7 (row 24) set to 1.
13. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.

March 1992 26
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March 1992

Table 7

Philips Semiconductors
(IVT1.1)
Integrated VIP and teletext decoder
SAA5244A Basic character matrix
2/0 2/8 3/0 3/8 4/0 4/8 5/0 5/8 6/0 6/8 7/0 7/8

NC NC

2/1 2/9 3/1 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9

2/2 2/10 3/2 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10

2/3 2/11 3/3 3/11 4/3 4/11 5/3 5/11 6/3 6/11 7/3 7/11

NC NC NC
27

2/4 2/12 3/4 3/12 4/4 4/12 5/4 5/12 6/4 6/12 7/4 7/12

NC NC NC

2/5 2/13 3/5 3/13 4/5 4/13 5/5 5/13 6/5 6/13 7/5 7/13

NC NC

2/6 2/14 3/6 3/14 4/6 4/14 5/6 5/14 6/6 7/6 7/14

NC NC

2/7 2/15 3/7 3/15 4/7 4/15 5/7 5/15 6/7 6/15 7/7 7/15

Product specification
NC

SAA5244A
handbook, full pagewidth

MLA630

Where: NC = national option character position.

Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

Table 8 SAA5244A national option character set

ndbook, full pagewidth (1)

PHCB CHARACTER POSITION (COLUMN / ROW)
LANGUAGE
C12 C13 C14 2 / 3 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14

ENGLISH 0 0 0

GERMAN 0 0 1

SWEDISH 0 1 0

ITALIAN 0 1 1

FRENCH 1 0 0

MLA664

(1) PHCB are the Page Header Control Bits. Other combinations default to English.

March 1992 28
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

PACKAGE OUTLINES

DIP40: plastic dual in-line package; 40 leads (600 mil) SOT129-1

seating plane

D ME

A2 A

L A1

c
Z e w M
b1
(e 1)
b
40 21 MH

pin 1 index

1 20

0 5 10 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT
A A1 A2
b b1 c D
(1)
E
(1)
e e1 L ME MH w Z (1)
max. min. max. max.
1.70 0.53 0.36 52.50 14.1 3.60 15.80 17.42
mm 4.7 0.51 4.0 2.54 15.24 0.254 2.25
1.14 0.38 0.23 51.50 13.7 3.05 15.24 15.90
0.067 0.021 0.014 2.067 0.56 0.14 0.62 0.69
inches 0.19 0.020 0.16 0.10 0.60 0.01 0.089
0.045 0.015 0.009 2.028 0.54 0.12 0.60 0.63

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

92-11-17
SOT129-1 051G08 MO-015AJ
95-01-14

March 1992 29
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm SOT205-1

33 23 A

34 22 ZE

e
E HE A2
A (A 3)
A1

wM
θ
bp Lp
pin 1 index L
44 12
detail X
1 11

ZD v M A
e wM
bp
D B
HD v M B

0 5 10 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y Z D (1) Z E (1) θ
o
0.25 2.3 0.50 0.25 14.1 14.1 19.2 19.2 2.0 2.4 2.4 7
mm 2.60 0.25 1 2.35 0.3 0.15 0.1
0.05 2.1 0.35 0.14 13.9 13.9 18.2 18.2 1.2 1.8 1.8 0o

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

95-02-04
SOT205-1 133E01A
97-08-01

March 1992 30
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

SOLDERING Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied
Introduction
to the printed-circuit board by screen printing, stencilling or
There is no soldering method that is ideal for all IC pressure-syringe dispensing before package placement.
packages. Wave soldering is often preferred when
Several techniques exist for reflowing; for example,
through-hole and surface mounted components are mixed
thermal conduction by heated belt. Dwell times vary from
on one printed-circuit board. However, wave soldering is
50 to 300 seconds depending on heating method. Typical
not always suitable for surface mounted ICs, or for
reflow temperatures range from 215 to 250 °C.
printed-circuits with high population densities. In these
situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate
the binding agent. Preheat for 45 minutes at 45 °C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
WAVE SOLDERING
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering is not recommended for QFP packages.
DIP This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
SOLDERING BY DIPPING OR BY WAVE solder penetration in multi-lead devices.
The maximum permissible temperature of the solder is If wave soldering cannot be avoided, the following
260 °C; solder at this temperature must not be in contact conditions must be observed:
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed • A double-wave (a turbulent wave with high upward
5 seconds. pressure followed by a smooth laminar wave)
soldering technique should be used.
The device may be mounted up to the seating plane, but
• The footprint must be at an angle of 45° to the board
the temperature of the plastic body must not exceed the
direction and must incorporate solder thieves
specified maximum storage temperature (Tstg max). If the
downstream and at the side corners.
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the Even with these conditions, do not consider wave
temperature within the permissible limit. soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
REPAIRING SOLDERED JOINTS QFP100 (SOT382-1) or QFP160 (SOT322-1).

Apply a low voltage soldering iron (less than 24 V) to the During placement and before soldering, the package must
lead(s) of the package, below the seating plane or not be fixed with a droplet of adhesive. The adhesive can be
more than 2 mm above it. If the temperature of the applied by screen printing, pin transfer or syringe
soldering iron bit is less than 300 °C it may remain in dispensing. The package can be soldered after the
contact for up to 10 seconds. If the bit temperature is adhesive is cured. Maximum permissible solder
between 300 and 400 °C, contact may be up to 5 seconds. temperature is 260 °C, and maximum duration of package
immersion in solder is 10 seconds, if cooled to less than
QFP 150 °C within 6 seconds. Typical dwell time is 4 seconds
at 250 °C.
REFLOW SOLDERING
A mildly-activated flux will eliminate the need for removal
Reflow soldering techniques are suitable for all QFP of corrosive residues in most applications.
packages.
The choice of heating method may be influenced by larger REPAIRING SOLDERED JOINTS
plastic QFP packages (44 leads, or more). If infrared or Fix the component by first soldering two diagonally-
vapour phase heating is used and the large packages are opposite end leads. Use only a low voltage soldering iron
not absolutely dry (less than 0.1% moisture content by (less than 24 V) applied to the flat part of the lead. Contact
weight), vaporization of the small amount of moisture in time must be limited to 10 seconds at up to 300 °C. When
them can cause cracking of the plastic body. For more using a dedicated tool, all other leads can be soldered in
information, refer to the Drypack chapter in our “Quality one operation within 2 to 5 seconds between
Reference Handbook” (order code 9397 750 00192). 270 and 320 °C.

March 1992 31
Philips Semiconductors Product specification

Integrated VIP and teletext decoder

SAA5244A
(IVT1.1)

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I2C COMPONENTS

Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

March 1992 32