PTN78000W

www.ti.com SLTS230 – NOVEMBER 2004

1.5-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR

FEATURES APPLICATIONS
• 1.5-A Output Current • General-Purpose, Industrial Controls,
• Wide-Input Voltage HVAC Systems, Test and Measurement,
Medical Instrumentation, AC/DC Adaptors,
(7 V to 36 V)
Vehicles, Marine and Avionics
• Wide-Output Voltage Adjust
(2.5 V to 12.6 V)
• High Efficiency (Up to 95%)
• On/Off Inhibit
• Output Current Limit
• Overtemperature Shutdown
• Operating Temp: –40°C to 85°C
• Surface Mount Package

DESCRIPTION
The PTN78000W is a series of high-efficiency, step-down Integrated Switching Regulator (ISR), that represent
the third generation in the evolution of the popular 78ST100 series of products. In new designs it may be
considered in place of the 78ST100, PT78ST100, PT5100, and PT6100 series of single in-line pin (SIP)
products. The PTN78000 is smaller and lighter than its predecessors, and has either similar or improved
electrical performance characteristics. The case-less, double-sided package, also exhibits improved thermal
characteristics, and is compatible with TI's roadmap for RoHS and lead-free compliance.
Operating from a wide-input voltage range of 7 V to 36 V, the PTN78000 provides high-efficiency, step-down
voltage conversion for loads of up to 1.5 A. The output voltage is set using a single external resistor, and may be
set to any value within the range, 2.5 V to 12.6 V. The output voltage can be as little as 2 V lower than the input,
allowing operation down to 7 V, with an output voltage of 5 V.
The PTN78000 has an integral on/off inhibit, and is suited to a wide variety of general-purpose applications that
operate off 12-V, 24-V, or 28-V dc power.

STANDARD APPLICATION
VO
1 5

PTN78000W
VI
2 (Top View)

CI* 3 4 CO*
2.2
F 100
F
Ceramic Electrolytic
(Required) RSET# (Required)
Inhibit 0.05 W, 1%
(Required)

GND GND

*See The Application Information for Capacitor Recommendation.

#RSET is Required to Adjust the Output Voltage Higher Than 2.5 V.
See The Application Information for Values.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
PTN78000W
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SLTS230 – NOVEMBER 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION
PTN78000 (Basic Model)
Output Voltage Part Number Description Package Designator
PTN78000WAH Horizontal T/H EUS
2.5 V - 12.6 V
PTN78000WAS (1) Horizontal SMD EUT

(1) Add a T suffix for tape and reel option on SMD packages.

(1)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
all voltages with respect to GND (pin 2),
UNIT
TA Operating free-air temperature Over VI range –40°C to 85°C
Solder reflow temperature Surface temperature of module body or pins 235°C
Tstg Storage temperature –40°C to 125°C
VI Input surge voltage, 10 ms maximum 38 V
VINH Inhibit (pin 3) input voltage –0.3 V to 5 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
VI Input voltage 7 36 V
TA Operating free-air temperature –40 85 °C

PACKAGE SPECIFICATIONS
PTN78000x (Suffix AH and AS)
Weight 2 grams
Flammability Meets UL 94 V-O
Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, (1)
Mechanical shock 500 Gs
mounted
Horizontal T/H (suffix AH) 20 Gs (1)
Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz
Horizontal SMD (suffix AS) 15 Gs (1)

(1) Qualification limit.

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 PTN78000W
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SLTS230 – NOVEMBER 2004

ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 20 V, VO = 5 V, IO = IO (max), CI = 2.2 µF, CO = 100 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO Output current TA = 85°C, natural convection airflow 0 1.5 A
VI Input voltage range Over IO range 7 (1) 36 (2) V
Set-point voltage tolerance TA = 25°C ±2% (3)
Temperature variation –40°C to +85°C ±0.5%
Line regulation Over VI range ±10 mV
VO
Load regulation Over IO range ±10 mV
Includes set point, line, load
Total Output Voltage Variation ±3% (3)
–40 < TA < 85°C
VI < 12 V 2.5 VI – 2
12 V ≤ VI ≤ 15.1 V 2.5 VI – 2.5
VO (adj
Output Voltage Adjust Range V
)
15.1 V < VI ≤ 25 V 2.5 12.6
VI > 25 V 0.1 × VI 12.6
VI = 24 V, RSET = 732 Ω, VO = 12 V 91%
η Efficiency VI = 15 V, RSET = 21 kΩ, VO = 5 V 86%
VI = 15 V, RSET = 78.7 kΩ, VO = 3.3 V 82%
Output Voltage Ripple 20 MHz bandwith 1% VO V(PP)
IO (LIM) Current Limit Threshold ∆VO = –50 mV 3.2 A
1 A/µs load step from 50% to 100% IOmax
Transient response Recovery time 100 µs
VO over/undershoot 2.5 %VO
Input high voltage (VIH) 1 Open (4)
V
Inhibit control (pin 3) Input low voltage (VIL) –0.1 0.3
Input low current (IIL) –0.25 mA
II(stby) Input standby current Pin 3 connected to GND 17 mA
FS Switching frequency Over VI and IO ranges 440 550 660 kHz
CI External input capacitance 2.2 (5) µF
ceramic or non-ceramic 100 (6)

ceramic 200 µF
CO External output capacitance
non-ceramic 1,000
Equiv. series resistance (nonceramic) 10 (7) mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 8.9 106 Hrs
TA = 40°C, ground benign

(1) For output voltages less than 10 V, the minimum input voltage is 7 V or (VO + 2) V, whichever is greater. For output voltages of 10 V
and higher, the minimum input voltage is (VO + 2.5) V. Consult the Application Information for further guidance.
(2) For output voltages less than 3.6 V, the maximum input voltage is 10 × VO . Consult the Application Information for further guidance.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/°C or better temperature stability.
(4) This control pin has an internal pullup, and if left open circuit the module will operate when input power is applied. The open-circuit
voltage is typically 1.5 V. A small low-leakage (< 100 nA) MOSFET is recommended for control. Refer to the application information for
further guidance.
(5) An external 2.2-µF ceramic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the
module.
(6) 100 µF of output capacitance is required for proper operation. Refer to the application information for further guidance.
(7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using maximum ESR values
to calculate.

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PIN ASSIGNMENT

TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
This is the common ground connection for the VI and VO power connections. It is also the 0 VDC
GND 1
reference for the Inhibit and VO Adjust control inputs.
VI 2 I The positive input voltage power node to the module, which is referenced to common GND.
The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-level
ground signal to this input disables the module's output and turns off the output voltage. When the
Inhibit 3 I
Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin
is left open-circuit, the module will produce an output whenever a valid input source is applied.
A 1% resistor must be connected between this pin and GND (pin 1) to set the output voltage of the
module higher than 2.5 V. If left open-circuit, the output voltage will default to this value. The
VO Adjust 4 I temperature stability of the resistor should be 100 ppm/°C (or better). The set-point range is 2.5 V to
12.6 V. The standard resistor value for a number of common output voltages is provided in the
application information.
VO 5 O The regulated positive power output with respect to the GND node.

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SLTS230 – NOVEMBER 2004

TYPICAL CHARACTERISTICS (7-V INPUT) (1) (2)

EFFICIENCY OUTPUT VOLTAGE RIPPLE

vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 50
VO = 5 V VO = 3.3 V

V O − Output Voltage Ripple − mV PP

90 40
Efficiency − %

80 30
VO = 2.5 V
VO = 3.3 V
VO = 2.5 V
70 20

60 10
VO = 5 V

50 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A

Figure 1. Figure 2.

POWER DISSIPATION TEMPERATURE DERATING

vs vs
OUTPUT CURRENT OUTPUT CURRENT; VO≤ 5 V
1 90

80
PD − Power Dissipation − W

60 LFM
Temperature Derating −
C
0.8 Airflow:
70 Nat conv

VO = 2.5 V
0.6 60

50
0.4
VO = 5 V
40

0.2 VO = 3.3 V
30

0 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5

IO − Output Current − A IO − Output Current − A

Figure 3. Figure 4.

(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
Applies to Figure 4.

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PTN78000W
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SLTS230 – NOVEMBER 2004

TYPICAL CHARACTERISTICS (15-V INPUT) (3) (4)

EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION

vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
100 100 1.5
VO = 12 V

V O − Output Voltage Ripple − mV PP

VO = 9 V

PD − Power Dissipation − W
90 80 1.2 VO = 5 V
VO = 9 V
Efficiency − %

80 60 0.9
VO = 9 V
VO = 12 V
VO = 5 V
VO = 5 V 40
70 0.6
VO = 3.3 V
VO = 2.5 V
VO = 3.3 V
60 20 0.3
VO = 2.5 V
VO = 3.3 V VO = 2.5 V VO = 12 V
50 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A

Figure 5. Figure 6. Figure 7.

TEMPERATURE DERATING TEMPERATURE DERATING

vs vs
OUTPUT CURRENT; VO≤ 5 v OUTPUT CURRENT; VO =12 V
90 200 LFM 90

80 80
60 LFM Airflow:
Temperature Derating −
C

Nat conv
Temperature Derating −
C

70 120 LFM 70 Nat conv

60 60

50 50

40 40

30 30

20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A

Figure 8. Figure 9.

(3) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 5, Figure 6, and Figure 7.
(4) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.
Applies to Figure 8 and Figure 9.

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SLTS230 – NOVEMBER 2004

TYPICAL CHARACTERISTICS (24-V INPUT) (5) (6)

EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION

vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
100 100 2
VO = 12 V

V O − Output Voltage Ripple − mV PP

VO = 12 V VO = 12 V
VO = 9 V VO = 9 V
VO = 9 V

PD − Power Dissipation − W
90 VO = 5 V 80 1.6
Efficiency − %

VO = 5 V
80 60 1.2
VO = 5 V

70 40 VO = 3.3 V 0.8
VO = 3.3 V VO = 2.5 V
VO = 3.3 V
60 20 0.4
VO = 2.5 V
VO = 2.5 V
50 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A

Figure 10. Figure 11. Figure 12.

TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING;

vs vs vs
OUTPUT CURRENT; VO =3.3 V OUTPUT CURRENT; VO =5 V OUTPUT CURRENT VO =12 V
90 90 90
200 LFM 200 LFM
200 LFM
80 80 80
Nat conv Nat conv Nat conv

Temperature Derating −
C
Temperature Derating −
C
Temperature Derating −
C

60 LFM 70 60 LFM 70
70 60 LFM
120 LFM 120 LFM
120 LFM
60 60 60

50 50 50

40 40 40

30 30 30

20 20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A

Figure 13. Figure 14. Figure 15.

(5) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 10, Figure 11, and Figure 12.
(6) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.
Applies to Figure 13, Figure 14, and Figure 15.

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SLTS230 – NOVEMBER 2004

TYPICAL CHARACTERISTICS (32-V INPUT) (7) (8)

EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION

vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
100 150 2.5
VO = 12 V

V O − Output Voltage Ripple − mV PP

VO = 12 V VO = 12 V
90 VO = 9 V 120 2 VO = 9 V

PD − Power Dissipation − W
VO = 5 V VO = 9 V
Efficiency − %

VO = 5 V
80 90 1.5

70 60 1
VO = 5 V VO = 3.3 V VO = 3.3 V

60 VO = 3.3 V 30 0.5

50 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A

Figure 16. Figure 17. Figure 18.

TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING

vs vs vs
OUTPUT CURRENT; VO = 3.3 V OUTPUT CURRENT; VO = 5 V OUTPUT CURRENT; VO = 12 V
90 90 90
200 LFM 60 LFM 200 LFM
200 LFM
80 80 120 LFM 80 120 LFM
Temperature Derating −
C

Temperature Derating −
C
Temperature Derating −
C

70 120 LFM 70
70
Nat conv Nat conv
60 Nat conv 60 LFM 60 LFM
60 60

50 50 50

40 40 40

30 30 30

20 20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A

Figure 19. Figure 20. Figure 21.

(7) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 16, Figure 17, and Figure 18.
(8) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.
Applies to Figure 19, Figure 20, and Figure 21.

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APPLICATION INFORMATION

Adjusting the Output Voltage of the PTN78000W Wide-Output Adjust Power Modules

General
A resistor must be connected between the VO Adjust control (pin 4) and GND (pin 1) to set the output voltage
higher than 2.5 V. The adjustment range is from 2.5 V to 12.6 V. If pin 4 is left open, the output voltage will
default to the lowest value, 2.5 V.
Table 1 gives the preferred value of the external resistor for several standard voltages, with the actual output
voltage that the value provides. For other output voltages, the value of the required resistor can either be
calculated using the following formula, or simply selected from the range of values given in Table 2. Figure 22
shows the placement of the required resistor.

R SET  54.9 k

1.25 V  6.49 k

V O  2.5 V

Input Voltage Considerations

The PTN78000 is a step-down switching regulator. In order that the output remains in regulation, the input
voltage must exceed the output by a minimum differential voltage.
Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For
stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the
maximum advisable ratio between the regulator's input and output voltage magnitudes.
For satisfactory performance, the operating input voltage range of the PTN78000 must adhere to the following
requirements.
1. For output voltages lower than 10 V, the minimum input voltage is (VO+ 2 V ) or 7 V, whichever is higher.
2. For output voltages equal to 10 V and higher, the minimum input voltage is (VO+ 2.5 V ) .
3. The maximum input voltage is (10 × VO ) or 36 V, whichever is less.

As an example, Table 1 gives the operating input voltage range for the common output bus voltages. In addition,
the Electrical Characteristics define the available output voltage adjust range for various input voltages.

Table 1. Standard Values of Rset for Common Output

Voltages
VO RSET VO Operating
(Required) (Standard Value) (Actual) VI Range
2.5 V Open 2.5 V 7 V to 25 V
3.3 V 78.7 kΩ 3.306 V 7 V to 33 V
5V 21 kΩ 4.996 V 7 V to 36 V
12 V 732 Ω 12.002 V 14.5 V to 36 V

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VI PTN78000 VO
2 5
VIN VO

Inh GND Adj

3 1 4

CI RSET CO
2.2-
F 100-
F
0.05 W
(Ceramic) (Required)
1%
Inhibit

GND GND

(1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 1
using dedicated PCB traces.
(2) Never connect capacitors from VO Adjust to either GND or Vout. Any capacitance added to the VO Adjust pin will affect
the stability of the regulator.

Figure 22. VO Adjust Resistor Placement

Table 2. Output Voltage Set-Point Resistor Values

Va Rset Va Rset Va Rset Va Rset
Req'd Req'd Req'd Req'd
2.50 V Open 3.7 V 50.7 kΩ 6.1 V 12.6 kΩ 9.0 V 4.07 kΩ
2.55 V 1.37 MΩ 3.8 V 46.3 kΩ 6.2 V 12.1 kΩ 9.2 V 3.75 kΩ
2.60 V 680 kΩ 3.9 V 42.5 kΩ 6.3 V 11.6 kΩ 9.4 V 3.46 kΩ
2.65 V 451 kΩ 4.0 V 39.3 kΩ 6.4 V 11.1 kΩ 9.6 V 3.18 kΩ
2.70 V 337 kΩ 4.1 V 36.4 kΩ 6.5 V 10.7 kΩ 9.8 V 2.91 kΩ
2.75 V 268 kΩ 4.2 V 33.9 kΩ 6.6 V 10.2 kΩ 10.0 V 2.66 kΩ
2.80 V 222 kΩ 4.3 V 31.6 kΩ 6.7 V 9.85 kΩ 10.2 V 2.42 kΩ
2.85 V 190 kΩ 4.4 V 29.6 kΩ 6.8 V 9.47 kΩ 10.4 V 2.20 kΩ
2.90 V 165 kΩ 4.5 V 27.8 kΩ 6.9 V 9.11 kΩ 10.6 V 1.98 kΩ
2.95 V 146 kΩ 4.6 V 26.2 kΩ 7.0 V 8.76 kΩ 10.8 V 1.78 kΩ
3.00 V 131 kΩ 4.7 V 24.7 kΩ 7.1 V 8.43 kΩ 11.0 V 1.58 kΩ
3.05 V 118 kΩ 4.8 V 23.3 kΩ 7.2 V 8.11 kΩ 11.2 V 1.40 kΩ
3.10 V 108 kΩ 4.9 V 22.1 kΩ 7.3 V 7.81 kΩ 11.4 V 1.22 kΩ
3.15 V 99.1 kΩ 5.0 V 21.0 kΩ 7.4 V 7.52 kΩ 11.6 V 1.05 kΩ
3.20 V 91.5 kΩ 5.1 V 19.9 kΩ 7.5 V 7.24 kΩ 11.8 V 889 Ω
3.25 V 85.0 kΩ 5.2 V 18.9 kΩ 7.6 V 6.97 kΩ 12.0 V 734 Ω
3.30 V 79.3 kΩ 5.3 V 18.0 kΩ 7.7 V 6.71 kΩ 12.2 V 585 Ω
3.35 V 74.2 kΩ 5.4 V 17.2 kΩ 7.8 V 6.46 kΩ 12.4 V 442 Ω
3.40 V 69.8 kΩ 5.5 V 16.4 kΩ 7.9 V 6.22 kΩ 12.6 V 305 Ω
3.45 V 65.7 kΩ 5.6 V 15.6 kΩ 8.0 V 5.99 kΩ
3.50 V 62.1 kΩ 5.7 V 15.0 kΩ 8.2 V 5.55 kΩ
3.55 V 58.9 kΩ 5.8 V 14.3 kΩ 8.4 V 5.14 kΩ
3.60 V 55.9 kΩ 5.9 V 13.7 kΩ 8.6 V 4.76 kΩ
3.65 V 53.2 kΩ 6.0 V 13.1 kΩ 8.8 V 4.40 kΩ

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CAPACITOR RECOMMENDATIONS for the PTN78000 WIDE-OUTPUT

ADJUST POWER MODULES

Input Capacitor
The minimum requirements for the input is 2.2 µF of ceramic capacitance, in either an X5R or X7R temperature
characteristic. Ceramic capacitors should be located within 0.5 in. (1,27 cm) of the regulator's input pins.
Electrolytic capacitors can be used at the input, but only in addition to the required ceramic capacitance. The
minimum ripple current rating for any nonceramic capacitance must be at least 400 mA rms for VO≤5.5, For VO
>5.5V, the minimum ripple current rating is 650 mA rms. The ripple current rating of electrolytic capacitors is a
major consideration when they are used at the input. This ripple current requirement can be reduced by placing
more ceramic capacitors at the input, in addition to the minimum required 2.2 µF.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum
voltage rating of 2 × (maximum dc voltage + ac ripple). The 2× rating is standard practice for regular tantalum
capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximum
rating of typically 20 V. These can be used with input voltages up to 16 V.

Output Capacitor
The minimum capacitance required to insure stability is a 100 µF. Either ceramic or electrolytic-type capacitors
can be used. The minimum ripple current rating for the nonceramic capacitance must be at least 150 mA rms.
The stability of the module and voltage tolerances will be compromised if the capacitor is not placed near the
output bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A ceramic capacitor
can be also be located within 0.5 in. (1,27 cm) of the output pin.
For applications with load transients (sudden changes in load current), the regulator response improves with
additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These
capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are
suitable for ambient temperatures above 0°C. For operation below 0°C, tantalum or Os-Con type capacitors are
recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no
lower than 10 mΩ (17 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of capacitors
and vendors are identified in Table 3, the recommended capacitor table.

Ceramic Capacitors
Above 150 kHz the performance of aluminum electrolytic capacitors becomes less effective. To further reduce
the reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added.
Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator.
When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed 200 µF. Also, to prevent the formation of local resonances, do not place more than three
identical ceramic capacitors with values of 10 µF or greater in parallel.

Tantalum Capacitors
Tantalum type capacitors may be used at the output, and are recommended for applications where the ambient
operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595 and Kemet T495/T510/T520
capacitors series are suggested over many other tantalum types due to their rated surge, power dissipation, and
ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR,
reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable as they
have lower power dissipation and surge current ratings. Tantalum capacitors that do not have a stated ESR or
surge current rating are not recommended for power applications. When specifying Os-Con and polymer
tantalum capacitors for the output, the minimum ESR limit is encountered well before the maximum capacitance
value is reached.

Capacitor Table
The capacitor table, Table 3, identifies the characteristics of capacitors from various vendors with acceptable
ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and
output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other
vendors are available with comparable specifications. Those listed are for guidance. The rms rating and ESR (at
100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life.

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Designing for Load Transients

The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the
capacitors selected.
If the transient performance requirements exceed those specified in the data sheet, the selection of output
capacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on the
capacitance maximum.

Table 3. Recommended Input/Output Capacitors

CAPACITOR CHARACTERISTICS QUANTITY

CAPACITOR VENDOR/ 85°C

EQUIVALENT VENDOR
COMPONENT WORKING MAXIMUM PHYSICAL
VALUE SERIES INPUT OUTPUT NUMBER
SERIES VOLTAGE RIPPLE SIZE
(µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)
(Irms) (mA)
Panasonic WA (SMD) 16 100 0.039 2500 8 × 6,9 1 (1) ≤3 EEFWA1C101P (VI < 14 V)
FC( Radial) 50 180 0.119 850 10 × 16 1 1 EEUFC1H181
FC (SMD) 3 100 0.015 670 10 × 10,2 1 (1) 1 EEVFC1V101P
United Chemi-Con PXA (SMD) 16 180 0.016 4360 8 × 12 1 (1) ≤1 PXA16VC180MF60
FS 20 150 0.024 3200 8 × 10,5 1 (1) ≤2 10FS100M (VI < 16 V)
LXZ 50 120 0.160 620 x 2 10 × 12,5 2 1 LXZ50VB121M10X12LL
MVY50VC101M10X10TP
MVY(SMD) 50 100 0.300 500 10 × 10 1 1
(VO≤ 5.5 V)
Nichicon UWG (SMD) 50 100 0.300 500 10 × 10 1 1 UWG1H101MNR1GS
F559 (Tantalum) 10 100 0.055 2000 7.7 × 4,3 N/R (1) ≤ 3 (2) F551A107MN (VO≤ 5 V)
HD 50 100 0.074 724 8 × 11,5 1 1 UHD1H101MPR
Sanyo Os-Con SVP (SMD) 20 100 0.024 2500 8 × 12 1 (1) ≤2 20SVP100M (VI≤ 16 V)
SP 16 100 0.032 2890 10 × 5 1 (1) ≤2 16SP100M (VI≤ 14 V)
7,3 L × 4,3 TPSV107M020R0085
20 100 0.085 1543 N/R (3) ≤3
AVX Tantalum TPS (SMD) W × 4,1 H (VO≤ 10 V)
20 100 0.200 > 817 N/R (3) ≤3 TPSE107M020R0200
GRM32ER60J107M
Murata X5R Ceramic 6.3 100 0.002 >1000 1210 N/R (1) ≤2
(VO≤ 5.5 V)
C3225X5R0J107MT
TDK X5R Ceramic 6.3 100 0.002 >1000 3225 N/R (1) ≤2
(VO≤ 5.5 V)
GRM32ER61C476M
Murata X5R Ceramic 16 47 0.002 >1000 1210 1 (1) ≤4
(Vo ~ VI≤ 13.5 V)
C1210C476K9PAC
Kemet X5R Ceramic 6.3 47 0.002 >1000 1210 N/R (1) ≤4
(VO≤ 5.5 V)
C3225X5R0J476MT
TDK X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (1) ≤4
(VO≤ 5.5 V)
GRM422X5R476M6.3
Murata X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (1) ≤4
(VO≤ 5.5 V)
C3225X7R0J225KT/MT
TDK X7R Ceramic 25 2.2 0.002 >1000 SMD ≥1 (4) 1
(VO≤ 20 V)
GRM32RR71J225K
Murata X7R Ceramic 25 2.2 0.002 >1000 1210 case ≥1 (4) 1
(VO≤ 20 V)

(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
(2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (VO ). To operate at a higher output
voltage, select a capacitor with a higher voltage rating.
(3) Not reccomended (N/R). The voltage rating does not meet the minimum operating limits in most applications.
(4) The maximum rating of the ceramic capacitor limits the regulator's operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.

12
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SLTS230 – NOVEMBER 2004

Table 3. Recommended Input/Output Capacitors (continued)

CAPACITOR CHARACTERISTICS QUANTITY

CAPACITOR VENDOR/ 85°C

EQUIVALENT VENDOR
COMPONENT WORKING MAXIMUM PHYSICAL
VALUE SERIES INPUT OUTPUT NUMBER
SERIES VOLTAGE RIPPLE SIZE
(µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)
(Irms) (mA)
C1210C225K3RAC
Kemet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1 (4) 1
(VO≤ 20 V)
12103C225KAT2A
AVX X7R Ceramic 25 2.2 0.002 >1000 ≥1 (4) 1
(VO≤ 20 V)
Kemet X7R Ceramic 50 1 0.002 >1000 SMD ≥2 (5) 1 C1210C105K5RAC
Murata X7R Ceramic 50 4.7 0.002 >1000 ≥1 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 2.2 0.002 >1000 ≥1 1 C3225X7R1H225KT
Murata X7R Ceramic 50 1 0.002 >1000 1210 case ≥2 (5) 1 GRM32RR71H105KA01L
TDK X7R Ceramic 50 1 0.002 >1000 3225 ≥2 (5) 1 C3225X7R1H105KT
5,08 × 7,62 ×
Kemet Radial Through-hole 50 1 0.002 >1000 ≥2 (5) 1 C330C105K5R5CA
9,14 H
10 H × 10 W
Murata Radial Through-hole 50 2.2 0.004 >1000 1 1 RPER71H2R2KK6F03
×4D

(5) A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor

13
PTN78000W
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SLTS230 – NOVEMBER 2004

Power-Up Characteristics
When configured per the standard application, the PTN78000 power module produces a regulated output voltage
following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the
rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input
source. The soft-start circuitry introduces a short time delay (typically 5–10 ms) into the power-up characteristic.
This is from the point that a valid input source is recognized. Figure 23 shows the power-up waveforms for a
PTN78000W, operating from a 12-V input and with the output voltage adjusted to 5 V. The waveforms were
measured with a 1.5-A resistive load.

VI (5 V/div)

VO (2 V/div)

II (0.5 A/div)

t − 5 ms/div

Figure 23. Power-Up Waveforms

Current Limit Protection

The PTN78000 modules protect against load faults with a continuous current limit characteristic. Under a load
fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds
the current limit value causes the module to progressively reduce its output voltage. Current is continuously
supplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. When
limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the
temperature increase is excessive, the module's overtemperature protection begins to periodically turn the output
voltage completely off.

Overtemperature Protection
A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A
rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current-limit
condition. If the junction temperature of the internal control IC rises excessively, the module turns itself off,
reducing the output voltage to zero. The module instantly restarts when the sensed temperature decreases by a
few degrees.

NOTE:
Overtemperature protection is a last resort mechanism to prevent damage to the
module. It should not be relied on as permanent protection against thermal stress.
Always operate the module within its temperature derated limits, for the worst-case
operating conditions of output current, ambient temperature, and airflow. Operating
the module above these limits, albeit below the thermal shutdown temperature,
reduces the long-term reliability of the module.

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Output On/Off Inhibit

For applications requiring output voltage on/off control, the PTN78000 power module incorporates an output
on/off Inhibit control (pin 3). The inhibit feature can be used wherever there is a requirement for the output
voltage from the regulator to be turned off.
The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND. Figure 24 shows the the circuit used to
demonstrate the inhibit function. Note the discrete transistor (Q1). Turning Q1 on applies a low voltage to the
Inhibit control pin and turns the module off. The output voltage decays as the load circuit discharges the
capacitance. The current drawn at the input is reduced to typically 17 mA. If Q1 is then turned off, the module
executes a soft-start power up. A regulated output voltage is produced within 20 msec. Figure 25 shows the
typical rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the fall in the
waveform, Q1 Vgs. The waveforms were measured with a 1.5-A resistive load.

PTN78000W
VI = 12 V 2 5 VO = 5 V
VI VO

Inh GND Adj

3 1 4

CI
2.2 F RSET CO L
Ceramic 21 k
100 F O
0.05 W A
1% D
Q1
Inhibit BSS138

GND GND

Figure 24. On/Off Inhibit Control Circuit

VO (2 V/div)

II (0.5 A/div)

Q1 VGS (10 V/div)

t − 5 ms/div

Figure 25. Power Up Response From Inhibit Control

15
PTN78000W
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SLTS230 – NOVEMBER 2004

Optional Input/Output Filters

Power modules include internal input and output ceramic capacitors in all their designs. However, some
applications require much lower levels of either input reflected or output ripple/noise. This application describes
various filters and design techniques found to be successful in reducing both input and output ripple/noise.

Input/Output Capacitors
The easiest way to reduce output ripple and noise is to add one or more 1-µF ceramic capacitors, such as C4
shown in Figure 26. Ceramic capacitors should be placed close to the output power terminals. A single 1-µF
capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A.
(Note: C3 is recommended to improve the regulators transient response and does not reduce output ripple and
noise.)
Switching regulators draw current from the input line in pulses at their operating frequency. The amount of
reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power
source including the impedance of any input lines. The addition of C2, minimum 1-µF ceramic capacitor, near the
input power pins, reduces reflected conducted ripple/noise by 30% to 50%.

PTN78000
VI 2 5 VO
VI VO

Inh GND Adj

3 1 4
C1 C2* C3# C4
1
F 2.2
F 1
F
100
F
50 V 50 V RSET Ceramic
Ceramic Ceramic (Required)
(Required)

GND GND

* See specifications for required value and type

# See Application Information for suggested value and type

Figure 26. Adding High-Frequency Bypass Capacitors To The Input and Output

π Filters
If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π (pi)
filter, employing a ferrite bead (Fair-Rite Pt. No. 2673000701 or equivalent) in series with the input or output
terminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 27 and Figure 28). In order for
the inductor to be effective in reduction of ripple and noise ceramic capacitors are required. (Note: see Capacitor
Recommendations for the PTN78000W for addtional information on vendors and component suggestions.)
These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching
frequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to the
input or output pins to be efffective. The ferrite bead is small (12,5 mm × 3 mm), easy to use, low cost, and has
low dc resistance. Fair-Rite also manufactures a surface-mount bead (Pt. No. 2773021447), through hole (Pt.
No. 2673000701) rated to 5 A, but in this application, it is effective to 5 A on the output bus. Inductors in the
range of 1 µH to 5 µH can be used in place of the ferrite inductor bead.

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 PTN78000W
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SLTS230 – NOVEMBER 2004

L1 L2
1 − 5
H PTN78000 1 − 5
H
VI 2 5 VO
VI VO

Inh GND Adj

3 1 4
C2*
C1 2.2
F C3# C4 †
1
F 50 V 100
F 1
F C5
50 V RSET (Required) Ceramic
Ceramic
Ceramic
(Required)

GND GND

* See specifications for required value and type.

# See the Application Information for suggested value and type.
† Recommended whenever IO is greater than 2 A.

Figure 27. Adding π Filters (IO≤ 3 A)

45

40

35
Attenuation − dB

1 MHz
30

25

20 600 kHz

15

10
0 0.5 1 1.5 2 2.5 3
Load Current − A

Figure 28. π-Filter Attenuation vs. Load Current

17
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