The first microprocessor
A. Intel 4004
B. Intel 8080
C. Intel 8008
D. None of the above
ANSWER: A
2.The Characteristics of embedded computing applications
(a)sophisticated functionality
(b)Real time
(c)Manufacturing cost
(d)All of the above
3.Which one is not a nonfunctional requirements
(a)Performance
(b)Cost
(c)output
(d)Power consumption
4.DCC Standard S-9.1 is
(a)conceptual specification
(b)DCC base line pocket
(c)DCC Communication Standard
(d)DCC Electrical Standard
5. The waterfall development model consists of how many major phases
(a)1
(b)2
(c)4
(d)5
6.In embeded system design methodology which model produce several versions of the
system
(a)Waterfall
(b)Spiral
(c)successive refinement
(d) hierarchical
7.The two basic groupings of state charts
(a)OR-AND
(b)OR-NOR
(c)AND-NAND
(d)OR-XOR
8.The acronym CRC stands
(a)Classes Responsibilities Collaborators
(b)Collaborators Responsibilities Classes
(c)Classes Requirements Collaborators
(d)Collaborators Requirements Classes
9.The CMM provides a model for
(a)standard methods
(b)product quality
(c)well-defined processes
(d)judging an organization
Unit II
1. ARM stands for _____________ .
a) Advanced Rate Machines
b) Advanced RISC Machines
c) Artificial Running Machines
d) Aviary Running Machines
2. The main importance of ARM micro-processors is providing operation with,
a) Low cost and low power consumption
b) Higher degree of multi-tasking
c) Lower error or glitches
d) Efficient memory management
3. The ARM processors doesn�t support Byte address ability ?
a) True
b) False
4.The address space in ARM is ______ .
a) 2^24
b) 2^64
c) 2^16
d) 2^32
5.6. The address system supported by ARM systems is/are ______ .
a) Little Endian
b) Big Endian
c) X-Little Endian
d) Both a and b
6.1)LPC2148 is having______Ports.
a)2
b)3
c)4
d)5
7.Always,____ file of program is downloaded in Microcontroller.
a)C file
b)Asembly file
c)Object File
d)Hex file
8.In ARM processor data items are placed in ____ file.
a)Register
b) I/O
c) memory
d) all
9.____ are used to stop specific interrupt.
a) Interrupt mask
b) Interrupt request
c) both
d) none
UNIT III
1.Which one is well suited to reactive systems
a)State machine
b)Circular buffer
c)queue
2.Which one is often referred to as an elastic buffer
a)State machine
b)Circular buffer
c)queue
3.As the name implies, the CDFG has constructs that model both data operations
(arithmetic and other
computations) and control operations (conditionals)?
a) True
b) False
4.How many nodes used in dataflowgraphs?
a)2
b)3
c)4
d)5
5.Bit-level representations of instructions known as
a)object code
b)executable binary file
c)absolute addresses
d)relative addresses
6. During scanning, the current location in memory is kept in a
a)symbol table
b)program location counter
c)Cache memory
7.The pointer which defines the end of the current frame
a)stack pointer
b)frame pointer
c)address pointer
d)memory pointer
8. In complier optimization which one combines two or more loops into a single loop
a)loop unrolling
b)Loop tiling
c)Loop distribution
d)Loop fusion
9.This is the typical execution time we would expect for typical data.
a)worst-case execution time
b)average-case execution time
c)best-case execution time
10. In Loop optimizations, the method helps us reduce the cost of a loop iteration
a)induction variable elimination,
b)Strength reduction
c)code motion
11.The methods generate tests without looking at the internal structure of the
program.
a)Blockbox test
b)Clearbox test
12. Which one allows us to measure the control complexity of a program in clearbox
testing.
a)cyclomatic complexity
b)incidence matrix
c)basis paths
Unit IV
1.an electronic component with an electrical resistance that varies with the
applied voltage.
a)Resistor
b)Varistor
C)voltage-dependent resistor
d)Both c and b
2.A digital-to-analog converter is a system that converts a
a)digital signal into an analog signal.
b)digital data and transforms it into an analog audio signal
c)signals having a few defined levels or states are converted into signals having
a theoretically infinite number of states.
d)all of the above
3.------is a common metric to analyze memory system performance.
a)Memory access time
b)Disk access time
c)Memory cycle time
d)None of the above
4.-----is the general concept of building a model that is capable of making
predictions.
a)Predictive modeling
b)predictive analytics
c)Both a and b.
5.The precedence constraint uses a ----
a)constraint value
b)an expression
c)both a and b
d)all of the above
6.----- is the time length between the arrival time and the absolute deadline.
a)Relative deadline
b)Absolute deadline
c)hard realtime deadline
d)soft realtime deadline
7.any new process has to wait until the running process finishes its CPU cycle.
a)Non-Preemptive Scheduling
b)Preemptive Scheduling
c)Scheduling
d)all of the above
8.---------is a CPU scheduling technique that works by dividing time slots of CPU
to a given process.
a)Non-Preemptive Scheduling
b)Preemptive Scheduling
c)Scheduling
d)all of the above
9.---- is the process of storing and restoring the state of a process.
a)A context switch
b) mode swith
c)swapping
d)interupt
10.-----is a failure or flaw in a program that produces undesired or incorrect
results.
a)Error
b)Bug
c)Execution error
d)all of the above
11.---is a maintenance metric that measures the average amount of time a non-
repairable asset operates before it fails.
a)Mean time to failure
b)Failure
c)Time to failure
d)all of the above
12.---- is the frequency with which an engineered system or component fails.
a)Failure rate
b)hazard rate
c)failure probability
d)relaiability
13.---- is a testing technique which aids in understanding how [virtual/real]
system behaves when stressed in unusual ways.
a)Fault injection
b)Mutation testing
c)error guessing
d)fuzz testing
Unit V
1.Which of the following works by dividing the processor�s time?
a) single task operating system
b) multitask operating system
c) kernel
d) applications
2.Which of the following provides a time period for the context switch?
a) timer
b) counter
c) time slice
d) time machine
3.Which of the following contains all the task and their status?
a) register
b) ready list
c) access list
d) task list
4.Which of the following can carry information and control task?
a) semaphore
b) messages
c) flags
d) address message
5.What is the ready state of a process?
a) when process is scheduled to run after some execution
b) when process is unable to run until some task has been completed
c) when process is using the CPU
d) none of the mentioned
6.What is interprocess communication?
a) communication within the process
b) communication between two process
c) communication between two threads of same process
d) none of the mentioned
7.The address of the next instruction to be executed by the current process is
provided by the __________
a) CPU registers
b) Program counter
c) Process stack
d) Pipe
8.------defines how processes are selected for promotion from the ready state to
the running state.
a)scheduling policy
b) scheduling overhead
c) scheduling time
d)All of the above
9.The priority of a real time task :
a.must degrade over time
b.must not degrade over time
c.may degrade over time
d.none of the mentioned
10.Earliest deadline first algorithm assigns priorities according to :
a.periods
b.deadlines
c.burst times
d.none of the mentioned
11.A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of
80 and a CPU burst of 35. The total CPU utilization is :
a.0.90
b.0.74
c.0.94
d.0.80
12.The ____________ scheduling algorithm schedules periodic tasks using a static
priority policy with preemption.
a.earliest deadline first
b.rate monotonic
c.first cum first served
d.priority
13.Rate monotonic scheduling assumes that the :
a.processing time of a periodic process is same for each CPU burst
b.processing time of a periodic process is different for each CPU burst
c.periods of all processes is the same
d.none of the mentioned
14.In rate monotonic scheduling, a process with a shorter period is assigned :
a.a higher priority
b.a lower priority
c.higher & lower priority
d.none of the mentioned
15.There are two processes P1 and P2, whose periods are 50 and 100 respectively. P1
is assigned higher priority than P2. The processing times are t1 = 20 for P1 and t2
= 35 for P2. Is it possible to schedule these tasks so that each meets its deadline
using Rate monotonic scheduling ?
a.yes
b.no
c.maybe
d.none of the mentioned
