1-2-1 2-Phase Stepper Motor Unipolar Driver ICs

SLA7070MR, MPR, MPRT/7071MR, MPR, MPRT/7072MR, MPR, MPRT/7073MR, MPR, MPRT 2-Phase/1-2 Phase Excitation Support, Built-in Sequencer

■Features ■Absolute Maximum Ratings

• Lineup of built-in current sense resistor and Parameter Symbol Ratings Unit Remarks
built-in protection circuit-type Motor Supply Voltage VM 46 V
• Power supply voltages, VBB: 46 V (max), 10 to Driver Supply Voltage VBB 46 V
44 V normal operating range Logic Supply Voltage VDD 6 V
• Logic supply voltages, VDD: 3.0 to 5.5 V Output Current Io *1 A Mode F
• Maximum output currents: 1 A, 1.5 A, 2 A, and Logic Input Voltage VIN –0.3 to VDD+0.3 V
3A REF Input Voltage VREF –0.3 to VDD+0.3 V
• Built-in sequencer Sense Voltage VRS ±2 V Excluding tw<1µs
• Self-excitation PWM current control with fixed Power Dissipation 4.7 When Ta = 25°C
PD W
off-time 17 When Tc = 25°C
• Synchronous PWM chopping function Junction Temperature Tj +150 °C
prevents motor noise in Hold mode Operating Ambient Temperature Ta –20 to +85 °C
• Sleep mode for reducing the IC input current Storage Temperature Tstg –30 to +150 °C
in stand-by state *1: Output current value may be limited for the SLA7070MR, MPR, MPRT (1.0 A), SLA7071MR, MPR, MPRT (1.5 A),
• ZIP type 23-pin molded package (SLA SLA7072MR, MPR, MPRT (2.0 A), and SA7073MR, MPR, MPRT (3.0 A), depending on the duty ratio, ambient
package) temperature, and heating conditions.
Be sure that junction temperature of Tj is not exceeded under any circumstances.

■Recommended Operating Conditions

Rating
Parameter Symbol Unit Remarks
min. max.
Motor Supply Voltage VM 44 V
Driver Supply Voltage VBB 10 44 V
Logic Supply Voltage VDD 3.0 5.5 V The VDD surge voltage should be 0.5 V or lower
Case Temperature TC 90 °C Temperature at Pin-12 Lead (without heatsink)

■Electrical Characteristics
Ratings
Parameter Symbol Unit Conditions
min. typ. max.
IBB 15 mA In operation
Main Supply Current
IBBS 100 µA Sleep 1 and Sleep 2 modes
Logic Supply Current IDD 5 mA
Output MOSFET Breakdown Voltage V(BR)DSS 100 V VBB=44V, ID=1mA
0.7 0.85 SLA7070M, ID=1.0A
0.45 0.6 SLA7071M, ID=1.5A
Output MOSFET ON Resistance RDS(ON) Ω
0.25 0.4 SLA7072M, ID=2.0A
0.18 0.24 SLA7073M, ID=3.0A
0.85 1.1 SLA7070M, ID=1.0A
1.0 1.25 SLA7071M, ID=1.5A
Output MOSFET Diode Forward Voltage VF V
0.95 1.2 SLA7072M, ID=2.0A
0.95 2.1 SLA7073M, ID=3.0A
Maximum Clock Frequency Fclock 250 kHz When Clock Duty = 50%
VIL 0.25VDD
Logic Input Voltage V
VIH 0.75VDD
IIL ±1
Logic Input Current µA
IIH ±1
0.04 0.3 SLA7070M, within the current setting range
0.04 0.45 SLA7071M, within the current setting range
VREF
REF Input Voltage 0.04 0.4 V SLA7072M, within the current setting range
0.04 0.45 SLA7073M, within the current setting range
VREFS 2 VDD Output OFF (Sleep 1)
REF Input Current IREF ±10 µA
Sense Voltage VSENSE VREF V When step reference current ratio is 100%
Sleep-Enable Recovery Time TSE 100 µS Sleep1&Sleep2
tcon 2.0 µS Clock → Out ON
Switching Time
tcoff 1.5 µS Clock → Out OFF
0.296 0.305 0.314 SLA7070M, tolerance of ±3%
0.296 0.305 0.314 SLA7071M, tolerance of ±3%
Sense Resistance RS Ω
0.199 0.205 0.211 SLA7072M, tolerance of ±3%
0.150 0.155 0.160 SLA7073M, tolerance of ±3%
Overcurrent Sense Voltage Vocp 0.65 0.7 0.75 V SLA7070xMPR, MPRT, when motor coil shorts out
2.3 SLA7070MPR, MPRT/7071MPR, MPRT
Overcurrent Sense Current Iocp 3.5 A SLA7072MPR, MPRT
4.6 SLA7073MPR, MPRT
Thermal Protection Temperature Ttsd 140 °C SLA707xMPRT, Rear of case (at the saturation temperature)
VFlagL 1.25 SLA707xMPR, MPRT, IFlagL=1.25mA
Flag Output Voltage V
VFlagH 1.25–VDD SLA707xMPR, MPRT, IFlagH=–1.25mA
IFlagL 1.25
Flag Output Current mA SLA707xMPR, MPRT
IFlagH –1.25
ModeF 100 %
Step Reference Current Ratio
Mode8 70.7 %
PWM Minimum ON Time ton(min) 3.2 µs
PWM OFF Time toff 12 µs
* The direction in which current flows out of the device is regarded as negative.

94 ICs
 SLA7070MR, MPR, MPRT/7071MR, MPR, MPRT/7072MR, MPR, MPRT/7073MR, MPR, MPRT

■Internal Block Diagram ■Pin Assignment

Pin No. Symbol Function
1
OutA Phase A output
2
Ref/Sleep1

CW/CCW
3

Reset
Clock
Phase A output
OutA
OutA
OutA
OutA

OutB
OutB
OutB
OutB
N.C.
OutA/
Flag
VDD

VBB
M1
M2
M3
4
1 2 3 4 14 15 18 6 7 8 9 16 10 15 11 20 21 22 23 5 SenseA Phase A current sense
6 N.C. N.C.
MIC Reg
7 M1

Pre-
8 M2 Excitation mode/Sleep 2 setting input
Pre- Sequencer
Driver &
Driver 9 M3
Sleep Circuit
10 Clock Step Clock input
Protect Protect
11 VBB Driver supply (motor supply)
12 Gnd Device GND
DAC DAC
13 Ref/Sleep1 Control current mode/Sleep 1 setting input
–
Synchro
+
14 VDD Logic supply
5 Control 19
15
–
SenseA + SenseB Reset Internal logic reset input
PWM PWM
Control Control
RS OSC OSC RS
16 CW/CCW Normal/reverse control input
17 Sync PWM control signal input
18 Flag*1 Protection circuit monitor output*1
17 12 19 SenseB Phase B current sense
20
OutB/ Phase B current output
21
22
OutB Phase B current output
23
The protect circuit is deleted and the flag pin is N.C. for SLA7070MR, 7071MR, 7072MR, and 7073MR. *1: N.C. pin for SLA7070MR, 7071MR, 7072MR, and 7073MR.

■Typical Connection Diagram ■External Dimensions (ZIP23 with Fin[SLA23Pin])

Vs=10V to 44V 31±0.2

24.4±0.2 4.8±0.2
16.4±0.2
1.7±0.1
Gate burr
φ 3.2±0.15 × 3.8

+
CA
Vcc=3.0V to 5.5V φ 3.2±0.15
OutA OutA BB OutB OutB
16±0.2

C1 VDD
12.9±0.2

r1
Q1 2.45±0.2
9.9±0.2

+ Reset 5±0.5 (Measured at

CB
Clock the root)
CW/CCW
4–(R1)
Micro- M1 SLA7070M Series

9.5 –0.5
computer,

+1
etc.
M2 (2-phase/1-2 phase R-end
M3 excitation)
Sync
N.C. +0.2
0.65 –0.1 +0.2
0.55 –0.1
(4.3)

Flag
Ref/Sleep1 22 × P1.27±0.5 = 27.94±1
SenseA Gnd SenseB ±0.7
4.5
(Measured at the tip)
31.3±0.2
r2 r3 C2
(Including the resin burr)
One-point
Gnd

Logic Gnd Power Gnd

Forming No. No.2151
Product Mass : Approx.6g

* There is no Flag pin (Pin-18) for SLA7070MR, 7071MR, 7072MR, and 7073MR.

ICs 95