9144 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO.

11, NOVEMBER 2017

A 60-kW 3-kW/kg Five-Level T-Type SiC PV

Inverter With 99.2% Peak Efficiency
Yanjun Shi, Member, IEEE, Lu Wang, Student Member, IEEE, Ren Xie, Student Member, IEEE,
Yuxiang Shi, Member, IEEE, and Hui Li, Senior Member, IEEE

Abstract—A silicon carbide (SiC) T-type LCL inverter can substitute Si insulated-gate bipolar transistor (IGBT) in a 17-
achieve smaller device loss than two-level topology, how- kW three-phase string inverter based on the three-level T-type
ever, its improvement on power density is limited by current (3LT2 ) topology. Peak efficiency has been increased from 98.2%
ripple loss on magnetic components as switching frequency
increases. This paper presents a five-level T-type (5LT2 ) pho- to 98.8%. However, using a SiC device without increasing power
tovoltaic (PV) inverter that achieves better utilization of SiC density is not beneficial to lower the system level cost, which
devices than the traditional three-level T-type LCL topology poses a major disadvantage in the highly competitive PV inverter
at higher switching frequency. The operation principle of the markets. SiC PV inverters presented in [8]–[13] can achieve
SiC 5LT2 PV inverter has been presented. The key design
better power density by increasing the switching frequency so
aspects including magnetic balancing, short-circuit protec-
tion, and digital controller computation time have been dis- that the components cost can be reduced. In [8], an air-cooled
cussed and methods are developed. A 60-kW PV converter 50-kW three-phase two-stage all SiC PV inverter was presented.
including boost stage and inverter stage has been built in The dc–dc stage is an interleaved boost converter switching at
the laboratory, which achieves a power density of 27 W/in3 75 kHz and the dc–ac stage is a 3LT2 inverter switching at 50
and 3 kW/kg, and measured peak efficiency of 99.2%. kHz. The power density of this PV inverter is 1 kW/kg, which is
Index Terms—DC–AC power converters, photovoltaic about three times higher than that of conventional Si-based PV
(PV) systems, silicon carbide mosfet. inverters. A multiobjective optimization method was proposed
in [9] to evaluate the cost of optimal designed Si-based and SiC-
I. INTRODUCTION based PV inverters. Results of [9] concluded that in a 10-kW
three-phase string inverter application, a SiC MOSFET based two-
HOTOVOLTAIC (PV) converters, especially the three-
P phase string inverters have been under rapid growth in the
market share. A three-phase string inverter is a two-stage inverter
level inverter switching at 44 kHz can achieve 5% components
cost reduction and 22% life cycle cost reduction, compared with
a Si IGBT based 3LT2 inverter switching at 18 kHz. However,
connected to three-phase utility grid without a transformer [1], researchers in [11] and [12] also showed that the increment in
[2]. The typical power ratings of three-phase string inverters are power density and efficiency by using the direct replacing device
from 10 to 100 kW. The silicon carbide (SiC) based PV string approach has its limitations. The main reason is that as the
inverters have been researched and developed recently because switching frequency increases, the switching frequency current
of the technology maturity of 1200 V SiC devices. Although ripple on inductors will generate additional specific power loss
it is well accepted that SiC devices have significant advantages thereby the inductors have to be oversized in order to dissipate
over Si devices in terms of switching loss, switching speed, and this power loss.
temperature stability [3]–[6], a number of technical challenges A major challenge existing in a SiC PV inverter design is
have remained to transfer the device level advantages to system that the advance in SiC devices exceeds the advance in high-
level benefits. frequency (HF) magnetic materials. To solve this issue, this
Currently, the common practice to develop a SiC-based PV paper explores and demonstrates the benefits of applying the
inverter is to directly replace the Si devices with SiC devices five-level T-type (5LT2 ) topology [14] in a SiC-based three-
in conventional topologies. In [7], SiC JFETs were used to phase string PV inverter to increase its power density and ef-
ficiency. As shown in Fig. 1, each phase of the 5LT2 inverter
Manuscript received November 18, 2016; revised February 11, 2017 consists of two 3LT2 inverter modules and a coupled inductor.
and March 27, 2017; accepted April 18, 2017. Date of publication May 9, The 3LT2 topology has the benefits of both two-level and three-
2017; date of current version October 9, 2017. (Corresponding author:
Hui Li.)
level inverters such as low conduction loss, low switching loss,
Y. Shi, L. Wang, R. Xie, and H. Li are with the Center for Advanced superior output voltage quality, small part count, and simple
Power Systems, Florida State University, Tallahassee, FL 32310 USA operation principle [15]–[17]. It has become the most popular
(e-mail: yshi3@caps.fsu.edu; lw15r@my.fsu.edu; rx14@my.fsu.edu;
hli@caps.fsu.edu).
topology for three-phase PV string inverters since 2011. In ad-
Y. Shi is with the ABB Corporate Research Center, Raleigh, NC 27606 dition, using a coupled inductor to reduce ripple current or to
USA (e-mail: yuxiang.shi@us.abb.com). generate more voltage levels is well acknowledged in the com-
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
munity in the past century [14], [18]–[22] and the total device
Digital Object Identifier 10.1109/TIE.2017.2701762 rating of 5LT2 topology is equal to that of 3LT2 topology for

0278-0046 © 2017 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution
requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
SHI et al.: 60-KW 3-KW/KG FIVE-LEVEL T-TYPE SIC PV INVERTER WITH 99.2% PEAK EFfiCIENCY 9145

Fig. 1. 60-kW SiC PV inverter.

the same application. In this research, it has been discovered

that the coupling coefficient of a coupled inductor can be de-
signed to be one by utilizing the HF switching feature of SiC
MOSFETs, so that the low frequency magnetic flux can be min-
imized. Also, there is no need to use additional line inductors
as a filter in this 5LT2 inverter because of multilevel waveforms
and higher switching frequency compared to those in 3LT2 in-
verters. In this way, magnetic core utilization of the coupled
inductor is improved, and they are operating as an unloaded
transformer and are referred as inter-cell transformers (ICTs) in
Fig. 2. Interleaved modulation for 5LT2 inverter. (a) Schematic of one
this paper. phase. (b) PD modulation. (c) POD modulation.
This paper has proposed to apply a 5LT2 topology for SiC-
based medium power three-phase PV inverter applications. The
main benefits of using the 5LT2 topology include significantly TABLE I
SWITCHING STATES OF 5LT2 INVERTER
reduced magnetic component size and loss, a filterless grid-tied
operation without LCL resonant issue and a low cost solution to
suppress ground leakage current. The methods of solving major Level Switching States v x = 0.5(v 1 x + v 2 x ) vI C T = v1 x − v2 x
design challenges due to the unique features of this SiC 5LT2 L4 PP Vd c 0
inverter have been developed. A 60-kW PV converter including PO Vd c
L3 0.5 V d c
boost stage and inverter stage has been built in the laboratory, OP −V d c
which achieves a power density of 27 W/in3 and 3 kW/kg PN 2V d c
with nature convection. The operation of this SiC filterless L2 OO 0 0
NP −2V d c
PV inverter has been demonstrated in both standalone and
ON Vd c
grid connection modes. The rest of this paper is as organized L1 −0.5 V d c
NO −V d c
as follows. Section II presents the operation principle of the
L0 NN −V d c 0
5LT2 inverter. Section III shows the methods to solve magnetic
balancing, short-circuit protection, and digital controller
computation. In Section IV, experimental results from the
60-kW three-phase string inverter prototype are presented. The converters. The dc/ac stage is a three-phase 5LT2 inverter with
measured peak efficiency is 99.2%, and the California Energy six 1200 V SiC T-type modules provided by Wolfspeed. The
Commission (CEC) efficiency at 720 V input is 99.0%. modulation and operation principle of the 5LT2 inverter can be
explained with Fig. 2 and Tables I and II. As shown in Fig. 2(a),
one phase of the 5LT2 consists of two paralleled 3LT2 inverter
II. OPERATION PRINCIPLE OF A 5LT2 INVERTER
legs. In Fig. 2(b) and (c), the carrier waveforms of inverter leg
The circuit schematic of the SiC 60-kW PV converter is shown 1 (solid line) and leg 2 (dashed line) are 180° interleaved. The
in Fig. 1. The dc/dc stage comprises four SiC interleaved boost outputs of the inverter legs are connected to an ICT to form a
9146 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 11, NOVEMBER 2017

TABLE II
SWITCHING STATES OF 3LT2 INVERTER

Switching States T1 T2 T3 T4

P 1 1 0 0
O 0 1 1 0
N 0 0 1 1

Fig. 4. Inductance needed for 3LT2 topology and 5LT2 topology to limit
largest current harmonic under 5% of fundamental current at different
switching frequencies.

The operation principle of ICT can be explained with Fig. 3.

For the circuit in Fig. 3(a), a state equation can be derived as
       
v1 − v x v L −M d i1
Fig. 3. Operation principle of ICT. (a) Circuit schematic. (b) Equivalent = 1x = · (2)
CM and DM circuit. v2 − v x v2x −M L dt i2
which yields
single output. In this way, the two legs and one ICT together    v1x + v2x   L − M   
can generate five voltage levels line to neutral, as presented in vx 0 d i1 + i2
= 2 = 2 ·
Tables I and II. vICT v1x − v2x 0 L + M dt i1 − i2
In 3L carrier-based modulation, the upper and lower carrier    
can be placed in the same direction or in the opposite direction, (L − M ) /2 0 d ix
which are referred as phase disposition (PD) modulation and = · (3)
0 L+M dt im
phase opposite disposition (POD) modulation, respectively. Al-
though 3L PD and POD modulation generate different voltage where L is the self-inductance of each winding, M is the mutual
spectra, when used in the interleaved modulation, the 5L output inductance between two windings, ix ∈ ia , ib , ic is the inverter
voltage spectrum for both are the same, as follows: phase current. And im is the differential current of the two
phase legs. In (3), the coefficient matrix is diagonal, which
vx (t) = 0.5 [vx1 (t) + vx2 (t)] means the ICT can be treated as two separated parts, as shown
in Fig. 3(b). The common-mode (CM) part of ICT works as a
= Vdc Mi cosωo t
line filter, in which flows the fundamental frequency current and
∞ ∞
2Vdc  1  2ωc sideband current. The voltage applied on differential-mode
+ J2n +1 (2mπMi ) cos (nπ) (DM) part can be derived as
π m = 1 2m n = −∞
vICT (t) = [v1x (t) − v2x (t)]
× cos (2mωc t + [2n + 1] ωo t) (1)
∞
 ∞
4Vdc 1
where Mi is the modulation index; Vdc is half dc-link voltage; =
π m = 0
2m + 1 n = −∞
ωo is fundamental angular frequency, and ωc is the switching
angular frequency. According to (1), the first line-to-neutral har- × J2n +1 [(2m + 1) πMi ]
monics are at 2ωc sideband. In a three-wire system without shunt
· cos (nπ) cos ([2m + 1] ωc t + [2n + 1] ωo t) .
capacitors at ac side, part of the 2ωc sideband harmonics can
(4)
be canceled in line-to-line voltage. With a state machine based
modulation [23], 5L PD modulation can be achieved where most The major part of (4) is switching frequency harmonics. There-
of the voltage harmonic near 2ωc will be canceled in line-to- fore, the ICT can be treated as an HF transformer with leak-
line voltage, and the line-to-line voltage will be seven level. On age inductance of (L − M )/2 and magnetizing inductance of
the other hand, in 3LT2 PV inverters, the star point of ac side L + M . In conventional ICT-based converters, it is usually de-
shunt capacitors is usually connected to the dc-link neutral [24], sirable to design enough leakage inductance to suppress the HF
thereby the output voltage is only 3L. harmonics. However, as shown in Fig. 4, in this paper, because
SHI et al.: 60-KW 3-KW/KG FIVE-LEVEL T-TYPE SIC PV INVERTER WITH 99.2% PEAK EFfiCIENCY 9147

of the high switching frequency, required line inductance is best power density, the ICT is designed with high permeability
small enough so that the grid impedance can be used as filter. material with little air gap. Unlike inductors, when ICT saturates,
Therefore, the ICT can be designed with a very small leakage the saturation current will increase rapidly and may trigger the
inductance, so there is only switching frequency magnetic flux short-circuit protection of the two T-type modules from the same
in the magnetic core. phase.
Compared with a 3LT2 inverter with an LCL filter, the ICT- Two kinds of methods are used in this research to reduce the
based 5LT2 inverter has following advantages for high switching circulating current. The first one is to eliminate the circulating
frequency application. current through closed-loop control. The second one is based
1) Smaller magnetic components size and power loss. An on a modulation technique to balance the winding volt-seconds
LCL filter can achieve −60 dB/dec harmonic atten- within half switching cycle, so that peak-to-peak value of the
uation, but this is at the cost of increasing current circulating current can be further reduced.
ripple on inverter-side inductor L1 . When switching fre- The method for closed-loop circulating current control can
quency increases, although the requirement for LCL value be found in [26]. It should be noted that differential current sen-
will decrease, the additional HF power loss on L1 will sor is preferred in this application, for its better accuracy and
generate heat that is hard to be dissipated. As a result, noise shielding ability. However, the bandwidth of the differ-
both the size and value of L1 have to be designed larger ential current sensor (usually less than 10 kHz) also prevents
than what is needed by harmonic attenuation requirement. the closed-loop control from detecting and eliminating the peak
On the other hand, because there is no fundamental fre- value of the circulating current. Therefore, a modulation-based
quency flux in the ICT, the magnetizing inductance can method is also applied.
be designed large enough to suppress the HF current of Fig. 5(a) and (b) shows the conventional and proposed
ICT without sacrificing the power density. method to balance ICT volt-seconds within half switching cycle.
2) Decoupled magnetic design. Basically there is only fun- The saber simulation results of each method are compared in
damental frequency current in the ICT windings and only Fig. 5(c) and (d). However, the proposed method also requires
switching frequency flux in its core. So, the magnetic de- updating controller output in every half switching cycle.
sign is decoupled and the core loss and winding loss can
be predicted with more accuracy, therefore less design B. T-Type Module Short-Circuit Protection
margin is needed.
Fig. 6 shows the short-circuit scenarios for a 5LT2 inverter.
3) No LCL resonant issues. The ICT-based 5LT2 inverter
Addition to the typical T-type short circuit shown in Fig. 6(a)
is modeled as a single L inverter in grid current control
and (b), two extra short-circuit modes will occur when ICT is
loop. It does not have LCL filter related stability issues.
saturated, as shown in Fig. 6(c) and (d). The challenges for
4) Reduced size of CM chock for ground leakage current
short-circuit protection are: 1) in the T-type module, there is no
suppression. Compared to a 3LT2 inverter with the same
pin leads to the middle point of T-branch (T2 and T3 ) so the
switching frequency, the three-phase CM volt-seconds
protection circuit can only be applied to I-branch (T1 and T4 ).
(Vcm /fs ) of the 5LT2 inverter is reduced by 86%. There-
However, at P-0 or N-0 short, it is T-branch that first reaches sat-
fore, the CM choke required for ground leakage current
uration. So, the reaction of protection circuit must be faster but
suppression is much smaller. More detailed analysis of
not too fast to cause false protection; 2) in PV application, the dc-
this issue can be found in another paper generated from
link voltage can be as high as 1000 V. If the switches are turned
this research [25].
OFF too fast during projection, over voltage will easily break
down the device. Our experiment shows that it is still possible
III. KEY DESIGN ASPECTS
to achieve short-circuit protection based on the de-sat protection
Since a 5LT2 inverter consists of two paralleled 3LT2 in- function of a commercially available IGBT drive IC ACPL339J.
verters, most of the designs of 5LT2 inverters are similar to Some modifications were made to the typical de-sat protection
that of 3LT2 inverters. However, listed below are three key de- circuit, including added extra charging pass to adjust blanking
sign aspects that are unique for the SiC-based 5LT2 inverter. time, applied a two-stage soft turn-off circuit, and added a gate
The corresponding detailed analysis and developed methods are stabilizer to prevent crosstalk. Both short-circuit experiments
presented as follows. and double pulse test (DPT) were performed at room tempera-
ture and designed junction temperature (113 °C). Experiments
A. Magnetic Flux Balancing and Circulating Current show that the reaction time of short-circuit protection is within
Control 600 ns. Detailed circuit design and more experimental results
are presented in [27].
In this paper, the circulating current of an ICT is defined as
icir = ip1 − ip2 , where p ∈ {a, b, c} . (5) C. Digital Controller Computation Time Reduction
It is important to eliminate the circulating current because: When switching frequency increases, digital sample, and I/O
1) the size of ICT is directly related to its maximum magnetic delay will consume a significant part of DSP interruption time.
flux, with better circulating current control technique, less de- In this research project, a TI TMS320F28335 DSP + Xilinx
sign margin is needed to prevent saturation; and 2) to achieve XC3S200AN field-programmable gate array (FPGA) structure
9148 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 11, NOVEMBER 2017

Fig. 5. Influence of digital controller update methods on magnetic balancing: (a) conventional method: update comparator at the beginning of
each counter; (b) modified method: update comparator at the beginning and peak of each counter; (c) simulated ICT circulating current under
conventional method; and (d) simulated ICT circulating current under modified method.

was adopted, as shown in Fig. 7(a). The digital controller out-

put is updated in every 10 μs. Execution time test result in
Fig. 7(b) shows that the control tasks presented in Fig. 7(c) were
able to be finished within 9 μs, due to adaptation of following
techniques:
1) transfer some of the computation burden to FPGA;
2) run the interruption code in RAM;
3) use sinusoidal table instead of sinusoidal function;
4) optimize digital realization method of controller and dig-
ital filters;
5) increase I/O speed.

IV. EXPERIMENT RESULTS

The laboratory prototype of the 60-kW PV converter is shown
Fig. 6. Short-circuit modes of 5LT2 inverter: (a) P-N short within one in Fig. 8, with its parameters listed in Table III. The power
phase leg; (b) P-0 short and N-0 short within one phase leg; (c) P-N
short when ICT saturated; and (d) P-0 short and N-0 short when ICT density of this prototype is 27 W/in3 and 3 kW/kg without a
saturated. case.
SHI et al.: 60-KW 3-KW/KG FIVE-LEVEL T-TYPE SIC PV INVERTER WITH 99.2% PEAK EFfiCIENCY 9149

Fig. 8. 60-kW SiC 5LT2 PV inverter prototype.

TABLE III
60-KW SIC PV CONVERTER PARAMETERS

Parameters Values

Nominal output power 60 kW

MPPT voltage V in 450–850 V
Output voltage v g 480 V rms line to line
Output frequency 60 Hz
Cooling Natural convection
Dimension 18.5 in × 17 in × 7 in
Weight 20 kg/44 lb
Boost Switching frequency 75 kHz
Module 1200 V SiC boost
Inductance 400 μH
Inductor size and weight 320 cm3 , 716 g
Fig. 7. Digital controller execution time breakdown: (a) structure of dig- Inverter Switching frequency 50 kHz
ital controller; (b) controller execution time breakdown; and (c) software Module 1200 V SiC T-type
architecture. ICT inductance 9.6 mH
ICT leakage inductance 10 μH
ICT size and weight 154 cm3 , 504 g
DC-link capacitance C 1 and C 2 1.2 mF
DPT was performed to test the switching characteristic and
to verify the gate drive circuit design. The DPT was performed
under 113 °C and 900 V dc-link voltage, on a test bench us-
ing the same printed circuit board (PCB) as the prototype, as side, a 50-kW three-phase resistive load was utilized for the
shown in Fig. 9(a). Fig. 9(b) shows a typical DPT waveform. standalone test. For grid-connected experiment, the PV inverter
The temperature during DPT experiment and de-sat experiment was connected to a 1.5-MW 480-V to 4.16-kV Dy11 trans-
was controlled by a hot plate, as shown in Fig. 9(a). And the former with 35 m AWG0 cable. The operation command to the
temperature was measured at the bottom case of the module PV inverter and the system status data from the inverter were
with a thermal coupler. transmitted through ZigBee wireless communication. Fig. 11(b)
De-sat short-circuit protection tests were performed under presents the 45 min temperature curve of the inverter operating at
900 V dc-link voltage, at both 25 °C and 113 °C. Fig. 10 shows 60-kW grid-connected mode. The temperature of SiC modules
short-circuit waveforms at 25 °C, as the worst case scenario. was measured with the module built-in thermistors (NTCs);
Fig. 10(a) shows waveforms under P-N short, with a reaction temperature of other components was measured with thermal
time of 440 ns. In the N-0 short result shown in Fig. 10(b), image camera.
two current ramping processes can be observed, that is I-branch Figs. 12 and 13 are experimental waveforms from standalone
saturation and T-branch saturation. The gate drive reaction time two-stage tests. Fig. 12 shows the waveforms of inverter stage.
of N-0 short is about 580 ns. Fig. 13 shows the waveforms of boost stage. Results from two
Fig. 11(a) shows the experimental setup for the 60-kW PV sets of experiments are presented in Fig. 12. The first one is from
converter prototype system function, efficiency, and thermal the experiment with 50 kW resistive load, to emulate the strong
stress test. The dc power was provided by a 150-kW PV em- grid case, as shown in Fig. 12(a). The second one, as presented
ulator, with an output voltage range of 0–1000 V. In the ac in Fig. 12(b), is the result of experiments with a R+L load
9150 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 11, NOVEMBER 2017

Fig. 9. Double-pulse test results: (a) test setup and (b) DPT test
waveforms.

Fig. 11. Thermal experiments: (a) thermal stress experiment setup and
(b) thermal stress experiment results.

to emulate a weaker grid, where an extra three-phase 180 μH

inductor was connected in serial with the 50-kW resistive load.
It can be seen in Fig. 12(a) and (b) that the positive and negative
half of dc-link voltage is balanced, with about 10% ripple peak to
average. A typical five-level phase-to-neutral output voltage can
be observed in Fig. 12(b), this is because the leakage inductance
of ICT is much smaller than the 180 μH load inductance, so
the switching frequency harmonic voltage drop on the leakage
inductance was not large enough to give a sinusoidal output.
Compared with that in Fig. 12(b), the output current in Fig. 12(a)
has noticeable HF ripple. However, it should be noted that grid-
tied PV converters are connected to low voltage power grids
where the short-circuit ratio (SCR) are limited to be smaller than
20. If the grid where the 60-kW PV inverter being connected
to is ten times larger than the converter rating, then SCR = 20
gives 61 μH, without any cable inductance. Additional 50 m
60A cable will add about 100 μH to the grid inductance. So, in
the grid connection case, the waveform will be closer to what is
shown in Fig. 12(b).
Fig. 12(c) and (d) shows the fast Fourier transform (FFT)
analysis results of output current for the two standalone exper-
iments. In both cases, the harmonics are smaller than 1.5%. In
Fig. 10. Waveforms of short-circuit test at 900 V dc-link voltage. grid connection mode, where there are low frequency voltage
(a) P-N short and (b) N-0 short. harmonics disturbances from the grid, more control efforts are
SHI et al.: 60-KW 3-KW/KG FIVE-LEVEL T-TYPE SIC PV INVERTER WITH 99.2% PEAK EFfiCIENCY 9151

Fig. 13. Boost stage experiment waveforms.

The grid-connected experimental waveforms are shown in

Fig. 14, where the waveforms during and after startup are
shown in Fig. 14(a), and the grid currents at steady state are
shown in Fig. 14(b). From Fig. 14(b), it can be seen that al-
though the PV inverter is connected to a strong grid (25 times of
inverter’s power rating) with relatively short cable (30 meters),
the HF current ripple is still small. Fig. 14(c) is the FFT analysis
results of the grid current. In Fig. 14(c), the THD is 2.68%,
which is within the limitation for THD required by utility code.
But, it is still worse than the standalone case, especially above
30th harmonics. This indicates there is still room for improve-
ment in the controller design.
The waveforms presented in Fig. 15 are used to demonstrate
the circulating control function. The experiment was carried out
at half-load to prevent overheating the ICT or trigger de-sat pro-
tection. At first, the circulating current control was disabled. It
can be observed that there is about 2-A dc bias in the circulating
current, and at the peak of the circulating current, ICT became
saturated. Then, the circulating current control was enabled at
t1 , after 10 ms transient, it reached the steady state where the dc
error is about 0.5 A. Also from Fig. 15, it can be observed that
the ICT saturation current is at 3 A, so there is 2 A safe margin.
System efficiency was measured using YOKOGAWA
WT3000 power analyzer at 500, 600, 720, and 820 V input
Fig. 12. Inverter stage standalone experiment waveforms and FFT voltage, respectively, and CEC efficiency was derived accord-
analysis result: (a) experiment waveforms under resistive load; (b) ex- ingly. The measured efficiencies are shown in Fig. 16. At 500 V
periment waveforms under resistive + inductive load; (c) FFT analysis
result of output current under resistive load; and (d) FFT analysis result and 600 V input voltage, the PV inverter was operating at two-
of output current under resistive + inductive load. stage mode. At 720 V and 820 V input voltage, the PV in-
verter was operating at inverter single stage mode. The highest
efficiency was measured at 720 V input voltage with peak ef-
ficiency being 99.2% and CEC efficiency being 99.0%. This
needed for current harmonics suppression. And the total har- is because dc-link voltage of 720 V input is lower than that
monic distortion (THD) will be worse than what are shown in of 820 V input, the switching loss and ICT core loss will be
Fig. 12(c) and (d). smaller, and the conduction loss and ICT winding loss are less
Fig. 13 presents the experimental waveforms from boost influenced by dc-link voltage as the output current does not
stage. Two of the four interleaved boost inductor currents are change. An input voltage lower than 720 V will require turning
shown in Fig. 13, with their oscilloscope channel set to ac cou- on boost stage. Also, to operate the converter at 720 V dc requires
pling. It can be observed that for each phase, the current ripple third harmonic injection or equivalent modulation techniques,
is about 25% peak to average. Because two 40 μF film capaci- which may trigger the ground leakage current protection. In this
tors are installed at the input port, there is no observable input case, a typical system efficiency should be considered for the
current ripple. 820 V input case, in which the peak efficiency is 99.1% and
9152 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 11, NOVEMBER 2017

Fig. 15. Circulating current control experiment waveforms. (a) Steady

states and (b) transient.

Fig. 14. Inverter stage grid-connected experiment waveforms and FFT

analysis result: (a) start up waveforms; (b) steady-state waveforms; and
(c) steady-state FFT analysis result. Fig. 16. Measured system efficiencies at different input voltages.

CEC efficiency is 98.9%. The CEC efficiency at 500 V input A power loss breakdown analysis consisting of both boost
and 600 V input are 97.5% and 97.8%, respectively. The peak stage and inverter stage is shown in Fig. 17. The three ICTs
efficiency above four input conditions is reached at operating consume 9% of system total power loss and amount to 7.5% of
points in the range of 40–50 kW. system total weight.
SHI et al.: 60-KW 3-KW/KG FIVE-LEVEL T-TYPE SIC PV INVERTER WITH 99.2% PEAK EFfiCIENCY 9153

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9154 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 11, NOVEMBER 2017

[23] H. Li and Y. Shi, “A self-balanced modulation and magnetic rebalancing Ren Xie (S’15) received the B.S. and M.S. de-
method for parallel multilevel inverters,” U.S. Patent disclosure, Oct. 2016. grees in electrical engineering from Zhejiang
[24] T. Zhao, V. Bhavaraju, P. Nirantare, and J. Xu, “Evaluation of commercial University, Hangzhou, China, in 2010 and 2013,
scale transformerless solar inverter technology,” in Proc. IEEE Energy respectively. He is currently working toward the
Convers. Congr. Expo., Sep. 2015, pp. 5342–5348. Ph.D. degree in electrical engineering at the De-
[25] L. Wang, Y. J. Shi, Y. X. Shi, R. Xie, and H. Li, “Ground leakage current partment of Electrical and Computer Engineer-
analysis and suppression in a 60 kW 5-level T-type transformerless SiC ing, Florida State University of Tallahassee, FL,
PV inverter,” IEEE Trans. Power Electron., to be published. USA.
[26] F. Forest, T. A. Meynard, J. J. Huselstein, D. Flumian, C. Rizet, and His research interest includes WBG devices
A. Lacarnoy, “Design and characterization of an eight-phase-137-kW and its application.
intercell transformer dedicated to multicell DC–DC stages in a modular
UPS,” IEEE Trans. Power Electron., vol. 29, no. 1, pp. 45–55, Jan. 2014.
[27] Y. X. Shi, R. Xie, L. Wang, Y. J. Shi, and H. Li, “Switching characteristics
and short-circuit protection of 1200V SiC MOSFET T-type module in PV
inverter application,” IEEE Trans. Ind. Electron., to be published.
[28] Y. J. Shi, Y. X. Shi, R. Xie, L. Wang, and H. Li, “A 50 kW high
power density paralleled-five-level PV inverter based on SiC T-type MOS-
FET modules,” in Proc. IEEE Energy Convers. Congr. Expo., Sep. 2016, Yuxiang Shi (S’13–M’17) received the B.S.
pp. 1–8. degree from Xi’an Jiaotong University, Xi’an,
China, in 2007, the M.S. degree from Zhejiang
University, Hangzhou, China, in 2010, and the
Ph.D. degree from Florida State University,
Tallahassee, FL, USA, all in electrical
Yanjun Shi (S’11–M’13) received the B.S. de- engineering.
gree in electrical engineering and the Ph.D. de- From 2010 to 2011, he was an Electrical
gree in power electronics from the Huazhong Engineer at the Philips Lighting Electronics,
University of Science and Technology, Wuhan, Shanghai, China. Since November 2016, he
China, in 2007 and 2012, respectively. has been a Research Scientist with the ABB
He is currently a member of the Research Corporate Research Center, Raleigh, NC, USA. His current research
Faculty at the Center for Advanced Power interests include the WBG devices and their applications in renewable
System, Florida State University, Tallahassee, and battery energy conversion.
FL, USA. His research interests include grid-
connected PV system, high power density PV
inverter, high-penetration PV integration, wide-
bandgap device application, modeling, and control of power electronics
converters.

Hui Li (S’97–SM’01) received the B.S. and M.S.

degrees from the Huazhong University of Sci-
Lu Wang (S’15) received the B.S. degree ence and Technology, Wuhan, China, in 1992
and the M.S. degree in electrical engineering and 1995, respectively, and the Ph.D. degree
from the Nanjing University of Aeronautics and from the University of Tennessee, Knoxville, TN,
Astronautics, Nanjing, China, in 2009 and 2012, USA, in 2000, all in electrical engineering.
respectively. She is currently working toward She is currently a Professor with the Depart-
the Ph.D. degree at the Center for Advanced ment of Electrical and Computer Engineering,
Power Systems, Department of Electrical and College of Engineering, Florida State University,
Computer Engineering, College of Engineering, Tallahassee, FL, USA. Her research interests in-
Florida State University, Tallahassee, FL, USA. clude photovoltaic converters applying a wide-
Her research interest includes high-power bandgap device, bidirectional dc–dc converters, cascaded multilevel in-
SiC grid-connected PV converters. verters, and power electronics applications in hybrid electric vehicles.