Automotive and Industrial Control Units: M - CAN Protocol Controller IP For CAN (FD)
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PaulAutomotive and Industrial Control Units: M - CAN Protocol Controller IP For CAN (FD)
Uploaded by
PaulAutomotive and industrial
control units
M_CAN protocol controller IP for CAN (FD)
Product Benefits
ff Support of Classical CAN and CAN FD up to 64 byte
according to ISO 11898-1:2015
ff Support of TTCAN (Time-Triggered CAN) according
to ISO 11898-4
ff Multiple M_CAN modules can access one shared
memory
ff Smart message handling reduces CPU load
ff TTCAN for real-time applications
ff Connectable to customer-specific Host CPUs with
8/16/32-bit generic CPU interface
Automotive and industrial control units M_CAN protocol controller IP for CAN (FD)
up to
secure
64 byte
payload for faster transmission of large data fields
communication
with bitrates above 1 Mbit/s
Task M_CAN IP module for ASIC design
The M_CAN protocol controller IP enables event- and time-trig-
gered communication according to ISO 11898-1:2015 and ISO M_CAN 31.0 k gates
11898-4.
Message RAM max. 17 kB/M_CAN instance
Function Deliverables for ASIC design VHDL source code,
The IP module is integrated into a microcontroller, a dedicated VHDL test bench environment,
ASIC, or FPGA and ensures the protocol conform handling of data documentation, conformance
transfer via CAN bus. It filters messages received from the CAN test report
bus and sorts transmit messages according to their priority and
thereby reduces interrupt load.
M_CAN IP module for FPGA design
Variants
Altera (Cyclone III) 8,200 logic elements
The IP module is available as M_CAN and M_TTCAN for integration
into microcontrollers, ASICs, or FPGAs. Xilinx (Spartan 6) 5,850 LUTs
Message RAM max. 17 kB/M_CAN instance
Deliverables for FPGA design encrypted VHDL source code,
VHDL source code of an example
system design with RAM and an
example arbiter instance, docu-
mentation, conformance test
report, programming examples
for fast start up
M_CAN
can_tx
Cfg & Ctrl
CAN Core
can_rx
Interrupt & timestamp
Sync
Generic Slave IF
Tx_State
Tx_Data
Tx_Req
8/16/32
Host
Cfg & Ctrl
Tx Handler Tx Prioritization
Generic Master IF
Rx_State
Rx_Data
Cfg & Ctrl
32
Rx Handler Acceptance filter
Memory
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