5 4 3 2 1

D
H81M02 D

FAB:A
XDP

CHANNEL A DDR3 SDRAM (1066/1333/1600)

1. Index / Block diagram PCIe Gen2 16x DDR3 DIMM 1
PCIe 16x slot X1
2. SMBus MAP Intel PROCESSOR
3. Clock Distribution DDP C HASWELL
4. Power Delivery Map HDMI 1 LGA1150 CHANNEL B DDR3 SDRAM (1066/1333/1600)
DDR3 DIMM 3
5. Power On Sequence
6. Reset / Power Good Map
7. Strap/IRQ/IDSel Table
8. GPIO Table

FDI

DMI
9-13. CPU
14. DDR3-1:CHA
15. DDR3-1:CHB XDP PCIe 1x Port4 NIC + USB
RTL8111F-CG Ports X 2
16. PCIE 16X/1X
C 17. HDMI/VGA VGA USB 2.0 C

18. XDP/DMI_LAI VGA CONN

19-25. PCH USB 2.0

26. PCIE TO PCI BRIDGE PCIe Gen2 Port5
Front USB Header2*5 x2
Rear USB Ports X2(Otional)
27. PCI SLOT X2 PCIe 1x Slot X1

28. LAN_RTL8111F Intel USB 3.0

29. USB 3.0
30. USB 2.0 PCI Slot X2 PCIE To PCI Bridge
PCIe 1X Port3
Lynx Point Rear USB Ports X2
Front USB Headers X1(Optional)
31. AUDIO ALC662
32. AUDIO CONN/HEADER Rear Audio CONN
33. SPI_Socket_ROM Line In/MIC In/Line Out
34. SIO-IT8728 HDA
SATA Port 4/5 ALC662-VD0-GR
35. PS2/COM/LPT SATA 2.0 CONN X2

36. FAN /TPM Front Audio CONN

37. ATX CONN/FP PANEL/EMI PART HP Out/ MIC In
38. Linear Power SATA 3.0 CONN X2
SATA Port 0/1

39. 1.05V_PCH
40. 5V_DUAL/3D3V_DUAL
41. V_SM
B
42. Vcore PWM SPI ROM #1
8M
SPI LPC B

43. Vcore Driver

ITE IT8728F

TPM Header

COM1 COM2 Header PS2

KB/MS LPT Header

CPU FAN SYS FAN

A A

FOXCONN PCEG
Title
Index / Block diagram
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 1 of 43

5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SMBUS DIAGRAM

SIO:IT8728F
D D
NC

SMLINK0

SMBus SMLINK1
Controller
BUS Switch
RESUME SMBUS Main SMBUS

C
PCH C

TPM CPU-XDP PCH-XDP

Lan Controller

PCI EXPRESS 16x SLOT 1

PCI EXPRESS 1x SLOT 2

B B

PCI SLOT 2

PCI SLOT 1

DDR3 DIMM1 CHA

DIMM SLOTS

DDR3 DIMM3 CHB

A A

FOXCONN PCEG
Title
SMBus MAP
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 2 of 43

5 4 3 2 1
 5 4 3 2 1

D
Channel B D

DIMM 3

Channel A
DIMM 1
D3_MA_CLK/CLK#[0:3]

C_PCI_SB

D3_MB_CLK/CLK#[0:3]

25 MHZ

C
100Mhz
PCI EXPRESS X16 SLOT 1 C

PCH 100Mhz
32.768 KHZ
PCI EXPRESS X1 SLOT 2
CPU 100Mhz DMI

135Mhz DP (SSC)
100Mhz
135Mhz DP (non SSC)
PCIE To PCI Bridge IT8893E/FX

33Mhz

PCI Slot1/PCI Slot2

B B

100Mhz
CPU XDP
LAN
25 MHZ RTL8111F 100Mhz

33Mhz

SUPER IO 48MHz

A A

FOXCONN PCEG
Title
Clock Distribution
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 3 of 43

5 4 3 2 1
 5 4 3 2 1

5V_SB
POWER DELIVERY MAP +12V_VIN(4PIN)
HSW(95W) 5V_SB to
+VCORE (CPU Vcore) 3D3V_SB 12V_SYS
D
SWITCHING Voltage=1.7V D

Icc=95A Icc(Max)=95A Max=105A

DDR3(2 DIMM) Max=105A 3-Phases Swithing 3D3V_SYS PCI Express X16
+12V=5.5A
Deep Sleep : Off SWITCHING H_CPU_VCCIO_RIGHT
+V_1.5_SM=1.5V Icc=20A Voltage=1.0V 3D3V_SB to
3D3V_DUAL +3VDUAL
Max=25A IccMax=300mA Icc=1.25A Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)
VCOMP_OUT_CPU
+V_1.5_SM(1.5V) to Voltage=1.0V
+V_SM_VTT=0.75V 1A +V_SM_VTT (0.75V) +3V=3A
Icc=0.75A Max=1A IccMax=100mA

+V_1.5_SM(DDR III) PCI Express X1

Voltage=1.5V Icc=4.2A +12V_SYS
Icc=0.5A

+3V_PCIAUX(3.3vAUX)
RTL8111E GbE Lan Lynx_Point(5.5W) Icc(Max)=0.375A(S0)
Icc(Max)=0.02A(S3~S5)
VCC(+1P05V_PCH)
+3VDUAL Voltage=1.05V 3D3V_SYS
C 70mA Icc(Max)=1.312A Icc=3A C

+V_1.5_SM to
+V_1.05_PCH VCCIO(+1P05V_PCH) -12V_SYS
DVDD12/EVDD12 Icc=7.5A Voltage-=1.05V
300mA Max=9A
ICC(Max)=3.629A
12V_SYS 5V_SYS PCI
VCCCLK(+1P05V_PCH) +12V_SYS
Voltage=1.05V Icc=0.5A
HDA Codec Icc(Max)=0.306A
+5VA
Voltage=5V 12V TO +5VA +3V_PCIAUX(3.3vAUX)
Icc=200mA V_PROC_IO(+VCCIO2PCH) Icc(Max)=0.375A(S0)
Icc=200mA
0ohm Voltage=1.05V 4mA Icc(Max)=0.02A(S3~S5)
VCC 3D3V_SYS
Voltage=3.3V VCCASW(+1P05V_PCH) Icc=7.6A
3D3V_SYS Voltage=1.05V
Icc=40mA
Icc(Max)=1.0A 5V_SYS
Icc=5A
circuit VCCADACBG3_3(+3V_BG)
Control Voltage=3.3V 0.133A -12V_SYS
Icc=0.1A
VCCCLK3_3(3D3V_SYS)
B
SIO 8728 3D3V_SYS Voltage=3.3V 0.055A B
3D3V_SYS
Icc=50mA 5V_SB VCC3_3(3D3V_SYS)
Voltage=3.3V 0.133A PCI
3D3V_SB +12V_SYS
Icc=50mA(S0) VCCVRM(+1P5V_PCH) Icc=0.5A
5V_SB to Voltage=1.5V
3D3V_SB 3D3V_SYS to
3D3V_SB +1P5V_PCH Icc(Max)=0.183A +3V_PCIAUX(3.3vAUX)
Icc=38mA(S3) Icc(Max)=0.375A(S0)
Icc(Max)=0.02A(S3~S5)
VCCADAC1_5(+1P5V_PCH_DAC)
0ohm Voltage=1.5V 70mA 3D3V_SYS
Icc=7.6A
IREF(+1P5V_PCH)
Voltage=1.5V 0.5A 5V_SYS
Icc=5A
PS2 VCCSPI(+3V_EPW)
+5V_DUAL=500mA(S0, S1) ACPI 5V_SYS Voltage=3.3V 22mA
+5V_DUAL=2mA(S3) Controller -12V_SYS
+5V_DUAL Icc=0.1A
VCCSUSHDA(3D3V_DUAL)
Voltage=3.3V 10mA
USB2.0 8 Ports
+5V_DUAL_USB=4A(S0,S1) ACPI VCCSUS3_3(3D3V_DUAL)
+5V_DUAL_USB=0.1A(S3) Controller 5V_SB Voltage=3.3V 0.261A
A +5V_DUAL_USB A

VCCDSW3_3(3D3V_SB)
change 6 ports to 8 ports Voltage=3.3V 15mA
--20130131
USB3.0 2 Ports
+5V_DUAL_USB=1.8A(S0,S1) RTC VCCRTC(VCCRTC)
+5V_DUAL_USB=0.1A(S3) Battery Voltage=3.3V 6uA
FOXCONN PCEG
Title
Power Delivery Map
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 4 of 43

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

FOXCONN PCEG
Title
Power On Sequence
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 5 of 43

5 4 3 2 1
 5 4 3 2 1

CPU-Haswell LGA1150
NCP81102+NCP5901B

SM_DRAMPWROK
12V_CPU
(5)
VRD12.5 switcher (10) +VCORE (10) DDRIII Slots
SM_DRAMRST*
RESET#

PWRGOOD

RESET#
(6) P_VR_READY
P_CORE_EN ENABLE P42 VR_RDY
(4)
(11)
D (5) D
5V_DUAL (4)
APW7120KE V_SM NCT3101S V_SM_VTT
(3) (3)
SLP_S3# (9) (12) S_SLP_S4#
(5) MOS CTRL PCIE to PCI bridge P41 P41
3D3V_SYS (12) (5)
PERST 3D3V_SYS
(5) P26
12V_SYS P42
(13) LAN (2)
3D3V_SB
PERSTB P28
(4)
TPM (5)
3D3V_DUAL
(13) 3D3V_SYS
LERESETn P36
(4)
3D3V_DUAL
PCIe Slots (5)
3D3V_SYS
(13) (5)
PERST# P16 12V_SYS
3D3V_SYS 3D3V_SB
3D3V_SB
(5) (2)
(2)
C C

PLTRST_PROC#
PROCPWRGD
PCIRST2#

SYS_PWROK
(8)
MOS SW DRAMPWROK PCIRST1#
(4) (3)
3D3V_DUAL (12)
P40 SLP_SUS# PLTRST# LRESET# (5)
12V/5V/3.3V VIN Power supply 12V_SYS;3D3V_SYS;5V_SYS
(4) (5)
APWROK PSON# PSON 12V_CPU
(7)
PWROK (6)
5V_DUAL 3D3V_SYS
PWRGD3 AND ATXPG PWROK P37
PCH_THERMAL_UP 5V_SB (1)
(4) (5) TACH RSTCONIN 5V_SB
(3)
SLP_S3# SLP_S3#
(3)
HD Audio (14) PCH SLP_S4# SLP_S4#
AZ1084
3D3V_SB (2)
3D3V_SB
RESET# HDA_RST# (3)
P31 SLP_A# SLP_M#
SIO-IT8772E P40
(5)
RSMRST# RSMRST#
(3)
SYS_RESET#

SUS_WARN_5VDUAL SUS_WARN_5VDUAL (3)

DPWROK DPWROK MOS SW

PANSHW#
(4)
B (2) 5V_DUAL B
PWRBTN# PWRON# (6)
ATX_PWRGD P40

(1) (5)
(4) (5) +1P05V_PCH
V_SM Front Panel

5V_SB

5V_SYS
LM358 (1)
(3) FP_PWRBTN#
S_SLP_S3# P39
FP_RST#

P37
RESET / Power Good MAP
(5) P_1P5V_PCH_EN MOS CTRL
Sequence Signal Name:
(1) FP_PWRBTN#
+1P5V_PCH (6)
(2) S_PWRBTN#
3D3V_SYS
(5) APL5932AKAI (3) S_SLP_S3# S_SLP_S4# S_SLP_M#
(6)
P_CORE_EN (TO VRD) (4) (4) (4) O_PS_ON#
P39 3D3V_DUAL
(5)
+3V_EPW LVL SHIFT (3)
12V_SYS;3D3V_SYS;5V_SYS +1P05V_PCH
A
S_SLP_M# (6) ATX_PWRGD P_CORE_EN +1P5V_PCH A

P38 (7) PWRGD_3V +VCORE

(8) P_VR_READY
SPI ROM (9) DRAM_PWRGD
(10) H_PWRGOOD DDR3_DRAMRST#
P33 (11) PLTRST_IN_CPU# FOXCONN PCEG
(12) LAN_TPM_RST# PLTRST_PCIE_SLOT# PLTRST# Title
Reset / Power Good Map
(13) A_HDA_RST# Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 6 of 43

5 4 3 2 1
 5 4 3 2 1

STRAPPING Table
CPU side
CFG[17:0] Description

PCI Express static x16 1: normal Default

[2] lane numbering reversal 0: lane numbers reversed

00: 1x8, 2x4 PCI Express

D
01: reserved D

[6:5] PCI Express Bifurcation

10: 2x8 PCI Express
11: 1x16 PCI Express
Default

C C

B B

A A

FOXCONN PCEG
Title
Strap/IRQ/IDSel Table
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 7 of 43

5 4 3 2 1
 5 4 3

C
3 2 1

C
B

5 4 3
 B

FOXCONN PCEG
Title
GPIO Table
Size Document Number Rev
A2 H81M02 A

Date: Thursday, May 16, 2013 Sheet 8 of 43

3 2 1
 5 4 3 2 1

DDR3 CH-B
DDR3 CH-A M_DB[0..63]
15 M_DB[0..63]
M_DA[0..63] U1B
14 M_DA[0..63]
U1A M_DB0 AE34 AL19 M_MAA_B0 M_MAA_B[0..15]
D SB_DQ[0] SB_MA[0] M_MAA_B[0..15] 15
D
M_DA0 AD38 AU13 M_MAA_A0 M_MAA_A[0..15] M_DB1 AE35 AK23 M_MAA_B1
SA_DQ[0] SA_MA[0] M_MAA_A[0..15] 14 SB_DQ[1] SB_MA[1]
M_DA1 AD39 AV16 M_MAA_A1 M_DB2 AG35 AM22 M_MAA_B2
M_DA2 AF38 SA_DQ[1] SA_MA[1] AU16 M_MAA_A2 M_DB3 AH35 SB_DQ[2] SB_MA[2] AM23 M_MAA_B3
M_DA3 AF39 SA_DQ[2] SA_MA[2] AW17 M_MAA_A3 M_DB4 AD34 SB_DQ[3] SB_MA[3] AP23 M_MAA_B4
M_DA4 AD37 SA_DQ[3] SA_MA[3] AU17 M_MAA_A4 M_DB5 AD35 SB_DQ[4] SB_MA[4] AL23 M_MAA_B5
M_DA5 AD40 SA_DQ[4] SA_MA[4] AW18 M_MAA_A5 M_DB6 AG34 SB_DQ[5] SB_MA[5] AY24 M_MAA_B6
M_DA6 AF37 SA_DQ[5] SA_MA[5] AV17 M_MAA_A6 M_DB7 AH34 SB_DQ[6] SB_MA[6] AV25 M_MAA_B7
M_DA7 AF40 SA_DQ[6] SA_MA[6] AT18 M_MAA_A7 M_DB8 AL34 SB_DQ[7] SB_MA[7] AU26 M_MAA_B8
M_DA9 AH40 SA_DQ[7] SA_MA[7] AU18 M_MAA_A8 M_DB9 AL35 SB_DQ[8] SB_MA[8] AW25 M_MAA_B9
M_DA13 AH39 SA_DQ[8] SA_MA[8] AT19 M_MAA_A9 M_DB10 AK31 SB_DQ[9] SB_MA[9] AP18 M_MAA_B10
M_DA10 AK38 SA_DQ[9] SA_MA[9] AW11 M_MAA_A10 M_DB11 AL31 SB_DQ[10] SB_MA[10] AY25 M_MAA_B11
M_DA11 AK39 SA_DQ[10] SA_MA[10] AV19 M_MAA_A11 M_DB12 AK34 SB_DQ[11] SB_MA[11] AV26 M_MAA_B12
M_DA12 AH37 SA_DQ[11] SA_MA[11] AU19 M_MAA_A12 M_DB13 AK35 SB_DQ[12] SB_MA[12] AR15 M_MAA_B13
M_DA8 AH38 SA_DQ[12] SA_MA[12] AY10 M_MAA_A13 M_DB14 AK32 SB_DQ[13] SB_MA[13] AV27 M_MAA_B14
M_DA14 AK37 SA_DQ[13] SA_MA[13] AT20 M_MAA_A14 M_DB15 AL32 SB_DQ[14] SB_MA[14] AY28 M_MAA_B15
M_DA15 AK40 SA_DQ[14] SA_MA[14] AU21 M_MAA_A15 M_DB17 AN34 SB_DQ[15] SB_MA[15]
M_DA17 AM40 SA_DQ[15] SA_MA[15] M_DB21 AP34 SB_DQ[16] AM17
SA_DQ[16] SB_DQ[17] SB_ODT[0] M_SODTB0 15
M_DA21 AM39 AW10 M_SODTA0 14 M_DB19 AN31 AL16 M_SODTB1 15
M_DA18 AP38 SA_DQ[17] SA_ODT[0] AY8 M_DB23 AP31 SB_DQ[18] SB_ODT[1] AM16
SA_DQ[18] SA_ODT[1] M_SODTA1 14 SB_DQ[19] SB_ODT[2]
M_DA19 AP39 AW9 M_DB20 AN35 AK15
M_DA20 AM37 SA_DQ[19] SA_ODT[2] AU8 M_DB16 AP35 SB_DQ[20] SB_ODT[3]
M_DA16 AM38 SA_DQ[20] SA_ODT[3] M_DB18 AN32 SB_DQ[21] AM26
M_DA22 AP37 SA_DQ[21] M_DB22 AP32 SB_DQ[22] SB_ECC_CB[0] AM25
M_DA23 AP40 SA_DQ[22] AW33 M_DB25 AM29 SB_DQ[23] SB_ECC_CB[1] AP25
M_DA25 AV37 SA_DQ[23] SA_ECC_CB[0] AV33 M_DB28 AM28 SB_DQ[24] SB_ECC_CB[2] AP26
M_DA29 AW37 SA_DQ[24] SA_ECC_CB[1] AU31 M_DB27 AR29 SB_DQ[25] SB_ECC_CB[3] AL26
M_DA26 AU35 SA_DQ[25] SA_ECC_CB[2] AV31 M_DB30 AR28 SB_DQ[26] SB_ECC_CB[4] AL25
M_DA27 AV35 SA_DQ[26] SA_ECC_CB[3] AT33 M_DB24 AL29 SB_DQ[27] SB_ECC_CB[5] AR26
M_DA28 AT37 SA_DQ[27] SA_ECC_CB[4] AU33 M_DB29 AL28 SB_DQ[28] SB_ECC_CB[6] AR25
M_DA24 AU37 SA_DQ[28] SA_ECC_CB[5] AT31 M_DB26 AP29 SB_DQ[29] SB_ECC_CB[7]
SA_DQ[29] SA_ECC_CB[6] SB_DQ[30]
Bit Swap for layout

M_DA30 AT35 AW31 M_DB31 AP28 AK17 M_BSB0 15

M_DA31 AW35 SA_DQ[30] SA_ECC_CB[7] M_DB32 AR12 SB_DQ[31] SB_BS[0] AL18
SA_DQ[31] SB_DQ[32] SB_BS[1] M_BSB1 15
M_DA33 AY6 AV12 M_BSA0 14 M_DB33 AP12 AW28 M_BSB2 15
M_DA37 AU6 SA_DQ[32] SA_BS[0] AY11 M_DB34 AL13 SB_DQ[33] SB_BS[2]
SA_DQ[33] SA_BS[1] M_BSA1 14 SB_DQ[34]
M_DA34 AV4 AT21 M_BSA2 14 M_DB35 AL12 AW29 M_SCKEB0 15
M_DA35 AU4 SA_DQ[34] SA_BS[2] M_DB36 AR13 SB_DQ[35] SB_CKE[0] AY29
SA_DQ[35] SB_DQ[36] SB_CKE[1] M_SCKEB1 15
M_DA36 AW6 AV22 M_SCKEA0 14 M_DB37 AP13 AU28
M_DA32 AV6 SA_DQ[36] SA_CKE[0] AT23 M_DB38 AM13 SB_DQ[37] SB_CKE[2] AU29
C M_SCKEA1 14 C
M_DA38 AW4 SA_DQ[37] SA_CKE[1] AU22 M_DB39 AM12 SB_DQ[38] SB_CKE[3]
M_DA39 AY4 SA_DQ[38] SA_CKE[2] AU23 M_DB45 AR9 SB_DQ[39]
M_DA41 AR1 SA_DQ[39] SA_CKE[3] M_DB41 AP9 SB_DQ[40]
M_DA45 AR4 SA_DQ[40] AU14 M_DB47 AR6 SB_DQ[41]
SA_DQ[41] SA_CS#[0] M_SCSA#0 14 SB_DQ[42]
M_DA42 AN3 AV9 M_SCSA#1 14 M_DB43 AP6
M_DA43 AN4 SA_DQ[42] SA_CS#[1] AU10 M_DB44 AR10 SB_DQ[43] AP17
SA_DQ[43] SA_CS#[2] SB_DQ[44] SB_CS#[0] M_SCSB#0 15
M_DA44 AR2 AW8 M_DB40 AP10 AN15 M_SCSB#1 15
M_DA40 AR3 SA_DQ[44] SA_CS#[3] M_DB46 AR7 SB_DQ[45] SB_CS#[1] AN17
M_DA46 AN2 SA_DQ[45] AY15 M_DB42 AP7 SB_DQ[46] SB_CS#[2] AL15
SA_DQ[46] SA_CK[0] M_CLKA0 14 SB_DQ[47] SB_CS#[3]
M_DA47 AN1 AY16 M_CLKA0# 14 M_DB52 AM9
M_DA49 AL1 SA_DQ[47] SA_CK#[0] AW15 M_DB53 AL9 SB_DQ[48] AM20
SA_DQ[48] SA_CK[1] M_CLKA1 14 SB_DQ[49] SB_CK[0] M_CLKB0 15
M_DA53 AL4 AV15 M_CLKA1# 14 M_DB50 AL6 AM21 M_CLKB0# 15
M_DA50 AJ3 SA_DQ[49] SA_CK#[1] AV14 M_DB55 AL7 SB_DQ[50] SB_CK#[0] AP22
SA_DQ[50] SA_CK[2] SB_DQ[51] SB_CK[1] M_CLKB1 15
M_DA51 AJ4 AW14 M_DB48 AM10 AP21 M_CLKB1# 15
M_DA52 AL2 SA_DQ[51] SA_CK#[2] AW13 M_DB49 AL10 SB_DQ[52] SB_CK#[1]
M_DA48 AL3 SA_DQ[52] SA_CK[3] AY13 M_DB54 AM6 SB_DQ[53] AN20
M_DA54 AJ2 SA_DQ[53] SA_CK#[3] M_DB51 AM7 SB_DQ[54] SB_CK[2] AN21
M_DA55 AJ1 SA_DQ[54] AW12 M_DB61 AH6 SB_DQ[55] SB_CK#[2] AP19
M_DA57 AG1 SA_DQ[55] RSVD_1 M_DB60 AH7 SB_DQ[56] SB_CK[3] AP20
M_DA61 AG4 SA_DQ[56] M_DB59 AE6 SB_DQ[57] SB_CK#[3]
M_DA58 AE3 SA_DQ[57] M_DB63 AE7 SB_DQ[58] AP16
SA_DQ[58] SB_DQ[59] SB_CAS# M_CASB# 15
M_DA59 AE4 M_DB56 AJ6 AL20 TP_MCP_RSVD_AL20
SA_DQ[59] SB_DQ[60] RSVD_4 TP28
M_DA60 AG2 M_DB57 AJ7 AM18
SA_DQ[60] SB_DQ[61] SB_RAS# M_RASB# 15
M_DA56 AG3 M_DB58 AF6 AK16
SA_DQ[61] SB_DQ[62] SB_WE# M_WEB# 15
M_DA62 AE2 M_DB62 AF7
M_DA63 AE1 SA_DQ[62] M_DQSB0 AF35 SB_DQ[63] AB39 DIMM_DQ_CPU_VREF_A
SA_DQ[63] 15 M_DQSB0 SB_DQS[0] SA_DIMM_VREFDQ DIMM_DQ_CPU_VREF_A 14
M_DQSA0 AE39 M_DQSB1 AL33 AB40 DIMM_DQ_CPU_VREF_B DIMM_DQ_CPU_VREF_B 15
14 M_DQSA0 SA_DQS[0] 15 M_DQSB1 SB_DQS[1] SB_DIMM_VREFDQ
M_DQSA1 AJ39 M_DQSB2 AP33
14 M_DQSA1 SA_DQS[1] 15 M_DQSB2 SB_DQS[2]
M_DQSA2 AN39 M_DQSB3 AN28
14 M_DQSA2 SA_DQS[2] 15 M_DQSB3 SB_DQS[3]
M_DQSA3 AV36 M_DQSB4 AN12
14 M_DQSA3 SA_DQS[3] 15 M_DQSB4 SB_DQS[4]
M_DQSA4 AV5 M_DQSB5 AP8
14 M_DQSA4 SA_DQS[4] 15 M_DQSB5 SB_DQS[5]
M_DQSA5 AP3 M_DQSB6 AL8
14 M_DQSA5 SA_DQS[5] 15 M_DQSB6 SB_DQS[6]
M_DQSA6 AK3 M_DQSB7 AG7
14 M_DQSA6 SA_DQS[6] 15 M_DQSB7 SB_DQS[7]
M_DQSA7 AF3 AU12 AN25
14 M_DQSA7 SA_DQS[7] SA_RAS# M_RASA# 14 SB_DQS[8]
AV32 M_DQSB#0 AF34
SA_DQS[8] 15 M_DQSB#0 SB_DQS#[0]
M_DQSA#0 AE38 AU11 M_DQSB#1 AK33
14 M_DQSA#0 SA_DQS#[0] SA_WE# M_WEA# 14 15 M_DQSB#1 SB_DQS#[1]
M_DQSA#1 AJ38 M_DQSB#2 AN33
B 14 M_DQSA#1 SA_DQS#[1] 15 M_DQSB#2 SB_DQS#[2] B
M_DQSA#2 AN38 AV20 M_DQSB#3 AN29
14 M_DQSA#2 SA_DQS#[2] RSVD_2 15 M_DQSB#3 SB_DQS#[3]
M_DQSA#3 AU36 M_DQSB#4 AN13
14 M_DQSA#3 SA_DQS#[3] 15 M_DQSB#4 SB_DQS#[4]
M_DQSA#4 AW5 AW27 M_DQSB#5 AR8
14 M_DQSA#4 SA_DQS#[4] RSVD_3 15 M_DQSB#5 SB_DQS#[5]
M_DQSA#5 AP2 M_DQSB#6 AM8
14 M_DQSA#5 SA_DQS#[5] 15 M_DQSB#6 SB_DQS#[6]
M_DQSA#6 AK2 AU9 M_DQSB#7 AG6
14 M_DQSA#6 SA_DQS#[6] SA_CAS# M_CASA# 14 15 M_DQSB#7 SB_DQS#[7]
M_DQSA#7 AF2 AN26
14 M_DQSA#7 SA_DQS#[7] SB_DQS#[8]
AU32 AK22
SA_DQS#[8] SM_DRAMRST#
2 OF 10
1 OF 10 SM_DRAMRST# 1 2 DDR3_DRAMRST# 14,15
Socket_LGA 1150_15u_Black
Socket_LGA 1150_15u_Black
C3
* 0.1uF
16V, X7R, +/-10%
Dummy C3
--20130304
Dummy

A A

FOXCONN PCEG
Title
CPU1-DDR3
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 9 of 43

5 4 3 2 1
 5 4 3 2 1

U1C
A12 X_1X16_TXP0
PEG_TX[0] X_1X16_TXP0 16
X_1X16_RXP0 E15 B12 X_1X16_TXN0
16 X_1X16_RXP0 PEG_RX[0] PEG_TX#[0] X_1X16_TXN0 16
X_1X16_RXN0 F15
16 X_1X16_RXN0 PEG_RX#[0] B11 X_1X16_TXP1
PEG_TX[1] X_1X16_TXP1 16
X_1X16_RXP1 D14 C11 X_1X16_TXN1
16 X_1X16_RXP1 PEG_RX[1] PEG_TX#[1] X_1X16_TXN1 16
X_1X16_RXN1 E14
16 X_1X16_RXN1 PEG_RX#[1] C10 X_1X16_TXP2
PEG_TX[2] X_1X16_TXP2 16
X_1X16_RXP2 E13 D10 X_1X16_TXN2
16 X_1X16_RXP2 PEG_RX[2] PEG_TX#[2] X_1X16_TXN2 16
X_1X16_RXN2 F13
16 X_1X16_RXN2 PEG_RX#[2] B9 X_1X16_TXP3
D PEG_TX[3] X_1X16_TXP3 16 D
X_1X16_RXP3 D12 C9 X_1X16_TXN3
16 X_1X16_RXP3 PEG_RX[3] PEG_TX#[3] X_1X16_TXN3 16
X_1X16_RXN3 E12
16 X_1X16_RXN3 PEG_RX#[3] C8 X_1X16_TXP4
PEG_TX[4] X_1X16_TXP4 16
X_1X16_RXP4 E11 D8 X_1X16_TXN4
16 X_1X16_RXP4 PEG_RX[4] PEG_TX#[4] X_1X16_TXN4 16
X_1X16_RXN4 F11
16 X_1X16_RXN4 PEG_RX#[4] B7 X_1X16_TXP5
PEG_TX[5] X_1X16_TXP5 16
X_1X16_RXP5 F10 C7 X_1X16_TXN5
16 X_1X16_RXP5 PEG_RX[5] PEG_TX#[5] X_1X16_TXN5 16
X_1X16_RXN5 G10
16 X_1X16_RXN5 X_1X16_RXP6 E9 PEG_RX#[5] A6 X_1X16_TXP6
16 X_1X16_RXP6 PEG_RX[6] PEG_TX[6] X_1X16_TXP6 16
X_1X16_RXN6 F9 B6 X_1X16_TXN6
16 X_1X16_RXN6 PEG_RX#[6] PEG_TX#[6] X_1X16_TXN6 16
X_1X16_RXP7 F8
16 X_1X16_RXP7 X_1X16_RXN7 G8 PEG_RX[7] B5 X_1X16_TXP7
16 X_1X16_RXN7 PEG_RX#[7] PEG_TX[7] X_1X16_TXP7 16
X_1X16_RXP8 D3 C5 X_1X16_TXN7
16 X_1X16_RXP8 PEG_RX[8] PEG_TX#[7] X_1X16_TXN7 16
X_1X16_RXN8 D4
16 X_1X16_RXN8 X_1X16_RXP9 E4 PEG_RX#[8] E1 X_1X16_TXP8
16 X_1X16_RXP9 PEG_RX[9] PEG_TX[8] X_1X16_TXP8 16
X_1X16_RXN9 E5 E2 X_1X16_TXN8
16 X_1X16_RXN9 PEG_RX#[9] PEG_TX#[8] X_1X16_TXN8 16
X_1X16_RXP10 F5
16 X_1X16_RXP10 X_1X16_RXN10 F6 PEG_RX[10] F2 X_1X16_TXP9
16 X_1X16_RXN10 PEG_RX#[10] PEG_TX[9] X_1X16_TXP9 16
X_1X16_RXP11 G4 F3 X_1X16_TXN9
16 X_1X16_RXP11 PEG_RX[11] PEG_TX#[9] X_1X16_TXN9 16
X_1X16_RXN11 G5
16 X_1X16_RXN11 X_1X16_RXP12 H5 PEG_RX#[11] G1 X_1X16_TXP10
16 X_1X16_RXP12 PEG_RX[12] PEG_TX[10] X_1X16_TXP10 16
X_1X16_RXN12 H6 G2 X_1X16_TXN10
16 X_1X16_RXN12 PEG_RX#[12] PEG_TX#[10] X_1X16_TXN10 16
X_1X16_RXP13 J4
16 X_1X16_RXP13 X_1X16_RXN13 J5 PEG_RX[13] H2 X_1X16_TXP11
16 X_1X16_RXN13 PEG_RX#[13] PEG_TX[11] X_1X16_TXP11 16
X_1X16_RXP14 K5 H3 X_1X16_TXN11
16 X_1X16_RXP14 PEG_RX[14] PEG_TX#[11] X_1X16_TXN11 16
X_1X16_RXN14 K6
16 X_1X16_RXN14 X_1X16_RXP15 L4 PEG_RX#[14] J1 X_1X16_TXP12
16 X_1X16_RXP15 PEG_RX[15] PEG_TX[12] X_1X16_TXP12 16
X_1X16_RXN15 L5 J2 X_1X16_TXN12
16 X_1X16_RXN15 PEG_RX#[15] PEG_TX#[12] X_1X16_TXN12 16
K2 X_1X16_TXP13
PEG_TX[13] X_1X16_TXP13 16
19 DMI_PCH_CPU_RXP0 U3 K3 X_1X16_TXN13
DMI_RX[0] PEG_TX#[13] X_1X16_TXN13 16
19 DMI_PCH_CPU_RXN0 T3 M2 X_1X16_TXP14
DMI_RX#[0] PEG_TX[14] X_1X16_TXP14 16
19 DMI_PCH_CPU_RXP1
U1 M3 X_1X16_TXN14
DMI_RX[1] PEG_TX#[14] X_1X16_TXN14 16
19 DMI_PCH_CPU_RXN1 V1 L1 X_1X16_TXP15
DMI_RX#[1] PEG_TX[15] X_1X16_TXP15 16
L2 X_1X16_TXN15
PEG_TX#[15] X_1X16_TXN15 16
19 DMI_PCH_CPU_RXP2 W2
V2 DMI_RX[2] AA4
19 DMI_PCH_CPU_RXN2 DMI_RX#[2] DMI_TX[0] DMI_CPU_PCH_RXP0 19
19 DMI_PCH_CPU_RXP3
Y3 AA5 DMI_CPU_PCH_RXN0 19
W3 DMI_RX[3] DMI_TX#[0]
C 19 DMI_PCH_CPU_RXN3 C
DMI_RX#[3] AB3
DMI_TX[1] DMI_CPU_PCH_RXP1 19
D1 AB4 DMI_CPU_PCH_RXN1 19
C2 RSVD_TP_1 DMI_TX#[1]
B3 RSVD_TP_2 AC5
RSVD_TP_3 DMI_TX[2] DMI_CPU_PCH_RXP2 19
A4 AC4 DMI_CPU_PCH_RXN2 19
RSVD_TP_4 DMI_TX#[2]
AC1 DMI_CPU_PCH_RXP3 19
DMI_TX[3]

*
VCOMP_OUT_CPU R3 24.9 +/-1% PEGICOMP_MCP P3 AC2 DMI_CPU_PCH_RXN3 19
PEG_RCOMP DMI_TX#[3]
3 OF 10
Socket_LGA 1150_15u_Black

B B

U1D

E17
D16 DDIB_TXB[0] F17
22 FDI_CSYNC FDI_CSYNC DDIB_TXB#[0] F18
D18 DDIB_TXB[1] G18
22 FDI_INT FDI_INT DDIB_TXB#[1]
G19
DDIB_TXB[2]
*

VCOMP_OUT_CPU R4 24.9 +/-1% SNB_IPL_RCOMP R4 H19

DP_COMP DDIB_TXB#[2] F20
DDIB_TXB[3] G20
U5 DDIB_TXB#[3]
22 CK_OUT_DP# SSC_DPLL_REF_CLK#
22 CK_OUT_DP
U6 D19 DPC_LANE_DP0_C 17
SSC_DPLL_REF_CLK DDIC_TXC[0] E19
DDIC_TXC#[0] DPC_LANE_DN0_C 17
C20 DPC_LANE_DP1_C 17
E16 DDIC_TXC[1] D20
TP1 EDP_DISP_UTIL DDIC_TXC#[1] DPC_LANE_DN1_C 17

TP2
TP_MCP_RSVD_K11 K11
RSVD_TP_5 DDIC_TXC[2]
D21 DPC_LANE_DP2_C 17 HDMI 1
TP_MCP_RSVD_J12 J12 E21 DPC_LANE_DN2_C 17
TP3 RSVD_TP_6 DDIC_TXC#[2] C22 DPC_LANE_DP3_C 17
B14 DDIC_TXC[3] D22
22 FDI_TX0_N FDI0_TX0#[0] DDIC_TXC#[3] DPC_LANE_DN3_C 17
A14
22 FDI_TX0_P FDI0_TX0[0] B15
DDID_TXD[0] C15
C13 DDID_TXD#[0] A16
22 FDI_TX1_N B13 FDI0_TX0#[1] DDID_TXD[1] B16
22 FDI_TX1_P FDI0_TX0[1] DDID_TXD#[1]
B17
DDID_TXD[2] C17
DDID_TXD#[2] A18
DDID_TXD[3] B18
DDID_TXD#[3]
4 OF 10
A Socket_LGA 1150_15u_Black A

FOXCONN PCEG
Title
CPU2-PEGX16/DMI/FDI/DDI
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 10 of 43

5 4 3 2 1
 5 4 3 2 1

H_CPU_VCCIO_RIGHT

*R5 H_CPU_VCCIO_RIGHT
51 Ohm
Dummy
H_PWRGOOD MCP - VID,CTRL, MSIC
* R6
10K * R8 *R9
110Ohm *90.9 Ohm
R10

+/-5% 75 +/-1% +/-1% U1E

+/-1% Dummy
D D
22 CK_PE_100M_DMI# V4 G39 H_BPM#0 TP36
VIDALERT_# V5 BCLK# BPM#[0] J39 H_BPM#1
22 CK_PE_100M_DMI BCLK BPM#[1] TP37
G38
BPM#[2]
*R724
100 Ohm
42
42
H_VIDSCLK
H_VIDSOUT
C38
C37 VIDSCLK
VIDSOUT
BPM#[3]
BPM#[4]
H37
H38

*
+/-1% 42 H_VIDALERT# R11 44.2Ohm +/-1% VIDALERT_# B37 J38
H_CPU_VCCIO_RIGHT Dummy VIDALERT# BPM#[5] K39
AK21 BPM#[6] K37
21 DRAM_PWRGD SM_DRAMPWROK BPM#[7]
21,42 H_PWRGOOD H_PWRGOOD AB35 T35
PLTRST_IN_CPU# M39 PWRGOOD RSVD_3 M38
11,20 PLTRST_IN_CPU# RESET# RSVD_4
*R13

*
1K 20 PMSYNC#
P36 P6 TESTLOW1 R14 49.9 +/-1%
+/-5% H_PECI N37 PM_SYNC TESTLOW_2 K9 VCCST
20,34 H_PECI PECI RSVD_6 VCCST 12
Dummy H15
RSVD_7

*
H_CPU_VCCIO_RIGHT R12 1K +/-5% H_CATERR# M36 J9
Dummy H_PROCHOT# K38 CATERR# RSVD_8 H14
42 H_PROCHOT# PROCHOT# RSVD_9
H_PECI 20 H_THERMTRIP# H_THERMTRIP# F37 M8 +VCORE
H_SKTOCC_N D38 THERMTRIP# VCC_1 AV2
21 H_SKTOCC_N SKTOCC# RSVD_10 J16
AB38 RSVD_11 H16
H_CPU_VCCIO_RIGHT 14,15 DIMM_CPU_VREF_CA SM_VREF RSVD_12 N40 PWR_DEBUG
CFG0 AA37 PWR_DEBUG N39
TP39 CFG[0] VSS_1
TP40 CFG1 Y38 V7
CFG2 AA36 CFG[1] RSVD_13 AB6
TP41 CFG[2] RSVD_14
TP42 CFG3 W38 K13
CFG4 V39 CFG[3] RSVD_TP_7 J8
TP43 CFG[4] RSVD_TP_8
*

***
R16 51 Ohm +/-5% H_PROCHOT# TP44 CFG5 U39 R1 DDR_RCOMP_0 R18 100 Ohm +/-1%
CFG6 U40 CFG[5] SM_RCOMP[0] P1 DDR_RCOMP_1 R19 75 +/-1%
TP45 CFG[6] SM_RCOMP[1]
TP46 CFG7 V38 R2 DDR_RCOMP_2 R20 100 Ohm
CFG8 T40 CFG[7] SM_RCOMP[2] AB36 +/-1%
TP47 CFG[8] RSVD_15
TP48 CFG9 Y35 AW2
CFG10 AA34 CFG[9] RSVD_TP_9 AV1
TP49 CFG[10] RSVD_TP_10
TP50 CFG11 V37 AC8
CFG12 Y34 CFG[11] RSVD_16 P4
TP51 CFG[12] VCOMP_OUT VCOMP_OUT_CPU
TP52 CFG13 U38 U8
CFG14 W34 CFG[13] RSVD_18 AB33
TP53 CFG[14] RSVD_19
TP54 CFG15 V35 T8
CFG[15] VSS_2 Y8
C C
RSVD_20
*

+1P05V_PCH R22 1K +/-5% H_THERMTRIP# TP55 HSW_PCUSTB_0_DP Y36 M10

HSW_PCUSTB_0_DN Y37 CFG[17] RSVD_21 L10
TP56 CFG[16] RSVD_22
TP57 HSW_PCUSTB_1_DP V36 M11
HSW_PCUSTB_1_DN W36 CFG[19] RSVD_23 L12
TP58 CFG[18] RSVD_24 W8
H_SKTOCC_N D39 RSVD_25 R33
18 H_TCK TCK RSVD_26
18 H_TDI F38 P33
F39 TDI RSVD_27 E40
18 H_TDO TDO VCC_SENSE VCORE_VCC_SEN 42
* R723 18 H_TMS
E39
TMS
VSS_3
N33
0 18 H_TRST# E37 J11
H_PRDY_N L39 TRST# VSS_4 M9
+/-5% TP35 PRDY# VSS_5
Dummy TP34 H_PREQ_N L37 J7
2 1 G40 PREQ# VSS_6 F40
21,37 FP_RST# DBR# VSS_SENSE VCORE_VSS_SEN 42

* *
R23 49.9 +/-1% TESTLOW2 N5 N35 TP_MCP_RSVD_N35 R24 0 +/-5% Dummy +1P05V_PCH
K8 TESTLOW RSVD28 W6
RSVD_1 DPLL_REF_CLK# CK_DPNS# 22
J10 W5 CK_DPNS 22
RSVD_2 DPLL_REF_CLK H40 TPEV_CFG_RCOMP R25 49.9 +/-1%
CFG_RCOMP

5 OF 10
Socket_LGA 1150_15u_Black

Check with Intel for this circuit
necessary ??

B B

3D3V_SYS 3D3V_SYS

R26 R27
+1P05V_PCH * 10K
+/-5%
*
10K
+/-5%
Dummy Dummy

***
* R15
150
R28 10K +/-5%
Dummy
Q2
PWR_DEBUG
+/ -1% 21,42 P_VR_READY R29 10K +/-5%

C
Dummy MMBT3904-7-F
PWR_DEBUG +VCORE R32 10K +/-5% B Q1 B
Dummy MMBT3904-7-F
R17
* 10K
Dummy Dummy

E
+/-5% * R34 *
C6
0.1uF
Dummy 0 16V, X7R, +/-10%
+/-5% Dummy
Dummy
Check with Intel for this circuit
necessary ??

CPU REST CIRCUITRY

Ensure timings and edge rates are met on PLTRST#
going to processor.

3D3V_DUAL +1P05V_PCH

A
*R301K *R31
180Ohm
A

+/-5% +/-1%
Dummy Dummy
*

R37
1K P_RST_CPU#_O R33 0 +/-5% Dummy PLTRST_IN_CPU# 11,20
D

+/-5%
C

Dummy Q4
* R36 *
*

19,26,34 PLTRST# R35 10K +/-5%P_RST_CPU#B Q3 2N7002

Dummy MMBT3904-7-F G 75 C7
Dummy
C24
* +/-1% 100pF
FOXCONN PCEG
E

0.1uF 50V, NPO, +/-5%

S

16V, X7R, +/-10%

Dummy Dummy Title
Dummy
CPU3-MISC/VID
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 11 of 43

5 4 3 2 1
 5 4 3 2 1

+1P05V_PCH
D D

+VCORE

* R98 +VCORE
0
+/-5% U1F
Dummy P8 C31
VCC_2 VCC_76

**
H_CPU_VCCIO_RIGHT R96 0 +/-5% L40 C33
R38 0 +/-5% AB8 VCCIO_OUT VCC_77 L16
11 VCCST VCCIO2PCH VCC_78
+VCCIO2PCH * R39 Dummy
VCC_79
VCC_80
L15
J35
C22 0 +VCORE L31 H33
VCC_3 VCC_81
* *

*
0.1uF +1P05V_PCH R40 0 +/-5% L18 H35
C23 16V, X7R, +/-10% L17 VCC_4 VCC_82 J21
+/-5% J33 VCC_5 VCC_83 J22
4.7uF VCC_6 VCC_84
+/-10% A24 J23
A25 VCC_7 VCC_85 J24
A26 VCC_8 VCC_86 J25
A27 VCC_9 VCC_87 J26
A28 VCC_10 VCC_88 J27
A29 VCC_11 VCC_89 J28
A30 VCC_12 VCC_90 J29
G33 VCC_13 VCC_91 J30
B25 VCC_14 VCC_92 J32
B27 VCC_15 VCC_93 J34
B29 VCC_16 VCC_94 K19
B31 VCC_17 VCC_95 K21
J31 VCC_18 VCC_96 K23
B33 VCC_19 VCC_97 K25
G31 VCC_20 VCC_98 K27
B35 VCC_21 VCC_99 K29
C24 VCC_22 VCC_100 K31
C25 VCC_23 VCC_101 M13
C26 VCC_24 VCC_102 K33
C27 VCC_25 VCC_103 K35
C C
C28 VCC_26 VCC_104 L19
C29 VCC_27 VCC_105 L20
C30 VCC_28 VCC_106 L21
C32 VCC_29 VCC_107 L22
C34 VCC_30 VCC_108 L23
C35 VCC_31 VCC_109 L24
D25 VCC_32 VCC_110 L25
D27 VCC_33 VCC_111 L26
D29 VCC_34 VCC_112 L27
D31 VCC_35 VCC_113 L28
E33 VCC_36 VCC_114 L29
D33 VCC_37 VCC_115 L30
E31 VCC_38 VCC_116 L32
D35 VCC_39 VCC_117 L33
E24 VCC_40 VCC_118 M17
E25 VCC_41 VCC_119 M15
E26 VCC_42 VCC_120 M19
E27 VCC_43 VCC_121 M21
E28 VCC_44 VCC_122 M23
E29 VCC_45 VCC_123 M25 V_SM
E30 VCC_46 VCC_124 M27
E32 VCC_47 VCC_125 M29
E34 VCC_48 VCC_126 M33
F23 VCC_49 VCC_127
F25 VCC_50 AJ12
F27 VCC_51 VDDQ_1 AJ13
F29 VCC_52 VDDQ_2 AJ15
F31 VCC_53 VDDQ_3 AJ17
E35 VCC_54 VDDQ_4 AJ20
F33 VCC_55 VDDQ_5 AJ21
F35 VCC_56 VDDQ_6 AJ24
G22 VCC_57 VDDQ_7 AJ25
G23 VCC_58 VDDQ_8 AJ28
G24 VCC_59 VDDQ_9 AJ29
G25 VCC_60 VDDQ_10 AJ9
G26 VCC_61 VDDQ_11 AT17
G27 VCC_62 VDDQ_12 AT22
B
G28 VCC_63 VDDQ_13 AU15 B
G29 VCC_64 VDDQ_14 AU20
G30 VCC_65 VDDQ_15 AU24
G32 VCC_66 VDDQ_16 AV10
G34 VCC_67 VDDQ_17 AV11
G35 VCC_68 VDDQ_18 AV13
H23 VCC_69 VDDQ_19 AV18
H25 VCC_70 VDDQ_20 AV23
H27 VCC_71 VDDQ_21 AV8
H29 VCC_72 VDDQ_22 AW16
H31 VCC_73 VDDQ_23 AY12
L34 VCC_74 VDDQ_24 AY14
VCC_75 VDDQ_25 AY9
6 OF 10 VDDQ_26
Socket_LGA 1150_15u_Black

A A

FOXCONN PCEG
Title
CPU4-Vcore
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 12 of 43

5 4 3 2 1
 5 4 3 2 1

U1G U1H U1I

A13 AJ34 AP11 AW32 G12 M4

A15 VSS_7 VSS_87 AJ35 AP14 VSS_168 VSS_247 AW34 G13 VSS_327 VSS_407 M40
A17 VSS_8 VSS_88 AJ36 AP15 VSS_169 VSS_248 AW36 G14 VSS_328 VSS_408 M5
A23 VSS_9 VSS_89 AJ37 AP24 VSS_170 VSS_249 AW7 G16 VSS_329 VSS_409 M6
A11 VSS_10 VSS_90 AJ40 AP27 VSS_171 VSS_250 AY17 H11 VSS_330 VSS_410 M7
AA3 VSS_11 VSS_91 AJ5 AP30 VSS_172 VSS_251 AY23 G17 VSS_331 VSS_411 K15
AA33 VSS_12 VSS_92 AJ8 AP36 VSS_173 VSS_252 AY26 G21 VSS_332 VSS_412 K16
AA35 VSS_13 VSS_93 AK1 AP4 VSS_174 VSS_253 AY27 G3 VSS_333 VSS_413 N1
AA38 VSS_14 VSS_94 AK10 AP5 VSS_175 VSS_254 AY30 H13 VSS_334 VSS_414 N2
AA6 VSS_15 VSS_95 AK11 AR11 VSS_176 VSS_255 AY5 H22 VSS_335 VSS_415 N3
AA7 VSS_16 VSS_96 AK12 AR14 VSS_177 VSS_256 AY7 H32 VSS_336 VSS_416 N7
AA8 VSS_17 VSS_97 AK13 AR16 VSS_178 VSS_257 B24 G36 VSS_337 VSS_417 N34
D
A5 VSS_18 VSS_98 AK14 AR17 VSS_179 VSS_258 B26 G37 VSS_338 VSS_418 N4 D
AB34 VSS_19 VSS_99 AK18 AR18 VSS_180 VSS_259 B28 G6 VSS_339 VSS_419 N6
AB37 VSS_20 VSS_100 AK19 AR19 VSS_181 VSS_260 B30 G7 VSS_340 VSS_420 K32
AB5 VSS_21 VSS_101 AK24 AR20 VSS_182 VSS_261 B34 G15 VSS_341 VSS_421 P2
AB7 VSS_22 VSS_102 AK25 AR21 VSS_183 VSS_262 B36 H1 VSS_342 VSS_422 P34
AC3 VSS_23 VSS_103 AK26 AR22 VSS_184 VSS_263 B4 H10 VSS_343 VSS_423 P38
AC33 VSS_24 VSS_104 AK27 AR23 VSS_185 VSS_264 B8 H17 VSS_344 VSS_424 P5
VSS_25 VSS_105 VSS_186 VSS_265 VSS_345 VSS_425 U1J
AC34 AK28 AR24 C4 H18 P7
AC35 VSS_26 VSS_106 AK29 AR27 VSS_187 VSS_266 C6 H20 VSS_346 VSS_426 N8
AC36 VSS_27 VSS_107 AK30 AR30 VSS_188 VSS_267 C12 H21 VSS_347 VSS_427 R3
VSS_28 VSS_108 VSS_189 VSS_268 VSS_348 VSS_428 K12
AC37 AK36 AR31 C14 H24 L36 RSVD_TP_12 J13
AC38 VSS_29 VSS_109 AK4 AR32 VSS_190 VSS_269 C16 H26 VSS_349 VSS_429 R35 RSVD_TP_13
AC39 VSS_30 VSS_110 AK5 AR33 VSS_191 VSS_270 C18 H28 VSS_350 VSS_430 R40
VSS_31 VSS_111 VSS_192 VSS_271 VSS_351 VSS_431 P37
AC40 AK6 AR34 C19 H30 R5 AY18 RSVD_TP_14 N38
AC6 VSS_32 VSS_112 AK7 AR35 VSS_193 VSS_272 C21 H34 VSS_352 VSS_432 R6 RSVD_29 RSVD_TP_15
VSS_33 VSS_113 VSS_194 VSS_273 VSS_353 VSS_433 AW24
AC7 AK8 AR36 C23 H36 R7 AW23 RSVD_30 R36
VSS_34 VSS_114 VSS_195 VSS_274 VSS_354 VSS_434 20,21,34 PWRGD_3V
A7 AK9 AR37 C36 H39 T1 AV29 RSVD_31 RSVD_TP_16 C39
AD1 VSS_35 VSS_115 AL11 AR38 VSS_196 VSS_275 B10 H4 VSS_355 VSS_435 T2 RSVD_32 RSVD_TP_17
VSS_36 VSS_116 VSS_197 VSS_276 VSS_356 VSS_436 AV24
AD2 AL14 AR39 B23 H7 T33 AU39 RSVD_33 U35
VSS_37 VSS_117 VSS_198 VSS_277 VSS_357 VSS_437
AD3
AD33 VSS_38
VSS_39
VSS_118
VSS_119
AL17
AL21
AR40
AR5 VSS_199
VSS_200
VSS_278
VSS_279
C3
D9
H8
H9 VSS_358
VSS_359
VSS_438
VSS_439
M35
T39 *R41
6.04K
AU27
AU1
RSVD_34
RSVD_35
VSS_467
VSS_468
P40
AD36 AL22 AT1 D11 J19 T4 +/-1% AT40 RSVD_36 R38
AD4 VSS_40 VSS_120 AL24 AT10 VSS_201 VSS_280 D13 J20 VSS_360 VSS_440 T5 RSVD_37 VSS_469
VSS_41 VSS_121 VSS_202 VSS_281 VSS_361 VSS_441 AK20 T37
AD5 AL27 AT11 D15 J3 T6 Y7 RSVD_38 VSS_470 V34
AD6 VSS_42 VSS_122 AL30 AT12 VSS_203 VSS_282 D17 J18 VSS_362 VSS_442 T7 RSVD_39 VSS_471
VSS_43 VSS_123 VSS_204 VSS_283 VSS_363 VSS_443 T34
AD7
AD8 VSS_44
VSS_45
VSS_124
VSS_125
AL36
AL37
AT13
AT14 VSS_205
VSS_206
VSS_284
VSS_285
D2
D23
K10
K14 VSS_364
VSS_365
VSS_444
VSS_445
R8
U2 *R42
2.67K Ohm
R34
J40
RSVD_40
RSVD_41 VSS_472
R39
AE33 AL38 AT15 D24 J36 U33 +/-1% J17 RSVD_42 T38
AE36 VSS_46 VSS_126 AL39 AT16 VSS_207 VSS_286 D26 J37 VSS_366 VSS_446 U34 RSVD_43 VSS_473
VSS_47 VSS_127 VSS_208 VSS_287 VSS_367 VSS_447 J15 U36
AE37 AL40 AT2 D28 J6 U37 H12 RSVD_44 VSS_474 P39
AE40 VSS_48 VSS_128 AL5 AT24 VSS_209 VSS_288 D30 K1 VSS_368 VSS_448 U4 RSVD_45 VSS_475
AE5 VSS_49 VSS_129 AM1 AT25 VSS_210 VSS_289 D34 K18 VSS_369 VSS_449 U7
VSS_50 VSS_130 VSS_211 VSS_290 VSS_370 VSS_450 T36
AE8 AM11 AT26 D36 K20 P35 VSS_476 R37
AF1 VSS_51 VSS_131 AM14 AT27 VSS_212 VSS_291 D37 K22 VSS_371 VSS_451 V3 VSS_477
AF33 VSS_52 VSS_132 AM15 AT28 VSS_213 VSS_292 D5 K24 VSS_372 VSS_452 V33
VSS_53 VSS_133 VSS_214 VSS_293 VSS_373 VSS_453 J14
AF36 AM19 AT29 D6 K26 V40 VSS_478 N36
AF4 VSS_54 VSS_134 AM2 AT3 VSS_215 VSS_294 D7 K28 VSS_374 VSS_454 V6 RSVD_TP_11
VSS_55 VSS_135 VSS_216 VSS_295 VSS_375 VSS_455 10 OF 10
C AF5 AM24 AT30 E7 K30 V8 C
AF8 VSS_56 VSS_136 AM27 AT32 VSS_217 VSS_296 E8 K34 VSS_376 VSS_456 W1
VSS_57 VSS_137 VSS_218 VSS_297 VSS_377 VSS_457 Socket_LGA 1150_15u_Black
AG33 AM3 AT34 E10 K36 W33
AG36 VSS_58 VSS_138 AM30 AT36 VSS_219 VSS_298 E18 K4 VSS_378 VSS_458 W35
AG37 VSS_59 VSS_139 AM31 AT38 VSS_220 VSS_299 E3 K40 VSS_379 VSS_459 W37
AG38 VSS_60 VSS_140 AM32 AT39 VSS_221 VSS_300 E20 K7 VSS_380 VSS_460 W4
AG39 VSS_61 VSS_141 AM33 AT4 VSS_222 VSS_301 E22 L7 VSS_381 VSS_461 W7
AG40 VSS_62 VSS_142 AM34 AT5 VSS_223 VSS_302 E23 L8 VSS_382 VSS_462
AG5 VSS_63 VSS_143 AM35 AT6 VSS_224 VSS_303 E36 L9 VSS_383 Y33
AG8 VSS_64 VSS_144 AM36 AT7 VSS_225 VSS_304 E38 L11 VSS_384 VSS_463 Y4
AH1 VSS_65 VSS_145 AM4 AT8 VSS_226 VSS_305 B32 L3 VSS_385 VSS_464 Y5
AH2 VSS_66 VSS_146 AM5 AT9 VSS_227 VSS_306 E6 L13 VSS_386 VSS_465 Y6
AH3 VSS_67 VSS_147 AN10 AU2 VSS_228 VSS_307 F1 L14 VSS_387 VSS_466
AH33 VSS_68 VSS_148 AN11 AU25 VSS_229 VSS_308 F32 L35 VSS_388
AH36 VSS_69 VSS_149 AN14 AU3 VSS_230 VSS_309 F12 L38 VSS_389
AH4 VSS_70 VSS_150 AN16 AU30 VSS_231 VSS_310 F14 L6 VSS_390
AH5 VSS_71 VSS_151 AN18 AU34 VSS_232 VSS_311 F16 M1 VSS_391
AH8 VSS_72 VSS_152 AN19 AU38 VSS_233 VSS_312 F19 K17 VSS_392 AU40
AJ11 VSS_73 VSS_153 AN22 AU5 VSS_234 VSS_313 F21 M12 VSS_393 VSS_NCTF_1 AV39
AJ14 VSS_74 VSS_154 AN23 AU7 VSS_235 VSS_314 F22 M14 VSS_394 VSS_NCTF_2 AW38
AJ16 VSS_75 VSS_155 AN24 AV21 VSS_236 VSS_315 F24 M18 VSS_395 VSS_NCTF_3 AY3
AJ18 VSS_76 VSS_156 AN27 AV28 VSS_237 VSS_316 F26 M16 VSS_396 VSS_NCTF_4 B38
AJ19 VSS_77 VSS_157 AN30 AV3 VSS_238 VSS_317 F28 M20 VSS_397 VSS_NCTF_5 B39
AJ22 VSS_78 VSS_158 AN36 AV30 VSS_239 VSS_318 F30 M22 VSS_398 VSS_NCTF_6 C40
AJ23 VSS_79 VSS_159 AN37 AV34 VSS_240 VSS_319 F34 M24 VSS_399 VSS_NCTF_7 D40
AJ26 VSS_80 VSS_160 AN40 AV38 VSS_241 VSS_320 F36 M26 VSS_400 VSS_NCTF_8
AJ27 VSS_81 VSS_161 AN5 AV7 VSS_242 VSS_321 F4 M28 VSS_401
AJ30 VSS_82 VSS_162 AN6 AW26 VSS_243 VSS_322 D32 M30 VSS_402
AJ31 VSS_83 VSS_163 AN7 AW3 VSS_244 VSS_323 F7 M32 VSS_403
AJ32 VSS_84 VSS_164 AN8 AW30 VSS_245 VSS_324 G9 M34 VSS_404
AJ33 VSS_85 VSS_165 AN9 VSS_246 VSS_325 G11 M37 VSS_405
VSS_86 VSS_166 AP1 VSS_326 VSS_406
7 OF 10
VSS_167
8 OF 10 9 OF 10
Socket_LGA 1150_15u_Black Socket_LGA 1150_15u_Black Socket_LGA 1150_15u_Black

B B

CPU_FAN Back plate (DIP)

mylar PAD for CPU_FAN back plate
CPU_Loding Module (DIP) Non-PTH Hole

CPU_Plastic Cover (DIP)

MLH2 MLH1
24
23
22
21
20
19
18
17

@XU1 I
CCL=Y 16
24
23
22
21
20
19
18
17

16 15
H1 15 14 @XU1_COVER1
H2 H1 14 13
H3 H2 13 12
H3 12 11
11 10
10 9
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8

LGA115X_CPU_COVER MLH3
MLH4
A A

CPU Backplated
1

BP1

FOXCONN PCEG
Title
CPU5-GND
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 13 of 43

5 4 3 2 1
 A
B
C
D

V_SM

1K
1K

+/-1%
+/-1%

V_SM
V_SM

*
Reserved
Reserved

* R46 *
* R43 *

C17
1K
1K
198 79

C9
C8

* R50

0.1uF
SPD ADDRESS: 000
FREE0 RSVD

+/-1%
+/-1%
187 77

0.1uF
0.1uF
49 FREE1 ODT1 195

Dummy

Reserved
Reserved
48 FREE2 ODT0

* R48 *
V_SM_VTT
FREE3

DIMMA_DQ_VREF_R R45
240

* 16V, X7R, +/-10%

5
5

VTT

C12
120 68

16V, X7R, +/-10%

16V, X7R, +/-10%

0.1uF
* VTT NC/PAR_IN 53

C18
DIMMA_VREF_RC R49
NC/ERR_OUT 167

0.1uF
than or equal to 0.3 　Farads nominal
239 NC/TEST4
* 235 VSS
232 VSS

16V, X7R, +/-10%

0 +/-5%
VSS
M_SODTA0
M_SODTA1

229

Place close together.

226 VSS

* 16V, X7R, +/-10%

223 VSS 39
220 VSS CB<0> 40

0 +/-5%
VSS CB<1>

C19
217 45

0.1uF
214 VSS CB<2> 46

C10
211 VSS CB<3> 158

R44

0.1uF
VSS CB<4>

+/-5%
208 159
205 VSS CB<5> 164

Place resistors close to channel_A dimms on DIMM_VREF_A

9
9

*
202 VSS CB<6> 165

* 16V, X7R, +/-10%

199 VSS CB<7>
166 VSS

16V, X7R, +/-10%

C13
*
VSS

C20
4.7uF
163 7 M_DQSA0

Dummy

0.1uF
+/-10%
160 VSS DQS<0> 6 M_DQSA#0
VSS DQS*<0>

C11
157

0.1uF
154 VSS 16 M_DQSA1
151 VSS DQS<1> 15 M_DQSA#1

DIMMA_CA_VREF
VSS DQS*<1>

R47
148

* 16V, X7R, +/-10%

*
145 VSS 25 M_DQSA2
142 VSS DQS<2> 24 M_DQSA#2

16V, X7R, +/-10%

* VSS DQS*<2>

C21
C14
DIMMA_DQ_VREF
139

0.1uF
0.1uF
136 VSS 34 M_DQSA3
133 VSS DQS<3> 33 M_DQSA#3
130 VSS DQS*<3>
127 VSS 85 M_DQSA4

0 +/-5%

close to DIMM
VSS DQS<4>

22nF
C1
124 84 M_DQSA#4

16V, X7R, +/-10%

16V, X7R, +/-10%
CH‐A VREFDQ

Place 0.1uF cap

121 VSS DQS*<4>
119 VSS 94 M_DQSA5

*
116 VSS DQS<5> 93 M_DQSA#5
113 VSS DQS*<5>

16V, X7R, +/-10%

*R1

*
VSS

24.9
110 103 M_DQSA6

+/-1%
107 VSS DQS<6> 102 M_DQSA#6
VSS DQS*<6>

*R21
24.9
Reserved

CH‐A VREFCA
104

C4

+/-1%
For future processor compatibility, the total on-board capacitance for VREFDQ per channel should be less
101 VSS 112 M_DQSA7

22nF

4
4

98 VSS DQS<7> 111 M_DQSA#7

95 VSS DQS*<7>
92 VSS 43
89 VSS DQS<8> 42
86 VSS DQS*<8>
83 VSS 125
80 VSS DM0/DQS<9> 126
47 VSS DQS*<9>
44 VSS 134

DIMM_CPU_VREF_CA
41 VSS DM1/DQS<10> 135

DIMM_DQ_CPU_VREF_A
38 VSS DQS*<10>
35 VSS 143
32 VSS DM2/DQS<11> 144
29 VSS DQS*<11>
26 VSS 152
23 VSS DM3/DQS<12> 153
20 VSS DQS*<12>

9
9

VSS
15,21,27,36
15,21,27,36

17 203
14 VSS DM4/DQS<13> 204
9

VSS DQS*<13>

11,15
11
8 VSS 212

9
9
9
9
9
9
9
9
V_SM
M_DQSA[7..0]

5 VSS DM5/DQS<14> 213

M_DQSA#[7..0]

2 VSS DQS*<14>
VSS 221
197 DM6/DQS<15> 222
194 VDDQ DQS*<15>
191 VDDQ 230
189 VDDQ DM7/DQS<16> 231
186 VDDQ NC/DQS*<16>
183 VDDQ 161
9

M_BSA[2..0]

VDDQ DM8/DQS<17>
9

182 162
179 VDDQ DQS*<17>
M_MAA_A[0..15]

176 VDDQ 3 M_DA0

M_CLKA0
M_CLKA1
S_SMBCLK_MAIN

VDDQ DQ<0>
M_CLKA0#
M_CLKA1#

173 4 M_DA1
M_SCSA#0
M_SCSA#1
M_SCKEA0
M_SCKEA1
S_SMBDATA_MAIN

170 VDDQ DQ<1> 9 M_DA2

78 VDDQ DQ<2> 10 M_DA3
75 VDD DQ<3> 122 M_DA4
72 VDD DQ<4> 123 M_DA5
69 VDD DQ<5> 128 M_DA6
66 VDD DQ<6> 129 M_DA7

*
DDRIII

3
3

65 VDD DQ<7> 12 M_DA8

V_SM_VTT
VDD DQ<8>
M_BSA0
M_BSA1
M_BSA2

62 13 M_DA9
VDD DQ<9>
M_MAA_A9
M_MAA_A8
M_MAA_A7
M_MAA_A6
M_MAA_A5
M_MAA_A4
M_MAA_A3
M_MAA_A2
M_MAA_A1
M_MAA_A0

60 18 M_DA10
M_MAA_A15
M_MAA_A14
M_MAA_A13
M_MAA_A12
M_MAA_A11
M_MAA_A10

VDD DQ<10>

C15
57 19 M_DA11

4.7uF
VDD DQ<11>

+/-10%
54 131 M_DA12
VDD DQ<12>
DIMMA_CA_VREF
DIMMA_DQ_VREF

51 132 M_DA13
3D3V_SYS

236 VDD DQ<13> 137 M_DA14

VDDSPD DQ<14> 138 M_DA15
DQ<15> 21 M_DA16

*
67 DQ<16> 22 M_DA17
1 VREFCA DQ<17> 27 M_DA18
VREFDQ DQ<18>

C16
VTT_DDR ISLAND
118 28 M_DA19

0.1uF
238 SCL DQ<19> 140 M_DA20
237 SDA DQ<20> 141 M_DA21
PLACE CLOSE TO DIMM1 117 SA1 DQ<21> 146 M_DA22
SA0 DQ<22> 147 M_DA23
DQ<23> 30 M_DA24

16V, X7R, +/-10%

DQ<24> 31 M_DA25
52 DQ<25> 36 M_DA26
190 BA2 DQ<26> 37 M_DA27
71 BA1 DQ<27> 149 M_DA28
BA0 DQ<28> 150 M_DA29
DQ<29> 155 M_DA30
169 DQ<30> 156 M_DA31
50 CKE1 DQ<31> 81 M_DA32
CKE0 DQ<32> 82 M_DA33
76 DQ<33> 87 M_DA34
193 S1* DQ<34> 88 M_DA35
S0* DQ<35> 200 M_DA36
DQ<36> 201 M_DA37
64 DQ<37> 206 M_DA38
63 CK1/NU* DQ<38> 207 M_DA39
185 CK1/NU DQ<39> 90 M_DA40
184 CK0* DQ<40> 91 M_DA41
CK0 DQ<41> 96 M_DA42
188 DQ<42> 97 M_DA43
181 A0 DQ<43> 209 M_DA44
61 A1 DQ<44> 210 M_DA45
180 A2 DQ<45> 215 M_DA46
2 59 A3 DQ<46> 216 M_DA47
2

58 A4 DQ<47> 99 M_DA48
178 A5 DQ<48> 100 M_DA49
56 A6 DQ<49> 105 M_DA50
177 A7 DQ<50> 106 M_DA51
175 A8 DQ<51> 218 M_DA52
70 A9 DQ<52> 219 M_DA53
55 A10/AP DQ<53> 224 M_DA54
174 A11 DQ<54> 225 M_DA55
196 A12 DQ<55> 108 M_DA56
172 A13 DQ<56> 109 M_DA57
171 A14 DQ<57> 114 M_DA58
A15 DQ<58> 115 M_DA59
168 DQ<59> 227 M_DA60
74 RESET* DQ<60> 228 M_DA61
192 CAS* DQ<61> 233 M_DA62
73 RAS* DQ<62> 234 M_DA63
WE* DQ<63>
DIMM1
DDR III
M_DA[0..63]

M_WEA#

M_CASA#
M_RASA#

C
Title

Size

Date:
DDR3_DRAMRST#
9

9
9
M_DA[0..63]

Document Number
9,15

Thursday, May 16, 2013

DDR3-1:CHA

1
1

H81M02
Sheet
14
of
FOXCONN PCEG

43
Rev
A
A
B
C
D
 A
B
C
D

V_SM
V_SM

1K *
*1K

R58
R56
1K
1K

* R54
* R51

+/-1%
+/-1%
SPD ADDRESS: 010

+/-1%
+/-1%
198 79

*
FREE0 RSVD

Reserved
Reserved
187 77

V_SM
V_SM

Reserved
Reserved
49 FREE1 ODT1 195

1uF
C27
48 FREE2 ODT0

V_SM_VTT
FREE3

DIMMB_VREF_RC
+/-10%

*
*
*
240

5
5

120 VTT 68
VTT NC/PAR_IN

R57
C34
C29
C28

DIMMB_DQ_VREF_R
53

0.1uF
0.1uF
0.1uF
NC/ERR_OUT 167

Dummy
239 NC/TEST4

*
*

1uF

R53
C25
235 VSS

Place close together.

VSS

+/-10%
232
VSS

C39
M_SODTB0
M_SODTB1

229

16V, X7R, +/-10%

16V, X7R, +/-10%
16V, X7R, +/-10%
0.1uF
* VSS

Place 0.1uF cap close to DIMM

226

*
*
223 VSS 39

V_SM_VTT

0 +/-5%
220 VSS CB<0> 40

1uF
VSS CB<1>

C26
217 45
VSS CB<2>

C32

+/-10%
214 46

16V, X7R, +/-10%

4.7uF

0 +/-5%
VSS CB<3>

VTT_DDR ISLAND
+/-10%
211 158

*
208 VSS CB<4> 159

*
*
205 VSS CB<5> 164
9
9

VSS CB<6>

PLACE CLOSE TO DIMM3

202 165

C35
1uF
VSS CB<7>

C30
C44

+/-10%
4.7uF
199

Dummy
R52
*

0.1uF
VSS

+/-10%

+/-5%
166
163 VSS 7 M_DQSB0

*
C33
160 VSS DQS<0> 6 M_DQSB#0

0.1uF
157 VSS DQS*<0>

1uF

DIMMB_CA_VREF
VSS

C43
154 16 M_DQSB1

16V, X7R, +/-10%

*
*
VSS DQS<1>

+/-10%
151 15 M_DQSB#1
VSS DQS*<1>

R55
DIMMB_DQ_VREF
148

C36
C31
145 VSS 25 M_DQSB2

16V, X7R, +/-10%

0.1uF
0.1uF
* 142 VSS DQS<2> 24 M_DQSB#2
139 VSS DQS*<2>
136 VSS 34 M_DQSB3

*
133 VSS DQS<3> 33 M_DQSB#3

close to DIMM
130 VSS DQS*<3>

16V, X7R, +/-10%

16V, X7R, +/-10%

Place 0.1uF cap

*
VSS

C40
127 85 M_DQSB4

R2
0.1uF

0 +/-5%
VSS DQS<4>

24.9
124 84 M_DQSB#4

C2

+/-1%
121 VSS DQS*<4>

22nF
119 VSS 94 M_DQSB5
VSS DQS<5>

CH‐B VREFCA
116 93 M_DQSB#5

CH‐B VREFDQ
16V, X7R, +/-10% 113 VSS DQS*<5>
* 110 VSS 103 M_DQSB6

16V, X7R, +/-10%

VSS DQS<6>

Place these CAPS close to DIMMs

107 102 M_DQSB#6
VSS DQS*<6>
C41

104
0.1uF

101 VSS 112 M_DQSB7

4
4

98 VSS DQS<7> 111 M_DQSB#7

95 VSS DQS*<7>
92 VSS 43

DIMM_CPU_VREF_CA
DIMM_DQ_CPU_VREF_B
89 VSS DQS<8> 42
16V, X7R, +/-10%
*

86 VSS DQS*<8>
83 VSS 125
VSS DM0/DQS<9>
C42

80 126
0.1uF

47 VSS DQS*<9>
44 VSS 134
41 VSS DM1/DQS<10> 135
38 VSS DQS*<10>
35 VSS 143
16V, X7R, +/-10%

9
32 VSS DM2/DQS<11> 144
VSS DQS*<11>

11,14
29
26 VSS 152
23 VSS DM3/DQS<12> 153
20 VSS DQS*<12>
9
9

VSS
14,21,27,36
14,21,27,36

17 203
14 VSS DM4/DQS<13> 204
11 VSS DQS*<13>
8 VSS 212
9
9
9
9
9
9
9
9
V_SM
M_DQSB[7..0]

5 VSS DM5/DQS<14> 213

M_DQSB#[7..0]

2 VSS DQS*<14>
VSS 221
197 DM6/DQS<15> 222
194 VDDQ DQS*<15>
191 VDDQ 230
189 VDDQ DM7/DQS<16> 231
186 VDDQ NC/DQS*<16>
183 VDDQ 161
9

M_BSB[2..0]

VDDQ DM8/DQS<17>
9

182 162
179 VDDQ DQS*<17>
M_MAA_B[0..15]

176 VDDQ 3 M_DB0

M_CLKB0
M_CLKB1
S_SMBCLK_MAIN

VDDQ DQ<0>
M_CLKB0#
M_CLKB1#

173 4 M_DB1
M_SCSB#0
M_SCSB#1
M_SCKEB0
M_SCKEB1
S_SMBDATA_MAIN

170 VDDQ DQ<1> 9 M_DB2

78 VDDQ DQ<2> 10 M_DB3
75 VDD DQ<3> 122 M_DB4
72 VDD DQ<4> 123 M_DB5
69 VDD DQ<5> 128 M_DB6
66 VDD DQ<6> 129 M_DB7
DDRIII

3
3

65 VDD DQ<7> 12 M_DB8

VDD DQ<8>
M_BSB0
M_BSB1
M_BSB2

62 13 M_DB9
VDD DQ<9>
M_MAA_B9
M_MAA_B8
M_MAA_B7
M_MAA_B6
M_MAA_B5
M_MAA_B4
M_MAA_B3
M_MAA_B2
M_MAA_B1
M_MAA_B0

60 18 M_DB10
M_MAA_B15
M_MAA_B14
M_MAA_B13
M_MAA_B12
M_MAA_B11
M_MAA_B10

57 VDD DQ<10> 19 M_DB11

54 VDD DQ<11> 131 M_DB12
VDD DQ<12>
DIMMB_CA_VREF
DIMMB_DQ_VREF

51 132 M_DB13
3D3V_SYS

236 VDD DQ<13> 137 M_DB14

VDDSPD DQ<14> 138 M_DB15
DQ<15> 21 M_DB16
67 DQ<16> 22 M_DB17
1 VREFCA DQ<17> 27 M_DB18
118 VREFDQ DQ<18> 28 M_DB19
238 SCL DQ<19> 140 M_DB20
237 SDA DQ<20> 141 M_DB21
117 SA1 DQ<21> 146 M_DB22
SA0 DQ<22> 147 M_DB23
DQ<23> 30 M_DB24
DQ<24> 31 M_DB25
52 DQ<25> 36 M_DB26
190 BA2 DQ<26> 37 M_DB27
3D3V_SYS

71 BA1 DQ<27> 149 M_DB28

BA0 DQ<28> 150 M_DB29
DQ<29> 155 M_DB30
169 DQ<30> 156 M_DB31
50 CKE1 DQ<31> 81 M_DB32
CKE0 DQ<32> 82 M_DB33
76 DQ<33> 87 M_DB34
193 S1* DQ<34> 88 M_DB35
S0* DQ<35> 200 M_DB36
DQ<36> 201 M_DB37
64 DQ<37> 206 M_DB38
63 CK1/NU* DQ<38> 207 M_DB39
185 CK1/NU DQ<39> 90 M_DB40
184 CK0* DQ<40> 91 M_DB41
CK0 DQ<41> 96 M_DB42
188 DQ<42> 97 M_DB43
181 A0 DQ<43> 209 M_DB44
61 A1 DQ<44> 210 M_DB45
180 A2 DQ<45> 215 M_DB46
2 59 A3 DQ<46> 216 M_DB47
2

58 A4 DQ<47> 99 M_DB48
178 A5 DQ<48> 100 M_DB49
56 A6 DQ<49> 105 M_DB50
177 A7 DQ<50> 106 M_DB51
175 A8 DQ<51> 218 M_DB52
70 A9 DQ<52> 219 M_DB53
55 A10/AP DQ<53> 224 M_DB54
174 A11 DQ<54> 225 M_DB55
196 A12 DQ<55> 108 M_DB56
172 A13 DQ<56> 109 M_DB57
171 A14 DQ<57> 114 M_DB58
A15 DQ<58> 115 M_DB59
168 DQ<59> 227 M_DB60
74 RESET* DQ<60> 228 M_DB61
192 CAS* DQ<61> 233 M_DB62
73 RAS* DQ<62> 234 M_DB63
WE* DQ<63>
DIMM2
DDR III

M_WEB#

M_CASB#
M_RASB#

C
Title

Size

Date:
DDR3_DRAMRST#
M_DB[0..63]

9
9

Document Number
9,14

Thursday, May 16, 2013

9

DDR3-2:CHB

1
1

H81M02
Sheet
15
of
FOXCONN PCEG

43
Rev
A
A
B
C
D
 5 4 3 2 1

PCI EXPRESS X1 SLOT1

PCI EXPRESS x16 SLOT

3D3V_SYS
3D3V_DUAL 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS
D D
RN44

PCI-E1_16X1
X1_JTAG1
X1_JTAG5
*1 2
3D3V_DUAL 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS

X1_JTAG3 3 4
B1 A1 X1_JTAG2 5 6 PCI-E1_1X1
12V PRSNT1# 7 8
B2
B3 12V
RSVD1
12V
12V
A2
A3 * R736 8.2K Dummy B1
12V PRSNT1#
A1

16,21,28 S_SMBCLK_RESUME
B4
B5 GND
SMCLK
GND
JTAG2
A4
A5 X1_JTAG2
0
+/-5%
+/-5% B2
B3 12V
RSVD
12V
12V
A2
A3 * R737
B6 A6 X1_JTAG3 B4 A4 0
16,21,28 S_SMBDATA_RESUME SMDAT JTAG3 GND GND
B7 A7 B5 A5 +/-5%
GND JTAG4 16,21,28 S_SMBCLK_RESUME SMCLK JTAG2
B8 A8 X1_JTAG5 B6 A6 Dummy
3.3V JTAG5 16,21,28 S_SMBDATA_RESUME SMDAT JTAG3
X1_JTAG1 B9 A9 B7 A7
B10 JTAG1 3.3V A10 B8 GND JTAG4 A8
B11 3.3VAUX 3.3V A11 X_PLTRST_PCIE_SLOT#_R B9 3.3V JTAG5 A9
16,21 PCIE_WAKE# WAKE# PWRGD B10 JTAG1 3.3V A10
B11 3.3VAUX 3.3V A11 X_PLTRST_PCIE_SLOT#_X1
KEY 16,21 PCIE_WAKE# WAKE# PWRGD
All AC Coupling caps. should be placed within 250 mils of the connector B12 A12 KEY
B13 RSVD2 GND A13
GND REFCLK+ CK_PE_100M_X16PORT 22
C217 1 2 220nF +/-10% X_1X16_TXP0_C B14 A14 B12 A12
10 X_1X16_TXP0 HSOP0 REFCLK- CK_PE_100M_X16PORT# 22 RSVD_B12 GND
10 X_1X16_TXN0
C219 1** 2 220nF +/-10% X_1X16_TXN0_C B15
B16 HSON0 GND
A15
A16 X_1X16_RXP0 C62 0.1uF
B13
B14 GND REFCLK+
A13
A14
CLKOUT_PCIE0 22
GND HSIP0 X_1X16_RXP0 10 19 X_PE_TX_DP5 HSOP0 REFCLK- CLKOUT_PCIE0# 22

**
B17 A17 X_1X16_RXN0 C63 0.1uF B15 A15
PRSNT2_B17# HSIN0 X_1X16_RXN0 10 19 X_PE_TX_DN5 HSON0 GND
B18 A18 B16 A16
GND GND B17 GND HSIP0 A17 X_PE_RX_DP5 19
B18 PRSNT2# HSIN0 A18 X_PE_RX_DN5 19
C218 1 2 220nF +/-10% X_1X16_TXP1_C B19 A19 GND GND
10 X_1X16_TXP1 HSOP1 RSVD3
** ** **

C220 1 2 220nF +/-10% X_1X16_TXN1_C B20 A20 Slot-PCIE-1X

10 X_1X16_TXN1 HSON1 GND
B21 A21 X_1X16_RXP1
B22 GND HSIP1 A22 X_1X16_RXN1 X_1X16_RXP1 10
C221 1 2 220nF +/-10% X_1X16_TXP2_C B23 GND HSIN1 A23 X_1X16_RXN1 10
10 X_1X16_TXP2 HSOP2 GND
C222 1 2 220nF +/-10% X_1X16_TXN2_C B24 A24
10 X_1X16_TXN2 HSON2 GND
B25 A25 X_1X16_RXP2
B26 GND HSIP2 A26 X_1X16_RXN2 X_1X16_RXP2 10
C223 1 2 220nF +/-10% X_1X16_TXP3_C B27 GND HSIN2 A27 X_1X16_RXN2 10
10 X_1X16_TXP3 HSOP3 GND
C224 1 2 220nF +/-10% X_1X16_TXN3_C B28 A28
10 X_1X16_TXN3 HSON3 GND
C B29 A29 X_1X16_RXP3 C
B30 GND HSIP3 A30 X_1X16_RXN3 X_1X16_RXP3 10 3D3V_SYS
B31 RSVD4 HSIN3 A31 X_1X16_RXN3 10 3D3V_SYS 12V_SYS
B32 PRSNT2_B31# GND A32
GND RSVD5 C227
10 X_1X16_TXP4
C225 1 2 220nF +/-10% X_1X16_TXP4_C B33
HSOP4 RSVD
A33
* 0.1uF
*
C215
*
** ** ** **

C226 1 2 220nF +/-10% X_1X16_TXN4_C B34 A34 16V, X7R, +/-10% 0.1uF
10 X_1X16_TXN4 HSON4 GND
B35 A35 X_1X16_RXP4 Dummy 16V, X7R, +/-10% C216
B36 GND HSIP4 A36 X_1X16_RXN4 X_1X16_RXP4 10 Dummy
GND HSIN4 X_1X16_RXN4 10 100nF
C228 1 2 220nF +/-10% X_1X16_TXP5_C B37 A37 25V, X5R,+/-10%
10 X_1X16_TXP5 HSOP5 GND
C229 1 2 220nF +/-10% X_1X16_TXN5_C B38 A38
10 X_1X16_TXN5 HSON5 GND
B39 A39 X_1X16_RXP5
B40 GND HSIP5 A40 X_1X16_RXN5 X_1X16_RXP5 10
C230 1 2 220nF +/-10% X_1X16_TXP6_C B41 GND HSIN5 A41 X_1X16_RXN5 10
10 X_1X16_TXP6 HSOP6 GND
C231 1 2 220nF +/-10% X_1X16_TXN6_C B42 A42
10 X_1X16_TXN6 HSON6 GND
B43 A43 X_1X16_RXP6
B44 GND HSIP6 A44 X_1X16_RXN6 X_1X16_RXP6 10
C232 1 2 220nF +/-10% X_1X16_TXP7_C B45 GND HSIN6 A45 X_1X16_RXN6 10
10 X_1X16_TXP7 HSOP7 GND
C233 1 2 220nF +/-10% X_1X16_TXN7_C B46 A46
10 X_1X16_TXN7 HSON7 GND
B47 A47 X_1X16_RXP7
B48 GND HSIP7 A48 X_1X16_RXN7 X_1X16_RXP7 10
B49 PRSNT2_B48# HSIN7 A49 X_1X16_RXN7 10
GND GND

C234 1 2 220nF +/-10% X_1X16_TXP8_C B50 A50

10 X_1X16_TXP8 HSOP8 RSVD6
** ** ** ** ** ** ** **

C235 1 2 220nF +/-10% X_1X16_TXN8_C B51 A51 3D3V_SYS

10 X_1X16_TXN8 HSON8 GND
B52 A52 X_1X16_RXP8 3D3V_DUAL
B53 GND HSIP8 A53 X_1X16_RXN8 X_1X16_RXP8 10
C236 1 2 220nF +/-10% X_1X16_TXP9_C B54 GND HSIN8 A54 X_1X16_RXN8 10
10 X_1X16_TXP9 HSOP9 GND
10 X_1X16_TXN9
C237 1 2 220nF +/-10% X_1X16_TXN9_C B55
B56 HSON9
GND
GND
HSIP9
A55
A56 X_1X16_RXP9
X_1X16_RXP9 10
* R494
10 X_1X16_TXP10
C238 1 2 220nF +/-10% X_1X16_TXP10_C
B57
B58 GND
HSOP10
HSIN9
GND
A57
A58
X_1X16_RXN9
X_1X16_RXN9 10 * R493 10K
+/-5%
C239 1 2 220nF +/-10% X_1X16_TXN10_C B59 A59 10K X_PLTRST_PCIE_SLOT#_R
10 X_1X16_TXN10 HSON10 GND
B60 A60 X_1X16_RXP10 +/-5%
GND HSIP10 X_1X16_RXP10 10

C
B61 A61 X_1X16_RXN10
C240 1 2 220nF +/-10% X_1X16_TXP11_C B62 GND HSIN10 A62 X_1X16_RXN10 10 B Q43
10 X_1X16_TXP11 HSOP11 GND MMBT3904-7-F
C241 1 2 220nF +/-10% X_1X16_TXN11_C B63 A63
10 X_1X16_TXN11 HSON11 GND R492

C
B B
B64 A64 X_1X16_RXP11
GND HSIP11 X_1X16_RXP11 10

E
B65 A65 X_1X16_RXN11 B Q33
GND HSIN11 X_1X16_RXN11 10 16,34 X_PLTRST_PCIE_SLOT# MMBT3904-7-F
C242 1 2 220nF +/-10% X_1X16_TXP12_C B66 A66
10 X_1X16_TXP12 HSOP12 GND
C243 1 2 220nF +/-10% X_1X16_TXN12_C B67 A67
10 X_1X16_TXN12 HSON12 GND 10K

E
B68 A68 X_1X16_RXP12
B69 GND HSIP12 A69 X_1X16_RXN12 X_1X16_RXP12 10 +/-5%
C244 1 2 220nF +/-10% X_1X16_TXP13_C B70 GND HSIN12 A70 X_1X16_RXN12 10
10 X_1X16_TXP13 HSOP13 GND
C245 1 2 220nF +/-10% X_1X16_TXN13_C B71 A71
10 X_1X16_TXN13 HSON13 GND
B72 A72 X_1X16_RXP13
B73 GND HSIP13 A73 X_1X16_RXN13 X_1X16_RXP13 10
C246 1 2 220nF +/-10% X_1X16_TXP14_C B74 GND HSIN13 A74 X_1X16_RXN13 10
10 X_1X16_TXP14 HSOP14 GND R491

C
C247 1 2 220nF +/-10% X_1X16_TXN14_C B75 A75
10 X_1X16_TXN14 HSON14 GND

*
B76 A76 X_1X16_RXP14 B Q42
GND HSIP14 X_1X16_RXP14 10 21 PCH_GPIO13 MMBT3904-7-F
B77 A77 X_1X16_RXN14
C248 1 2 220nF +/-10% X_1X16_TXP15_C B78 GND HSIN14 A78 X_1X16_RXN14 10
10 X_1X16_TXP15 HSOP15 GND 10K

E
C249 1 2 220nF +/-10% X_1X16_TXN15_C B79 A79
10 X_1X16_TXN15 HSON15 GND +/-5%
B80 A80 X_1X16_RXP15
B81 GND HSIP15 A81 X_1X16_RXN15 X_1X16_RXP15 10
B82 PRSNT2_B81# HSIN15 A82 X_1X16_RXN15 10
RSVD7 GND
Slot-PCIE-16X

*
X_PLTRST_PCIE_SLOT#_R R747 0 +/-5% X_PLTRST_PCIE_SLOT#_X1

*
R748 0 +/-5% Dummy
16,34 X_PLTRST_PCIE_SLOT#

A A
3D3V_DUAL 3D3V_SYS 12V_SYS

C250
* 0.1uF
16V, X7R, +/-10%
*
C251
0.1uF *
EC6
470uF
* Delete EC7 *
16V, X7R, +/-10% +/-20% C252 C253
100nF 10nF
Dummy 25V, X5R,+/-10%
FOXCONN PCEG
Title
PCIe 16X/1X
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 16 of 43

5 4 3 2 1
 5 4 3 2 1

**

**
V_HDMI_CLK_DP @HDMI R227 0 +/-5% V_HDMI_CLK_CONN_DP V_HDMI_TX1_DP @HDMI R235 0 +/-5% V_HDMI_TX1_CONN_DP
V_HDMI_CLK_DN @HDMI R228 0 +/-5% V_HDMI_CLK_CONN_DN V_HDMI_TX1_DN @HDMI R236 0 +/-5% V_HDMI_TX1_CONN_DN
L54 L56
4 1 1 4

3 2 2 3

Common Choke 90 Ohm Common Choke 90 Ohm

Dummy Dummy
Delete DVI-D1,C287,R243,C291,L58 to L61
Delete colay resistors

**
V_HDMI_TX2_DP @HDMI R237 0 +/-5% V_HDMI_TX2_CONN_DP

**
V_HDMI_TX0_DP @HDMI R229 0 +/-5% V_HDMI_TX0_CONN_DP V_HDMI_TX2_DN @HDMI R238 0 +/-5% V_HDMI_TX2_CONN_DN
V_HDMI_TX0_DN @HDMI R231 0 +/-5% V_HDMI_TX0_CONN_DN L57 (R230,R232,R233,R234,
1 4 R239,R240,R241,R242)
D
L55 2 3 --20130218 D
1 4
Common Choke 90 Ohm
2 3 Dummy
3D3V_HDMI
Common Choke 90 Ohm
Dummy

G
680
10 DPC_LANE_DN3_C
C288 0.1uF 16V, X7R, +/-10% V_HDMI_CLK_DN *1 2
D S

** ** ** **
C289 0.1uF 16V, X7R, +/-10% V_HDMI_CLK_DP
10 DPC_LANE_DP3_C 3 4
C290 0.1uF 16V, X7R, +/-10% V_HDMI_TX0_DN 5 6
10 DPC_LANE_DN2_C 7 8 Q16
V_HDMI_TX0_DP
10 DPC_LANE_DP2_C
C292

C293
0.1uF 16V, X7R, +/-10%

0.1uF 16V, X7R, +/-10% V_HDMI_TX1_DN

RN50 +/-5%
RN51
2N7002 Change HDMI to
10
10
DPC_LANE_DN1_C
DPC_LANE_DP1_C
C294 0.1uF 16V, X7R, +/-10% V_HDMI_TX1_DP *1
3
2
4
(34043MP00-VPN-G) in BOM.
C295 0.1uF 16V, X7R, +/-10% V_HDMI_TX2_DN
10 DPC_LANE_DN0_C 5 6
C296 0.1uF 16V, X7R, +/-10% V_HDMI_TX2_DP
10 DPC_LANE_DP0_C 7 8
680 +/-5%

3D3V_HDMI 1
D17
BAT54A
5V_SYS 3D3V_SYS
HDMI HDMI1
3
3D3V_HDMI

*
2 V_HDMI_TX2_CONN_DP 1
FB1 2
FB 80Ohm V_HDMI_TX2_CONN_DN 3
RN52 V_HDMI_TX1_CONN_DP 4 1

2
4
6
8
5 2
2.2K 3
+/-5% V_HDMI_TX1_CONN_DN 6 4
7 5
* 13
5
7
V_HDMI_TX0_CONN_DP
C297 C299 8 6
7
C
* 0.1uF
*
16V, X7R, +/-10%
C298 * 10uF V_HDMI_TX0_CONN_DN
V_HDMI_CLK_CONN_DP
9
10 9
8
10
C
1uF 6.3V,X5R,+/-20% 3D3V_HDMI 11 11
+/-10% V_HDMI_CLK_CONN_DN 12 12
13 13
3D3V_HDMI 14 14
5V_VGA_HDMI V_HDMI_SCL 15 15
16
5V_SYS
* R244 V_HDMI_SDA 16
17
17
18
G

G
U10 18 19
1M
+/-1% Dummy C301 V_HDMI_HPD_SINK 19
22 DDPC_CTRLDATA
S D V_HDMI_SDA V_HDMI_HPD_SINK 1 6 V_HDMI_SDA
22 DPC_HPD_R
S D V_HDMI_HPD_SINK
* C300
* 0.1uF
Q18 2N7002 Q17 2N7002 1uF 16V, X7R, +/-10%
* CONN-HDMI
G

20
21
22
23
2 5 c0603h9 R245
20K
S D V_HDMI_SCL V_HDMI_SCL 3 4

10V, Y5V, +80%/-20%

@HDMI
22 DDPC_CTRLCLK
Q19 2N7002
IP4220CZ6
Dummy

5V_SYS 5V_VGA_HDMI

VGA L17 L24

F2

*
22 VGA_RED RA RED Fuse 1.5A

*
C302
*
C304
* FB2 1 2

*R246
150
15pF
+/-5% 82nH@100MHz
*
C303
15pF 82nH@100MHz
15pF
+/-5%
FB 30Ohm

Change C302、C308、C312、C303、 +/ -1% +/-5%

*
C305
10uF
*
C306
0.1uF * C307
C309、C314 to 15pF from 4.7pF. 16V, X7R, +/-10% 1uF
6.3V,X5R,+/-20%
Change L17、L18、L19 to 82nH from27nH. L18 L25
c0402h6 +/-10%

Reserved C304、C310、C315 15pF.

*
GA GREEN
Delete R291、R350、R450 0ohm. 22 VGA_GREEN
C308 C310
B
Add L24、L25、L26 82nH For EMI． *R247 * 15pF
82nH@100MHz
C309
82nH@100MHz * 15pF Add D19(Dummy)、 B

--For V1.0 20130509

150
+/ -1%
+/-5%
* 15pF
+/-5%
+/-5%
5V_VGA_HDMI R755 for TF
--For V1.0 20130504
L19 L26

A
*

*
BA BLUE C313
22 VGA_BLUE

*
C312
*
C315
* 0.1uF D19 R755

*R248
150
15pF
+/-5% 82nH@100MHz
*
C314
15pF 82nH@100MHz
15pF
+/-5%
16V, X7R, +/-10%
c0402h6
B130LAW 0
+/-5%
+/ -1% +/-5%

18
19
VGA1
VGA
RDDCA_CLK_RC 15 SCL GND 5
CRS 33 ohm 10 GND
VGA_VSYNC 14 VSYNC ID0 4
3D3V_SYS 22 CRTHSYNC VGA_HSYNC 9 NC
VGA_HSYNC 13 HSYNC B 3 BLUE
G

Q20
22 CRTVSYNC VGA_VSYNC 8 GND
RDDCA_DATA_RC 12 SDA G 2 GREEN
22 PCH_DDCA_CLK S D R251 100 RDDCA_CLK_RC 7 GND
11 ID1 R 1
*

2N7002 RED
G

Q21 6 GND

22 PCH_DDCA_DATA S D R252+/-5%100 RDDCA_DATA_RC CONN-VGA

16
17
*

2N7002 C319 C320

RN53

3D3V_SYS *1 2
* C317 * C318 * 100pF
* 100pF

D18 +/-5% 100pF 100pF 50V, NPO, +/-5% 50V, NPO, +/-5%
1 3 4
5 6 50V, NPO, +/-5% 50V, NPO, +/-5%
5V_VGA_HDMI 3
2 7 8 Dummy Dummy
Dummy Dummy Change VGA footprint to dsub3f15_4h128
2.2K
BAT54A
+/-5%
from dsub3f15h128 for EMI
A
Dummy C319,C320 ----For V1.0 20130516 A

--20130315
5V_VGA_HDMI 5V_VGA_HDMI

U13 U14

RDDCA_CLK_RC 1 6 RDDCA_DATA_RC GREEN 1 6 RED

2 5 2 5
FOXCONN PCEG
Title
VGA_HSYNC 3 4 VGA_VSYNC BLUE 3 4
HDMI/VGA
IP4220CZ6 IP4220CZ6 Size Document Number
H81M02
Rev
Dummy Dummy C A

Date: Thursday, May 16, 2013 Sheet 17 of 43

5 4 3 2 1
 5 4 3 2 1

Intel CPU XDP Debug Connector

D D

11 H_TCK H_TCK
11 H_TDI H_TDI
11 H_TDO H_TDO
11 H_TMS H_TMS
11 H_TRST# H_TRST#

****
H_TDI R64 51 Ohm Dummy

H_TMS R65 51 Ohm Dummy H_CPU_VCCIO_RIGHT

H_TRST# R66 51 Ohm

H_TCK R67 51 Ohm

Add R66 and R67 for FAB-B Intel DMI LAI Footprint
+1P05V_PCH 3D3V_SYS

C C

*R68
51 Ohm
* R69 This is footprint only . BOM is Dummy
249 Ohm
Reserved
+/-1%
H_TDO +/-5%
Dummy

*R70
825 Ohm * R71
+/-1% 100
+/-5%
Dummy
Dummy

Change for FAB-B

Intel PCH XDP Debug Connector

B B

Change for FAB-B

+1P05V_PCH

C47
3D3V_DUAL
* 0.1uF
16V, X7R, +/-10%

*R76
20K *R77
200 *R78
200 *R79
200
+/-5% +/-1% +/-1% +/-1%

PCH_JTAG_TDI PCH_JTAG_TDI 21
PCH_JTAG_TDO PCH_JTAG_TDO 21
PCH_JTAG_TMS PCH_JTAG_TMS 21
PCH_JTAG_RST PCH_JTAG_RST 21
A A

*R80
10K RN6
2
4
6
8

+/-5% 100 Ohm

* 13
5
7

CRB 0.7 Default stuff
FOXCONN PCEG
Change for FAB-B Title
XDP/DMI_LAI
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 18 of 43

5 4 3 2 1
 5 4 3 2 1

D D

3D3V_DUAL

* R86
8.2K US2A
+/-1%
Dummy
P_PME# AA31 AA37 PLTRST#
CK_P_33M_PCH AM22 PME# PLTRST# PLTRST# 11,26,34
22 CK_P_33M_PCH CLKIN_33MHZLOOPBACK 3D3V_SYS
M40
GPIO35 / NMI# TP31 R464
A2 AH26 PCH_GPIO50

*
A3 TP1 GPIO50 AU31 PCH_GPIO51 PLTRST#
B2 TP2 GPIO51 AJ26 PCH_GPIO52 PCH_GPIO51 25
B1 TP4 GPIO52 AV31 PCH_GPIO53 PCH_GPIO52 20
8.2K R740 TD_IREF C3 TP3 GPIO53 AW33 PCH_GPIO54 PCH_GPIO53 25 10K
TD_IREF GPIO54 R30 PCH_GPIO54 20 +/-5%

*
+/-1% PCH_GPIO55
GPIO55 PCH_GPIO55 25
RN8 8.2K P_INTA_N AU29 3D3V_SYS
*1 P_INTD_N P_INTB_N AU27 PIRQA# R465

*
3D3V_SYS 2 PIRQB#
P_INTB_N P_INTC_N AW28 PCH_GPIO50
3 4 PCH_GPIO5 P_INTD_N AV27 PIRQC#
5 6 P_INTC_N PCH_GPIO2 AR30 PIRQD#
7 8 PCH_GPIO3 AV29 PIRQE# / GPIO2 10K
RN9 8.2K PCH_GPIO4 AV28 PIRQF# / GPIO3 +/-5%
*1 2
PCH_GPIO4
P_INTA_N
PCH_GPIO5 AT27 PIRQG# / GPIO4
PIRQH# / GPIO5
3 4
5 6
PCH_GPIO3 1 OF 11
PCH_GPIO2
7 8 LYNXPOINT_0P8_VER1.1

C C

US2B

10 DMI_CPU_PCH_RXN0 L24 AV10 USB_N0 29 Rear USB (map to USB3.0)

K24 DMI_RXN0 USB2N0 AU10
10 DMI_CPU_PCH_RXP0 DMI_RXP0 USB2P0 USB_P0 29
C20 AV11 USB_N1 29 Rear USB (map to USB3.0)
10 DMI_PCH_CPU_RXN0 B20 DMI_TXN0 USB2N1 AW11
10 DMI_PCH_CPU_RXP0 DMI_TXP0 USB2P1 USB_P1 29
10 DMI_CPU_PCH_RXN1 G24 AN14 USB_N2 28 Rear USB (map to USB2.0)
H24 DMI_RXN1 USB2N2 AP14
10 DMI_CPU_PCH_RXP1 DMI_RXP1 USB2P2 USB_P2 28
D21 AJ16 USB_N3 28 Rear USB (map to USB2.0)
10 DMI_PCH_CPU_RXN1 B21 DMI_TXN1 USB2N3 AK16
10 DMI_PCH_CPU_RXP1 DMI_TXP1 USB2P3 USB_P3 28
F26 AU15

DMI
10 DMI_CPU_PCH_RXN2 DMI_RXN2 USB2N4 USB_N4 30 Rear USB (map to USB2.0)
10 DMI_CPU_PCH_RXP2 G26 AV15 USB_P4 30
B22 DMI_RXP2 USB2P4 AU12
10 DMI_PCH_CPU_RXN2 DMI_TXN2 USB2N5 USB_N5 30 Rear USB (map to USB2.0)
C22 AT12 USB_P5 30
10 DMI_PCH_CPU_RXP2 K26 DMI_TXP2 USB2P5 AV14
10 DMI_CPU_PCH_RXN3 DMI_RXN3 USB2N6
10 DMI_CPU_PCH_RXP3 L26 AW14
A24 DMI_RXP3 USB2P6 AU17 8.2K RN10
10
10
DMI_PCH_CPU_RXN3
DMI_PCH_CPU_RXP3
B24 DMI_TXN3
DMI_TXP3
USB2N7
USB2P7
AT17
AW16 USB_N8 30 FRONT Panel USB
U_USB_OC_R_#3
U_USB_OC_R_#6 2 *
1 3D3V_DUAL
USB2N8 4 3
**

R87 7.5K +/-1% r0402h4 DMIRCOMP B19 AV16 USB_P8 30 U_USB_OC_R_#7

R88 7.5K +/-1% r0402h4 PCIERCOMP C13 DMI_RCOMP USB2P8 AN16 6 5
+1P5V_PCH PCIE_RCOMP USB2N9 USB_N9 30 FRONT Panel USB 8 7
AP16 USB_P9 30
B
CLKIN_DMI_N G22 USB2P9 AJ18 B
USB_N10 30FRONT Panel USB

USB
22 CLKIN_DMI_N CLKIN_DMI_P F22 CLKIN_DMI_N USB2N10 AK18
22 CLKIN_DMI_P CLKIN_DMI_P USB2P10 USB_P10 30
AP18 USB_N11 30FRONT Panel USB
L14 USB2N11 AN18
PERN1 / USB3RN3 USB2P11 USB_P11 30
K14 AW18
B12 PERP1 / USB3RP3 USB2N12 AV18
B11 PETN1 / USB3TN3 USB2P12 AP20
F14 PETP1 / USB3TP3 USB2N13 AN20
Front USB 3.0 PERN2 / USB3RN4 USB2P13
G14
D11 PERP2 / USB3RP4 AE40 U_USB_OC_R_#0
PETN2 / USB3TN4 OC0# / GPIO59 U_USB_OC_R_#0 29 USB 3.0
C11 AF37 U_USB_OC_R_#1 LAN_USB 2.0
PETP2 / USB3TP4 OC1# / GPIO40 U_USB_OC_R_#1 28
F11 AD39 U_USB_OC_R_#2 Rear_USB 2.0
26 X_PE_RX_DN3 PERN3 OC2# / GPIO41 U_USB_OC_R_#2 30
H11 AD40 U_USB_OC_R_#3
PCIE RIDGE PCI Bridge 26 X_PE_RX_DP3
B9 PERP3 OC3# / GPIO42 AF39 U_USB_OC_R_#4 Front_USB 2.0_2
26 X_PE_TX_DN3 PETN3 OC4# / GPIO43 U_USB_OC_R_#4 30
A9 AC41 U_USB_OC_R_#5 Front_USB 2.0_1
26 X_PE_TX_DP3 PETP3 OC5# / GPIO9 U_USB_OC_R_#5 30
J11 AF40 U_USB_OC_R_#6
LAN 28 PCH_HSIN4 PERN4 OC6# / GPIO10
L11 AG40 U_USB_OC_R_#7
28 PCH_HSIP4 PERP4 PCI-E OC7# / GPIO14
LAN 28 PCH_C_HSON4 B8
PETN4

*
28 PCH_C_HSOP4 C8 AV20 PCH_USBBIAS R89 22.6 +/-1%
G9 PETP4 USBRBIAS# AU20
PCIE X1 16 X_PE_RX_DN5 PERN5 USBRBIAS
F9 RN12 10K
16
16
X_PE_RX_DP5
X_PE_TX_DN5
B7
A7
PERP5
PETN5 CLKIN_DOT96_N
AP11
AM11
CLKIN_DOT_N
CLKIN_DOT_P
*
1
3
2
4
16 X_PE_TX_DP5 F7 PETP5 CLKIN_DOT96_P 5 6
H7 PERN6 CK_14M_PCH 7 8
E1 PERP6
D2 PETN6
K6 PETP6
PCIE_X4 Slot PERN7
(Thunderbolt) K8
G3 PERP7
PETN7 CK_14M_PCH 22
G5
J2 PETP7
J3 PERN8
H2 PERP8
H1 PETN8
PETP8
2 OF 11
A LYNXPOINT_0P8_VER1.1 A

FOXCONN PCEG
Title
PCH1-DMI/USB/PCIe
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 19 of 43

5 4 3 2 1
 5 4 3 2 1

SATA_1
1
SATA_TXP0 C54 10nF 25V, X7R, +/-10% SATA_TXP0_C 2
US2C

** **
For MiniPCIe WLAN AMT Sideband SATA_TXN0 C55 10nF 25V, X7R, +/-10% SATA_TXN0_C 3 8
4
U36 B28 SATA_RXN0 SATA_RXN0 C56 10nF 25V, X7R, +/-10% SATA_RXN0_C 5 9
TP4 CL_CLK SATA_RXN0
U35 A28 6

CLINK
SATA_RXP0 SATA_RXP0 C57 10nF 25V, X7R, +/-10% SATA_RXP0_C
D TP5 CL_DATA SATA_RXP0 D
U34 F31 SATA_TXN0 SATA1 3.0 7
TP6 CL_RST# SATA_TXN0 H31 SATA_TXP0
SATA_TXP0

*
13,21,34 PWRGD_3V R90 0 +/-5% AA32 D30 SATA_RXN1 CONN-SATA
APWROK SATA_RXN1 C30 SATA_RXP1
SATA_RXP1 B34 SATA_TXN1
SATA_TXN1 SATA2 3.0 SATA_2
C34 SATA_TXP1 1
AL31 SATA_TXP1 SATA_TXP1 C58 10nF 25V, X7R, +/-10% SATA_TXP1_C 2
PWM0

** **
Reserved R90 0ohm and delete R107 0ohm、 AM31 A31 SATA_TXN1 C59 10nF 25V, X7R, +/-10% SATA_TXN1_C 3 8
AP31 PWM1 SATA_RXN2 B31 4
NET PCH_MEPWRGD for H81M02 AV30 PWM2 SATA_RXP2 B35 5 9

FAN
SATA_RXN1 C60 10nF 25V, X7R, +/-10% SATA_RXN1_C
PWM3 SATA_TXN2
--20130201 D35 SATA_RXP1 C61 10nF 25V, X7R, +/-10% SATA_RXP1_C 6

SATA
SATA_TXP2 B32 7
BOARD_ID2 AP28 SATA_RXN3 C32
PCH_GPIO1 AT31 TACH0 / GPIO17 SATA_RXP3 G33 CONN-SATA
PCH_GPIO6 AM28 TACH1 / GPIO1 SATA_TXN3 F33
PCH_GPIO7 AV34 TACH2 / GPIO6 SATA_TXP3
BOARD_ID0 AT30 TACH3 / GPIO7 A26 SATA_RXN4
3D3V_SYS BOARD_ID1 AV35 TACH4 / GPIO68 SATA_RXN4 / PERN1 B26 SATA_RXP4
TACH5 / GPIO69 SATA_RXP4 / PERP1 L28 SATA_TXN4
SATA_TXN4 / PETN1
SATA_TXP4 / PETP1
K28 SATA_TXP4 Change the SATA connector from 1.27mm to 1.7mm
* R91 TP7
TP_PCH_SST AJ31
SST
SATA_RXN5 / PERN2
SATA_RXP5 / PERP2
C27
B27
SATA_RXN5
SATA_RXP5
1K G28 SATA_TXN5 SATA_3
SATA_TXN5 / PETN2 F28 SATA_TXP5 1
+/-5% SATA_TXP5 / PETP2
S_PCH_CONFIG_JUMPER L38 H35 CLKIN_SATA_N SATA_TXP4 C70 10nF 25V, X7R, +/-10% SATA_TXP4_C 2
SCLOCK / GPIO22 CLKIN_SATA_N

** **
PCH_GPIO38 H41 H36 CLKIN_SATA_P SATA3 2.0 SATA_TXN4 C71 10nF 25V, X7R, +/-10% SATA_TXN4_C 3 8
SLOAD / GPIO38 CLKIN_SATA_P
*R92
4.7K
PCH_GPIO39
PCH_GPIO48
R31
L40 SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48 SATALED#
J39 SATA_LED# 37 SATA_RXN4 C72 10nF 25V, X7R, +/-10% SATA_RXN4_C
4
5 9

*
D33 SATA3RCOMP_PCH SATA_RXP4 SATA_RXP4_C 6

GPIO
+/-5% R93 7.5K +/-1% +1P5V_PCH C73 10nF 25V, X7R, +/-10%
Dummy SATA_RCOMP 7

M37 SATA0GP CONN-SATA

SATA0GP / GPIO21 J40
SATA1GP / GPIO19 SATA1GP 25
H40 PCH_GP36 25
SATA2GP / GPIO36 N41 SATA_4
SATA3GP / GPIO37 PCH_GP37 25
M39 SATA4GP 25 1
SATA4GP / GPIO16 N40 SATA_TXP5 C74 10nF 25V, X7R, +/-10% SATA_TXP5_C 2
SATA5GP / GPIO49 PCH_GP49 25

** **
C SATA_TXN5 C75 10nF 25V, X7R, +/-10% SATA_TXN5_C 3 8 C
SATA4 2.0 4
SATA_RXN5 C76 10nF 25V, X7R, +/-10% SATA_RXN5_C 5 9
AP2 SATA_RXP5 C77 10nF 25V, X7R, +/-10% SATA_RXP5_C 6
EDP_BKLTCTL AT2 7
EDP_BKLTEN AP1
EDP_VDDEN CONN-SATA

*
N30 R544 0 A20GATE 34

HOST
TP14 K36
RCIN# PCH_KBRST# 34
G39 SERIRQ 34,36
SERIRQ C40
THRMTRIP# H_THERMTRIP# 11

*
G40 R539 0 Dummy
PECI H_PECI 11,34
F40 PMSYNC# 11
PMSYNCH F41
PLTRST_PROC# PLTRST_IN_CPU# 11
3 OF 11
LYNXPOINT_0P8_VER1.1

Add remark for BOARD_ID2

--20130221
3D3V_SYS 3D3V_SYS 3D3V_SYS 3D3V_SYS

R257 * R206* R211* R250 *

10K 10K 10K 10K
+/-5% +/-5% +/-5% +/-5% @ID2_H

RN15 10K Dummy

B 3D3V_SYS *
1
3
2
4
PCH_GPIO52
PCH_GPIO1
PCH_GPIO52 19 PCH_GPIO39 BOARD_ID0 BOARD_ID1 BOARD_ID2
B
5
7
6
8
PCH_GPIO54
PCH_GPIO7
PCH_GPIO54 19
R258* R205 * R210 * R249 *
10K 10K 10K 10K
+/-5% +/-5% +/-5% +/-5%
Dummy Dummy @ID2_L
RN16 10K
3D3V_SYS *
1
3
2
4
SERIRQ
A20GATE
5 6 PCH_KBRST#
7 8 PCH_GPIO6 Board ID ID0 ID1 ID2 ID3 ID4 ID5
3D3V_SYS
6KS3HU 1 1 1 1 1 1
R264*
10K 6KS3H 1 1 0 1 1 1
**

+/-5%
R265
R270
10K +/-5% CLKIN_SATA_N
10K +/-5% CLKIN_SATA_P
Change for FAB-B
PCH_GPIO38

3D3V_SYS
R259*
10K
R460 +/-5%
PCH_GPIO48 Dummy
*

10K
3D3V_SYS +/-5%
R462
SATA0GP
A A
*

10K
+/-5%

FOXCONN PCEG
Title
PCH2-SATA/HOST
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 20 of 43

5 4 3 2 1
 5 4 3 2 1

Add C513(Dummy) 1uF,C541 1nF, Add R232

*
R232 10KLPCPD#
+/-5%
close to PCH for restart. --20130315

***

*
VCCRTC R94 390KOhm +/-5% PCH_INTVRMEN R172 1K+/-5% Dummy
Dummy RN18 10K
VCCRTC R95 390KOhm +/-5% DSW_VR_EN
--For V1.0 20130412 P_VR_READY
C513
3D3V_DUAL *
1
3
2
4
SML0CLK
SML0DATA
VCCRTC R586 1M S_INTRUDER#
3D3V_SYS * 1uF
+/-10% * C541
5
7
6
8
PCH_RI#
IO_PME#
RN20 10K 1nF
3D3V_DUAL 1
3
* 2
4
SMLINK1_DATA
SMLINK1_CLK
RN67
* LPC_AD0 3D3V_SYS Add R233 50V, X7R, +/-10%
RN19 10K
5 6 PCIE_WAKE# 2 1 LPC_AD1 *
1 2 PCH_GPIO57
7 8 PCH_GPIO60 4
6
3
5
LPC_AD2
--20130315 3 4 PCH_GPIO46

3D3V_SYS
8 7
LPC_AD3
R233 * 5
7
6
8
PCH_GPIO44
PCH_GPIO45
+/-5% 2.2K 10K Change PCH_THERMAL_UP from
+/-5% US2D GPIO7 to GPIO12 for FAB-B

** * *
D D
R466 10K LPC_FRAME# R271 10K +/-5% PCH_GPIO24
+/-5%

* ** *
3D3V_DUAL Dummy AK26
PCH_L_DRQ_1# G38 R163 10K +/-5% PCH_GPIO25 R169 10K +/-5%
LDRQ1# / GPIO23 BMBUSY# / GPIO0 A_FP_AUDIO_PRESENCE# 31,32
34,36 LPC_AD0 AN24 N32 BOARD_ID4 Dummy
R467
* * * 10K MFG_MODE AP26 LAD0 GPIO32 AV26 PCH_GPIO33 R165 10K +/-5%
Dummy PCH_GPIO26 R168 10K +/-5%
34,36 LPC_AD1 LAD1 DOCKEN# / GPIO33 PCH_GPIO33 25
+/-5% 34,36 LPC_AD2 AJ24 N34 BOARD_ID5 R166 10K +/-5% PCH_GPIO73 R167 10K +/-5%
AN26 LAD2 GPIO34 Dummy
34,36 LPC_AD3 LAD3

*
R468 10K PCH_GPIO13 AK22 AC40 K_PCI_PME#_R R739 0 +/-5% K_PCI_PME# K_PCI_PME# 27 R160
34,36 L_DRQ0 LDRQ0# GPIO8

*
+/-5% 34,36 LPC_FRAME# AP24 AL40 PCH_GPIO12 R101 10K K_PCI_PME#_R 10K +/-5%
LFRAME# LAN_PHY_PWR_CTRL / GPIO12 AN22 PCH_GPIO13 PCH_THERMAL_UP 34 +/-5% Dummy
HDA_DOCK_RST# / GPIO13 PCH_GPIO13 16

**
R469 10K TMIN_SHIFT 31 A_HDA_BCLK R103 33+/-5% PCH_HDCLK AV23 AC32 IO_PME#
HDA_BCLK GPIO15 IO_PME# 34

* *
PCH_HDRST# AU24 AE34 PCH_GPIO24 PCH_GPIO29

AZALIA
+/-5% 31 A_HDA_RST# R97 33+/-5% R722 0 +/-5% R102 10K +/-5%
HDA_RST# GPIO24 H_SKTOCC_N 11
31 A_HDA_SDI0_R AT26 V41 MFG_MODE Dummy
AV22 HDA_SDI0 GPIO28 AL39 PCH_GPIO29
HDA_SDI1 SLP_WLAN# / GPIO29

*
FLASH_OVERRIDE# R99 15Ohm +/-1% AT22 W34 PCH_GPIO73 R358 1K S_WAKE#
AW23 HDA_SDI2 PCIECLKRQ0# / GPIO73 P39 PCH_GPIO18 3D3V_SB +/-5%
HDA_SDI3 PCIECLKRQ1# / GPIO18

**
31 A_HDA_SDO R100 33+/-5% PCH_HDSDO AU22 P37 BOARD_ID3 Dummy
R106 33+/-5% PCH_HDSYNC AV24 HDA_SDO PCIECLKRQ2# / GPIO20 / SMI# AA39 PCH_GPIO25
31 A_HDA_SYNC HDA_SYNC PCIECLKRQ3# / GPIO25 W35 PCH_GPIO26 RN23 10K
33
33
SPI_MOSI
SPI_MISO
P40
R36 SPI_MOSI(IO0)
PCIECLKRQ4# / GPIO26
PCIECLKRQ5# / GPIO44
AA36
W32
PCH_GPIO44
PCH_GPIO45 PCH_GPIO45 41
*
1
3
2
4
PCH_GPIO31
PCH_GPIO27
R38 SPI_MISO(IO1) PCIECLKRQ6# / GPIO45 AA40 PCH_GPIO46 5 6 PCH_GPIO72
33 SPI_CS0# SPI_CS0# PCIECLKRQ7# / GPIO46 PCH_GPIO46 41
U39 7 8

SPI
33 SPI_SCK PCH_GPIO12
R35 SPI_CLK AC36 PCH_GPIO57
R40 SPI_CS1# GPIO57 W31
SPI_CS2# SYS_PWROK P_VR_READY 11,42
33 SPI_IO2 U40 AE36 PCH_RI#
U37 SPI_IO2 RI# AK34 S_WAKE#
33 SPI_IO3 SPI_IO3 WAKE# S_WAKE# 26,28
AN37 S_SLP_M# 38
SLP_A#

*
AU36 SLP_LAN# 3D3V_SYS R104 10K +/-5% PCH_GPIO18 R162 10K +/-5%
SLP_LAN# TP30
AC35 TP_PCH_AC35 Dummy
TP21 TP10
ICH_RTCX1 AN40
ICH_RTCX2 AN39 RTCX1 AK40
RTCX2 SLP_S3# S_SLP_S3# 34,38,39,42
S_RTCRST# AR38 AT35 S_SLP_S4# 34,41
S_SRTCRST# AR39 RTCRST# SLP_S4# AA35 S_SLP_S5# 3D3V_SYS 3D3V_SYS
SRTCRST# SLP_S5# / GPIO63 TP16
S_INTRUDER# AR41 AD37 S_LPCPD#
INTRUDER# SUS_STAT# / GPIO61 LPCPD# 36
13,20,34 PWRGD_3V AT40 W36 SUSCLK
PWROK SUSCLK / GPIO62 SUSCLK_PCH 25
C
34 PCH_RSMRST# PCH_RSMRST#
PCH_INTVRMEN
AM40
AV36 RSMRST#
INTVRMEN
GPIO72
SUSACK#
AJ40
AJ37
PCH_GPIO72
S_SUSACK# S_SUSACK# 34 R108 * R204 * C

**
R561 0 +/-5%@EUP PCH_DPWROK_R AV38 AG41 S_SUSWARN# S_SUSWARN# 34,40 10K 10K
R562 0 +/-5% DSW_VR_EN AM41 DPWROK SUSWARN# / SUSPWRNACK / GPIO30 AE38 DRAM_PWRGD
34 PCH_DPWROK DSWVRMEN DRAMPWROK DRAM_PWRGD 11 +/-5% +/-5%
@DSW AU34 PCH_GPIO27
GPIO27 AM36 PCH_GPIO31
ACPRESENT / GPIO31 AK38 SLP_SUS# BOARD_ID3 BOARD_ID4
SLP_SUS# SLP_SUS# 34,40
AK41 S_PWRBTN# S_PWRBTN# 34
PWRBTN#
16,28
16 PCIE_WAKE#
S_SMBCLK_RESUME
PCIE_WAKE#
S_SMBCLK_RESUME
AG31
AG36 SMBALERT# / GPIO11
SMBCLK
SYS_RESET#
SPKR
N36
R32
FP_RST# FP_RST#
S_SPKR_OUT
11,37
25,32 R109 * R173 *
16,28 S_SMBDATA_RESUME S_SMBDATA_RESUME AG32 10K 10K
PCH_GPIO60 AG35 SMBDATA D40
41 PCH_GPIO60 SML0ALERT# / GPIO60 PROCPWRGD H_PWRGOOD 11,42 +/-5% +/-5%
SML0CLK AE32
SML0DATA AE35 SML0CLK Dummy Dummy
TMIN_SHIFT AJ39 SML0DATA V_SM
SMLINK1_CLK AK36 SML1ALERT# / PCHHOT# / GPIO74 3D3V_SYS
34 SMLINK1_CLK SML1CLK / GPIO58
34 SMLINK1_DATA SMLINK1_DATA AK33
SML1DATA / GPIO75

TP20
W37 PCH_JTAG_RST 18 *
R113
1.8KOhm *

JTAG(SUS)
Tmin_Shift --> PCH Y40 R111 +/-1%
JTAG_TCK TP32
W39 10K
HOT for SIO FAN JTAG_TDI Y38
PCH_JTAG_TDI 18
DRAM_PWRGD
PCH_JTAG_TDO 18 +/-5%
control JTAG_TDO W40 PCH_JTAG_TMS 18
JTAG_TMS
BOARD_ID5
R114
3.3KOhm *
4 OF 11 * R112 *
+/-1%

10K R193
LYNXPOINT_0P8_VER1.1 +/-5% 10K
Dummy +/-5%
Dummy
3D3V_SYS
3D3V_DUAL
ICH_RTCX2 3D3V_SYS

*
S_SUSWARN# R727 0 +/-5% S_SUSACK#
X1
Change X1 to 710104000-VPN-G @EUP
XTAL-32.768kHz from 71010G400-VPN-G for Crystal accuracy.
B
1 2 ICH_RTCX1
change C79、C80 to 10pF from 18 pF. * R480 * R481 * B

X4_1 change to X1_1 for factory. * R479 2.2K 2.2K R482

3

2.2K 2.2K
---For V1.0 20130510 +/-5% +/-5%
G

X1_1 +/-5% +/-5% Change Enable PIN to

S_SMBCLK_RESUME D S S_SMBCLK_MAIN 14,15,27,36 ME Disable (Flash overide) 1-2 from 2-3 for TF
*

R118 10M
+/-5% --20130318
G

FOOTPRINT:0603 ONLY Crystal Retainer

Q5

* C79
18pF * C80
18pF
S_SMBDATA_RESUME 2N7002 D S S_SMBDATA_MAIN 14,15,27,36
+/-5% +/-5%
3D3V_DUAL
Q6 3D3V_DUAL
2N7002
PCH_ME_ENABLE(1-2)
R116 and Q57 Dummy for FAB-B Default 2-3
* R116
Change CLR_MOS Jumper to red from blue
1K
+/-5%
* R117 Jumper_2P_Blu
MFG_Mode move to GP28 for FAB-B Dummy 1K
If high disable ME

E
VBAT
CLR_CMOS MFG_MODE B Q57
MMBT3906
Dummy
+/-5%

Header_1X3

C
VBAT_IO 3D3V_SB JUMPER_CMOS(1-2) 3
FLASH_OVERRIDE# 2
D1 D2 VCCRTC 1
BAT54C BAT54C

3
1 1
3
width 20 mils
Jumper_2P_Red VCCRTC * R159PCH_ME_ENABLE
2 2 1K

*
C129
1uF *
R136
20K
Default 1-2

*R115
+/-5%
Dummy
c0603h9 +/-5% CLR_CMOS 20K
R138
A
*R137 10V, X5R, +/-10% 1 +/-5% A
*

S_RTCRST# 2
1K C130 3 S_SRTCRST#
BAT_1 +/-5%
* 1uF
c0603h9 1K
+/-5%

*
+

10V, X5R, +/-10%

LITHIUM BATT BAT1 Header_1X3 C78
CR2032
Battery Holder 1uF
10V, X5R, +/-10%
-

Battery
FOXCONN PCEG
Title
PCH3-SPI/HD_Audio/ACPI
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 21 of 43

5 4 3 2 1
 5 4 3 2 1

PCH - DP AND RGB

US2E
Place at PCH <750mils

**
AJ2 AH3 R121 33 Ohm +/-1% CRTHSYNC 17
AH5 DDPB_HPD VGA_HSYNC AH2 R122 33 Ohm +/-1%
17 DPC_HPD_R DDPC_HPD VGA_VSYNC CRTVSYNC 17
AJ4
DDPD_HPD AC2
VGA_RED VGA_RED 17
AE2 VGA_GREEN 17
VGA_GREEN AC3
VGA_BLUE VGA_BLUE 17
AK6
AK8 DDPB_AUXN AG4
DDPB_AUXP VGA_IRTN
AG7
AG6 DDPC_AUXN
DDPC_AUXP
VGA_DDC_DATA
VGA_DDC_CLK
AL3
AL2
PCH_DDCA_DATA
PCH_DDCA_CLK
17
17
* R123
150 *R124
150 * R125
150

*
AG11 AF5 PCH_DACIREF R709 649 Ohm +/ -1% +/ -1% +/ -1%
D
AG10 DDPD_AUXN DAC_IREF +/-1% D
DDPD_AUXP AN3
DDPC_CTRLCLK AM2 DDPC_CTRLCLK 17
DDPC_CTRLDATA AM1 DDPC_CTRLDATA 17
DDPB_CTRLCLK AJ5
DDPB_CTRLDATA AN4
DDPD_CTRLCLK AN2
DDPD_CTRLDATA

5 OF 11
LYNXPOINT_0P8_VER1.1

US2F

29 USB3_RXDN0 F20 N1
USB3RN1 FDI_RXN0 FDI_TX0_N 10
29 USB3_RXDP0 G20 N2
USB3RP1 FDI_RXP0 FDI_TX0_P 10
Rear USB 3.0. 29 USB3_TXDN0
B18 P2
USB3TN1 FDI_RXN1 FDI_TX1_N 10
C18 P3

FDILINK
29 USB3_TXDP0 USB3TP1 FDI_RXP1 FDI_TX1_P 10

29 USB3_RXDN1 G18 L2
H18 USB3RN2 FDI_CSYNC FDI_CSYNC 10
29 USB3_RXDP1 USB3RP2
Rear USB 3.0. 29 USB3_TXDN1
B15 L3
B16 USB3TN2 FDI_INT FDI_INT 10
C 29 USB3_TXDP1 C
USB3TP2

*
K2 FDI_RCOMP R126 7.5K +/-1% +1P5V_PCH
K20 FDI_RCOMP
L20 USB3RN5
D15 USB3RP5
C15 USB3TN5
USB3TP5
L18
K18 USB3RN6
B14 USB3RP6
A14 USB3TN6
USB3TP6

AK28
25 PCH_GPIO70 AT34 TACH6 / GPIO70
For Flex IO Strapping 25 PCH_GPIO71 TACH7 / GPIO71
6 OF 11
LYNXPOINT_0P8_VER1.1 RN25 10K +/-5%
19
19
CLKIN_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_DMI_N
1
3
* 2
4
CK_H_CLK_IN# 5 6
CK_H_CLK_IN 7 8

PCH - CLOCK DISTRIBUTION

US2G
**

R127 22 Ohm +/-1% CLKOUT_PCI0 AV5 G16 CK_H_CLK_IN# Input Termination

34 CK_P_33M_SIO CLKOUT_33MHZ0 CLKIN_GND_N F16 CK_H_CLK_IN
R128 22 Ohm +/-1% CLKOUT_PCI1 AV7 CLKIN_GND_P
19 CK_P_33M_PCH CLKOUT_33MHZ1 R2
CLKOUT_DMI_N CK_PE_100M_DMI# 11
CLKOUT_PCI2 AU2 T2 CK_PE_100M_DMI 11 100Mhz to CPU_BCLK.
TP11 CLKOUT_33MHZ2 CLKOUT_DMI_P
B B
AN9 T3 CK_OUT_DP# 10
TP12 CLKOUT_33MHZ3 CLKOUT_DP_N T5 CK_OUT_DP 10 135Mhz for CPU Display Port Ref CLK.
CLKOUT_DP_P
*

R129 22 Ohm +/-1% AU5

36 C_PCICLK_TPM CLKOUT_33MHZ4 W2
CLKOUT_DPNS_N CK_DPNS# 11
Stuff RF5 for TCM U2 CK_DPNS 11 135Mhz for CPU Display Port Ref CLK with non-spread.
CLKOUT_DPNS_P
*

R130 33 +/-5% CLKOUTFLEX3_48M AV8

34 SIOCLK_48M AT9 CLKOUTFLEX0 / GPIO64 U6 CK_100M_H_ITP#
CLKOUTFLEX1 / GPIO65 CLKOUT_ITPXDP_N TP17
14.318Mhz for SIO Change R130 from 22ohm to AV9 U7 CK_100M_H_ITP 100Mhz to CPU_XDP
CLKOUTFLEX2 / GPIO66 CLKOUT_ITPXDP_P TP19
AU8
33ohm for FAB-B CLKOUTFLEX3 / GPIO67 AA3
CLKOUT_PEG_A_N CK_PE_100M_X16PORT# 16
*

+1P5V_PCH R131 7.5K +/-1% XCLK_RCOMP R11 AA2 CK_PE_100M_X16PORT 16 100Mhz to PCIE 3.0 (SLOT 1)
DIFFCLK_BIASREF CLKOUT_PEG_A_P
CK_14M_PCH AR7 AE6
19 CK_14M_PCH REFCLK14IN CLKOUT_PEG_B_N AE7
CLKOUT_PEG_B_P
AE10 CLKOUT_PCIE0# 16 100Mhz to PCIE 2.0 (SLOT 2:PCIE1X)
CLKOUT_PCIE_N0 AE11
CLKOUT_PCIE_P0 CLKOUT_PCIE0 16
AC6
CLKOUT_PCIE_N1 AC7 C_PCH_100M_BRIDGE_DN 26
CLKOUT_PCIE_P1 C_PCH_100M_BRIDGE_DP 26
100Mhz to PCIE 2.0 PCIE BRIDGE)
AC11 CLKOUT_PCIE2# 28
CLKOUT_PCIE_N2 AC10
CLKOUT_PCIE_P2 CLKOUT_PCIE2 28 100Mhz to PCIE 2.0 (LAN)
W11
CLKOUT_PCIE_N3 W10
CLKOUT_PCIE_P3
Y4
CLKOUT_PCIE_N4 Y2
CLKOUT_PCIE_P4
W7
CLKOUT_PCIE_N5 W6
CLKOUT_PCIE_P5
AA7
CLKOUT_PCIE_N6 AA6
XTAL_25M_IN N7 CLKOUT_PCIE_P6
XTAL25_IN R6
XTAL_25M_OUT N6 CLKOUT_PCIE_N7 R7
A A
XTAL25_OUT CLKOUT_PCIE_P7
7 OF 11
R132 1MOhm
+/-1% LYNXPOINT_0P8_VER1.1

X2
1 2

* C81
XTAL-25MHz
* C82
FOXCONN PCEG
27pF 27pF Title
+/-5% +/-5% PCH4-USB3/FDI/VGA/CLK
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 22 of 43

5 4 3 2 1
 5 4 3 2 1

+1P5V_PCH

US2H

+1P05V_PCH AA19 A19

AA20 VCC_1 DMI_IREF N11
AB16 VCC_2 FDI_IREF N10
AB17 VCC_3 ICLK_IREF B13
C87 1uF +/-10% AB19 VCC_4 PCIE_IREF A33
VCC_5 SATA_IREF

******
AB20
C88 1uF +/-10% AD16 VCC_6 B37 C83 1uF +/-10%
D VCC_7 VCCVRM_1 D

** *
V17 A38
C89 1uF +/-10% V19 VCC_8 VCCVRM_2 K1
V20 VCC_9 VCCVRM_3 B39 C90 0.1uF 16V, X7R, +/-10%
C84 1uF +/-10% V22 VCC_10 VCCVRM_4 A39 C91 0.1uF 16V, X7R, +/-10%
V23 VCC_11 VCCVRM_5 A40
C85 1uF +/-10% V25 VCC_12 VCCVRM_6 T14
W17 VCC_13 VCCVRM_7 C2
C86 1uF +/-10% W19 VCC_14 VCCVRM_8 C1
W23 VCC_15 VCCVRM_9 B4
+1P05V_PCH W25 VCC_16 VCCVRM_10 A4
VCC_17 VCCVRM_11 AF2 +1P5V_PCH +1P5V_PCH_DAC
VCCADAC1_5 +1P5V_PCH_DAC
AC12
L1 VCCIO_1 AE1 +3V_BG
VCCADACBG3_3
*

V_1P05_XCK 1 2 V_1P05_XCK_DCB_FB_R AB1 B6

10uH@2.52MHz U12 VCC_18 VCC3_3_1 AW21 C92 1uF +/-10%
VCCCLK_1 VCC3_3_2

*
**
C94 C95 V14 C93 0.1uF 16V, X7R, +/-10% R133 0 +/-5%
VCCCLK_2
Change L1 to P/N:630106S00-023-G for FAB-B * 10uF
* 1uF
+/-10%
W14
AB2 VCCCLK_3 VCCCLK3_3_1
AM7
AM9
3D3V_SYS
VCC CLK Decoupling 6.3V,X5R AA16 VCCCLK_4 VCCCLK3_3_2 AP5
W16 VCCCLK_5 VCCCLK3_3_3 AP7 C96 1uF +/-10%
VCCCLK_6 VCCCLK3_3_4

****
T16 AR4
V16 VCCCLK_7 VCCCLK3_3_5 AT5 C98 1uF +/-10%
C97 1uF +/-10% VCCCLK_8 VCCCLK3_3_13 AV4
VCCCLK3_3_6
*
******

P14 AW4 C100 1uF +/-10%

C99 1uF +/-10% P16 VCCIO_2 VCCCLK3_3_7 AW9 C106
P17 VCCIO_3 VCCCLK3_3_8 AG12 C105 1uF +/-10%
+1P05V_PCH VCCIO_4 VCCCLK3_3_9 0.1uF
C104 1uF +/-10% P22 AK11 16V, X7R, +/-10%
P23 VCCIO_5 VCCCLK3_3_10 AV3
C107 1uF +/-10% P25 VCCIO_6 VCCCLK3_3_11 AW3
P26 VCCIO_7 VCCCLK3_3_12
C108 1uF +/-10% P28 VCCIO_8 U30
VCCIO_9 VCC3_3_3 3D3V_SYS
T19 W30
C110 1uF +/-10% T20 VCCIO_10 VCC3_3_4 C109 0.1uF 16V, X7R, +/-10%
VCCIO_11

**
C111 1uF +/-10% AF19 AF26 C112 0.1uF 16V, X7R, +/-10%
VCCIO_12 VCC3_3_5
* AF20
AF22 VCCIO_13 AG1
C113 VCCIO_14 VCC3_3_6
AF23 +3V_EPW
AP22 VCCIO_15 R41
*
C 10uF C114 1uF +/-10% C
VCCUSBPLL VCCSPI

*
6.3V,X5R M14
VCCIO_16 AW26
VCCSUSHDA 3D3V_DUAL
VCC I/O Decoupling AA23 C115 C116
+1P05V_PCH VCCASW_1

Change +1P05V_ME
AA25
AA26 VCCASW_2
VCCASW_3
VCCSUS3_3_1
VCCSUS3_3_2
AM33
AN33 * 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10%
*
AB22 C117
VCCASW_4
to +1P05V_PCH AB23
VCCASW_5 VCCSUS3_3_3
AH18 1uF
AB25 AH20
--20130201 AB26 VCCASW_6 VCCSUS3_3_4 AH22
+/-10%
C118 1uF +/-10% AD17 VCCASW_7 VCCSUS3_3_5 AJ20
VCCASW_8 VCCSUS3_3_6
**

AD19 AK20
C119 10uF AD20 VCCASW_9 VCCSUS3_3_7 P20 3D3V_SB
6.3V,X5R AD22 VCCASW_10 VCCSUS3_3_8 AP35
AD23 VCCASW_11 VCCSUS3_3_9 +1P05V_PCH +1P05V_PCH
W26 VCCASW_12 AV39
AD25 VCCASW_13 VCCDSW3_3_1 AW38 C120 0.1uF +VCCIO2PCH
VCCASW_14 VCCDSW3_3_2

**
AF25 AW39 C121 16V,
0.1uF
X7R, +/-10%
VCCASW_15 VCCDSW3_3_3
VCCRTC_2
AP33 16V, X7R, +/-10% VCCRTC * C131 * C132
C39 +VCCIO2PCH 0.1uF 0.1uF
V_PROC_IO
* * *
16V, X7R, +/-10% 16V, X7R, +/-10%

*
AU40 V_1P05_DSW_INT_R R161 4.99Ohm V_1P05_DSW_INT C123 1uF +/-10% C124 C125
DCPSUSBYP_1

*
AU41 +/-1% 0.1uF 0.1uF C126
DCPSUSBYP_2
16V, X7R, +/-10% 16V, X7R, +/-10% 1uF
AJ22 TP_V_1P05_USBSUS_INT +/-10%
DCPSUS2 TP13
AW35 V_1P5_RTC_INT C127 0.1uF
DCPRTC

**
16V, X7R, +/-10%
AH28 V_1P5_STBY_INT C128 0.1uF
DCPSST 16V, X7R, +/-10%
AE30 TP_PC_AE30
DCPSUS1 TP14
P19 TP_PCH_P19
DCPSUS3
8 OF 11 TP15

LYNXPOINT_0P8_VER1.1
B B

PCH_HS

1
1

A A

2
Heatsink 2

PCH HEATSINK
FOXCONN PCEG
Title
PCH5-PWR
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 23 of 43

5 4 3 2 1
 5 4 3 2 1

D D

US2J
US2I
U4 AN28
D9 A12 U8 VSS_129 VSS_159 AP4
E12 VSS_62 VSS_68 A16 V26 VSS_130 VSS_160 AP9
E3 VSS_63 VSS_69 A21 V28 VSS_131 VSS_161 AR11
E31 VSS_64 VSS_70 A35 V38 VSS_132 VSS_162 AR35
E35 VSS_65 VSS_71 AA10 V40 VSS_133 VSS_163 AR37
E38 VSS_66 VSS_72 AA11 W12 VSS_134 VSS_164 AT11
E4 VSS_67 VSS_73 AA12 W20 VSS_135 VSS_165 AT10
E5 VSS_7 VSS_74 AA14 W22 VSS_136 VSS_166 AT14
E7 VSS_8 VSS_75 AA17 W28 VSS_137 VSS_167 AT15
F18 VSS_9 VSS_76 AA22 W3 VSS_138 VSS_168 AT16
F24 VSS_10 VSS_77 AA28 W5 VSS_139 VSS_169 AT18
F35 VSS_11 VSS_78 AA30 W8 VSS_140 VSS_170 AT20
F37 VSS_12 VSS_79 AA34 Y1 VSS_141 VSS_171 AT21 US2K
F38 VSS_13 VSS_80 AA5 Y41 VSS_142 VSS_172 AT23
G2 VSS_14 VSS_81 AA8 D12 VSS_143 VSS_173 AT24 AT1 U11
H14 VSS_15 VSS_82 AB14 D13 VSS_144 VSS_174 AT28 AT41 VSS_206 TP19 U10
H16 VSS_16 VSS_83 AB28 D14 VSS_145 VSS_175 AT29 AU1 VSS_207 TP18 AJ14
H20 VSS_17 VSS_84 AB4 D16 VSS_146 VSS_176 AT33 AV1 VSS_208 TP23 AK14
C C
H22 VSS_18 VSS_85 AC30 D18 VSS_147 VSS_177 AT36 AV2 VSS_209 TP24 K34
H26 VSS_19 VSS_86 AC34 D19 VSS_148 VSS_178 AT38 AV40 VSS_210 TP9 K33
H28 VSS_20 VSS_87 AC38 D20 VSS_149 VSS_179 AT7 AV41 VSS_211 TP8 AH24
H33 VSS_21 VSS_88 AC5 D22 VSS_150 VSS_180 AT8 AW2 VSS_212 TP22
H34 VSS_22 VSS_89 AC8 D24 VSS_151 VSS_181 AU3 AW40 VSS_213 L16
H38 VSS_23 VSS_90 AD14 D25 VSS_152 VSS_182 AU39 B40 VSS_214 TP11 K16
H4 VSS_24 VSS_91 AD26 D26 VSS_153 VSS_183 AV12 B41 VSS_215 TP6 AM34
H6 VSS_25 VSS_92 AD28 D27 VSS_154 VSS_184 AV17 C41 VSS_216 TP25
H8 VSS_26 VSS_93 AE12 D28 VSS_155 VSS_185 AV33 D1 VSS_217 R12
H9 VSS_27 VSS_94 AE31 D31 VSS_156 VSS_186 AW30 D41 VSS_218 TP17 N12
J31 VSS_28 VSS_95 AE4 D32 VSS_157 VSS_187 AW7 VSS_219 TP13 L22
J37 VSS_29 VSS_96 AE41 VSS_158 VSS_188 B25 TP12 K22
J5 VSS_30 VSS_97 AE8 VSS_189 B3 TP7
K31 VSS_31 VSS_98 AF14 VSS_190 B30 R4
K4 VSS_32 VSS_99 AF16 VSS_191 B33 TP16 K5
K9 VSS_33 VSS_100 AF17 VSS_192 B38 TP5 P5
L37 VSS_34 VSS_101 AF28 VSS_193 C25 TP15 L5
L41 VSS_35 VSS_102 AG2 VSS_194 C37 TP10
M16 VSS_36 VSS_103 AG30 VSS_195 C6 AC31
M18 VSS_37 VSS_104 AG34 VSS_196 D34 VSS_203
M20 VSS_38 VSS_105 AG38 VSS_197 D37
M22 VSS_39 VSS_106 AG8 VSS_198 D4
M24 VSS_40 VSS_107 AH14 VSS_199 D6 AF3
M26 VSS_61 VSS_108 AH16 VSS_200 D7 VSS_204 AV21
VSS_41 VSS_109 VSS_201
M28
VSS_42 VSS_110
AJ1
VSS_202
D8 11 OF 11 VSS_205
N31 AJ28
N35 VSS_43 VSS_111 AK24 LYNXPOINT_0P8_VER1.1
N38 VSS_44 VSS_112 AK37
N4 VSS_45 VSS_113 AK9
N8 VSS_46 VSS_114 AL11
R1 VSS_47 VSS_115 AL37
R10 VSS_48 VSS_116 AL5
R34 VSS_49 VSS_117 AM14
R8 VSS_50 VSS_118 AM16
T17 VSS_51 VSS_119 AM18
T22 VSS_52 VSS_120 AM20
T23 VSS_53 VSS_121 AM24
B
T25 VSS_54 VSS_122 AM26 B
T26 VSS_55 VSS_123 AM35
T28 VSS_56 VSS_124 AM38
U1 VSS_57 VSS_125 AM4
U31 VSS_58 VSS_126 AM6
U32 VSS_59 VSS_127 AM8
VSS_60 VSS_128
10 OF 11
9 OF 11
LYNXPOINT_0P8_VER1.1
LYNXPOINT_0P8_VER1.1

A A

FOXCONN PCEG
Title
PCH6-GND
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 24 of 43

5 4 3 2 1
 5 4 3 2 1

D D

GPIO16 (Detect by
pin43. H-->SATA GPIO49 (L-->PCIe) GPIO70 (L-->USB3) GPIO71 (L-->USB3)
3D3V_SYS 3D3V_SYS 3D3V_SYS 3D3V_SYS 3D3V_SYS
L-->PCIe)
C C

* R139 * R140 * R141 * R142 * R164

10K 10K 10K 10K 10K
+/-5% +/-5% +/-5% +/-5% +/-5%
Dummy
SATA4GP 20 PCH_GP49 20 PCH_GPIO70 22 PCH_GPIO71 22 PCH_GPIO33 21

* R143 * R144 * R145 * R146 * R170 PCH_GPIO53 19

10K 10K 10K 10K 10K
+/-5% +/-5% +/-5% +/-5% +/-5%
Dummy Dummy Dummy Dummy * R147
1K
+/-5%
DMI AC COUPLING FULL VOLTAGE MODE Dummy

WHEN SAMPLED LOW

3D3V_SYS

No Reboot Mode 3D3V_SYS TLS Confidentiality

* R148
SPKR GPIO37 1K
(IN-PD) Description (IN-PD) Description +/-5%
* R149 ME Crypto TLS cipher suite PCH_GP37 20
B
High No reboot mode: Enable 10K High with confidentiality DEFAULT B
+/-5%
Dummy
ME Crypto TLS cipher suite * R150
Low No reboot mode: Disable DEFAULT S_SPKR_OUT 21,32 Low with no confidentiality 10K
+/-5%
Dummy

3D3V_SYS

Topblock Swap Mode * R151

PCH_GPIO55 19 1K
GPIO55 +/-5%
(IN-PU) Description DMI Rx Termination Dummy
PCH_GP36 20
High Topblock swap mode: Disable DEFAULT *R152
4.7K
GPIO36
(IN-PD) Description
* R153
+/-5%
Dummy 10K
Low Topblock swap mode: Enable Low DMI Rx Termination Voltage +/-5%

3D3V_DUAL

3D3V_SYS
Boot BIOS Destination Selection
* R171
1K
A GPIO51
(IN-PU)
SATA1GP/GP19
(IN-PU) Description * R154 * R155 +/-5%
Dummy
A

10K 10K On-Die PLL Voltage Regulator

+/-5% +/-5% SUSCLK_PCH 21
Low Low Flash cycle routed to LPC GPIO62/SUSCLK
(IN-PU) Description
19 PCH_GPIO51
High Low Flash cycle routed to PCI
20 SATA1GP
High Regulator is enabled. DEFAULT * R156
High High Flash cycle routed to SPI DEFAULT
1.5KOhm
Dummy FOXCONN PCEG
* R157 * R158 Low Regulator is disabled.
Title
1K 1K
PCH7-Strapping Option
+/-5% +/-5%
Size Document Number
H81M02
Rev
Dummy Dummy C A

Date: Thursday, May 16, 2013 Sheet 25 of 43

5 4 3 2 1
 5 4 3 2 1

3D3V_SYS 1.8VA
1.8V_AUXA
L12 1.8V_AUXA
3.3VD FB 60 Ohm 3D3V_DUAL
1 2
C254 C256
* 10uF
6.3V,X5R,+/-20% * C255 * 0.1uF
16V, X7R, +/-10%
*
C257
10uF
* *
C261
0.1uF
LDOAUX_18V

1uF
+/-10%
6.3V,X5R,+/-20% C260
1uF
16V, X7R, +/-10%
* C258
0.1uF * C259
0.1uF L13
+/-10% 16V, X7R, +/-10% 16V, X7R, +/-10% FB 60 Ohm
1 2 1.8AUX

GNDA GNDA GNDA L14

C262 C263 C264 FB 60 Ohm
D LDO_18V 1.8VD * 0.1uF
16V, X7R, +/-10% * 0.1uF
*
16V, X7R, +/-10%
10uF
6.3V,X5R,+/-20%
1 2
D

L15 Dummy

1
FB 60 Ohm
2 * C265
0.1uF
16V, X7R, +/-10%
C266 C268 C269 C270 C272
#REFDE32
* 10uF
6.3V,X5R,+/-20% * C267 * 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10% * 10uF
6.3V,X5R,+/-20% * C271 * 0.1uF
16V, X7R, +/-10%
PCB layout note:
2 1
1uF 1uF Connect to PCIE GNDA
+/-10% +/-10% COPPER
GNDD PERST# Signal

GNDA

11,19,34 PLTRST#
GNDA
PCB layout note:

PCICLK_SEL
PCIE CLK signals PCICLK0

PCIRST#

PCICLK0
TP5
PM66EN

PREQ0#

PREQ1#
PGNT0#

PGNT1#
PINTD#
PLTRST#

PAD31
PAD30
PAD29
PAD28
TP4
GNDD

GNDD

GNDD

GNDD
1.8VD

3.3VD

1.8VD

3.3VD
Close to Chip
C274
*

1
10pF
* C273
K_PCI_CBE#[3..0] 27

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
100pF Dummy

99
98
97
U9

2
50V, NPO, +/-5% K_PCI_CBE#0
K_PCI_CBE#1

NC6
NC7
PCICLK_SEL

NC8
NC9
VCCK

NC10
NC11
PERST#
INTD#
PCIRST#
NC12

NC13
GNT0#
REQ0#
NC14
NC15
PCICLK0
GNT1#
REQ1#
GNDP
VCCP
M66EN

VSS
VCCK
GNDP
VCCP

AD31
AD30
AD29
AD28
VSS
CLKN K_PCI_CBE#2
22 C_PCH_100M_BRIDGE_DN
PCIEWAKE# 1 96 1.8VD K_PCI_CBE#3
PME# 2 WAKE# VCCK 95 GNDD
GNDA 3 PME# GNDP 94 3.3VD PAD[31:0]
GNDP_AUX0 VCCP K_PCI_AD[31..0] 27
22 C_PCH_100M_BRIDGE_DP
CLKP VCCP 4
VCCP_AUX0 NC5
93 H: Enable
LDOAUX_18V 5 92 EXT_ARB
VCCK_AUX1 EXT_ARB
GNDA 6
VSS_AUX RST_SEL
91 RST_SEL L: Disable PFRAME#
K_PCI_FRAME# 27
C 1.8AUX 7 90 TEST_EN PIRDY# C
8 NC TEST_EN 89 PAD27 PTRDY# K_PCI_IRDY# 27
NC1 AD27 K_PCI_TRDY# 27

**
*R212 *R213
Dummy
49.9 Dummy
49.9
CLKN
CLKP
9
10 CLKN
CLKP
AD26
CBE3#
88
87
PAD26
K_PCI_CBE#3
PM66EN R214 Dummy
10K +/-5%
3D3V_SYS PSTOP#
PDVSEL# K_PCI_STOP#
K_PCI_DEVSEL#
27
27
PCB layout note: +/-1% +/-1% 1.8VA 11 86 PAD25 R215 0 +/-5% PPAR
1.8VA 12 VCC18A AD25 85 PAD24 PSERR# K_PCI_PAR 27
GNDA 13 VCC18A AD24 84 3.3VD PPERR# K_PCI_SERR# 27
PCIE CLK signals GNDA VCCP K_PCI_PERR# 27
GNDA 14 83 PAD23 PCIRST#
GNDA 15 GNDA AD23 82 PAD22 PLOCK# K_PCIRST# 27
Close to chip GNDA AD22 K_PCI_PLOCK# 27
RREF 16
RREF AD21
81 PAD21 H: PERST# PCICLK0
C_PCH_PCI1 27
GNDA X_PE_TX_DP3_R 17 80 PAD20
DIP AD20
X_PE_TX_DN3_R 18
DIN VSS
79 GNDD L: POR
1.8V_AUXA 19 78 1.8VD
DIN 20 VCC18A_AUX VCCK 77 PAD19 Dummy
DON AD19

**
DIP 21 76 PAD18 RST_SEL R216 10K +/-5%
3D3V_SYS
GNDD 22 DOP AD18 75 PAD17 PREQ0#
1.8VD 23 VSS AD17 74 PAD16 R217 10K +/-5% PREQ1# K_PCI_REQ#0 27
24 VCCK AD16 73 GNDD PGNT0# K_PCI_REQ#2 27
C275 0.1uF DIP 25 NC2 GNDP 72 3.3VD PGNT1# K_PCI_GNT#0 27
19 X_PE_RX_DP3 NC3 VCCP K_PCI_GNT#2 27
** **

C276 0.1uF DIN 26 71 PFRAME# PM66EN

19 X_PE_RX_DN3 EECS# FRAME# PM66EN 27
27 70 PIRDY#
28 EECLK IRDY# 69 K_PCI_CBE#2
C50 0.1uF X_PE_TX_DP3_R 29 EEWRDATA CBE2# 68 PTRDY#
19 X_PE_TX_DP3 EERDDATA TRDY#
C51 0.1uF X_PE_TX_DN3_R PAD0 30 67 PSTOP#
19 X_PE_TX_DN3 AD0 STOP#
PAD1 31 66 PDVSEL#
AD1 DEVSEL#
32 65 PINTA# H: Internal PCICLK 1-2: PCICLK INTPUT form CLK Gen

PERR#
SERR#

LOCK#
CBE0#

CBE1#
NC4 INTA#

INTC#
GNDP

GNDP

GNDP

INTB#
VCCP

VCCK

VCCP

VCCP

VCCK
AD10

AD11
AD12
AD13
AD14
AD15

PAR
VSS

VSS
AD2
AD3

AD4
AD5
AD6
AD7

AD8
AD9
L: External PCICLK 2-3: PCICLK OUTPUT form IT8893 chip
IT8893E_FX

33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

**
PCB layout note: RREF PCICLK_SEL R218 10K +/-5% Dummy 3D3V_SYS

K_PCI_CBE#0

K_PCI_CBE#1
PCIE TX signals *R220 R219 10K +/-5%

LDO_18V
12KOhm

PPERR#
PSERR#

PLOCK#

PINTC#
PINTB#
3D3V_SYS
Close to chip +/-1%

PAD10

PAD11
PAD12
PAD13
PAD14
PAD15
GNDD

GNDD

GNDD

GNDD

GNDD
3.3VD

1.8VD

3.3VD

3.3VD

PPAR
PAD2
PAD3

PAD4
PAD5
PAD6
PAD7

PAD8
PAD9
R463

*
B B
PCIE DIP;DIN;DOP;DON PCB layout note: PCIRST#

To meet Differential Impedance :85 ohm +/- 15% GNDA

8.2K
+/-1%
To meet Single-ended Impedance :50 ohm +/- 15%
3D3V_DUAL
PCIE DIP and DIN trace width:9.5 mils
RN45
PCIE DOP and DON trace width:9.5 mils
PCB layout note:
PCIEWAKE#
PME#
1
3
* 2
4
Space between DIP/DIN and DOP/DON:14.5 mils EXT_ARB 5 6 L16
Close to chip TEST_EN 7 8 FB 60 Ohm
L1 & L2 height:5 mils 3D3V_SYS 1 2 VIO_PCI
10K
The signal traces Number of vias: 2 (Max.) +/-5%

The signal trace above analog GND plane

Spacing from other groups:>25 mils
Total trace length: 12 inchs (Max.)
The size of C12;C13 is "0402"
PCI BUS 5V or 3.3V external pull up option
PCI BUS 5V external pull up resistor 2.7K VIO_PCI
PINTA#
PINTB# K_PCI_INT_A# 27 PCI BUS 3.3V external pull up resistor 8.2K
IT8893 K_PCI_INT_B# PCI slot
27
PCIE CLK PCB layout note: PINTC#
K_PCI_INT_C# 27
PINTD#
K_PCI_INT_D# 27
To meet Differential Impedance :100 ohm +/- 15%
To meet Single-ended Impedance :50 ohm +/- 15% #REFDE33
PCIEWAKE# 1 2
S_WAKE# 21,28
CLKP and CLKN trace width:7 mils
VCCP 3D3V_DUAL RN46 RN47
A Space between CLKP and CLKN:14 mils PIRDY#
PTRDY#
*1 2
K_PCI_INT_D#
PFRAME#
*1 2
A

3 4 3 4
L1 & L2 height:5 mils PSTOP#
5 6
PSERR#
5 6
PDVSEL# PPERR#
7 8 7 8
The signal traces Number of vias: 4 (Max.)
8.2K 8.2K
The signal trace above analog GND plane +/-5% +/-5%
RN49
Spacing from other groups:>25 mils
PREQ0#
RN48
*1
K_PCI_INT_A#
K_PCI_INT_C#
*1 2
Total trace length: 12 inchs (Max.) TP4
TP5 3
2
4
K_PCI_INT_B#
PLOCK#
3
5
4
6
FOXCONN PCEG
5 6 7 8
The size of R4;R5 is "0402" PREQ1#
7 8
Title
8.2K
The size of R6;R7 is "0402" PCIE TO PCI BRIDGE
For BX legacy mode
8.2K +/-5%
+/-5% Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 26 of 43

5 4 3 2 1
 5 4 3 2 1

PCI 1 PCI 2

3D3V_DUAL 3D3V_SYS 5V_SYS 12V_SYS -12V_SYS 3D3V_SYS

3D3V_DUAL 3D3V_SYS 5V_SYS 12V_SYS -12V_SYS 3D3V_SYS
PCI1 5V_SYS
A1 B1 PCI2 5V_SYS
A2 TRST# -12V B2 A1 B1
A3 +12V TCK B3 A2 TRST# -12V B2
D
A4 TMS GND1 B4 A3 +12V TCK B3 D
A5 TDI TDO B5 A4 TMS GND1 B4
K_PCI_INT_A# A6 +5V2 +5V1 B6 A5 TDI TDO B5
26,27 K_PCI_INT_A# K_PCI_INT_C# A7 INTA# +5V3 B7 K_PCI_INT_B# K_PCI_INT_B# A6 +5V2 +5V1 B6
26,27 K_PCI_INT_C# A8 INTC# INTB# B8 K_PCI_INT_D# K_PCI_INT_B# 26,27 26,27 K_PCI_INT_B# K_PCI_INT_D# A7 INTA# +5V3 B7 K_PCI_INT_C#
A9 +5V4 INTD# B9 K_PCI_INT_D# 26,27 26,27 K_PCI_INT_D# A8 INTC# INTB# B8 K_PCI_INT_A# K_PCI_INT_C# 26,27
A10 RSV1 PRSNT1# B10 A9 +5V4 INTD# B9 K_PCI_INT_A# 26,27
A11 +5V5 RSV2 B11 A10 RSV1 PRSNT1# B10
A12 RSV3 PRSNT2# B12 A11 +5V5 RSV2 B11
A13 GND3 GND2 B13 A12 RSV3 PRSNT2# B12
A14 GND5 GND4 B14 A13 GND3 GND2 B13
A15 SB3V RSV4 B15 A14 GND5 GND4 B14
26,27 K_PCIRST# RESET# GND6 SB3V RSV4

*
A16 B16 C_PCI_33M_SLOT1 R221 22 A15 B15 R222
+5V6 CLK C_PCH_PCI1 26,27 26,27 K_PCIRST# RESET# GND6

*
A17 B17 +/-5% A16 B16 C_PCI_33M_SLOT2 22
26 K_PCI_GNT#0 GNT# GND7 +5V6 CLK C_PCH_PCI1 26,27
A18 B18 A17 B17 +/-5%
GND8 REQ# K_PCI_REQ#0 26 26 K_PCI_GNT#2 GNT# GND7
A19 B19 A18 B18
21,27 K_PCI_PME# PCI_PME# +5V7 GND8 REQ# K_PCI_REQ#2 26
K_PCI_AD30 A20 B20 K_PCI_AD31 A19 B19
AD(30) AD(31) 21,27 K_PCI_PME# PCI_PME# +5V7
A21 B21 K_PCI_AD29 K_PCI_AD30 A20 B20 K_PCI_AD31
K_PCI_AD28 A22 +3.3V1 AD(29) B22 A21 AD(30) AD(31) B21 K_PCI_AD29
K_PCI_AD26 A23 AD(28) GND9 B23 K_PCI_AD27 K_PCI_AD28 A22 +3.3V1 AD(29) B22
A24 AD(26) AD(27) B24 K_PCI_AD25 K_PCI_AD26 A23 AD(28) GND9 B23 K_PCI_AD27
K_PCI_AD24 R223 A25 GND10 AD(25) B25 A24 AD(26) AD(27) B24 K_PCI_AD25
AD(24) +3.3V2 GND10 AD(25)
*

K_PCI_AD16 22 A26 B26 K_PCI_CBE#3 K_PCI_AD24 R224 A25 B25

IDSEL C/BE#(3) AD(24) +3.3V2

*
+/-5% A27 B27 K_PCI_AD23 K_PCI_AD17 22 A26 B26 K_PCI_CBE#3
K_PCI_AD22 A28 +3.3V3 AD(23) B28 +/-5% A27 IDSEL C/BE#(3) B27 K_PCI_AD23
K_PCI_AD20 A29 AD(22) GND11 B29 K_PCI_AD21 K_PCI_AD22 A28 +3.3V3 AD(23) B28
A30 AD(20) AD(21) B30 K_PCI_AD19 K_PCI_AD20 A29 AD(22) GND11 B29 K_PCI_AD21
K_PCI_AD18 A31 GND12 AD(19) B31 A30 AD(20) AD(21) B30 K_PCI_AD19
K_PCI_AD16 A32 AD(18) +3.3V4 B32 K_PCI_AD17 K_PCI_AD18 A31 GND12 AD(19) B31
A33 AD(16) AD(17) B33 K_PCI_CBE#2 K_PCI_AD16 A32 AD(18) +3.3V4 B32 K_PCI_AD17
A34 +3.3V5 C/BE#(2) B34 A33 AD(16) AD(17) B33 K_PCI_CBE#2
26,27 K_PCI_FRAME# FRAME# GND13 +3.3V5 C/BE#(2)
A35 B35 K_PCI_IRDY# A34 B34
GND14 IRDY# K_PCI_IRDY# 26,27 26,27 K_PCI_FRAME# FRAME# GND13
A36 B36 A35 B35 K_PCI_IRDY#
26,27 K_PCI_TRDY# TRDY# +3.3V6 GND14 IRDY# K_PCI_IRDY# 26,27
A37 B37 K_PCI_DEVSEL# A36 B36
GND15 DEVSEL# K_PCI_DEVSEL# 26,27 26,27 K_PCI_TRDY# TRDY# +3.3V6
A38 B38 A37 B37 K_PCI_DEVSEL#
26,27 K_PCI_STOP# STOP# GND16 GND15 DEVSEL# K_PCI_DEVSEL# 26,27
A39 B39 K_PCI_PLOCK# A38 B38
+3.3V7 LOCK# K_PCI_PLOCK# 26,27 26,27 K_PCI_STOP# STOP# GND16
A40 B40 K_PCI_PERR# A39 B39 K_PCI_PLOCK#
14,15,21,27,36 S_SMBCLK_MAIN SDONE PERR# K_PCI_PERR# 26,27 +3.3V7 LOCK# K_PCI_PLOCK# 26,27
C A41 B41 A40 B40 K_PCI_PERR# C
14,15,21,27,36 S_SMBDATA_MAIN SBO# +3.3V8 14,15,21,27,36 S_SMBCLK_MAIN SDONE PERR# K_PCI_PERR# 26,27
A42 B42 K_PCI_SERR# A41 B41
GND17 SERR# K_PCI_SERR# 26,27 14,15,21,27,36 S_SMBDATA_MAIN SBO# +3.3V8
A43 B43 A42 B42 K_PCI_SERR#
26,27 K_PCI_PAR PAR +3.3V9 GND17 SERR# K_PCI_SERR# 26,27
K_PCI_AD15 A44 B44 K_PCI_CBE#1 A43 B43
AD(15) C/BE#(1) 26,27 K_PCI_PAR PAR +3.3V9
A45 B45 K_PCI_AD14 K_PCI_AD15 A44 B44 K_PCI_CBE#1
K_PCI_AD13 A46 +3.3V10 AD(14) B46 A45 AD(15) C/BE#(1) B45 K_PCI_AD14
K_PCI_AD11 A47 AD(13) GND18 B47 K_PCI_AD12 K_PCI_AD13 A46 +3.3V10 AD(14) B46
A48 AD(11) AD(12) B48 K_PCI_AD10 K_PCI_AD11 A47 AD(13) GND18 B47 K_PCI_AD12
K_PCI_AD9 A49 GND19 AD(10) B49 PM66EN A48 AD(11) AD(12) B48 K_PCI_AD10
AD(9) GND20 PM66EN 26,27 GND19 AD(10)
K_PCI_AD9 A49 B49 PM66EN
AD(9) GND20 PM66EN 26,27
K_PCI_CBE#0 A52 B52 K_PCI_AD8
A53 C/BE#(0) AD(8) B53 K_PCI_AD7 K_PCI_CBE#0 A52 B52 K_PCI_AD8
K_PCI_AD6 A54 +3.3V11 AD(7) B54 A53 C/BE#(0) AD(8) B53 K_PCI_AD7
K_PCI_AD4 A55 AD(6) +3.3V12 B55 K_PCI_AD5 K_PCI_AD6 A54 +3.3V11 AD(7) B54
A56 AD(4) AD(5) B56 K_PCI_AD3 K_PCI_AD4 A55 AD(6) +3.3V12 B55 K_PCI_AD5
K_PCI_AD2 A57 GND21 AD(3) B57 A56 AD(4) AD(5) B56 K_PCI_AD3
K_PCI_AD0 A58 AD(2) GND22 B58 K_PCI_AD1 K_PCI_AD2 A57 GND21 AD(3) B57
A59 AD(0) AD(1) B59 K_PCI_AD0 A58 AD(2) GND22 B58 K_PCI_AD1
K_PCI_REQ64A# A60 +5V9 +5V8 B60 K_PCI_ACK64# A59 AD(0) AD(1) B59
A61 REQ64# ACK64# B61 K_PCI_REQ64A# A60 +5V9 +5V8 B60 K_PCI_ACK64#
A62 +5V11 +5V10 B62 A61 REQ64# ACK64# B61
+5V13 +5V12 A62 +5V11 +5V10 B62
Slot,PCI CONN +5V13 +5V12
Slot,PCI CONN

IRQ: A B C D
IDSEL: AD16 IRQ: B C D A
REQ/GNT: 0 IDSEL: AD17
REQ/GNT: 2

3D3V_DUAL
B B
PCI BUS if use 5V external pull up resistor is 2.7K 12V_SYS 12V_SYS 3D3V_DUAL
5V_SYS 3D3V_SYS 3D3V_SYS
3D3V_SYS 5V_SYS
+/-1% R225
*
**

K_PCI_REQ64A# C282
8.2K
K_PCI_ACK64#
26 K_PCI_AD[31..0] * C277
* C278
* C279 * C280 * C281
0.1uF
16V, X7R, +/-10% * C283
0.1uF
8.2K
+/-1% R226
0.1uF
16V, X7R, +/-10% * C284
0.1uF
0.1uF
16V, X7R, +/-10%
0.1uF
16V, X7R, +/-10%
100nF
25V, X5R,+/-10%
100nF
25V, X5R,+/-10%
Dummy 16V, X7R, +/-10%
Dummy
Dummy 16V, X7R, +/-10% Dummy Dummy Dummy Dummy
2010.6.22 update Dummy

K_PCI_CBE#[3..0] 26
K_PCI_CBE#0
K_PCI_CBE#1 -12V_SYS -12V_SYS
K_PCI_CBE#2
K_PCI_CBE#3

* C285 * C286
0.1uF
100nF 16V, X7R, +/-10%
25V, X5R,+/-10% Dummy
Dummy

A A

FOXCONN PCEG
Title
PCI SLOT X2
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 27 of 43

5 4 3 2 1
 5 4 3 2 1

LAN_XTL_DP VDD33
Place close pin45 LAN_XTL_DN VDD_1D05
VDD_1D05 L1_ACTIVE_LED0
VDD33 VREG
R176 2.49K +/-1% LAN_RST VDD33

*
VDD33 GPO
VDD33 L1_100_LED1 3D3V_DUAL R177 0 Reserved
VDD33 VDDSR

U4 Change for FAB-B for VDD33 pins-- 12, 27, 39, 42, 47, 48.

48
47
46
45
44
43
42
41
40
39
38
37
VDDSR VDD33
49 3D3V_SB R178 0 Dummy #REFDE25 1 2

DVDD10(NC)
LED0
AVDD33_4
AVDD33_3
RSET
AVDD10_4
CKXTAL2
CKXTAL1
AVDD33_2

DVDD3_2
GPO/SMBALERT
LED1/EESK
GND0
C148 C149 C150 C151 C152 C153 C154 C155 C156

D
* 22uF
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF #REFDE26 1 2
* 0.1uF
* 4.7uF
+/-10%
D
L1_LAN_MDI0_DP 1 36 REGOUT_1D05
L1_LAN_MDI0_DN 2 MDIP0 REGOUT 35
VDD_1D05 3 MDIN0 VDDREG_2 34
L1_LAN_MDI1_DP 4 AVDD10_1 VDDREG_1 33
MDIP1 ENSWREG

*
L1_LAN_MDI1_DN 5 32 EEDI R59 0 +/-5% RI1# 34,35
VDD_1D05 6 MDIN1 EEDI 31 L1_1G_LED3 Dummy
L1_LAN_MDI2_DP 7 AVDD10_2(NC) LED3/EEDO 30 EECS
L1_LAN_MDI2_DN 8 MDIP2(NC) EECS 29 VDD_1D05
MDIN2(NC) RTL8111F-CG DVDD10_2

*
VDD_1D05 9 28 #REFDE24 R437 0 S_WAKE# 21,26
L1_LAN_MDI3_DP 10 AVDD10_3(NC) LANWAKEB 27 VDD33 +/-5%
L1_LAN_MDI3_DN 11 MDIP3(NC) DVDD33_1 26 ISOLATEB
VDD33 12 MDIN3(NC) ISOLATEB 25
AVDD33_1(NC) PERSTB K_LAN_TPM_RST# 34,36

SMBDATA(NC)
SMBCLK(NC)

REFCLK_N
REFCLK_P
DVDD10_1
Please check the parameter of the inductor

CLKREQB

EVDD10
C157
VDD_1D05 VREG
*

HSON
HSOP

GND1
100pF IND,4.7uH@7.96MHz,+/-10%,800mA,800mOhm,G,SMD

HSIN
HSIP
50V, NPO, +/-5% VDD_1D05

L4

13
14
15
16
17
18
19
20
21
22
23
24
4.7uH for VDD10 pins-- 3, 6, 9, 13, 29, 41, 45.

*
REGOUT_1D05 Z3602
VDD_1D05
R179 0 Dummy LAN_TXN C158 0.1uF 16V, X7R, +/-10% C165 C166 C167 C168 C160 C161 C169

**
16,21 S_SMBCLK_RESUME PCH_HSIN4 19
0 Dummy
* * * * * * *
**

R180 SMLINK1_DATA_R LAN_TXP C159 0.1uF 16V, X7R, +/-10% C163 C164 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16,21 S_SMBDATA_RESUME PCH_HSIP4 19

19 PCH_C_HSOP4 C52
CLKREQB
0.1uF 16V, X7R, +/-10% LAN_RXP
EVDD_1D05
CLKOUT_PCIE2# 22 *
C162
0.1uF * 4.7uF
+/-10% * 0.1uF
**

19 PCH_C_HSON4 C53 0.1uF 16V, X7R, +/-10% LAN_RXN

CLKOUT_PCIE2 22
Dummy
for EMI

VDD33

C 3D3V_SYS EVDD_1D05 C
for EVDD10 pins--21.

**
LAN_XTL_DP R181 1K +/-1% Dummy GPO #REFDE27 1 2

LAN_XTL_DN SMLINK1_DATA_R R182 10K +/-1% Dummy *R183

1K #REFDE28 1 2 C173

1
X3
2
+/-1%
* C172 * 0.1uF

VDD33 ISOLATEB 1uF

+/-10%
C170XTAL-25MHz
* 27pF * C171
27pF R184 10K +/-1% CLKREQB
1
R185
*

15K
+/-1%
2
**

R186 10K +/-1% Dummy EEDI

R187 10K +/-1% Dummy EECS

VDD33 VDD33

*R188
330 *R189
330
Dummy Dummy

R487
* *

L1_1G_LED3 0 R190 249 Ohm +/-1% 5V_REAR_USB 5V_DUAL

+/-5%
B B
R488 F8
L1_100_LED1 0
+/-5%
R191 249 Ohm +/-1%
*
* C178
470pF * C179
470pF
Fuse 1.5A C533
1uF
*
50V, X7R, +/-10%
Dummy
50V, X7R, +/-10%
Dummy EC32 R267 * 10V, X5R, +/-10%
NIC_USB1
470uF
+/-20%
* * C528 +/-1%
10K Dummy RN37, reserved L5 chock
0.1uF ---For V1.0 20130510
C190 C180 27 16V, X7R, +/-10% U_USB_OC_R_#1 19
* 0.1uF
* 0.1uF 22
21
28
29
1
GRN_LED

YLW_LED

Reserved Reserved
30 R266 U_USBP3P_R 0 2 1 RN37A
USB-2

USB-1

USB_P3 19
15K U_USBP3N_R 0 4 3 RN37B
USB_N3 19
+/-1% 2
9 1 U_USBP2P_R 0 6 5 RN37C
USB_P2 19
L1_LAN_MDI0_DP 10 5 U_USBP2N_R 0 8 7 RN37D
USB_N2 19
L1_LAN_MDI0_DN 11
12 2
RJ45-MJ2

L1_LAN_MDI1_DP U_USBP2N_R
L1_LAN_MDI1_DN 13 6 U_USBP3N_R L5 Reserved
L1_LAN_MDI2_DP 14 8 4
L1_LAN_MDI2_DN 15 3 U_USBP2P_R
L1_LAN_MDI3_DP 16 7 U_USBP3P_R 7 3
L1_LAN_MDI3_DN 17
18 4 6 2
8
5 1
GRN_LED

VDD33 R489 0
+/-5% 20 23 Filter 100MHz
R490 19 24
*

L1_ACTIVE_LED0 0 R192 510 Ohm 25

+/-5% +/-5% 26 U5
* C182
470pF
*
C183
0.1uF
U_USBP2P_R 6 1 U_USBP2N_R

50V, X7R, +/-10% Reserved 5V_REAR_USB

5 2 GND
Dummy CONN-USBx2_RJ45
A U_USBP3P_R 4 3 U_USBP3N_R A

IP4220CZ6

U6 U7
L1_LAN_MDI0_DP 1 8 L1_LAN_MDI0_DP L1_LAN_MDI2_DP 1 8 L1_LAN_MDI2_DP
1 8 1 8 EMC
L1_LAN_MDI0_DN 2 7 L1_LAN_MDI0_DN L1_LAN_MDI2_DN 2 7 L1_LAN_MDI2_DN
2 7 2 7
L1_LAN_MDI1_DP 3 6 L1_LAN_MDI1_DP L1_LAN_MDI3_DP 3 6 L1_LAN_MDI3_DP U_USBP2P_R C174 4.7pF U_USBP3P_R C175 4.7pF
3 6 3 6
FOXCONN PCEG
* *

* *
50V, NPO, +/-0.25pF 50V, NPO, +/-0.25pF
L1_LAN_MDI1_DN 4 5 L1_LAN_MDI1_DN L1_LAN_MDI3_DN 4 5 L1_LAN_MDI3_DN Dummy Dummy
4 5 4 5 U_USBP2N_R C176 4.7pF U_USBP3N_R C177 4.7pF Title
SLVU2.8-4.TBT SLVU2.8-4.TBT 50V, NPO, +/-0.25pF 50V, NPO, +/-0.25pF
LAN_RTL8111F
Reserved
Reserved U6,U7 for SPEC Reserved Dummy Dummy
Size Document Number
H81M02
Rev
--20130218 C A

Date: Thursday, May 16, 2013 Sheet 28 of 43

5 4 3 2 1
 5 4 3 2 1

Filter 100MHz @Rear3.0

R_USB3_RXDN1 4 8 USB3_CMC_RXDN1

R_USB3_RXDP1 3 7 USB3_CMC_RXDP1

20
22
R_USB3_RXDN0 2 6 USB3_CMC_RXDN0 USB3.0
5V_USB3_REAR 5V_USB3_REAR

SHIELD2
SHIELD3
R_USB3_RXDP0 1 5 USB3_CMC_RXDP0 1 10
USB_N1_R 2 VBUS_BOTTOM VBUS_TOP 11 USB_N0_R
L34 USB_P1_R 3 DN_BOTTOM DN_TOP 12 USB_P0_R
4 DP_BOTTOM DP_TOP 13 5V_USB3_REAR
GND_BOTTOM USB2.0 GND_TOP
F6
RN61 0
*
1
3
2
4
5V_DUAL *
5 6 USB3.0 C335 Fuse 2.6A
*
D D
7 8 USB3_CMC_RXDN1 5 14 USB3_CMC_RXDN0 1uF
RX_N_BOTTOM RX_N_TOP
+/-5%
USB3_CMC_RXDP1 6
7 RX_P_BOTTOM RX_P_TOP
15
16
USB3_CMC_RXDP0 10V, X5R, +/-10%
@Rear3.0 * R260 EC11
*
C336
0.1uF
GND_DR_BOTTOM GND_DR_TOP
*

SHIELD1
SHIELD4
USB3_CMC_TXDN1 8 17 USB3_CMC_TXDN0 10K 470uF 16V, X7R, +/-10%
USB3_CMC_TXDP1 9 TX_N_BOTTOM TX_N_TOP 18 USB3_CMC_TXDP0 +/-20%
Dummy
@Rear3.0 Filter 100MHz TX_P_BOTTOM TX_P_TOP +/-1%
R_USB_N0 8 4 USB_N0_R @Rear3.0
U_USB_OC_R_#0 19,29
CONN-USBx2 @Rear3.0
1 @Rear3.0

19
21
R_USB_P0 7 3 USB_P0_R
R261 @Rear3.0
R_USB_N1 6 2 USB_N1_R 15K
5V_USB3_REAR
R_USB_P1 5 1 USB_P1_R 2 +/-1%

L35 @Rear3.0 @Rear3.0

U27
0 RN59 AZ1065-06F
2
4
* 13 USB3_CMC_TXDP1 6
RX- 5 USB3_CMC_TXDN1 U17
6 5 USB3_CMC_TXDP0 7 RX+ USB_P3_R 6 1 USB_N3_R
8 7 TX- 4 USB3_CMC_TXDN0
8 TX+ 5 2
NC2 5V_USB3
+/-5% 3
9 NC1 USB_P2_R 4 3 USB_N2_R
GND 2
Dummy VBUS
USB_N0_R 10
D+

VSS
1 USB_P0_R IP4220CZ6 @Front3.0
D-

11
Filter 100MHz @Rear3.0 5V_USB3
R_USB3_TXDN0 c0402h6 0.1uF C331 USB3_C_TXDN0 4 8 USB3_CMC_TXDN0 U30
****

16V, X7R, +/-10% 5V_USB3_REAR AZ1065-06F

R_USB3_TXDP0 C333 USB3_C_TXDP0
c0402h6 0.1uF @Rear3.0 3 7 USB3_CMC_TXDP0 @Rear3.0 USB3_CMC_TXDN6 6
16V, X7R, +/-10% RX- 5 USB3_CMC_TXDP6
R_USB3_TXDN1 C332 USB3_C_TXDN1
c0402h6 0.1uF @Rear3.0 2 6 USB3_CMC_TXDN1 7 RX+
16V, X7R, +/-10% TX- 4
R_USB3_TXDP1 c0402h6 0.1uF @Rear3.0
C334 USB3_C_TXDP1 1 5 USB3_CMC_TXDP1 U28 8 TX+
C C
16V, X7R, +/-10% AZ1065-06F NC2 3
L36 USB3_CMC_RXDN1 6 9 NC1
@Rear3.0 RX- GND
5 USB3_CMC_RXDP1 2
USB3_CMC_RXDN0 7 RX+ 10 VBUS
TX- D+

VSS
RN60 0 4 USB3_CMC_RXDP0 1
*
1
3
2
4
8
NC2
TX+
3
D-

NC1

11
5 6 9
7 8 GND 2
USB_P1_R 10 VBUS
D+

VSS
+/-5% 1 USB_N1_R @Front3.0 5V_USB3
D-
U32
Dummy

11
AZ1065-06F
USB3_CMC_RXDN6 6
RX- 5 USB3_CMC_RXDP6
@Rear3.0 USB3_CMC_RXDN5 7 RX+
TX-

**
R509 0 +/-5% 4 USB3_CMC_RXDP5
TX+
* * * * * * * * * * * * * * * *

22 USB3_RXDN1 R7 0 +/-5% R_USB3_RXDN1 8

r0603h6 @Rear3.0 R510 0 +/-5% NC2 3
@Front3.0 NC1
9
R72 0 +/-5% F_USB3_RXDN1 L47 GND 2
@Front3.0 VBUS
r0603h6 @Front3.0 F_USB3_RXDN1 1 4 USB3_CMC_RXDN6 USB3_CMC_TXDN5 10
D+

VSS
1 USB3_CMC_TXDP5
R73 0 +/-5% R_USB3_RXDP1 F_USB3_RXDP1 2 3 USB3_CMC_RXDP6 D-
22 USB3_RXDP1
r0603h6 @Rear3.0

11
Common Choke 90 Ohm Dummy
R74 0 +/-5% F_USB3_RXDP1

**
r0603h6 @Front3.0 R511 0 +/-5%
@Front3.0 5V_USB3
22 USB3_RXDN0 R75 0 +/-5% R_USB3_RXDN0 R512 0 +/-5%
@Front3.0 F7
r0603h6 @Rear3.0

R81 0 +/-5% F_USB3_RXDN0 F_USB3_RXDN0 1

L50 @Front3.0
4 USB3_CMC_RXDN5
5V_DUAL *
r0603h6 @Front3.0 C342 Fuse 2.6A
F_USB3_RXDP0 2 3 USB3_CMC_RXDP5
* 1uF
B 22 USB3_RXDP0 R82
r0603h6
0 +/-5%
@Rear3.0
R_USB3_RXDP0
Common Choke 90 Ohm Dummy
10V, X5R, +/-10%
@Front3.0 * R523 EC34
*
C375
0.1uF B

R83 0 +/-5% F_USB3_RXDP0

10K * 470uF
+/-20%
16V, X7R, +/-10%
+/-1%

**
r0603h6 @Front3.0 R513 0 +/-5%
@Front3.0
U_USB_OC_R_#0 19,29
22 USB3_TXDN0 R84 0 +/-5% R_USB3_TXDN0 R514 0 +/-5%
@Front3.0 @Front3.0
1
r0603h6 @Rear3.0 @Front3.0
L51 R524 @Front3.0
@Front3.0
R85 0 +/-5% F_USB3_TXDN0 F_USB_N0 2 3 USB_N2_R 15K
r0603h6 @Front3.0
F_USB_P0 1 4 USB_P2_R 2 +/-1%
22 USB3_TXDP0 R105 0 +/-5% R_USB3_TXDP0 Dummy
r0603h6 @Rear3.0 Common Choke 90 Ohm @Front3.0

R110 0 +/-5% F_USB3_TXDP0

**
r0603h6 @Front3.0 R515 0 +/-5%
5V_USB3
22 USB3_TXDN1 R119 0 +/-5% R_USB3_TXDN1 R516 0 +/-5%
@Front3.0
r0603h6 @Rear3.0
L63 @Front3.0
R120 0 +/-5% F_USB3_TXDN1 F_USB3_TXDN0 c0402h6 0.1uF C395 USB3_C_TXDN5 1 4 USB3_CMC_TXDN5 F_USB3.0
**

r0603h6 @Front3.0 16V, X7R, +/-10%

F_USB3_TXDP0 c0402h6 0.1uF @Front3.0
C385 USB3_C_TXDP5 2 3 USB3_CMC_TXDP5
22 USB3_TXDP1 R134 0 +/-5% R_USB3_TXDP1 16V, X7R, +/-10% 1
r0603h6 @Rear3.0 @Front3.0 Common Choke 90 Ohm Dummy USB3_CMC_RXDN6 2 19
USB3_CMC_RXDP6 3 18 USB3_CMC_RXDN5
R135 0 +/-5% F_USB3_TXDP1 4 17 USB3_CMC_RXDP5
r0603h6 @Front3.0 USB3_CMC_TXDN6 5 16
**

R518 0 +/-5% USB3_CMC_TXDP6 6 15 USB3_CMC_TXDN5

7 14 USB3_CMC_TXDP5
* * * * * * * *

19 USB_N0 R501 0 +/-5% R_USB_N0 R517 0 +/-5%

@Front3.0 CRB both Dummy USB_N3_R 8 13
r0603h6 @Rear3.0 USB_P3_R 9 12 USB_N2_R
L64 @Front3.0 R521 0 +/-5% Dummy 10 11 USB_P2_R
19,29 U_USB_OC_R_#0
R502 0 +/-5% F_USB_N0 F_USB_P1 1 4 USB_P3_R

**
r0603h6 @Front3.0 R522 0 +/-5% Dummy
F_USB_N1 2 3 USB_N3_R Header_2X10_K20
19 USB_P0 R503 0 +/-5% R_USB_P0
A r0603h6 @Rear3.0 Common Choke 90 Ohm Dummy A
@Front3.0
R504 0 +/-5% F_USB_P0
**

r0603h6 @Front3.0 R519 0 +/-5%

19 USB_N1 R505 0 +/-5% R_USB_N1 R520 0 +/-5%

@Front3.0
r0603h6 @Rear3.0 Dummy
Common Choke 90 Ohm
@Front3.0
R506 0 +/-5% F_USB_N1 F_USB3_TXDP1 c0402h6 0.1uF C384 USB3_C_TXDP6 2 3 USB3_CMC_TXDP6
**

r0603h6 @Front3.0 16V, X7R, +/-10%

R507 0 +/-5% R_USB_P1

F_USB3_TXDN1 c0402h6 0.1uF @Front3.0
16V, X7R, +/-10%
C383 USB3_C_TXDN6 1 4 USB3_CMC_TXDN6 FOXCONN PCEG
19 USB_P1 L65
r0603h6 @Rear3.0 @Front3.0 Title

R508 0 +/-5% F_USB_P1 USB 3.0

r0603h6 @Front3.0 Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 29 of 43

5 4 3 2 1
 5 4 3 2 1

Front_USB1 Front_USB2
5V_DUAL 5V_DUAL_USB2
5V_DUAL 5V_REAR_USB2 5V_DUAL 5V_DUAL_USB1
F3

*
F5
*
F4
*
Fuse 1.5A C321 EC8
Fuse 1.5A C327
*
EC10 Fuse 1.5A C322
*
EC9
* 0.1uF * 470uF

D
* 0.1uF
16V, X7R, +/-10%
470uF
+/-20% * 0.1uF
16V, X7R, +/-10%
470uF
+/-20%
16V, X7R, +/-10% +/-20%
D

*
R253 10K +/-1%
U_USB_OC_R_#4 19

*
R525 10K +/-1% R254 10K +/-1%
U_USB_OC_R_#2 19 U_USB_OC_R_#5 19 C323
1
1
*
C328
0.1uF
1
*
C324
0.1uF R255 * 0.1uF
16V, X7R, +/-10%
R526 16V, X7R, +/-10% R256 16V, X7R, +/-10% 15K Dummy
15K Dummy 15K Dummy +/-1%
2
2 +/-1% 2 +/-1%

Change NET:USB_8 and USB_11

Change NET:USB_10 and USB_11
Dummy Filter 100MHz Dummy Filter 100MHz
RN7 0 8 4 U_USB8P_R 8 4 U_USB10N_R
19 USB_P4 *
1
3
2
4
U_USBP4P_R
U_USBP4N_R
19 USB_P8
7 3 U_USB8N_R
19 USB_N10
7 3 U_USB10P_R
19 USB_N4 19 USB_N8 19 USB_P10
5 6 U_USBP5P_R
19 USB_P5
7 8 U_USBP5N_R 6 2 U_USB11P_R 6 2 U_USB9N_R
19 USB_N5 19 USB_P11 19 USB_N9
+/-5% 8p4r0603h7 5 1 U_USB11N_R 5 1 U_USB9P_R
19 USB_N11 19 USB_P9
Dummy
L37 L38
L9 Filter 100MHz 0 RN55
4 8 2
4
*1
3
3 7 6 5
8 7
2 6 0 RN54
C
1 5
+/-5% 2
4
* 13 C

6 5
+/-25%,400mA,90 Ohm 8 7
cks8gwh13 Reserved
+/-5%

U11
U_USBP5N_R 1 6 U_USBP5P_R

GND 2 5 5V_REAR_USB2
U_USBP4N_R 3 4 U_USBP4P_R

IP4220CZ6 U16 U15

tsop6qih11 U_USB8P_R 6 1 U_USB8N_R U_USB10P_R 6 1 U_USB10N_R
Reserved
5V_DUAL_USB1 5 2 5V_DUAL_USB2 5 2

U_USB11P_R 4 3 U_USB11N_R U_USB9P_R 4 3 U_USB9N_R

IP4220CZ6 IP4220CZ6
10

11

USB

U_USBP4P_R 7

U_USBP4N_R 6
5V_DUAL_USB2 5V_DUAL_USB2
TOP

5 5V_DUAL_USB1 5V_DUAL_USB1
B 5V_REAR_USB2 B

F_USB2
4 F_USB1 1 2
1 2 U_USB10N_R 3 4 U_USB9N_R
U_USBP5P_R 3 U_USB8N_R 3 4 U_USB11N_R U_USB10P_R 5 6 U_USB9P_R
BOTTOM

U_USB8P_R 5 6 U_USB11P_R 7 8
U_USBP5N_R 2 7 8 X 10
X 10
1 Header_2X5_K9
Header_2X5_K9

CONN - USBX2
9

12

usb4x2_2h162
Reserved
From Dummy to Reserved with EMC require for FAB-B

From Dummy to Reserved with EMC require for FAB-B

U_USB9P_R
U_USB8N_R

U_USB9N_R
U_USB8P_R
U_USB10N_R

U_USB11N_R
U_USB10P_R

U_USB11P_R

C692 C693 C694 C695

* 4.7pF
* 4.7pF
* 4.7pF
* 4.7pF

50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

C639 C640 C646 C655
* 4.7pF
* 4.7pF
* 4.7pF
* 4.7pF
50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

50V, NPO, +/-0.25pF

A A

FOXCONN PCEG
Title
USB 2.0
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 30 of 43

5 4 3 2 1
 5 4 3 2 1

3D3V_SYS

5V_DUAL 5V_SB

*
C542
*
A_LINE1_RC C519 4.7uF 10V,X5R A_LINE1_RL L52
* FB 600 Ohm
A_LINE1_R 32

**
0.1uF

1
*

16V, X7R, +/-10%

C523 5VA ALDOIN AFB2 AFB1 A_LINE1_LC C544 4.7uF 10V,X5R A_LINE1_LL L53 FB 600 Ohm
A_LINE1_L 32
10uF FB 60 Ohm FB 60 Ohm
6.3V,X5R,+/-20% Dummy C527 C524
* 100pF
* 100pF

2
50V, NPO, +/-5% 50V, NPO, +/-5%

C
A1D3 RN75
AZ2015-01H.R7F *1

38
25
U44 2
*

1
9
Dummy
3 4

A
D D
C514

LDO-OUT2
LDO-OUT1
DVDD
DVDD-IO
5 6 A_MIC1_BAIS_L
10uF 7 8
6.3V,X5R,+/-20% 29
3 LDO-IN 75 A_MIC1_BAIS_R
REGREF
* *

*
R453 0 +/-5%Dummy 2 A1C9 A1C6 +/-5%
21,32 A_FP_AUDIO_PRESENCE# GPOI0/DMIC-CLK/SPDIFOUT2 0.1uF 10uF
21,31
21
A_HDA_RST#
A_HDA_BCLK
A_HDA_RST#
A_HDA_BCLK
11
6 RESET#
BITCLK
FRONT-L
FRONT-R
35
36
A_LOUT_LC
A_LOUT_RC
6.3V,X5R
c0603h9 *R454
2.2K *R441
2.2K
A_HDA_SYNC R457 10 37 +/-5% +/-5%
21 A_HDA_SYNC SYNC PIN37-VREFO

*
A_HDA_SDI0_R 22 8 33
21 A_HDA_SDI0_R SDATA-IN Sense C
21 A_HDA_SDO
A_HDA_SDO 5
SDATA-OUT Sense B
34 A_SENSEB A_MIC1_RC C515 4.7uF 10V,X5R A_MIC1_RL L42
* FB 600 Ohm
A_MIC1_R 32

**
39 A_SURR_LC
SURR-L A_SURR_LC 32
12
BEEP
ALC662-VD0-GR JDREF
SURR-R
40
41
A_JD_REF
A_SURR_RC
A_SURR_RC
A_MIC1_LC C534 4.7uF 10V,X5R A_MIC1_LL L43
* FB 600 Ohm
A_MIC1_L 32
R436 32
A_SENSEA
A_LINE2_LC
13
14 SENSE A
LINE2-L
CENTER
LFE
43
44 *
20K
*
C531
100pF
*
C532
100pF
A_LINE2_RC 15 45 +/-1% 50V, NPO, +/-5% 50V, NPO, +/-5%
A_MIC2_LC 16 LINE2-R SIDE-L 46
A_MIC2_RC 17 MIC2-L SIDE-R
18 MIC2-R 28 A_MIC1_BAIS_L
CD-L VREFO-B Near the codec
19 27 A_CODEC_VREF

GPIO1/DMIC-DATA
20 CD-GND VREF
A_MIC1_LC 21 CD-R 30 A_MIC2_BAIS
A_MIC1_RC 22 MIC1-L VREFO-F 31 A_LINE2_BAIS C516
MIC1-R VREFO-E
A_LINE1_LC
A_LINE1_RC
23
24 LINE1-L VREFO-B(2)
32 A_MIC1_BAIS_R
* C530
10uF * 0.1uF
16V, X7R, +/-10%

AVSS1
AVSS2
LINE1-R
*

47

DVSS
ANTI-POPR60 0 +/-5% Dummy 6.3V,X5R,+/-20%
48 SPDIFI-IN/EAPD
SPDIF-OUT
ALC662-VD0-GR

4
7
26
42
*

*
ANTI-POPR61 0 +/-5% A_LOUT_RC EC27 100uF R433 75 +/-5% L48
* FB 600 Ohm
A_LOUT_R 32

*
A_HDA_BCLK C520 10pF 50V, NPO, +/-5% A_HDA_RST# 6.3V,+/-20% 1
*

R440 C526

1 2
22K
+/-5% * 100pF
50V, NPO, +/-5%

C
3D3V_SYS
* C650
10pF 2 C
C511 0.1uF 16V, X7R, +/-10% 50V, NPO, +/-5%
**

C535 10uF
6.3V,X5R,+/-20% GND_AUDIO @mute
2 1

*
A_LOUT_LCEC28 100uF R442 75 +/-5%
*
L49A_LOUT_LL FB 600 Ohm
A_LOUT_L 32

*
5VA 6.3V,+/-20%
C525
C545 0.1uF 16V, X7R, +/-10% 2 1 1 * 100pF
****

R434 50V, NPO, +/-5%

C517 0.1uF 16V, X7R, +/-10% 22K

3
R696 R697 +/-5%

*
C512 10uF 16V,X5R,+/-10% 2 1 MUTE 10K 1 MUTE 10K 1
+/-5% +/-5% 2
A_JD_REF C521 100pF 50V, NPO, +/-5% C537 10uF 16V,X5R,+/-10% Q116 Q129

2
*

Dummy BTD2040N3 BTD2040N3

@mute @mute

@mute @mute
GND_AUDIO GND_AUDIO

FRONT PANEL A_SENSEA A_LOUT_JD

R448 5.1KOhm +/-1%
A_LOUT_JD 32

**
Q52 Reserved R447 10K +/-1% A_LINE1_JD
1 A_LINE2_R A_LINE1_JD 32
A_LINE2_BAIS 3 R449 20K +/-1% A_MIC1_JD
2 A_LINE2_L A_MIC1_JD 32
RN77
BAT54A
RN127
*
A_LINE2_R
A_LINE2_L
*1 2
2 1 A_MIC2_R 3 4
4 3 5 6

**
A_MIC2_L A_SENSEB R451 39.2K +/-1% A_LINE2_JD
6 5 7 8 A_LINE2_JD 32
8 7 22K R446 20K +/-1% A_MIC2_JD
4.7K +/-5% A_MIC2_JD 32
Q53
B B
1 +/-5% A_MIC2_R
A_MIC2_BAIS 3
2 A_MIC2_L

BAT54A

Control by software driver and

S/B GPIO. 3D3V_SYS DIGITAL AREA
GPIO#0 driver low at:
1).Initial state
LINE II 2).Suspend to S1 *R712
10K
MUTE

3).Resume from S1.

C
*
A_LINE2_RC EC31 100uF A_LINE2_RL R713 10K B Q126
**

6.3V,+/-20% MMBT3906
A_LINE2_R 32
A_LINE2_LC EC26 100uF A_LINE2_LL @mute Q127 C603 @mute R698

E
6.3V,+/-20% MMBT3906
* 22uF 220K

*
R718 1K B Q124 B B Q125 6.3V,X5R,+/-10%
21,31 A_HDA_RST# MMBT3906 MMBT3906 @mute
A_LINE2_L 32
@mute

C
@mute @mute 3D3V_DUAL
3

R692 R693 RN76 @mute @mute

*1 @mute
*

MUTE 10K 1 MUTE 10K 1

*
+/-5% +/-5% 2 ANTI-POP R710 1K
Q114 Q123 3 4
5 6
2

BTD2040N3 BTD2040N3 @mute

@mute @mute 7 8
75
@mute @mute +/-5%
GND_AUDIO GND_AUDIO

MIC II A_MIC2_R 32
A A
A_MIC2_L 32
A_MIC2_RC C518 22uF 6.3V,X5R,+/-20% A_MIC2_RL
**

A_MIC2_LC C543 22uF 6.3V,X5R,+/-20% A_MIC2_LL

3

R694 R695
*

MUTE 10K 1 MUTE 10K 1

+/-5%
Q115
+/-5%
Q128
FOXCONN PCEG
2

BTD2040N3 BTD2040N3 Title

@mute @mute
AUDIO ALC662
@mute @mute Size Document Number
H81M02
Rev
GND_AUDIO GND_AUDIO A

Date: Thursday, May 16, 2013 Sheet 31 of 43

5 4 3 2 1
 5 4 3 2 1

Front_Audio
3D3V_SYS

D
MIC II *R461
8.2K
D
F_AUDIO2 +/-1%
A_MIC2_L 1 2
31 A_MIC2_L
A_MIC2_R 3 4
31 A_MIC2_R A_FP_AUDIO_PRESENCE# 21,31
A_LINE2_R 5 6 A_MIC2_JD
31 A_LINE2_R A_MIC2_JD 31
FRONT-IO-SENSE 7
X
A_LINE2_L 9 10 A_LINE2_JD
31 A_LINE2_L A_LINE2_JD 31
LINE II Header_2X5_8
* C133
0.1uF
16V, X7R, +/-10%

Add C133 0.1uf for FAB-B

AUDIO4
Change C549、C550 to 2.2uF from 1uF
--20130222 MONO_OUT 31 A_LINE1_L
A_LINE1_L 32 INSULATOR
A_LINE1_JD 33
R107 31 A_LINE1_JD
34
Change to White

*
A_SURR_LC C549 2.2uF+/-10% MONO-IN-L 1 A_LINE1_R 35
31 A_SURR_LC 31 A_LINE1_R
**
A_SURR_RC C550 2.2uF+/-10%
31 A_SURR_RC 2
20K
+/-5% 36
Header_1X2 A_LOUT_L 22 37
31 A_LOUT_L
A_LOUT_JD 23 38
31 A_LOUT_JD
24 39
A_LOUT_R 25
31 A_LOUT_R
C C

Pink
A_MIC1_L 2
31 A_MIC1_L A_MIC1_JD 3
31 A_MIC1_JD
4
A_MIC1_R 5
31 A_MIC1_R 1

CONN-Audio jack

Audio Jack

LINE IN
C (UAJ)
LINE OUT
(UAJ)
B
Colay
MIC IN
A (UAJ)

B
BUZZER/Speaker Header SPEAKER2
B

1
1
3
3
* C553
0.1uF
4
4
Dummy Header_1X4_K2
@SPEAKER

5V_SYS

RN74 BUZ2
*1 2
Z46_POWER +
3 4
BUZZER
5 6 -
7 8
100 Ohm Buzzer
+/-5%
@BUZZER
* C552
1uF
C

RN73 c0603h9
21,25 S_SPKR_OUT
3D3V_SYS
*1 2
B Q56
3 4 MMBT3904-7-F
34 SIO_BEEP 5 6
E

7 8
2.2K
+/-5%
C

B Q54
MMBT3904-7-F
C

A B Q55 A
MMBT3904-7-F
E

FOXCONN PCEG
Title
AUDIO CONN/HEADER
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 32 of 43

5 4 3 2 1
 5 4 3 2 1

SPI SOCKET Primary

D D

Place close to SPI ROM

Place close to SPI ROM

+3V_EPW

+3V_EPW

C382 * * C343 *R280

* R281 1uF
+/-10%
1uF
+/-10%
1K

1K Dummy
+/-5%
U29
21 SPI_CS0# SPI_CS0# 1 8
CS VCC

***
21 SPI_MISO R483 33+/-5% SPI_MISO_R 2 7 SPIHOLD# R287 33 +/-5%Reserved SPI_IO3 21
33 SPI_WP#_R 3 DO HOLD 6 SPI_CLK_R R484
**

21 SPI_IO2 R284 33 +/-5% SPI_SCK 21

+/-5% 4 WP CLK 5 SPI_MOSI_R R485 33 +/-5%
C SPI_MOSI 21 C
Reserved GND DIO

Socket

U29_1

W25Q64BVDAIG

B B

A A

FOXCONN PCEG
Title
SPI_Socket_ROM
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 33 of 43

5 4 3 2 1
 5 4 3 2 1

5V_SYS
35 PD7 PD6 35
PD5 35
TP22 PD4 35

****
R286 680 Dummy DTR1# R500 1K
SOUT1 For ITE recommend TP21 PD3 35
****

R285 680 Dummy R496 2.2K

+/-5% +/-5%
21 SMLINK1_DATA PD2 35
R290 10K Dummy RTS1# R497 2.2K +/-5% --20130320 21 SMLINK1_CLK PD1 35
680 Dummy

Delete R458,R496,U39 for not colay

R293 DTR2# R498 2.2K +/-5% RTS1#
35 RTS1# PD0 35
35 DSR1# STB# 35
SOUT1
35 SOUT1 AFD# 35

--20130305
35 SIN1 ERR# 35
R292 10K Dummy DSR2# DTR1#
35 DTR1# INIT# 35
**

R288 680 A20GATE R289 10K 35 DCD1# SLIN# 35

*
Dummy 28,35 RI1# ACK# 35
*

3D3V_DUAL R299 10K +/-1% RI2#

Dummy
D R296 D

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
R297 +/-1% U45
*

SIOVREF 10K
*

RI1#/GP32
DCD1#/GP33
DTR1#/JP4
SIN1GP41
SOUT1/JP3
DSR1#/GP45
RTS1#/JP2
VCORE_EN/PCH_C0/FAN_CTL4
VLDT_EN/PCH_D0/GP65
GP66
GP67
GNDD_117
BUSSO2/PD7/GP77
BUSSO1/PD6/GP76
BUSSO0/PD5/GP75
PD4/GP74/BUSSI2
BUSSI1/PD3/GP73
BUSSI0/PD2/GP72
PD1/GP71
PD0/GP70
SMBC_M1/STB#/GP87
SMBC_R1/AFD#/GP86
ERR#
SMBD_M1/INIT#/GP85
SMBD_R1/SLIN#/GP84
ACK#/GP83
T

10K GND_IO
VRD Thermal Monitor 3D3V_SYS

TMPIN1 C344 0.1uF

*

*
35 CTS1# 1 102 L28
2 CTS1#/GP31 BUSY/GP82 101 BUSY 35
FAN_CTL5/CIRRX2/GP16 PE/GP81 PE 35 FB 600 Ohm

*
R300 5V_SB R308 10K +/-1% 3 100
SIOVREF_R 10K +/-1% 4 PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 99 SLCT 35 AVCC_SIO
3D3V_SB 3VSB_4 AVCC3_99
*

Dummy 5 98 VIN0
TP20 GP64 VIN0/VCORE(1.1V)

*
T

R730 0 +/-5%SLP_SUS#_R 6 97 VIN1 C349

21,40 SLP_SUS# SLP_SUS#/GP63 VIN1/VDIMM_STR(1.5V)
@DSW 7
8 FAN_TAC1
FAN_CTL1
VIN2(+12V_SEN)
VIN3(+5V_SEN)
96
95
VIN2
VIN3 * 22uF
* C350
0.1uF
GND_IO

TMPIN2 C352 0.1uF 9 94 VIN4 Reserved

36 CPU_FAN_TACH FAN_TAC2/GP52 VIN4/VLDT_12 TP27
*

Dummy 10 93 VIN5
36 CPU_FAN_CTRL FAN_CTL2/GP51 5VDUAL/VIN5
11 92
36 SYS_FAN_TACH FAN_TAC3/GP37 VIN6 TP24
12 91 SIOVREF
36 SYS_FAN_CTRL FAN_CTL3/GP36 VREF
SIO_BEEP 13 90 TMPIN1 C360
32 SIO_BEEP RSTCONOUT/GP35 TMPIN1
*
*

+VCORE R302 10K +/-1% VIN0 RSTCONIN 14 89 TMPIN2 1uF closed to pin 91
15 RSTCONIN/GP34 TMPIN2 88 +/-10%
GNDD_15 TMPIN3 TP25
40 3D3V_SB_CTL 3D3V_SB_CTL 16 87
SLP_SUS_FET/5VSB_CTRL# TS_D-

GND_IO
* C353
0.1uF
SUS_WARN_5VDUAL
PWRGD2
17
18 SUS_WARN_5VDUAL/5VAUX_SW
PWRGD2
IT8728F/FX
GNDA_86
RSMRST#/CIRRX1/GP55
86
85 O_SIO_RSMRST#
Reserved ATX_PWRGD 19 84 PCIRST3#
37,40 ATX_PWRGD ATXPG/GP30 PCIRST3#/GP10
35 SIN2 20 83 O_MS_CLK O_MS_CLK 35
21 SIN2/GP27 MCLK/GP56 82 O_MS_DATA
35 SOUT2 SOUT2/GP26 MDAT/GP57 O_MS_DATA D10 35
GND_IO 35 DSR2# DSR2# 22 81 O_KB_CLK O_KB_CLK 35
23 FAN_TAC4/DSR2#/GP25 KCLK/GP60 80 O_KB_DATA 2
35 RTS2# FAN_TAC5/RTS2#/GP24 KDAT/GP61 O_KB_DATA 35
PCH_DPWROK 24 79 SW_SIOJ 3
21 PCH_DPWROK 25 DPWORK/CPU_PG/GP23 3VSBSW#/GP40 78 PWRGD_3V 1 PCH_THERMAL_UP 21
37 SUS_LED GP22 PWRGD3 PWRGD_3V 13,20,21
RN63 35 DCD2# 26 77 S_SLP_S4#
* 13 DCD2#/GP21 SUSC#/GP53 S_SLP_S4# 21,41

SUSWARN#/SST/AMDTSI_D/PCH_D1/MTRB#
SIOVREF 2 SIOVREF_R 35 CTS2#
27 76 O_PS_ON#
CTS2#/GP20 PSON#/GP42 O_PS_ON# BAT54C 37
V_SM 4 VIN1 35 RI2# RI2# 28 75 R_PWRBTN#
6 5 VIN2 DTR2# 29 RI2#/GP17 PANSHW#/GP43 74
35 DTR2# DTR2#/JP5 GNDD_74
*

8 7 VIN3 3D3V_SB R458 1K DTR2# CIRTX 30 73 IO_PME# 21 Power-On Strapping

CIRTX PME#/GP54
* C354 +/-5%
TP18
31
PCH_C1/GP14 PWRON#/GP44
72 S_PWRBTN#
S_PWRBTN# 21

*
C +/-5% 10K 0.1uF Dummy 21 S_SUSACK# R728 0 +/-5% SUSACK# 32 71 S_SLP_S3# VBAT_IO Symbol Value Description C
SUSACK#/PWRGD1 SUSB# S_SLP_S3# 21,38,39,42
Reserved @DSW LAN_TPM_RST# 33 70 GP47 JP1 DSW_EUP_SEL 1 EUP(default)
T_PCIE_SLOT# 34 PCIRST1#/GP12 GP47 69
GND_IO
PCIRST2#/GP11 VBAT
Pin-48 0 DSW
35 68 SIO_COPEN# C361 JP2 WDT_EN 1 Disable WDT to reset PWROK(default)
GND_IO
Dummy R458 3D3V_SB

PECI/AMDTSI_C/DRVB#
3VSB_35 COPEN#
--20130412
VCORE_SIO 36
37 VCORE 3VSB_67
67
66 SYS_3VSB
3D3V_SB * 1uF
+/-10%
Place cap close to pin 69
Pin-122
JP3 FAN_CTL_SEL
0
1
Enable WDT to reset PWROK
EC Index 6Bh/73h default = 80h

SMBD_M2/WGATE#
11,19,26 PLTRST# LRESET# SYS_3VSB_66

SMBD_R2/HDSEL#
L_DRQ0 38 65 Pin-124 0 EC Index 6Bh/73h default = 00h

SMBC_M2/STEP#
R310 21,36 L_DRQ0 LDRQ# DSKCHG# C351 JP4 K8PWR_EN 1 Disable K8 Power Sequence(default)

SMBC_R2/DIR#
* *
*

VIN2 C348 22uF Pin-126 0 Enable K8 Power Sequence

KRST#/GP62
12V_SYS

JP1/GPO50
0.1uF JP5 UOVMODE_SEL 1 Notice Type

LFRAME#

GNDD_50
GA20/JP5

DENSEL#
GND_IO

WDATA#
C356 100nF VCORE_SIO Reserved Pin-29 0 Reserved

RDATA#
SERIRQ

PCICLK

INDEX#
MTRA#

DRVA#
51K
*

TRK0#
CLKIN
25V, X5R,+/-10%

WPT#
LAD0
LAD1
LAD2
LAD3
+/-1% C363
Reserved Q22 2N7002、R301 330ohm for
2.2uF
* C362
* NET AVCC_SIO discharge
*

5V_SYS R313 15K VIN3 +/-10% 0.1uF

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
+/-5% Reserved
----For V1.0 20130511
GND_IO

C357 0.1uF
*

0
16V, X7R, +/-10%
Dummy 3D3V_SB
20,36 SERIRQ
GND_IO
*

* *

5V_DUAL R745 4.99K VIN5 R746 10K +/-1% 21,36 LPC_FRAME#

+/-1%
Dummy C363 for costdown 21,36 LPC_AD0

*
C359 0.1uF
--20130222 21,36
21,36
LPC_AD1
LPC_AD2
* R647 R301 330 +/-5%AVCC_SIO

16V, X7R, +/-10% 21,36 LPC_AD3 1K

D
20 PCH_KBRST# +/-1% Q22
*

3D3V_SYS R319 10K +/-1% L_DRQ0 20 A20GATE A20GATE DSW_EUP_SEL

#REFDE37 @EUP
22 CK_P_33M_SIO

22 SIOCLK_48M
DSW_EUP_SEL H_PECI_R 2 1
H_PECI 11,20 * R174 O_PS_ON# G

*
SUSWARN# R729 0 +/-5% S_SUSWARN# 8.2K 2N7002 3D3V_SYS R298 10K +/-1% CIRTX
S_SUSWARN# 21,40

S
@DSW @DSW +/-1%
Reserved Dummy
3D3V_SB

3D3V_SB 3D3V_DUAL
* *

28,36 K_LAN_TPM_RST# R726 33+/-5% LAN_TPM_RST#

****
3D3V_SB S_PWRBTN# R303 4.7K +/-5%
B
16 X_PLTRST_PCIE_SLOT# R725 33+/-5% PLTRST_PCIE_SLOT# * C345
0.1uF * C346
0.1uF * C347
0.1uF
S_SLP_S3# R304
S_SLP_S4# R305
4.7K +/-5%Dummy
4.7K +/-5%Dummy B

**
Dummy Reserved Reserved SW_SIOJ R316 10K +/-1% S_PWRBTN# R486 4.7K +/-5%Dummy
Dummy
PCH_DPWROK
R320 1K
* *

T_PCIE_SLOT# R314 0 placed near pin4,35 +/-5% 3D3V_SYS 3D3V_DUAL

IT8728 Power On Strapping Options +/-5%
RSMRST
3D3V_DUAL
Symbol value Description SIO_BEEP R315 0 PWRGD_3V
3D3V_SB
Dummy

*R318 *R209 SIO_BEEP

RN65
*1 2
100KOhm 1K X_PLTRST_PCIE_SLOT#
+/-1% K_LAN_TPM_RST# 3 4
5 6

*
JP4 1 K8 power sequence function is disabled Dummy O_SIO_RSMRST# R208 0 PCH_RSMRST# 21 S_SUSACK#
#REFDE39 7 8
K8PWR_EN
Pin 126 0 K8 power sequence function is enabled 2 1
*R207
10K
2.2K +/-5%
RN66

JP3 &
11 The default value of EC Index 15h/16h/17h is 40h(Fan half speed) COPPER +/-1%
PWRGD2
*1 2
5V_SB

SUS_WARN_5VDUAL 3 4
JP5 10 The default value of EC Index 15h/16h/17h is 7Fh(Fan off ) RSTCONIN 5 6
FAN_CTL_SEL GND_IO
7 8
Pin 124 01 The default value of EC Index 15h/16h/17h is 00h(Fan full speed ) 2.2K +/-5%
& 46

**
00 The default value of EC Index 15h/16h/17h is 20h VCCRTC
PWRGD_3V R495 470
+/-5%
Change for FAB-B
PCIRST3# R470 10K +/-1%

* R312 3D3V_SB
1M
+/-1% INTR3
SIO_COPEN# 1
* R306

**
2 SYS_3VSB R309 100 Ohm +/-1% 3D3V_DUAL
4.7K GP47 R311 100 Ohm +/-1%
* Header_1X2 +/-5%
*

C358 Reserved R_PWRBTN# R307 33

FP_PWRBTN# 37
1uF
power button input
+/-10%
* C355
0.1uF
A Reserved A

FOXCONN PCEG
Title
SIO-IT8728
Size Document Number Rev
Custom H81M02 A

Date: Thursday, May 16, 2013 Sheet 34 of 43

5 4 3 2 1
 5 4 3 5V_DUAL
2 1
KB/MS connect *
F1

C142 FUSE_1.1A
5V_DUAL
* 0.1uF
16V, X7R, +/-10%

RN27

2
4
6
8
2.2K
KB/MS1
13

* 13
5
7
16

D RN104 L3
* FB 80Ohm O_MSCLK_R
12
10
6
4 D
34 O_MS_CLK *1 2
8 2
34
34
O_MS_DATA
O_KB_CLK
3
5
4
6
L6
* FB 80Ohm O_MSDATA_R O_MSDATA_R 7
9
14
1 O_KBDATA_R
34 O_KB_DATA 7 8
L7
* FB 80Ohm O_KBCLK_R O_MSCLK_R 11 3
5 O_KBCLK_R
33
+/-5%
L8
* FB 80Ohm O_KBDATA_R 17

15
CN1 UP DOWN

* 180pF
50V, NPO, +/-10%
PS2X2

COM PORT
COM HEADER
D3 LS4148-F 5V_SYS
Change COM1 to P/N:34041RL00-600-G
U2
5V_SYS 20 1 C A 12V_SYS U3 D4 LS4148-F COM1
VCC +12V 20 1 C A 11
VCC +12V 12V_SYS
RTS2# 16 5 NRTS2# @8728COM_HEADER C144
34 RTS2# DA1 DY1
34
34
DTR2#
SOUT2
SOUT2
15
13 DA2
DA3
DY2
DY3
6
8
NDTR2#
NSOUT2
*
C181
100nF
* C143
34
34
RTS1#
DTR1#
RTS1# 16
15 DA1
DA2
DY1
DY2
5
6
NRTS1#_R
NDTR1#_R * 100nF
25V, X5R,+/-10%
@COM_PORT
NRI1#
5
9
19 2 25V, X5R,+/-10% 0.1uF 34 SOUT1 13 8 NSOUT1_R @COM_PORT NDTR1# 4
RY1 RA1 SOUT1 DA3 DY3

C C
CTS2# 18 3 NCTS2# @8728COM_HEADER 16V, X7R, +/-10% 19 2 NCTS1# 8
34 CTS2# RY2 RA2 RY1 RA1
DSR2# 17 4 NDSR2# CTS1# 18 3 NCTS1#_R NSOUT1 3
34 DSR2# RY3 RA3 34 CTS1# RY2 RA2
SIN2 14 7 NSIN2 DSR1# 17 4 NDSR1#_R NRTS1# 7
34 SIN2 RY4 RA4 34 DSR1# RY3 RA3
DCD2# 12 9 NDCD2# @COM_PORT SIN1 14 7 NSIN1_R NSIN1 2
34 DCD2# RY5 RA5 34 SIN1 RY4 RA4
DCD1# 12 9 NDCD1#_R NDSR1# 6
34 DCD1# RY5 RA5 D6
11 10 A C -12V_SYS NDCD1# 1
GND -12V 11 10 A C
GND -12V -12V_SYS
GD75232 C189D5 LS4148-F C145 10
3D3V_SB @8728COM_HEADER
RS232 Drivers and Receivers * 100nF @8728COM_HEADER
25V, X5R,+/-10%
GD75232
@COM_PORT * 100nF
LS4148-F
25V, X5R,+/-10% CONN-D-SUB
@8728COM_HEADER @COM_PORT
RN28
*
1
3
2
4 RI2# NDCD2# 1
COM2
2 NSIN2 3D3V_SB
@COM_PORT

RI2# 34
NRI2# 5 6 NSOUT2 3 4 NDTR2#
D

7 8 5 6 NDSR2# RN29

10K
Q8
2N7002
NRTS2#
NRI2#
7
9
8 NCTS2# *
1
3
2
4 RI1#
RI1# 28,34
+/-5% G NRI1#_R 5 6
C

D
Header_2X5_K10 7 8
@8728COM_HEADER D7 @8728COM_HEADER Q9
S

LS4148-F 10K 2N7002

+/-5% G FBA1 FB 150 Ohm FBA2 FB 150 Ohm

C
@8728COM_HEADER @COM_PORT NDTR1#_R 4 8 NDTR1# NRI1#_R 4 8 NRI1#
A

D8 @COM_PORT NSIN1_R 3 7 NSIN1 NCTS1#_R 3 7 NCTS1#

S
LS4148-F NSOUT1_R 2 6 NSOUT1 NDSR1#_R 2 6 NDSR1#
@8728COM_HEADER @COM_PORT NDCD1#_R 1 5 NDCD1# NRTS1#_R 1 5 NRTS1#

*@COM_PORT *@COM_PORT

A
CN3 CN4
180pF 180pF
* * CN5
50V, NPO, +/-10% 50V, NPO, +/-10% CN2 180pF
@8728COM_HEADER @8728COM_HEADER 180pF 50V, NPO, +/-10%
NRTS2# NDCD2# 50V, NPO, +/-10% @COM_PORT
NDSR2# NSOUT2 @COM_PORT

NRI2# NSIN2

B B
NCTS2# NDTR2#
*

placed near header placed near header

LPT PORT 5V_SYS

D9
C A ERR#

RN32 RN33 C146 SLCT P_D7 P_D3 SLIN1-

LS4148-F
RN30 RN31
* 0.1uF
2
4
6
8

2
4
6
8

8
6
4
2

8
6
4
2

2.7K R175 2.7K 2.7K 2.7K @8728_LPT 16V, X7R, +/-10% PE P_D6 P_D2 INIT1-
+/-5% 2.7K +/-5% +/-5% +/-5% @8728_LPT
* 13
5
7

* 13
5
7

7
5
3
1

7
5
3
1

@8728_LPT +/-5% @8728_LPT @8728_LPT BUSY P_D5 P_D1 AFD1-

*

@8728_LPT @8728_LPT
ACK# STB- P_D0 P_D4 <Tolerance> ACK# P_D4 P_D0 STB-
BUSY AFD1- P_D1 P_D5
PE INIT1- P_D2 P_D6 C147
SLCT ERR# SLIN1- P_D3 P_D7
* 220pF
+/-10%
CN6 CN7 CN8 CN9

@8728_LPT * 50V, NPO, +/-10%

@8728_LPT220pF 220pF @8728_LPT *
50V, NPO, +/-10%
*
50V, NPO, +/-10%
220pF @8728_LPT * 50V, NPO, +/-10%
220pF
@8728_LPT
LPT1
STB- 1 2 AFD1-
RN34 33 +/-5% ERR# P_D0 3 4 ERR#
34 PD0
PD0
PD1 2 *
1
P_D0
P_D1
34
34
ERR#
ACK#
ACK#
BUSY
P_D1
P_D2
5
7
6
8
INIT1-
SLIN1-
34 PD1 PD2 4 3 P_D2 34 BUSY PE P_D3 9 10
34 PD2 PD3 6 5 P_D3 34 PE SLCT P_D4 11 12
34 PD3 8 7 34 SLCT P_D5 13 14

A A
@8728_LPT P_D6 15 16
RN35 33 RN36 33+/-5% P_D7 17 18
34 PD4
PD4
PD5 7 8
P_D4
P_D5 34 STB# *1 2
STB-
AFD1-
ACK#
BUSY
19
21
20
22
34 PD5 PD6 5 6 P_D6 34 AFD# 3 4 INIT1- PE 23 24
34 PD6 PD7 * 3 4 P_D7 34 INIT# 5 6 SLIN1- SLCT 25
34 PD7 1 2 34 SLIN# 7 8 X
@8728_LPT
+/-5%
@8728_LPT @8728_LPT Header_2X13_K26

<Tolerance> FOXCONN PCEG

Title
PS2/COM/LPT
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 35 of 43

5 4 3 2 1
 5 4 3 2 1

CPU FAN Add C134 for EMC

--20130316

3D3V_SYS
TPM Dummy R199,R711
C134

Reserved R200,R203
5V_SYS
Change FAN Power from 12V_SYS to 12V_CPU

*
--20130301
D 5V_SYS
0.1uF
16V, X7R, +/-10% --20130313 D
3D3V_SYS
5V_SYS

12V_CPU * R262
4.7K
+/-5% TPM
Reserved
C_PCICLK_TPM 1 2
22 C_PCICLK_TPM LCLK GND

*
R263 100 +/-5% R197 33 3 KEY
CPU_FAN_CTRL 3421,34 LPC_FRAME# LFRAMEn

*
K_LAN_TPM_RST# 5 6 R199 0
28,34 K_LAN_TPM_RST# LRESETn NC_3
* C338
12V_CPU

21,34 LPC_AD3
7
LAD3 LAD2
8
Dummy
LPC_AD2 21,34
100nF
25V, X5R,+/-10% 9 10
VDD LAD1 LPC_AD1 21,34

C
CPU_FAN1
D13
LS4148-F *
R268
4.7K 21,34 LPC_AD0
11
LAD0 GND
12

*
2 +/-5% R196 0 TPM_NC_1 13 14 TPM_NC_4 R195 0
+12V 4 14,15,21,27 S_SMBCLK_MAIN NC_1 NC_4 S_SMBDATA_MAIN 14,15,21,27
CMD 1
Dummy Dummy

*
A
3D3V_DUAL R711 0 15 16
GND 3 NC_2 SERIRQ SERIRQ 20,34

*
R269 27KOhm +/-5%
TACH CPU_FAN_TACH 34

**
Dummy 17 18 R200 0
GND CLKRUNin
Header_1X4 FAN4P Reserved

*
*R272
10K
*
C339
470pF 21 LPCPD#
R198 33 19
LPCPDn NC_5
20 R194 0
Dummy
L_DRQ0 21,34

Layout note: Place D14 near to FAN header +/-5% 50V, X7R, +/-10% Dummy
Header_2X10_4 (TPM)
R230 R203
* 10K
* 10K
Dummy Reserved 3D3V_SYS

3D3V_DUAL 3D3V_SYS
5V_SYS

*
C
SYS FAN 12V_CPU
*R274
4.7K
C122
0.1uF
C

16V, X7R, +/-10%

+/-5%
Reserved

* *
3D3V_SYS R201 10K TPM_NC_1 K_LAN_TPM_RST#
*

R276 100 +/-5% @TCM

SYS_FAN_CTRL 34
C_PCICLK_TPM 5V_SYS
R202 10K TPM_NC_4
* C340
12V_CPU @TCM
C185 C186
100nF
25V, X5R,+/-10%
* 10pF
Dummy * 100pF
50V, NPO, +/-5%
C

Dummy

SYS_FAN1
D14
LS4148-F *R277
4.7K
2 +/-5%
+12V 4
CMD 1
A

GND 3
*

R278 27KOhm +/-5%

TACH SYS_FAN_TACH 34
Header_1X4 FAN4P 3D3V_SYS 5V_SYS 3D3V_DUAL

*R279
10K
*
C341
470pF
Layout note: Place D16 near to FAN header +/-5% 50V, X7R, +/-10% C188 C187 C184
* 0.1uF * 0.1uF * 0.1uF
16V, X7R, +/-10% 16V, X7R, +/-10% 16V, X7R, +/-10%
Dummy Dummy Dummy

B B

A A

FOXCONN PCEG
Title
FAN Connector
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 36 of 43

5 4 3 2 1
 5 4 3 2 1

24 PIN ATX CONNECTOR 5V_SYS 3D3V_SYS 3D3V_SYS -12V_SYS

C364 C365 C366 C367

* 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10% 5V_SB
5V_SYS

D
1
PWR1
+3.3V1 +3.3V3
13 *R699
4.7KOhm
D
*R322
10K
2
3 +3.3V2
GND1
-12V
GND4
14
15
+/-1%

*
+/-5% 4 16 R323 33 +/-5%
+5V1 PSON O_PS_ON# 34
5 17
6 GND2 GND5 18 C368
+5V2 GND6
7
GND3 GND7
19
* 0.1uF

*
R324 10 +/-5% 8 20 16V, X7R, +/-10%
34,40 ATX_PWRGD 9 PWR0K RSVD 21
5V_SB +5V_AUX +5V3 5V_SYS
12V_SYS 10 22
C369 C370 11 +12V_1 +5V4 23 C371
+12V_2 +5V5
* 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10%
3D3V_SYS 12
+3.3V4 GND8
24
* 0.1uF
16V, X7R, +/-10%
C372 C373 Header_2x12
* 100nF
25V, X5R,+/-10% * 0.1uF
16V, X7R, +/-10%

12V_SYS
3D3V_SYS

C374
* 100nF
25V, X5R,+/-10%
* EC30
470uF
6.3V,+/-20%

5V_SB

C
FRONT PANEL HEADER Change FP1 from 340600E00-VPN-G(color yellow)
to 340602800-VPN-G(black 340602800-600-G ) C

--20130204 *R325
470
+/-5%
3D3V_SYS Dummy
3D3V_SYS
5V_SYS 3D3V_SB

* R326 * *R327
330
* R328
*R329
10K R344 +/-5% 470 8.2K
+/-5% 10K +/-5% +/-1%
+/-5%

C
Dummy FP1

*
HD_LED 1 2 FP_LED B R330 1K +/-5%
SUS_LED 34
3 4 FP_LED#
20 SATA_LED#
5 6 Q24
FP_PWRBTN# 34

E
7 8 MMBT3904-7-F
11,21 FP_RST# 9 X
Header_2X5_K10
* C376
100pF
* C377
100pF
* C378
100pF
* C379
100pF
* C380
100pF
* C381
100pF
50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

B B

12V_SYS 12V_SYS

Dummy Dummy Dummy Dummy

IMPEDANCE_1 IMPEDANCE_2 IMPEDANCE_3 IMPEDANCE_4
1 1 1 1
2 2 2 2

Header_1X2 Header_1X2 Header_1X2 Header_1X2

Dummy Dummy Dummy Dummy Dummy Dummy

MH1 MH2 MH3 MH4 MH5 MH6
Mounting Hole Mounting Hole Mounting Hole Mounting Hole Mounting Hole Mounting Hole
6
5

6
5

6
5

6
5

6
5

6
5
FD1 FD2 FD3 7 4 7 4 7 4 7 4 7 4 7 4
1 1 1 8 3 8 3 8 3 8 3 8 3 8 3
9 2 9 2 9 2 9 2 9 2 9 2
1

1
A OPTICS OPTICS OPTICS mh40x80_8 A
mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8

FD4 FD5 FD6

1 1 1

OPTICS OPTICS OPTICS

FOXCONN PCEG
Title
ATX CONN/FP PANEL
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 37 of 43

5 4 3 2 1
 5 4 3 2 1

Add R527 for

reserving delay.
--20130204
+3V_EPW 3D3V_SB 3D3V_DUAL
D D
0.016A

*R331
10K
+/-5%

S
C386 C387

*
R332
R527 0
Reserved
G Q25
FDN340P
* 4.7uF
10V,X5R,+/-10%
* 0.1uF
16V, X7R, +/-10%

C
Dummy

*
B Q26
21 S_SLP_M# MMBT3904-7-F
*

D
C388 +3V_EPW
10K

E
+/-5% * C389
1uF
1uF
10V, X5R, +/-10%
c0603h9
10V, X5R, +/-10%
dummy
* C390
4.7uF
10V,X5R,+/-10%
3D3V_DUAL +3V_EPW

R333 0 +/-5%

*
Dummy

C C

+3V_BG

3D3V_SYS

12V_SYS

3D3V_DUAL 1 R334
22K
+/-5%
Dummy
2 Q28
2N7002DW

C
*R338 6
D1 D2
3

*
4.7K R335 B
10K +/-5% Q27 R336
R339 R340 *
*

R337 10K +/-5% +/-5% Dummy MMBT3904-7-F 2 5 0

21,34,39,42 S_SLP_S3# G1 G2 100 100
Dummy Dummy Dummy +/-5%

E
1 4 Dummy Dummy
S1 S2 +3V_BG
1

Dummy
Q29

*
R341 10K +/-5%
Dummy
MBT3904DW1T1G
B B
+1P5V_PCH
6

PR1 1K +/-5%
Dummy
Dummy R342
2K
+/-5%
Dummy

A A

FOXCONN PCEG
Title
Linear Power
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 38 of 43

5 4 3 2 1
 5 4 3 2 1

+V_1.05_PCH
V_SM
+V_1.05_ME
3D3V_DUAL 12V_SYS
Delete Q30 AOD472AL V_SM
colay Q58.
--20130204
* R343
16.2K
Q58
D
5
*
EC24
820uF
*
C391 C392
*
4.7uF 0.1uF
+/-1% +/-20% +/-10% 16V, X7R, +/-10%

8
4
P_1P05V_PCH_ADJ 3 G S 1
+
1 P_1P05V_PCH_OUT 2
2 NTMFS4925NT1G 3
-
7.5K *
*R345 U31A
C393 LM358 Reserved

4
+/-1% 1uF

*
10V, X5R, +/-10% R346 1K +/-1%
D D

C396 220pF

*
Dummy +1P05V_PCH

260mil 6.5A Imax

C400 C401
* EC12
470uF
* 0.1uF
16V, X7R, +/-10% * 4.7uF
+/-10%
6.3V,+/-20%

Dummy

3D3V_SYS 5V_DUAL

P_1P05V_PCH_ADJ
+V_1.05_PCH *R351

D
ENABLE CIRCUIT * R359 10K
+/-5% Q31
10K 2N7002
+/-5% G
Dummy
R352
C
*

S
B Q32
21,34,38,39,42 S_SLP_S3# MMBT3904-7-F
C C

10K * C404
E

1uF
+/-5% c0603h9
10V, X5R, +/-10%
dummy

3D3V_DUAL

+V_1P5_PCH * R354
10K P_1P5V_PCH_EN
+/-5%
C

B Q70
MMBT3904-7-F
R353
C

E
*

+1P05V_PCH B Q69
MMBT3904-7-F
1K
E

+/-1%
3D3V_SYS
Add R438、Q79(reserved) and
R756、R452、C546(Dummy) for Power sequence.
---For V1.0 20130509
B
* R452 B
10K
R438 +/-5%
C

Dummy R756
*
*

B Q79 0
21,34,38,39,42 S_SLP_S3# MMBT3904-7-F
+/-5%
1K Dummy
E

+/-1% * C546
1uF
c0603h9
10V, X5R, +/-10%
dummy

3D3V_SYS

C405
* 1uF

*R355
4.7K
+/-10%

+/-5% +1P5V_PCH 1.5V

UP2 1A Imax
Change R355 from 22K to 4.7K for FAB-B 3 6
R356 VIN VOUT
*

P_1P5V_PCH_EN 2 7 R700 8.87KOhm

EN ADJ +/-1%
Add C563 1uF for FAB-B * C564 1K
4
VDD PGOOD
1
C406 100pF
*
C407
22uF
*
C408
22uF
*

5V_SYS 1uF +/-1% 8 5 R357 50V, NPO, +/-5% 6.3V,X5R,+/-20%

6.3V,X5R,+/-20%
9 GND1 NC * Dummy c0805h14 c0805h14
A 10V, X5R, +/-10% GND2 10K A
+/-1%
RT9018B18PSP

* C409
1uF
10V, X5R, +/-10%
+1P5V_PCH
R459 FOXCONN PCEG
*

P_1P5V_PCH_PG R744 0 +/-5%

Dummy P_CORE_EN 42 Title
100KOhm +/-1%
1.05V_PCH
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 39 of 43

5 4 3 2 1
 5 4 3 2 1

5V_DUAL 12V_SYS 3D3V_SB

Max. output current = 3A
3D3V_SB 5V_SYS

* R477 Reserved
2.2K
+/-5% 3
NTMFS4925NT1G
* R476 S
2
1
2.2K 5V_S3_N 4G 5V_SB
D D
+/-5%

D
5V_SB
Q35 D 5
Q61
5V_S3_GATE G * R360
47K 5V_DUAL
D11 2N7002
* R478 U33
C410 1uF +/-10%

*
BAT54C

S
3D3V_P 1 Q36 2.2K 3 3D3V_SB
R475 Vin
3 +/-5% C696
*

*
34,37 ATX_PWRGD
2 G
* R749 470pF
Vout
2

D
*
2N7002 R738 1K 5V_S3_P Q37 50V, X7R, +/-10%
2.2K 0 @EUP +/-5% FDN340P ADJ
1
*R361

D
S
R754 Reserved
* +/-5% 301
0 +/-5% +/-5%
* C411 Q38 G
AZ1084D-ADJTRE1
+/-1%

* R362
120KOhm
1uF
c0603h9 G C568
*
C412
1uF *
EC13
470uF
*
C413
0.1uF

S
*

1
Add C696 470pF for VR_ready noise

16V, X7R, +/-10%

+/-5% 10V, X5R, +/-10% 2N7002 220nF +/-20%

*R363

10V, X5R, +/-10%

Dummy +/-10%
close to BRD location 4938.00 -7052.00

S
* C414
* 499

2
SW_SIOJ ATXPWRGD 5V_DUAL 5V_S3_N 5V_S3_P 1uF C37 5V_SB --For V1.0 20130513 +/-1%
S0 H H H H H c0603h9 4.7uF
S4,S5 H L L L H 10V, X5R, +/-10% R751 Dummy
+/-10%

* *
S3 L L H L L 0 +/-5% ATX_PWRGD
Dummy @DSW
R752 @EUP
0 +/-5%
5V_SB
Vout=Vref(1+R2/R1)+IadjR2
R1 is Up Resistor.
R499
Iadj=50uA
R750 *10K
+/-5% Vref=1.25V
*

r0402h4
21,34 S_SUSWARN#

120KOhm

D
+/-5%
Q44
C 2N7002 C
@DSW 5V_S3_GATE G

Change R750 from 100Kohm to

S
120Kohm for 5V_Dual inrush current
--For V1.0 20130412

B
3D3V_DUAL B

5V_SB

3D3V_SB
5V_SB * R349 Add R753
10K
5V_SB
3D3V_SB
--20130204

S
* R348

*
R753 0 +/-5%3D3V_P G Q39
Dummy R317 for DSW
* R456 --20130222
10K FDN340P
D

Reserved C563
10K
* R317 @EUP Q40
* 0.1uF
16V, X7R, +/-10%
3D3V_DUAL

D
10K G
Dummy 2N7002
D
* *

R733 0 +/-5% C415

34 3D3V_SB_CTL
S

@EUP
R321
Q41
* 1uF
+/-10% Dummy
*
C416
0.1uF
*

R734 0 +/-5% G 16V, X7R, +/-10%

21,34 SLP_SUS#
C417 2N7002
@DSW 10K
@EUP
* 1uF @EUP
S

10V, X5R, +/-10%

Dummy

A A

Change R732 from 4.7Kohm to 10Kohm

R732 and change C415 from 0.1uF to 1uF for
*

3D3V_DUAL inrush current

--For V1.0 20130412
10K

FOXCONN PCEG
Title
5V_DUAL/3D3V_DUAL
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 40 of 43

5 4 3 2 1
 5 4 3 2 1

DDR POWER V_SM

3D3V_DUAL V_SM_VTT

DDR Voltage 5V_SB

uP0125
U37
NCT3101S
1
VIN NC_3
8
7 * C490
Max=40A *R418
NC_2
VCNTL
6 1uF
27A in design guide 10K DDR_REF * R417
100KOhm NC_1
5 +/-10%
C491 +/-1% 4
VOUT
D * 10uF
3
REFEN
D

6.3V,X5R 2 C493 C494 C495

GND_1

C
*
C492
GND_2
9
* 0.1uF
* 10uF
* 10uF
B
*

16V, X7R, +/-10%

Q46 R419 0.1uF
MMBT3904-7-F

16V, X7R, +/-10%

100KOhm 6.3V,X5R 6.3V,X5R,+/-20%

D
+/-1% NCT3101S

E
Q47
2N7002
G C497
21,34 S_SLP_S4#

*
C496
0.1uF * 0.1uF
16V, X7R, +/-10%

S
16V, X7R, +/-10% Dummy
Dummy
Output voltage: +0_75VRUN +/-5%
Output current: 1.5A

Q48 Change L32

5V_DUAL 1 D16 5V_DUAL to 63033WN00-VPN-G(the same as L33) Delete Q49、Q50(Dummy)
3 VCC_R A C
12V_SYS 2
L32
--20130204 ---For V1.0 20130513
SD103AW 1uH

*
C R420 C
BAT54C 2.2 Dummy
+/-5% C499

EC23 * C498 * 10uF

C500 * 470uF 1uF 6.3V,X5R,+/-20%

* 0.1uF
16V, X7R, +/-10%
6.3V,+/-20% 10V, X5R, +/-10%

Dummy
QP2

VCC
NTMFS4927NT1G
5
D
Change R424 from 205ohm

5
4 G
to 200ohm for FAB-B U38
1 BOOT C501 100nF R421 0 S 1 CHILISIN_DMI1210-1R0L-N_DS

VCC
BOOT

*
Colay 2

*
R422 50V, X7R, +/-10% +/-5%
*

*
V_SM V_SM_PHASE DDR_REF 7 2 UGATE R423 2.2 3
16KOhm COMP/OCSET UGATE +/-5% Reserved V_SM
L33
+/-1% Change R423 from 0ohm 1uH

*
*

R424 200 +/-1% FB_VSM 6 8 V_SM_PHASE

Dummy
0.8V FB FB PHASE to 32.2ohm for FAB-B R425
GND

4 LGATE 2.2 EC33 EC25 C503 C507 C504 C508

Dummy
LGATE
+/-5% * 820uF * 820uF C506
* 22uF
* 22uF
* 22uF
* 22uF
*

*
*

R426 +/-5% C502 33pF+/-5% APW7120KE-TRL +/-20% +/-20% 22uF

6.3V,X5R,+/-20%
3

30KOhm C509 C505 Dummy Colay Q62 5 Reserved Dummy

6.3V,X5R,+/-20%
Dummy * * D

6.3V,X5R,+/-20%

6.3V,X5R,+/-20%

6.3V,X5R,+/-20%
47nF 47pF
4 * C510
Dummy
G S 1 1nF
*
R428
* R429
22K NTMFS4925NT1G
2
3
50V, X7R, +/-10%
10K +/-1%
For APW8720 Reserved

B *R443
1.5KOhm *1.8KOhm R445
R444

* *R427
B
VCC

+/-1% +/-1% 750 220 Ohm

+/-1% +/-1%
Dummy Dummy
Change R429 to 22K from 20K for POWER.
Dummy ---For V1.0 20130511
DDR_FB_OV1
5

U46
DDR_FB_OV2 1 BOOT
VCC

BOOT
DDR_FB_OV3 DDR_REF 7 2 UGATE
COMP/OCSET UGATE
GND 5V_DUAL
FB_VSM 6 8 V_SM_PHASE
FB PHASE
GND1

DDR_FB_OV1
GND

Place near pin 6 and pin 7 of U48 LGATE

4 LGATE

* R347

D
3

APW8720CKAE-TRG
10K Q66
+/-5% 2N7002
G Dummy
Dummy

S
C
5V_DUAL

*
R295 10K B Q68
5V_DUAL 21 PCH_GPIO45 MMBT3904-7-F
+/-5%
DDR_FB_OV3 Dummy Dummy

E
* R282
DDR_FB_OV2
*R439
1K
D

+/-1%
10K Q64
* R294 Dummy
D

+/-5% 2N7002
G Dummy 10K Q65

*
Dummy +/-5% 2N7002 R743 0 +/-5% Dummy
G Dummy
D

A Dummy A
Q63
S

2N7002
*

R273 10K G Dummy

21 PCH_GPIO60
C

+/-5%
*

Dummy R283 10K B Q67

21 PCH_GPIO46
S

+/-5% MMBT3904-7-F

* R275 Dummy Dummy

E

10K
+/-5%
Dummy
FOXCONN PCEG
*

R741 0 +/-5% Dummy Title

V_SM
*

R742 0 +/-5% Dummy

Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 41 of 43

5 4 3 2 1
 5 4 3 2 1

5V_SYS 12V_CPU

H_CPU_VCCIO_RIGHT

R365 *Reserved
R364
10 1K PUT CLOSE
+1P05V_PCH +/-5% 0603 +/-5% TO PWM
VRM_VCC
*
C420* * * *
R366 PR2 R367 C418

1uF * C419
110Ohm
+/-1%
54.9 90.9 Ohm
+/-1% +/-1%
1uF
+/-10%
3D3V_SYS * R368 * C421
0.1uF
10V, X5R, +/-10% 10nF Dummy

1K 16V, X7R, +/-10%

27
2
+/-1% UP3 NCP81102MNTWG

*39,42R369 4

VCC

VRMP
D SDIO 6 H_VIDSOUT 11 D
VR_EN_10 1 C427 0.1uF 16V, X7R, +/-10%
P_CORE_EN ENABLE SCLK 5 H_VIDSCLK 11
1K ALERT# H_VIDALERT# 11

*
+/-1%
7 13 VRM_OD# 43
11,21,42 P_VR_READY VR_RDY DRON 12 ADDR
PWM1/ADDR VRM_PWM1_10 43
C422 VRM_DIFFOUT 30 15 VRM_CSN1 1K+/-1% C424 ISEN1- 42,43
DIFFOUT CSN1

* * *
* 1uF
*
C425 R374
CSP1
14 VRM_CSP1 R370 Dummy
* 0.1uF

*
+/-10%
PR4
49.9 VRM_FBRC 1nF 3.01K VRM_COMP_RC C426 2.2nF VRM_COMP 28 16V, X7R, +/-10%
COMP

*
*

*
+/-1% +/-1% 0 +/-5% Dummy 42,43 ISEN1+ R372 4.7KOhm C423 0.1uF

*
50V, X7R, +/-10% C428 10pF R371 +/-1% 16V, X7R, +/-10%

*
1K R375 10 VBOOT VRM_PWM2_10 43
+/-1% 29 PWM2/VBOOT 19 VRM_CSN2 1K+/-1% C430 IMAX VBOOT
FB CSN2 ISEN2- 42,43
Dummy C422 0.1uf for power sequenceR701 * CSP2
18 VRM_CSP2 R376 Dummy
* 0.1uF
----For V1.0 20130513
267KOhm 16V, X7R, +/-10%
*R373 *PR3

*
+/-1% 42,43 ISEN2+ R377 4.7KOhm C429 0.1uF VCORE 82.5KOhm VCORE 71.5K

* * *
Dummy +/-1% 16V, X7R, +/-10% +/-1% +/-1%
11 IMAX
IMAX SET VBOOT
PWM3/IMAX VRM_PWM3_10 43 120A
AT SET AT
17 VRM_CSN3 1K+/-1% ISEN3- 42,43
CSN3
CSP3
16 VRM_CSP3 R380 Dummy C432 1.7V
+VCORE R383 100 1 2
*
32
VSP * 0.1uF

*
*
42,43 ISEN3+ R381 4.7KOhm C431 0.1uF 16V, X7R, +/-10%
11 VCORE_VCC_SEN +/-5% C435 R707 +/-1% +/-1% 16V, X7R, +/-10%

* *
1nF 2.1KOhm 31 9 ROSC
VSN PWM4/ROSC Change R702、R703、R704 to
11 VCORE_VSS_SEN
R387 100
50V, X7R, +/-10%
+1P05V_PCH C437 560pF * C436 CSN4
CSP4
21
20
VRM_VCC
Change C433 to 1.5nF 88.7K from 86.6K for POWER. ROSC ADDR
*

+/-5% Dummy
2.2nF
from 3.3nF for power ---For V1.0 20130511
---For V1.0 20130511
R388
* R432 Work F=
330 Khz
*R378
21KOhm
PWM
ADDRESS
*R379
68KOhm

**
1K 23 VRM_CSSUM R702 88.7KOhm +/-1% +/-1%
VRM_IOUT 26 CSSUM C433 +/-1% ISEN1+ 42,43
5V_SYS +/-1% IOUT 24 VRM_CSCOMP
*

1.5nF R703 88.7KOhm

CSCOMP

*
C439 +/-1% ISEN2+ 42,43
10K
+/-1% * 0.1uF * R430
26.1KOhm R706

*
Dummy 16V, X7R, +/-10% +/-1% 25 VRM_ILIM 24K C434 820pF R704 88.7KOhm
ILIM

*
+/-1% 50V,NPO,+/-5% +/-1% ISEN3+ 42,43
R705
C C

*
R382 75K VRM_ILIM_RR
+/-1%
Add C434 820pF for FAB-B
R389 Change R706 from 13.9K to 24K for FAB-BR435 165K

*
+/-1%

T
VR_HOT 3 100K+/-1%
11 H_PROCHOT# VRHOT
*

Reserved

EPAD
0 +/-5% VRM_TSE 8
TSENSE

***
22 VRM_CSREF R384 10 +/-5%
VRM_TSE_R CSREF ISEN1- 42,43
R431 * * C440 R385 10 +/-5%

33
ISEN2- 42,43 3D3V_DUAL
100K T *R708
8.25KOhm
0.1uF
16V, X7R, +/-10% 10 +/-5%
ISEN3- 42,43
+/-1% R386
+/-1%
* P_CORE_EN 39,42
50V, X7R, +/-10%
C438
1nF * R472
BOTTOM PAD 10K

C
CONNECT TO +/-5%

*
R390 10K B Q77
GND Through +/-5% MMBT3904-7-F
6 VIAs

E
R392

*
C
H_PWRGOOD 11,21

*
R471 10K B Q75
21,34,38,39 S_SLP_S3# MMBT3904-7-F
+/-5% Dummy
100
* C441

E
1uF +/-5%
c0603h9
10V, X5R, +/-10%

C
dummy

*
R474 10K B Q76
+/-5% MMBT3904-7-F
Dummy Dummy

E
B B

R391 100
P_VR_READY 11,21,42

*
C
*
R473 10K B Q78
+/-5% MMBT3904-7-F +/-5%

E
Add sequence control
follow CRB P_CORE_EN 39,42

3D3V_DUAL REV. E DATASHEET

REV. E DATASHEET
3D3V_DUAL
BOOT VOLTAGE
1
PWM ADDRESS
1
R397 RESISTOR BOOT
12V_SYS
22K R398 SVID ADDRESS FOR VALUE VOLTAGE
2 +/-5%
22K RESISTOR VCORE RAIL
C

2 +/-5% VALUE
B Q72
3D3V_SYS
30.1K 0V
*R393 MMBT3904-7-F
C

8.2K 10K 0000 49.9K 1.65V

E

+/-1% B Q74
C

* R394 MMBT3904-7-F 25K 0010 39.8K 1.7V

*

A R395 10K +/-5% B Q71 A

E

MMBT3904-7-F 10KR396 45K 0100 90.9K 1.75V

C

+/-5%
E

*
*

* PR5 C442
B Q73
MMBT3904-7-F
70K 0110 130K 0V
1K 100nF 10K 95K 1000 150K 1.65V
E

+/-5% 25V, X5R,+/-10% *PR6

4.7K +/-5%
* C443 125K 1010 169K 1.7V
+/-5% 0.1uF
165K 1100 OPEN 1.75V
16V, X7R, +/-10%
FOXCONN PCEG
Title
Vcore PWM
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 42 of 43

5 4 3 2 1
 5 4 3 2 1

Change L29,L30,L31
to 363033Y800-VPN-G(CHILISIN and TRIO)
--20130204

12V_CPU CAD NOTE: PLACE ALL 0805 CAPS INSIDE

CPU SOCKET CAVITY
R399 1 +/-5% +VCORE

*
D 12V_CPU D
VRM_BOOT1_20 VRM_BOOTRC1_20 QP1 C444

D
5
C445 * * C446 * 100nF
25V, X5R,+/-10% C448 C449 C450 C451 C536 C540

* C447 4 NTMFS4955NT1G
10uF 10uF
* 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
* 22uF
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%

VRM_UGR1_20
R400 100nF G S 1 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
2.2 50V, X7R, +/-10% 2
+/-5% 3
U34 +VCORE

1
VRM_VCC1_20 4 8 VRM_UG1_20 R401 2.2 *R402
10K L29

BST
VCC DRVH +/-5% +/-5% Choke 360nH

*
C452 C453 C454 C455 C456 C457

42 VRM_PWM1_10 2 SW
7 VRM_PHASE1_20 +VCORE * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20%

GND
PAD
R403 10 3 PWM 5 VRM_LG1_30 QP3 5 5 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
42,43 VRM_OD# EN DRVL

1
D D
* R404

*
+/-5% QP4
NCP5901BMNTBG

6
4 4 1
C459 G S 1 G S 1 +/-5% C460 C461 C462 C463 C464 C538

2
* 1uF
+/-10%
2
3
2
3 * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
* 22uF
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%

NTMFS4937NT1G NTMFS4937NT1G 42 * C458

3.3nF ISEN1+
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14

42 ISEN1-
12V_CPU C468 C522 C529
R405 1 +/-5% C539 C466 C467
* 22uF
* 22uF
* 22uF

*
12V_CPU VRM_BOOT2_20 VRM_BOOTRC2_20
QP6 C465 * 22uF
* 22uF
6.3V,X5R,+/-20%
6.3V,X5R,+/-20% * 22uF 6.3V,X5R,+/-20%
6.3V,X5R,+/-20% c0805h14
6.3V,X5R,+/-20% 6.3V,X5R,+/-20%
c0805h14 c0805h14
5
* 100nF V_SM c0805h14 c0805h14 c0805h14

C469* *
D 25V, X5R,+/-10% Dummy Dummy
C470

VRM_UGR2_20
R406
2.2 * C471
100nF
4
G S 1
10uF 10uF
*
C472
22uF C475 C473 C474
+/-5% 50V, X7R, +/-10% 2
*
6.3V,X5R,+/-20% 22uF
* 22uF
* 22uF
U35
*R407 3 NTMFS4955NT1G c0805h14 6.3V,X5R,+/-20% 6.3V,X5R,+/-20% 6.3V,X5R,+/-20%

1
C 10K c0805h14 c0805h14 c0805h14 C
VRM_VCC2_20 4 8 VRM_UG2_20 R408 2.2 +/-5% L30

BST
VCC DRVH +/-5% Choke 360nH

*
C477

42 VRM_PWM2_10 2 SW
7 VRM_PHASE2_20
QP7
+VCORE * 22uF
*
6.3V,X5R,+/-20%
C478
22uF
*
C479
22uF
*
C480
22uF
*
C481
22uF
GND
PAD

PWM
42,43 VRM_OD# R409 10 3
EN DRVL
5 VRM_LG2_30
D
5 QP8
D
5
* R410 c0805h14 6.3V,X5R,+/-20% 6.3V,X5R,+/-20% 6.3V,X5R,+/-20% 6.3V,X5R,+/-20%
*

+/-5% c0805h14 c0805h14 c0805h14 c0805h14

1
NCP5901BMNTBG 1
9

4 4 +/-5%
C482 G S 1 G S 1
* 1uF 2 2

2
+/-10% 3 3
*4242C476 ISEN2+

ISEN2-
+VCORE
CAD NOTE: PLACE CAPS AT TOP SOCKET EDGE
NTMFS4937NT1G 3.3nF
NTMFS4937NT1G
12V_CPU
EC14 EC17 EC15 EC16 EC18 EC29 EC19

QP9
* 560uF
4V/+/-20%
* 560uF
4V/+/-20%
* 560uF
4V/+/-20%
* 560uF *
4V/+/-20%
560uF *
4V/+/-20%
560uF
4V/+/-20%
* 560uF
4V/+/-20%
12V_CPU R411 1 +/-5% 5 C484 Dummy
*
*

VRM_BOOT3_20 VRM_BOOTRC3_20 D 100nF Dummy

4 C483 * * C485
25V, X5R,+/-10%

* C486
100nF VRM_UGR3_20
G S 1
2
10uF 10uF Dummy EC15 560uF for FAB-B Reserved EC29 560uF for FAB-B
R412
2.2
50V, X7R, +/-10%
*R413
10K
3 NTMFS4955NT1G

+/-5% +/-5%
U36
1

VRM_VCC3_20 4 8 VRM_UG3_20 R414 2.2 L31

BST

VCC DRVH +/-5% Choke 360nH

*
7 VRM_PHASE3_20 +VCORE
2 SW QP11 QP12
42 VRM_PWM3_10
GND
PAD

R415 10 3 PWM 5 VRM_LG3_30 5 5

B 42,43 VRM_OD# EN DRVL B
D D
* R416
*

+/-5%

1
NCP5901BMNTBG
9

4 4 1
C488 G S 1 G S 1 +/-5%
* 1uF 2 2 12V_CPU

2
+/-10% 3 3

NTMFS4937NT1G NTMFS4937NT1G *42 C487 ISEN3+

3.3nF EC20 EC21 EC22
42 ISEN3-
C489 * 270uF * 270uF * 270uF
* 100nF
25V, X5R,+/-10%
16V, +/-20% 16V, +/-20% 16V, +/-20%

PWR2
4 3

2 1
+VCORE
Header_2X2

C551 C554 C555 C556 C557

* 22uF
*
6.3V,X5R,+/-20%
22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20%
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14

Dummy Dummy Dummy Dummy Dummy

A A

C558 C559 C560 C561 C562

* 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20% * 22uF
6.3V,X5R,+/-20%
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14

Dummy Dummy Dummy Dummy Dummy

FOXCONN PCEG
Title
Vcore Driver
Size Document Number
H81M02
Rev
C A

Date: Thursday, May 16, 2013 Sheet 43 of 43

5 4 3 2 1