MP Lab
MP Lab
DEAPRTMENT OF
ELECTRONICS AND COMMUNICATION
SYSTEMS
2020-2021
NAME : ______________________________________________
Reg. No : ______________________________________________
CHERRAAN’S ARTS SCIENCE COLLEGE
(Affiliated to Bharathiar University, Coimbatore)
Kangayam – 638701
DEAPRTMENT OF
ELECTRONICS AND COMMUNICATION
SYSTEMS
Date:
8-BIT ADDITION
AIM:
T o add two 8-bit numbers in memory location and store the result in memory.
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
INPUT:
OUTPUT:
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RESULT:
The ALP for adding two 8-bit data was written and executed.
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Ex.No:
DATE:
8-BIT SUBTRACTION
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY 0P-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4100 21 00 42 START LXI H,4200 [H-L] 4200
4103 0E 00 MVI C,00 [C] 00
4105 7E MOV A,M [A] [[H-L]]
4106 23 INX H [H-L] [H-L]+1
4107 96 SUB M [A] [A]-[[H-L]]
4108 D2 0F 41 JNC Loop If [CS]=0,jump to LOOP
410B 2F CMA [A] [A]
410C C6 01 ADI 01 [A] [A]+01
410E 0C INR C [C] [C]+1
410F 23 Loop INX H [H-L] [H-L]+1
4110 77 MOV M,A [[H-L]] [A]
4111 23 INX H [H-L] [H-L]+1
4112 71 MOV M,C [[H-L]] [C]
4113 76 END HLT Stop
INPUT:
OUTPUT:
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RESULT:
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Ex.No:
DATE:
16-BIT ADDITION
AIM:
To add two 16-bit numbers in memory location and store the result in
memory.
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENT
ADDRESS B1 B2 B3
[L] [4150]
4100 2A 50 41 START LHLD 4150
[H] [4151]
4103 EB XCHG [H-L] [D-E]
[L] [4152]
4104 2A 52 41 LHLD 4152
[H] [4153]
4107 19 DAD D [H-L] [D-E]+[H-L]
[4200] [L]
4108 22 00 42 SHLD 4200
[4201] [H]
410B 3E 00 MVI A,00 [A] 00
410D 17 RAL LSB OF [A] [CS]
410E 32 02 42 STA 4202 [4202] [A]
4111 76 END HLT Stop
INPUT:
OUTPUT:
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RESULT:
The ALP for adding two 16-bit data was written and executed.
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Ex.No:
DATE:
8-BIT MULTIPLICATION
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4100 3A 52 41 START LDA 4152 [A][4152]
[L] [4150]
4103 2A 50 41 LHLD 4150
[H] [4151]
4106 EB XCHG [H-L][D-E]
4107 21 00 00 LXI H,0000 [H-L] 0000
410A 19 Loop DAD D [H-L] [H-L]+[D-E]
410B 3D DCR A [A] [A]-1
410C C2 0A 41 JNZ Loop If [Z]=0 Jump to LOOP
410D 22 53 41 SHLD 4153 [4153] [A]
4110 76 END HLT Stop
INPUT:
OUTPUT:
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RESULT:
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Ex.No:
DATE:
8-BIT DIVISION
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
If
410A DA 13 41 JC LOOP1
[CS]=1,Jump to LOOP1
If
4110 D2 0D 41 JNC LOOP2
[CS]=0,Jump to LOOP2
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INPUT:
OUTPUT:
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RESULT:
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Ex.No:
Date:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
If
4109 D2 0D 41 JNC LOOP1 [CS]=0,Jump to
LOOP1
If
410E C2 07 41 JNZ LOOP2
[Z]=0,Jump to LOOP2
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INPUT:
OUTPUT:
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SMALLEST NUMBER OF AN ARRAY:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
If
4109 DA 0D 41 JC LOOP1
[CS]=1,Jump to LOOP1
If
410E C2 07 41 JNZ LOOP2
[Z]=0,Jump to LOOP2
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INPUT:
OUTPUT:
RESULT:
The ALP for finding biggest & smallest number of an array were written and
executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
4100 21 50 41 START LXI H,4150 [[H-L]] [4150]
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INPUT:
OUTPUT:
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ARRANGING IN DESCENDING ORDER:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
4100 21 50 41 START LXI H,4150 [[H-L]] [4150]
If [CS]=0,Jump to
410B D2 14 41 JNC LOOP1
LOOP1
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INPUT:
OUTPUT:
RESULT:
The ALP for arrange a data array in ascending and descending order were
written and executed.
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Ex.No:
DATE:
AIM
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
INPUT:
OUTPUT:
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RESULT:
The ALP for 1’s and 2’s complement of 8-bit data was written and executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIERED:
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PROGRAM:
Read Operation:
Write Operation:
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RESULT:
The ALPs for data transfer between parallel ports of 8255 was written and
executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIERED:
DAC
CRO
ALGORITHM:
SQUARE WAVE:
3. Call delay
5. Call Delay
SAW TOOTH:
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TRIANGULAR WAVE:
PROGRAM:
SQUARE WAVE:
SAWTOOTH WAVE:
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TRIANGULAR WAVE:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4300 3E 00 START MVI A,00 [A] 00
4302 D3 C0 LOOP1 OUT C0 Out to C0
4304 3C INR A [A] [A]+1
4305 C2 02 43 JNZ LOOP1 If [Z]=0,Jump to LOOP1
4308 2F CMA [A][A]
4309 D3 C0 LOOP2 OUT C0 Out to C0
430B 3D DCR A [A] [A]-1
430C C2 09 43 JNZ LOOP2 If [Z]=0,Jump to LOOP2
430F C3 00 43 JMP START Jump to start
DELAY SUBROUTINE:
MEMORY OP-CODE
LABEL MNEMONIC
ADDRESS B1 B2 B3
4400 16 05 DELAY MVI D,05
4402 1E FF LOOP2 MVI E,FF
4404 1D LOOP1 DCR E
4405 C2 04 44 JNZ LOOP1
4408 15 DCR D
4409 C2 02 44 JNZ LOOP2
440C C9 RET
RESULT:
The ALPs for generating different waveforms using DAC were written and
executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM: CONTINOUS ROTATION
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4100 21 50 41 START LXI H,4150 [H-L] [4150]
4103 06 04 MVI B,04 [B] 04
4105 7E LOOP1 MOV A,M [A] [[H-L]]
4106 D3 C0 OUT C0 Out to C0(Step.mot.Address)
4108 CD 00 42 CALL DELAY Call the delay Subroutine
410B 23 INX H [H-L] [H-L]+1
410C 05 DCR B [B] [B]-1
410D C2 05 41 JNZ LOOP1 If [Z]=0,Jump to LOOP1
4110 C3 00 41 JMP START Jump to start
SUBROUTINE: DELAY
MEMORY OP-CODE
LABEL MNEMONIC
ADDRESS B1 B2 B3
4200 11 00 01 DELAY LXI D,0100
4203 1B LOOP DCX D
4204 7B MOV A,E
4205 B2 ORA D
4206 C2 03 42 JNZ LOOP
4209 C9 RET
180’ ROTATION:
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SUBROUTINE: ROTATE (7.2’ rotation)
INPUT:
MEMORY
CLOCKWISE ANTI-CLOCKWISE
ADDRESS
4150 0A 09
4151 06 05
4152 05 06
RESULT:
The ALP for stepper motor controller was written and executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4200 90 43 00 START MOV DPTR,#4300 [DPTR]4300
4203 E0 MOVX A,@DPTR [A][[DPTR]]
4204 FF MOV R7,A [R7] [A]
4205 A3 INC DPTR [DPTR] [DPTR]+1
4206 E0 MOVX A,@DPTR [A] [[DPTR]]
4207 2F ADD A,R7 [A] [A]+[R7]
4208 A3 INC DPTR [DPTR] [DPTR]+1
4209 F0 MOVX @DPTR,A [[DPTR]] [A]
420A 74 00 MOV A,#00 [A] 00
420C 33 RLC A LSB of [A] [CS]
420D A3 INC DPTR [DPTR] [DPTR]+1
420E F0 MOVX @DPTR,A [[DPTR]] [A]
420F 80 FE LOOP SJMP LOOP Stop
INPUT:
OUTPUT:
RESULT:
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
Microcontroller 8051
ALGORITHM:
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONIC COMMENT
ADDRESS B1 B2 B3
4100 90 43 00 START MOV DPTR,#4300 [[DPTR]]4300
4103 E0 MOVX A,@DPTR [A] [[DPTR]]
4104 FF MOV R7,A [R7] [A]
4105 A3 INC DPTR [DPTR] [DPTR]+1
4106 E0 MOVX A,@DPTR [A] [[DPTR]]
4107 9F SUBB A,R7 [A] [A]-[R7]
4108 A3 INC DPTR [DPTR] [DPTR]+1
4109 F0 MOVX @DPTR,A [[DPTR]] [A]
410A 80 FE LOOP SJMP LOOP Stop
INPUT:
OUTPUT:
RESULT:
The ALP for 8-bit subtraction program was written and executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
1. Initialize memory.
2. Get the two numbers in A & B registers.
3. Multiply the two numbers using MUL AB.
4. Store lower byte (LB) in A and higher byte (HB) in B.
5. Stop the program.
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
4100 90 43 00 START MOV DPTR,#4300 [[DPTR]] 4300
4103 E0 MOVX A,@DPTR [A] [[DPTR]]
4104 F5 F0 MOV B,A [B] [A]
4106 A3 INC DPTR [DPTR] [DPTR] + 1
4107 E0 MOVX A,@DPTR [A] [[DPTR]]
4108 A4 MUL AB [A] [A].[B]
4109 A3 INC DPTR [DPTR] [DPTR] + 1
410A F0 MOVX @DPTR,A [[DPTR]] [A]
410B A3 INC DPTR [DPTR] [DPTR] + 1
410C E5 F0 MOV A,B [A] [B]
410E F0 MOVX @DPTR,A [[DPTR]] [A]
410F 80 FE LOOP SJMP LOOP HALT
INPUT:
OUTPUT:
RESULT:
The ALP for 8-bit multiplication program was written and executed.
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Ex.No:
DATE:
AIM:
APPARATUS REQUIRED:
ALGORITHM:
1. Initialize memory.
2. Get the divisor in B and dividend in A registers.
3. Divide the two numbers using the instruction DIV AB.
4. Store the quotient from A and the remainder from B.
5. Stop the program.
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PROGRAM:
MEMORY OP-CODE
LABEL MNEMONICS COMMENTS
ADDRESS B1 B2 B3
4100 90 43 00 START MOV DPTR,#4300 [[DPTR]] 4300
4103 E0 MOVX A,@DPTR [A] [[DPTR]]
4104 F5 F0 MOV B,A [B] [A]
4106 A3 INC DPTR [DPTR] [DPTR] + 1
4107 E0 MOVX A,@DPTR [A] [[DPTR]]
4108 A4 DIV AB [A] [A]/[B]
4109 A3 INC DPTR [DPTR] [DPTR] + 1
410A F0 MOVX @DPTR,A [[DPTR]] [A]
410B A3 INC DPTR [DPTR] [DPTR] + 1
410C E5 F0 MOV A,B [A] [B]
410E F0 MOVX @DPTR,A [[DPTR]] [A]
410F 80 FE LOOP SJMP LOOP HALT
INPUT:
OUTPUT:
RESULT:
The ALP for 8-bit division program was written and executed.
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Ex.No:
DATE:
AIM:
To write an ALP for generating square wave with different frequencies using
8051.
APPARATUS REQUIERED:
DAC
CRO
ALGORITHM:
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PROGRAM:
SQUARE WAVE:
DELAY SUBROUTINE:
MEMORY OP-CODE
LABEL MNEMONIC
ADDRESS B1 B2 B3
4200 7A FA DELAY MOV R3,# FA
4202 DA FE LOOP DJNZ R3,LOOP
4204 22 RET
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DELAY ROUTINE IN 8051
The shortest instructions will execute in 1µS and other instructions will take 2 or more
micro seconds depending up on the size of the instruction. Thus a time delay of any
magnitude can be generated by looping suitable instructions a required number of
times. Anyway, the software delay is not very accurate because we cannot exactly
predict how much time it takes for executing a single instruction.
The above program roughly produces a delay of 1mS.The instruction DJNZ Rx,
LABEL is a two cycle instruction and it will take 2µS to execute. So repeating this
instruction 500 times will generate a delay of 500 x 2µS = 1mS. The program is
written as a subroutine and it works this way. When called the sub routine DELAY,
Registers R3 is loaded by 250D.
Square wave has ON and OFF period time delay = 0.5ms (Time delay = 500µs)
RESULT:
The ALPs for generating square wave with different frequencies using 8051
were written and executed.
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