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N-Channel Dual Silicon Junction Field-Effect Transistor

This document provides specifications for the 2N3957 and 2N3958 N-channel dual silicon junction field-effect transistors. These transistors can be used in low and medium frequency differential amplifiers and high input impedance amplifiers. The document lists the transistors' maximum ratings and provides tables with their static and dynamic electrical characteristics such as gate-source breakdown voltage, drain saturation current, forward transconductance, and input/output capacitances. It also specifies the transistors' packaging and pin configuration.

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Angga Gintara
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67 views1 page

N-Channel Dual Silicon Junction Field-Effect Transistor

This document provides specifications for the 2N3957 and 2N3958 N-channel dual silicon junction field-effect transistors. These transistors can be used in low and medium frequency differential amplifiers and high input impedance amplifiers. The document lists the transistors' maximum ratings and provides tables with their static and dynamic electrical characteristics such as gate-source breakdown voltage, drain saturation current, forward transconductance, and input/output capacitances. It also specifies the transistors' packaging and pin configuration.

Uploaded by

Angga Gintara
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Databook.

fxp 1/14/99 11:30 AM Page B-6

B-6 01/99

2N3957, 2N3958
N-Channel Dual Silicon Junction Field-Effect Transistor

¥ Low and Medium Frequency Absolute maximum ratings at TA = 25¡C


Reverse Gate Source & Reverse Gate Drain Voltage – 50 V
Differential Amplifiers Gate Current 50 mA
¥ High Input Impedance Total Device Power Dissipation (each side) 250 mW
Amplifiers @ 85°C Case Temperature (both sides) 500 mW
Power Derating (both sides) 4.3 mW/°C

At 25°C free air temperature: 2N3957 2N3958 Process NJ16


Static Electrical Characteristics Min Max Min Max Unit Test Conditions
Gate Source Breakdown Voltage V(BR)GSS – 50 – 50 V IG = – 1 µA, VDS = ØV
– 100 – 100 pA VGS = – 30V, VDS = ØV
Gate Reverse Current IGSS
– 500 – 500 nA VGS = – 30V, VDS = ØV TA = 125°C
– 50 – 50 pA VDS = 20V, ID = 200 µA
Gate Operating Current IG
– 250 – 250 nA VDS = 20V, ID = 200 µA TA = 125°C
– 4.2 – 4.2 V VDS = 20V, ID = 50 µA
Gate Source Voltage VGS
– 0.5 –4 – 0.5 –4 V VDS = 20V, ID = 200 µA
Gate Source Cutoff Voltage VGS(OFF) –1 – 4.5 –1 – 4.5 V VDS = 20V, ID = 1 nA
Gate Source Forward Voltage VGS(F) 2 2 V VDS = Ø, IG = 1 mA
Drain Saturation Current (Pulsed) IDSS 0.5 5 0.5 5 mA VDS = 20V, VGS = ØV

Dynamic Electrical Characteristics

Common Source 1000 3000 1000 3000 µS VDS = 20V, VGS = ØV f = 1 kHz
gfs
Forward Transconductance 1000 1000 µS VDS = 20V, VGS = ØV f = 200 MHz
Common Source Output Conductance gos 35 35 µS VDS = 20V, VGS = ØV f = 1 kHz
Common Source Input Capacitance Ciss 4 4 pF VDS = 20V, VGS = ØV f = 1 MHz
Drain Gate Capacitance Cdgo 1.5 1.5 pF VDS = 10V, IS = ØA f = 1 MHz
Common Source
Reverse Transfer Capacitance Crss 1.2 1.2 pF VDS = 20V, VGS = ØV f = 1 MHz

VDS = 20V, VGS = ØV


Noise Figure NF 0.5 0.5 dB RG = 10 MΩ f = 100 Hz

Differential Gate Current | IG1 – IG2 | 10 10 nA VDS = 20V, ID = 200 µA TA = 125°C


Saturation Drain Current Ratio IDSS1 / IDSS2 0.9 1 0.85 1 VDS = 20V, VGS = ØV
Differential Gate Source Voltage | VGS1 – VGS2 | 20 25 mV VDS = 20V, ID = 200 µA
TA = 25°C
6 8 mV VDS = 20V, ID = 200 µA
Differential Gate Source ∆VGS1– VGS2 to – 55°C

Voltage with Temperature ∆T TA = 25°C


7.5 10 mV VDS = 20V, ID = 200 µA to 125°C

Transconductance Ratio gfs1 / gfs2 0.9 1 0.85 1 VDS = 20V, ID = 200 µA f = 1 kHz

TOÐ71 Package Pin Configuration


See Section G for Outline Dimensions 1 Source, 2 Drain, 3 Gate, 5 Source,
6 Drain, 7 Gate
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287 FAX (972) 276-3375 www.interfet.com

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