LT6109-1/LT6109-2

High Side Current Sense

Amplifier with Reference
and Comparators
FEATURES DESCRIPTION
n Current Sense Amplifier The LT®6109 is a complete high side current sense device
– Fast Step Response: 500ns that incorporates a precision current sense amplifier, an
– Low Offset Voltage: 125µV Maximum integrated voltage reference and two comparators. Two
– Low Gain Error: 0.2% Maximum versions of the LT6109 are available. The LT6109-1 has
n Internal 400mV Precision Reference the comparators connected in opposing polarity and the
n Internal Latching Comparators with Reset LT6109-2 has the comparators connected in the same polar-
– Fast Response Time: 500ns ity. In addition, the current sense amplifier and comparator
– Total Threshold Error: ±1.25% Maximum inputs and outputs are directly accessible. The amplifier
– Two Comparator Polarity Options gain and comparator trip points are configured by external
n Wide Supply Range: 2.7V to 60V resistors. The open-drain comparator outputs allows for
n Supply Current: 550µA easy interface to other system components.
n Low Shutdown Current: 5µA Maximum
n Specified for –40°C to 125°C Temperature Range
The overall propagation delay of the LT6109 is typically
n Available in 10-Lead MSOP Package
only 1.4µs, allowing for quick reaction to overcurrent
and undercurrent conditions. The 1MHz bandwidth al-
lows the LT6109 to be used for error detection in critical
APPLICATIONS applications such as motor control. The high threshold
accuracy of the comparators, combined with the ability to
n Overcurrent, Undercurrent and Fault Detection latch both comparators, ensures the LT6109 can capture
n Current Shunt Measurement high speed events.
n Battery Monitoring
n Motor Control The LT6109 is fully specified for operation from –40°C to
n Automotive Monitoring and Control 125°C, making it suitable for industrial and automotive ap-
n Remote Sensing plications. The LT6109 is available in a small 10-lead MSOP.
n Industrial Control L, LT, LTC, LTM, TimerBlox, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.

TYPICAL APPLICATION
Circuit Fault Protection with Latching Load Disconnect and Early Warning Indication Response to Overcurrent Event

0.1Ω IRF9640
12V TO LOAD VLOAD
6.2V* 1k 100Ω 0.1µF 10V/DIV
3.3V
SENSEHI SENSELO 0V

V+ OUTA VOUT
10k 1.62k 100k ILOAD
LT6109-2 6.04k 200mA/DIV
RESET EN/RST INC2 0mA
1k 100mA WARNING VOUTC1
OUTC2 2.37k 250mA DISCONNECT
5V/DIV 0V
250mA DISCONNECT VOUTC2
2N2700 OUTC1 INC1 100mA WARNING
V– 5V/DIV 0V
1.6k

610912 TA01a
5µs/DIV 610912 TA01b
*CMH25234B
610912fa

1
LT6109-1/LT6109-2
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION
(Note 1)
Total Supply Voltage (V+ to V–)..................................60V TOP VIEW

Maximum Voltage SENSELO

EN/RST
1
2
10
9
SENSEHI
V+
(SENSELO, SENSEHI, OUTA)................................ V+ + 1V OUTC2 3 8 OUTA
OUTC1 4 7 INC2
Maximum V+ – (SENSELO or SENSEHI).....................33V V– 5 6 INC1
Maximum EN/RST Voltage.........................................60V MS PACKAGE
10-LEAD PLASTIC MSOP
Maximum Comparator Input Voltage.........................60V θJA = 160°C/W, θJC = 45°C/W
Maximum Comparator Output Voltage......................60V
Input Current (Note 2)...........................................–10mA
SENSEHI, SENSELO Input Current........................ ±10mA
Differential SENSEHI or SENSELO Input Current....±2.5mA
Amplifier Output Short-Circuit Duration (to V–)... Indefinite
Operating Temperature Range (Note 3)
LT6109I.................................................–40°C to 85°C
LT6109H............................................. –40°C to 125°C
Specified Temperature Range (Note 3)
LT6109I.................................................–40°C to 85°C
LT6109H............................................. –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT6109AIMS-1#PBF LT6109AIMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 85°C
LT6109IMS-1#PBF LT6109IMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 85°C
LT6109AHMS-1#PBF LT6109AHMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 125°C
LT6109HMS-1#PBF LT6109HMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 125°C
LT6109AIMS-2#PBF LT6109AIMS-2#TRPBF LTFWY 10-Lead Plastic MSOP –40°C to 85°C
LT6109IMS-2#PBF LT6109IMS-2#TRPBF LTFWY 10-Lead Plastic MSOP –40°C to 85°C
LT6109AHMS-2#PBF LT6109AHMS-2#TRPBF LTFWY 10-Lead Plastic MSOP –40°C to 125°C
LT6109HMS-2#PBF LT6109HMS-2#TRPBF LTFWY 10-Lead Plastic MSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

610912fa

2
 LT6109-1/LT6109-2
ELECTRICAL
The CHARACTERISTICS l denotes the specifications which apply over the full operating
+ +
temperature range, otherwise specifications are at TA = 25°C. V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V+ Supply Voltage Range l 2.7 60 V
IS Supply Current (Note 4) V+ = 2.7V, RIN = 1k, VSENSE = 5mV 475 µA
V+ = 60V, RIN = 1k, VSENSE = 5mV 600 700 µA
l 1000 µA
Supply Current in Shutdown V+ = 2.7V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V 3 5 µA
l 7 µA
V+ = 60V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V 7 11 µA
l 13 µA
EN/RST Pin Current VEN/RST = 0V, V+ = 60V –200 nA
VIH EN/RST Pin Input High V+ = 2.7V to 60V l 1.9 V
VIL EN/RST Pin Input Low V+ = 2.7V to 60V l 0.8 V
Current Sense Amplifier
VOS Input Offset Voltage VSENSE = 5mV, LT6109A –125 125 µV
VSENSE = 5mV, LT6109 –350 350 µV
VSENSE = 5mV, LT6109A l –250 250 µV
VSENSE = 5mV, LT6109 l –450 450 µV
∆VOS/∆T Input Offset Voltage Drift VSENSE = 5mV l ±0.8 µV/°C
IB Input Bias Current V+ = 2.7V to 60V 60 300 nA
(SENSELO, SENSEHI) l 350 nA
IOS Input Offset Current V+ = 2.7V to 60V ±5 nA
IOUTA Output Current (Note 5) l 1 mA
PSRR Power Supply Rejection Ratio V+ = 2.7V to 60V 120 127 dB
(Note 6) l 114 dB
CMRR Common Mode Rejection Ratio V+ = 36V, VSENSE = 5mV, VICM = 2.7V to 36V 125 dB
V+ = 60V, V SENSE = 5mV, VICM = 27V to 60V 110 125 dB
l 103 dB
VSENSE(MAX) Full-Scale Input Sense Voltage RIN = 500Ω l 500 mV
(Note 5)
Gain Error (Note 7) V+ = 2.7V to 12V –0.08 %
V+ = 12V to 60V, VSENSE = 5mV to 100mV l –0.2 0 %
SENSELO Voltage (Note 8) V+ = 2.7V, VSENSE = 100mV, ROUT = 2k l 2.5 V
V+ = 60V, VSENSE = 100mV l 27 V
Output Swing High (V+ to VOUTA) V+ = 2.7V, VSENSE = 27mV l 0.2 V
V+ = 12V, V SENSE = 120mV l 0.5 V
BW Signal Bandwidth IOUT = 1mA 1 MHz
IOUT = 100µA 140 kHz
tr Input Step Response (to 50% of V+ = 2.7V, VSENSE = 24mV Step, Output Rising Edge 500 ns
Final Output Voltage) V+ = 12V to 60V, VSENSE = 100mV Step, Output Rising Edge 500 ns
tSETTLE Settling Time to 1% VSENSE = 10mV to 100mV, ROUT = 2k 2 µs

610912fa

3
LT6109-1/LT6109-2
ELECTRICAL
The CHARACTERISTICS l denotes the specifications which apply over the full operating
+ +
temperature range, otherwise specifications are at TA = 25°C. V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference and Comparator
VTH(R) Rising Input Threshold Voltage V+ = 2.7V to 60V, LT6109A l 395 400 405 mV
(Note 9) (LT6109-1 Comparator 1 V+ = 2.7V to 60V, LT6109 l 392 400 408 mV
LT6109-2 Both Comparators)
VTH(F) Falling Input Threshold Voltage V+ = 2.7V to 60V, LT6109A l 395 400 405 mV
(Note 9) (LT6109-1 Comparator 2) V+ = 2.7V to 60V, LT6109 l 392 400 408 mV
VHYS VHYS = VTH(R) – VTH(F) V+ = 2.7V to 60V 3 10 15 mV
Comparator Input Bias Current VINC1,2 = 0V, V+ = 60V l –50 nA
VOL Output Low Voltage IOUTC1,C2 = 500µA, V+ = 2.7V 60 150 mV
l 220 mV
High to Low Propagation Delay 5mV Overdrive 3 µs
100mV Overdrive 0.5 µs
Output Fall Time 0.08 µs
tRESET Reset Time 0.5 µs
tRPW Valid RST Pulse Width l 2 15 µs

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 5: The full-scale input sense voltage and the maximum output
may cause permanent damage to the device. Exposure to any Absolute current must be considered to achieve the specified performance.
Maximum Rating condition for extended periods may affect device Note 6: Supply voltage and input common mode voltage are varied while
reliability and lifetime. amplifier input offset voltage is monitored.
Note 2: Input and output pins have ESD diodes connected to ground. The Note 7: Specified gain error does not include the effects of external
SENSEHI and SENSELO pins have additional current handling capability resistors RIN and ROUT. Although gain error is only guaranteed between
specified as SENSEHI, SENSELO input current. 12V and 60V, similar performance is expected for V+ < 12V, as well.
Note 3: The LT6109I is guaranteed to meet specified performance from Note 8: Refer to SENSELO, SENSEHI Range in the Applications
–40°C to 85°C. LT6109H is guaranteed to meet specified performance Information section for more information.
from –40°C to 125°C. Note 9: The input threshold voltage which causes the output voltage of the
Note 4: Supply current is specified with the comparator outputs high. comparator to transition from high to low is specified. The input voltage
When the comparator outputs go low the supply current will increase by which causes the comparator output to transition from low to high is
75µA typically per comparator. the magnitude of the difference between the specified threshold and the
hysteresis.

610912fa

4
 LT6109-1/LT6109-2
TYPICAL

+
PERFORMANCE
+
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)

Supply Current vs Supply Voltage Start-Up Supply Current Enable/Disable Response

700

600
V+
5V/DIV
SUPPLY CURRENT (µA)

500 VEN/RST
0V 2V/DIV
400
0V
300
IS
500µA/DIV IS
200
500µA/DIV
0µA
100 0µA

0
0 10 20 30 40 50 60 10µs/DIV 610912 G02 100µs/DIV
SUPPLY VOLTAGE (V) 610912 G01 610912 G03

Input Offset Voltage Amplifier Offset Voltage

vs Temperature vs Supply Voltage Offset Voltage Drift Distribution
300 100 12
5 TYPICAL UNITS 5 TYPICAL UNITS
80
200 10
60
INPUT OFFSET VOLTAGE (µV)

PERCENTAGE OF UNITS (%)

OFFSET VOLTAGE (µV)

40
100 8
20
0 0 6
–20
–100 4
–40
–60
–200 2
–80
–300 –100 0
–40 –25 –10 5 20 35 50 65 80 95 110 125 0 10 20 30 40 50 60 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2
TEMPERATURE (°C) SUPPLY VOLTAGE (V) OFFSET VOLTAGE DRIFT (µV/°C)
610912 G04 610912 G05 610912 G06

Amplifier Gain Error Amplifier Output Swing

vs Temperature Amplifier Gain Error Distribution vs Temperature
0.05 25 0.50
VSENSE = 5mV TO 100mV VSENSE = 5mV TO 100mV
0.45
0 20 0.40 V+ = 12V
PERCENTAGE OF UNITS (%)

RIN = 1k 0.35 VSENSE = 120mV

GAIN ERROR (%)

V+ – VOUTA (V)

–0.05 15 0.30
RIN = 100Ω 0.25
–0.10 10 0.20
0.15 V+ = 2.7V
VSENSE = 27mV
–0.15 5 0.10
0.05
–0.20 0 0
–50 –25 0 25 50 75 100 125 –0.048 –0.052 –0.056 –0.060 –0.064 –0.68 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) GAIN ERROR (%) TEMPERATURE (°C)
610912 G07 610912 G08 610912 G18

610912fa

5
LT6109-1/LT6109-2
TYPICAL

+
PERFORMANCE
+
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)

Power Supply Rejection Ratio Common Mode Rejection Ratio

vs Frequency vs Frequency Amplifier Gain vs Frequency
160 140 46

COMMON MODE REJECTION RATIO (dB)

POWER SUPPLY REJECTION RATIO (dB)

140 120 G = 100

40
120
100
G = 50, ROUT = 5k
100 34

GAIN (dB)
80
80
60
28 G = 20, ROUT = 2k
60
40
40
22
20 20 IOUTA = 1mA
IOUTA = 100µA
0 0 16
1 10 100 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
610912 G11
610912 G09 610912 G10

Amplifier Input Bias Current Amplifier Step Response

System Step Response vs Temperature (VSENSE = 0mV to 100mV)
VSENSE 100
RIN = 100Ω
100mV/DIV 90 G = 100V/V
0V
80
INPUT BIAS CURRENT (nA)

VOUTA
1V/DIV 70 VOUTA
SENSEHI 2V/DIV
0V 60
50 SENSELO
VOUTC1
2V/DIV 40 0V
0V 30
VSENSE
VEN/RST 20 50mV/DIV
5V/DIV
0V 10 0V
ROUT = 2k,100mV INC1 OVERDRIVE
0
2µs/DIV –40 –25 –10 5 20 35 50 65 80 95 110 125 2µs/DIV
610912 G12 TEMPERATURE (°C) 610912 G14

610912 G13

Amplifier Step Response Amplifier Step Response Amplifier Step Response

(VSENSE = 10mV to 100mV) (VSENSE = 0mV to 100mV) (VSENSE = 10mV to 100mV)
RIN = 100Ω RIN = 1k RIN = 1k
G = 100V/V ROUT = 20k ROUT = 20k
G = 20V/V G = 20V/V

VOUTA VOUTA VOUTA

2V/DIV 1V/DIV 1V/DIV

0V 0V
0V

VSENSE VSENSE
VSENSE 100mV/DIV 100mV/DIV
50mV/DIV 0V 0V
0V

2µs/DIV 2µs/DIV 2µs/DIV

610912 G15 610912 G16 610912 G17

610912fa

6
 LT6109-1/LT6109-2
TYPICAL

+
PERFORMANCE
+
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)

Comparator Threshold Comparator Threshold

Distribution vs Temperature Hysteresis Distribution
25 408 30
5 TYPICAL PARTS
406
25

COMPARATOR THRESHOLD (mV)

20

PERCENTAGE OF UNITS (%)

PERCENTAGE OF UNITS (%)

404
–40°C 25°C 125°C
20
402
15
400 15

10 398
10
396
5 5
394

0 392 0
396 397.6 399.2 400.8 402.8 404 –40 –25 –10 5 20 35 50 65 80 95 110 125 3.0 4.6 6.2 7.7 9.3 10.9 12.5 14.1 15.7 17.3
COMPARATOR THRESHOLD (mV) TEMPERATURE (°C) COMPARATOR HYSTERESIS (mV)
610912 G19 610912 G20 610912 G21

Hysteresis vs Temperature Hysteresis vs Supply Voltage EN/RST Current vs Voltage

20 14 50
5 TYPICAL PARTS
18
12
COMPARATOR HYSTERESIS (mV)

0
COMPARATOR HYSTERESIS (mV)

16
14 10 EN/RST CURRENT (nA)
–50
12
8
10 –100
8 6

6 –150
4
4
–200
2
2
0 0 –250
–40 –25 –10 5 20 35 50 65 80 95 110 125 0 10 20 30 40 50 60 0 10 20 30 40 50 60
TEMPERATURE (°C) V+ (V) EN/RST VOLTAGE (V)
610912 G22 610912 G23 610912 G24

Comparator Input Bias Current Comparator Input Bias Current Comparator Output Low Voltage
vs Input Voltage vs Input Voltage vs Output Sink Current
10 10 1.00
125°C
COMPARATOR INPUT BIAS CURRENT (nA)

COMPARATOR INPUT BIAS CURRENT (nA)

25°C
5 5 –40°C
0.75
VOLOUTC1, OUTC2 (V)

0 0

–5 –5 0.50

–10 –10
0.25
–15 125°C –15 125°C
25°C 25°C
–40°C –40°C
–20 –20 0
0 20 40 60 0 0.2 0.4 0.6 0.8 1.0 0 1 2 3
COMPARATOR INPUT VOLTAGE (V) COMPARATOR INPUT VOLTAGE (V) IOUTC (mA)
610912 G25 610912 G26 610912 G27

610912fa

7
LT6109-1/LT6109-2
TYPICAL

+
PERFORMANCE
+
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)

Comparator Output Leakage Comparator Propagation Delay Comparator Rise/Fall Time

Current vs Pull-Up Voltage vs Input Overdrive vs Pull-Up Resistor
23 5.0 10000
VOH = 0.9 • VPULLUP
OUTC1, OUTC2 LEAKAGE CURRENT (nA)

COMPARATOR PROPAGATION DELAY (µs)

4.5 VOL = 0.1 • VPULLUP
100mV INC1 OVERDRIVE
18 4.0
CL = 2pF
125°C 3.5 RISE TIME

RISE/FALL TIME (ns)

1000
13 3.0
2.5
8 2.0
H TO L 100 FALL TIME
1.5
3 1.0
–40°C AND 25°C
0.5 L TO H
–2 0 10
0 10 20 30 40 50 60 0 40 80 120 160 200 1 10 100 1000
COMPARATOR OUTPUT PULL-UP VOLTAGE (V) COMPARATOR INPUT OVERDRIVE (mV) RC PULL-UP RESISTOR (kΩ)
610912 G28 610912 G29 610912 G30

Comparator Step Response Comparator Step Response

(5mV INC1 Overdrive) (100mV INC1 Overdrive) Comparator Reset Response

VINC VINC
0.5V/DIV 0.5V/DIV
0V 0V VOUTC
5V/DIV
0V
VOUTC
VOUTC 2V/DIV
2V/DIV
0V 0V

VEN/RST
VEN/RST VEN/RST 2V/DIV
5V/DIV 5V/DIV
0V
0V 0V

5µs/DIV 5µs/DIV 5µs/DIV

610912 G31 610912 G32 610912 G33

PIN FUNCTIONS
SENSELO (Pin 1): Sense Amplifier Input. This pin must OUTC2 (Pin 3): Open-Drain Comparator 2 Output. Off-
be tied to the load end of the sense resistor. state voltage may be as high as 60V above V–, regardless
of V+ used.
EN/RST (Pin 2): Enable and Latch Reset Input. When the
EN/RST pin is pulled high the LT6109 is enabled. When the OUTC1 (Pin 4): Open-Drain Comparator 1 Output. Off-
EN/RST pin is pulled low for longer than typically 40µs, state voltage may be as high as 60V above V–, regardless
the LT6109 will enter the shutdown mode. Pulsing this pin of V+ used.
low for between 2µs and 15µs will reset the comparators V– (Pin 5): Negative Supply Pin. This pin is normally con-
of the LT6109. nected to ground.

610912fa

8
 LT6109-1/LT6109-2
PIN FUNCTIONS
INC1 (Pin 6): This is the inverting input of comparator 1. V+ (Pin 9): Positive Supply Pin. The V+ pin can be con-
The second input of this comparator is internally connected nected directly to either side of the sense resistor, RSENSE.
to the 400mV reference. When V+ is tied to the load end of the sense resistor, the
SENSEHI pin can go up to 0.2V above V+. Supply current
INC2 (Pin 7): This is the input of comparator 2. For the
is drawn through this pin.
LT6109-1 this is the noninverting input of comparator 2.
For the LT6109-2 this is the inverting input of compara- SENSEHI (Pin 10): Sense Amplifier Input. The internal
tor 2. The second input of each of these comparators is sense amplifier will drive SENSEHI to the same potential
internally connected to the 400mV reference. as SENSELO. A resistor (typically RIN) tied from supply
to SENSEHI sets the output current, IOUT = VSENSE/RIN,
OUTA (Pin 8): Current Output of the Sense Amplifier. This
where VSENSE is the voltage developed across RSENSE.
pin will source a current that is equal to the sense voltage
divided by the external gain setting resistor, RIN.

BLOCK DIAGRAMS
9
LT6109-1 V+

100Ω

SENSEHI 3k 34V 6V
10 –
SENSELO 3k
1 + OUTA
8
V–
V–
V– V+

200nA
EN/RST ENABLE AND
2
RESET TIMING

RESET
V+

+ INC2
7
OUTC2 UNDERCURRENT FLAG
3
–

V– 400mV
V+ REFERENCE

+
OVERCURRENT FLAG
OUTC1
4
– INC1
6

V–
5
610912 F01

Figure 1. LT6109-1 Block Diagram (Comparators with Opposing Polarity)

610912fa

9
LT6109-1/LT6109-2
BLOCK DIAGRAMS
9
LT6109-2 V+

100Ω

SENSEHI 3k 34V 6V
10 –
SENSELO 3k
1 + OUTA
8
V–
V–
V– V+

200nA
EN/RST ENABLE AND
2
RESET TIMING

RESET
V+

– INC2
7
OUTC2 OVERCURRENT FLAG
3
+

V– 400mV
V+ REFERENCE

+
OVERCURRENT FLAG
OUTC1
4
– INC1
6

V–
5
610912 F02

Figure 2. LT6109-2 Block Diagram (Comparators with the Same Polarity)

APPLICATIONS INFORMATION
The LT6109 high side current sense amplifier provides Amplifier Theory of Operation
accurate monitoring of currents through an external sense
An internal sense amplifier loop forces SENSEHI to have
resistor. The input sense voltage is level-shifted from the
the same potential as SENSELO as shown in Figure 3.
sensed power supply to a ground referenced output and
Connecting an external resistor, RIN, between SENSEHI
is amplified by a user-selected gain to the output. The and VSUPPLY forces a potential, VSENSE, across RIN. A
output voltage is directly proportional to the current flow- corresponding current, IOUTA, equal to VSENSE/RIN, will
ing through the sense resistor. flow through RIN. The high impedance inputs of the sense
The LT6109 comparators have a threshold set with a built-in amplifier do not load this current, so it will flow through
400mV precision reference and have 10mV of hysteresis. an internal MOSFET to the output pin, OUTA.
The open-drain outputs can be easily used to level shift
to digital supplies.
610912fa

10
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
The output current can be transformed back into a voltage voltage be 100mV. If this application is expected to draw
by adding a resistor from OUTA to V–(typically ground). 2A at peak load, RSENSE should be set to 50mΩ.
The output voltage is then: Once the maximum RSENSE value is determined, the mini-
VOUT = V– + IOUTA • ROUT mum sense resistor value will be set by the resolution or
where ROUT = R1 + R2 + R3 as shown in Figure 3. dynamic range required. The minimum signal that can be
accurately represented by this sense amplifier is limited by
Table 1. Example Gain Configurations the input offset. As an example, the LT6109 has a maximum
GAIN RIN ROUT VSENSE FOR VOUT = 5V IOUTA AT VOUT = 5V input offset of 125µV. If the minimum current is 20mA, a
20 499Ω 10k 250mV 500µA sense resistor of 6.25mΩ will set VSENSE to 125µV. This is
50 200Ω 10k 100mV 500µA the same value as the input offset. A larger sense resistor
100 100Ω 10k 50mV 500µA will reduce the error due to offset by increasing the sense
voltage for a given load current. Choosing a 50mΩ RSENSE
Useful Equations will maximize the dynamic range and provide a system
Input Voltage: VSENSE = ISENSE •RSENSE that has 100mV across the sense resistor at peak load
(2A), while input offset causes an error equivalent to only
VOUT R
Voltage Gain: = OUT 2.5mA of load current.
VSENSE RIN
In the previous example, the peak dissipation in RSENSE
I R is 200mW. If a 5mΩ sense resistor is employed, then
Current Gain: OUTA = SENSE
ISENSE RIN the effective current error is 25mA, while the peak sense
voltage is reduced to 10mV at 2A, dissipating only 20mW.
Note that VSENSE(MAX) can be exceeded without damag-
ing the amplifier, however, output accuracy will degrade The low offset and corresponding large dynamic range of
as VSENSE exceeds VSENSE(MAX), resulting in increased the LT6109 make it more flexible than other solutions in this
output current, IOUTA. respect. The 125µV maximum offset gives 72dB of dynamic
range for a sense voltage that is limited to 500mV max.
Selection of External Current Sense Resistor
Sense Resistor Connection
The external sense resistor, RSENSE, has a significant effect
on the function of a current sensing system and must be Kelvin connection of the SENSEHI and SENSELO inputs
chosen with care. to the sense resistor should be used in all but the lowest
power applications. Solder connections and PC board
First, the power dissipation in the resistor should be interconnections that carry high currents can cause sig-
considered. The measured load current will cause power nificant error in measurement due to their relatively large
dissipation as well as a voltage drop in RSENSE. As a resistances. One 10mm × 10mm square trace of 1oz copper
result, the sense resistor should be as small as possible is approximately 0.5mΩ. A 1mV error can be caused by as
while still providing the input dynamic range required by little as 2A flowing through this small interconnect. This
the measurement. Note that the input dynamic range is will cause a 1% error for a full-scale VSENSE of 100mV.
the difference between the maximum input signal and the A 10A load current in the same interconnect will cause
minimum accurately reproduced signal, and is limited a 5% error for the same 100mV signal. By isolating the
primarily by input DC offset of the internal sense ampli- sense traces from the high current paths, this error can
fier of the LT6109. To ensure the specified performance, be reduced by orders of magnitude. A sense resistor with
RSENSE should be small enough that VSENSE does not integrated Kelvin sense terminals will give the best results.
exceed VSENSE(MAX) under peak load conditions. As an Figure 3 illustrates the recommended method for connect-
example, an application may require the maximum sense ing the SENSEHI and SENSELO pins to the sense resistor.

610912fa

11
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
VSUPPLY

+ RIN
RSENSE VSENSE LT6109-1
– 1 SENSELO SENSEHI 10

LOAD + –
V C1
ISENSE = SENSE
RSENSE V– V+ 9
V+

2 EN/RST
VRESET OUTA 8
VPULLUP VOUT
V+ IOUTA
R3* CL
+ INC2 7
RC
UNDERCURRENT 3 OUTC2
FLAG
CLC –

V– 400mV R2*
RC
V+ REFERENCE

+
OVERCURRENT 4 OUTC1
FLAG
CLC – INC1 6
5
V–
R1*
V–
610912 F03
*ROUT = R1 + R2 + R3

Figure 3. LT6109-1 Typical Connection

Selection of External Input Gain Resistor, RIN V+

RIN should be chosen to allow the required speed and

RSENSE DSENSE
resolution while limiting the output current to 1mA. The
maximum value for RIN is 1k to maintain good loop sta- 610912 F04

LOAD
bility. For a given VSENSE, larger values of RIN will lower
power dissipation in the LT6109 due to the reduction Figure 4. Shunt Diode Limits Maximum Input Voltage to Allow
in IOUT while smaller values of RIN will result in faster Better Low Input Resolution Without Overranging
response time due to the increase in IOUT . If low sense
currents must be resolved accurately in a system that has Care should be taken when designing the board layout for
a very wide dynamic range, a smaller RIN may be used RIN, especially for small RIN values. All trace and inter-
if the maximum IOUTA current is limited in another way, connect resistances will increase the effective RIN value,
such as with a Schottky diode across RSENSE (Figure 4). causing a gain error.
This will reduce the high current measurement accuracy
The power dissipated in the sense resistor can create a
by limiting the result, while increasing the low current
thermal gradient across a printed circuit board and con-
measurement resolution.
sequently a gain error if RIN and ROUT are placed such
This approach can be helpful in cases where occasional that they operate at different temperatures. If significant
bursts of high currents can be ignored. power is being dissipated in the sense resistor then care

610912fa

12
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
should be taken to place RIN and ROUT such that the gain In this case, the only error is due to external resistor
error due to the thermal gradient is minimized. mismatch, which provides an error in gain only. However,
offset voltage, input bias current and finite gain in the
Selection of External Output Gain Resistor, ROUT amplifier can cause additional errors:
The output resistor, ROUT , determines how the output cur-
rent is converted to voltage. VOUT is simply IOUTA • ROUT . Output Voltage Error, ∆VOUT(VOS), Due to the Amplifier
DC Offset Voltage, VOS
Typically, ROUT is a combination of resistors configured
as a resistor divider which has voltage taps going to the ROUT
comparator inputs to set the comparator thresholds. ∆VOUT(VOS) = VOS •
RIN

In choosing an output resistor, the maximum output volt-
age must first be considered. If the subsequent circuit is a The DC offset voltage of the amplifier adds directly to the
buffer or ADC with limited input range, then ROUT must be value of the sense voltage, VSENSE. As VSENSE is increased,
chosen so that IOUTA(MAX) • ROUT is less than the allowed accuracy improves. This is the dominant error of the system
maximum input range of this circuit. and it limits the available dynamic range.

In addition, the output impedance is determined by ROUT . Output Voltage Error, ∆VOUT(IBIAS), Due to the Bias
If another circuit is being driven, then the input impedance Currents IB+ and IB–
of that circuit must be considered. If the subsequent circuit
The amplifier bias current IB+ flows into the SENSELO pin
has high enough input impedance, then almost any use-
while IB– flows into the SENSEHI pin. The error due to IB
ful output impedance will be acceptable. However, if the
is the following:
subsequent circuit has relatively low input impedance, or
draws spikes of current such as an ADC load, then a lower  R 
output impedance may be required to preserve the accuracy ∆VOUT(IBIAS) = ROUT  IB+ • SENSE –IB–
 RIN 
of the output. More information can be found in the Output
Filtering section. As an example, if the input impedance of Since IB+ ≈ IB– = IBIAS, if RSENSE << RIN then,
the driven circuit, RIN(DRIVEN), is 100 times ROUT, then the
accuracy of VOUT will be reduced by 1% since: ∆VOUT(IBIAS) = –ROUT (IBIAS)

ROUT •RIN(DRIVEN) It is useful to refer the error to the input:

VOUT = IOUTA • ∆VVIN(IBIAS) = –RIN (IBIAS)
ROUT +RIN(DRIVEN)
100 For instance, if IBIAS is 100nA and RIN is 1k, the input re-
= IOUTA •ROUT • = 0.99 •IOUTA •ROUT ferred error is 100µV. This error becomes less significant
101
as the value of RIN decreases. The bias current error can
be reduced if an external resistor, RIN+, is connected as
Amplifier Error Sources
shown in Figure 5, the error is then reduced to:
The current sense system uses an amplifier and resistors
VOUT(IBIAS) = ±ROUT • IOS; IOS = IB+ – IB–
to apply gain and level-shift the result. Consequently, the
output is dependent on the characteristics of the amplifier, Minimizing low current errors will maximize the dynamic
such as gain error and input offset, as well as the matching range of the circuit.
of the external resistors.
Ideally, the circuit output is:
ROUT
VOUT = VSENSE • ; VSENSE = RSENSE •ISENSE
RIN

610912fa

13
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
V+ There is also power dissipated due to the quiescent power
9
V+
supply current:
LT6109
VBATT
PS = IS • V+
RIN 10 SENSEHI –
The comparator output current flows into the comparator
output pin and out of the V– pin. The power dissipated in
RSENSE
1 SENSELO + OUTA 8
VOUT
RIN+ ROUT
the LT6109 due to each comparator is often insignificant
V–
ISENSE
5 610912 F05
and can be calculated as follows:
POUTC1,C2 = (VOUTC1,C2 – V–) • IOUTC1,C2
Figure 5. RIN+ Reduces Error Due to IB
The total power dissipated is the sum of these
dissipations:
Output Voltage Error, ∆VOUT(GAIN ERROR), Due to
External Resistors PTOTAL = POUTA + POUTC1 + POUTC2 + PS
The LT6109 exhibits a very low gain error. As a result, At maximum supply and maximum output currents, the
the gain error is only significant when low tolerance total power dissipation can exceed 100mW. This will
resistors are used to set the gain. Note the gain error is cause significant heating of the LT6109 die. In order to
systematically negative. For instance, if 0.1% resistors prevent damage to the LT6109, the maximum expected
are used for RIN and ROUT then the resulting worst-case dissipation in each application should be calculated. This
gain error is –0.4% with RIN = 100Ω. Figure 6 is a graph number can be multiplied by the θJA value, 160°C/W, to
of the maximum gain error which can be expected versus find the maximum expected die temperature. Proper heat
the external resistor tolerance. sinking and thermal relief should be used to ensure that
10
the die temperature does not exceed the maximum rating.

Output Filtering
RESULTING GAIN ERROR (%)

1
The AC output voltage, VOUT, is simply IOUTA • ZOUT. This
RIN = 100Ω makes filtering straightforward. Any circuit may be used
which generates the required ZOUT to get the desired filter
0.1
RIN = 1k response. For example, a capacitor in parallel with ROUT
will give a lowpass response. This will reduce noise at the
output, and may also be useful as a charge reservoir to
keep the output steady while driving a switching circuit
0.01
0.01 0.1 1 10 such as a MUX or ADC. This output capacitor in parallel
RESISTOR TOLERANCE (%)
610912 F06
with ROUT will create an output pole at:
Figure 6. Gain Error vs Resistor Tolerance 1
f –3dB =
2 • π •ROUT • CL
Output Current Limitations Due to Power Dissipation
The LT6109 can deliver a continuous current of 1mA to the SENSELO, SENSEHI Range
OUTA pin. This current flows through RIN and enters the
The difference between VBATT (see Figure 7) and V+, as
current sense amplifier via the SENSEHI pin. The power
well as the maximum value of VSENSE, must be considered
dissipated in the LT6109 due to the output signal is:
to ensure that the SENSELO pin doesn’t exceed the range
POUT = (VSENSEHI – VOUTA) • IOUTA listed in the Electrical Characteristics table. The SENSELO
Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA and SENSEHI pins of the LT6109 can function from 0.2V
610912fa

14
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
above the positive supply to 33V below it. These operat-
ing voltages are limited by internal diode clamps shown 60

in Figures 1 and 2. On supplies less than 35.5V, the lower

range is limited by V– + 2.5V. This allows the monitored 50

ALLOWABLE OPERATING VOLTAGES ON

SENSELO AND SENSEHI INPUTS (V)
supply, VBATT , to be separate from the LT6109 positive
40.2V
supply as shown in Figure 7. Figure 8 shows the range of 40

operating voltages for the SENSELO and SENSEHI inputs, VALID SENSELO/
SENSEHI RANGE
for different supply voltage inputs (V+). The SENSELO and 30
27
SENSEHI range has been designed to allow the LT6109 to
monitor its own supply current (in addition to the load), 20 20.2V

as long as VSENSE is less than 200mV. This is shown in

Figure 9. 10

2.8V
Minimum Output Voltage 2.5V
2.7 10 20 30 35.5 40 50 60
The output of the LT6109 current sense amplifier can V + (V) 610912 F08

produce a non-zero output voltage when the sense voltage

Figure 8. Allowable SENSELO, SENSEHI Voltage Range
is zero. This is a result of the sense amplifier VOS being
forced across RIN as discussed in the Output Voltage Er-
ror, ∆VOUT(VOS) section. Figure 10 shows the effect of the
input offset voltage on the transfer function for parts at 9
V+
the VOS limits. With a negative offset voltage, zero input VBATT
LT6109

sense voltage produces an output voltage. With a positive RIN 10 SENSEHI –

offset voltage, the output voltage is zero until the input
sense voltage exceeds the input offset voltage. Neglect- RSENSE
1 SENSELO + OUTA 8
ing VOS, the output circuit is not limited by saturation of VOUT
ROUT
pull-down circuitry and can reach 0V. V–
ISENSE
5 610912 F09

Response Time
The LT6109 amplifier is designed to exhibit fast response Figure 9. LT6109 Supply Current Monitored with Load
to inputs for the purpose of circuit protection or current
monitoring. This response time will be affected by the
120
external components in two ways, delay and speed. G = 100

100
V+
OUTPUT VOLTAGE (mV)

9 80
LT6109 V+ VOS = –125µV
VBATT 60
RIN 10 SENSEHI –
40
VOS = 125µV
RSENSE
1 SENSELO + OUTA 8
VOUT
20

ISENSE ROUT
0
V– 0 100 200 300 400 500 600 700 800 900 1000
5 610912 F07
INPUT SENSE VOLTAGE (µV)
610912 F10

Figure 7. V+ Powered Separately from Load Supply (VBATT) Figure 10. Amplifier Output Voltage vs Input Sense Voltage
610912fa

15
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
If the output current is very low and an input transient require a separate system or user to reset the outputs. In
occurs, there may be an increased delay before the applications where the comparator output can intervene
output voltage begins to change. The Typical Performance and disconnect loads from the supply, latched outputs are
Characteristics show that this delay is short and it can required to avoid oscillation. Latching outputs are also
be improved by increasing the minimum output current, useful for detecting problems that are intermittent. The
either by increasing RSENSE or decreasing RIN. Note that comparator outputs on the LT6109 are always latching
the Typical Performance Characteristics are labeled with and there is no way to disable this feature.
respect to the initial sense voltage.
Each of the comparators has one input available externally,
The speed is also affected by the external components. with the two versions of the part differing by the polarity
Using a larger ROUT will decrease the response time, since of those available inputs. The other comparator inputs are
VOUT = IOUTA • ZOUT where ZOUT is the parallel combination connected internally to the 400mV precision reference.
of ROUT and any parasitic and/or load capacitance. Note The input threshold (the voltage which causes the output
that reducing RIN or increasing ROUT will both have the to transition from high to low) is designed to be equal to
effect of increasing the voltage gain of the circuit. If the that of the reference. The reference voltage is established
output capacitance is limiting the speed of the system, RIN with respect to the device V– connection.
and ROUT can be decreased together in order to maintain
the desired gain and provide more current to charge the Comparator Inputs
output capacitance. The comparator inputs can swing from V– to 60V regardless
The response time of the comparators is the sum of the of the supply voltage used. The input current for inputs
propagation delay and the fall time. The propagation well above the threshold is just a few pAs. With decreas-
delay is a function of the overdrive voltage on the input ing input voltage, a small bias current begins to be drawn
of the comparators. A larger overdrive will result in a out of the input near the threshold, reaching 50nA max
lower propagation delay. This helps achieve a fast system when at ground potential. Note that this change in input
response time to fault events. The fall time is affected by bias current can cause a small nonlinearity in the OUTA
the load on the output of the comparator as well as the transfer function if the comparator inputs are coupled to
pull-up voltage. the amplifier output with a voltage divider. For example, if
the maximum comparator input current is 50nA, and the
The LT6109 amplifier has a typical response time of 500ns resistance seen looking out of the comparator input is 1k,
and the comparators have a typical response time of 500ns. then a change in output voltage of 50µV will be seen on the
When configured as a system, the amplifier output drives analog output when the comparator input voltage passes
the comparator input causing a total system response through its threshold. If both comparator inputs are con-
time which is typically greater than that implied by the nected to the output then they must both be considered.
individually specified response times. This is due to the
overdrive on the comparator input being determined by Setting Comparator Thresholds
the speed of the amplifier output.
The comparators have an internal precision 400mV refer-
Internal Reference and Comparators ence. In order to set the trip points of the LT6109-1 com-
parators, the output currents, IOVER and IUNDER, as well
The integrated precision reference and comparators com- as the maximum output current, IMAX, must be calculated:
bined with the high precision current sense allow for rapid
and easy detection of abnormal load currents. This is often VSENSE(OVER) VSENSE(UNDER)
critical in systems that require high levels of safety and IOVER = , IUNDER = ,
RIN RIN
reliability. The LT6109 comparators are optimized for fault
VSENSE(MAX)
detection and are designed with latching outputs. Latch- IMAX =
ing outputs prevent faults from clearing themselves and RIN

610912fa

16
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
where IOVER and IUNDER are the over and under currents 400mV
through the sense resistor which cause the comparators R1=
IOVER
to trip. IMAX is the maximum current through the sense
resistor. 400mV – IUNDER (R1)
R2 =
IUNDER
Depending on the desired maximum amplifier output volt-
age (VMAX) the three output resistors, R1, R2 and R3, can VMAX – IMAX (R1+ R2 )
be configured in two ways. If: R3 = IMAX
 400mV 400mV –IUNDER (R1)  If:
VMAX >  +  IMAX
 IOVER IUNDER   400mV 400mV –IUNDER (R1) 
VMAX <  +  IMAX
then use the configuration shown in Figure 3. The desired  IOVER IUNDER 
trip points and full-scale analog output voltage for the then use the configuration shown in Figure 11.
circuit in Figure 3 can then be achieved using the follow-
ing equations:

VSUPPLY

+ RIN
RSENSE VSENSE LT6109-1
– 1 SENSELO SENSEHI 10

LOAD + –
V C1
ISENSE = SENSE
RSENSE V– V+ 9
V+

2 EN/RST
VRESET OUTA 8
VPULLUP
V+ IOUTA CL
+ INC2 7
RC
UNDERCURRENT 3 OUTC2
FLAG
CLC –
R3
V– 400mV
RC VOUT
V+ REFERENCE
R2
+
OVERCURRENT 4 OUTC1
FLAG
CLC – INC1 6
5
V–
R1
V–
610912 F11

Figure 11. Typical Configuration with Alternative ROUT Configuration

610912fa

17
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
The desired trip points and full-scale analog output voltage OUTC1
(LT6109-1/LT6109-2)
for the circuit in Figure 13 can be achieved as follows: OUTC2
(LT6109-2)
400mV OUTC2
R1= (LT6109-1)
INCREASING
VINC1,2
IOVER
VHYS VHYS
VMAX – IMAX (R1)
610912 F12

VTH
R2 =
IMAX
Figure 12. Comparator Output Transfer Characteristics
400mV – IUNDER (R1+ R2 )
R3 =
IUNDER ing input thresholds, VTH (the actual internal threshold
Trip points for the LT6109-2 can be set by replacing IUNDER remains unaffected).
with a second overcurrent, IOVER2. Figure 13 shows how to add additional hysteresis to a
noninverting comparator.
Hysteresis
R6 can be calculated from the extra hysteresis being added,
Each comparator has a typical built-in hysteresis of 10mV VHYS(EXTRA) and the amplifier output current which you
to simplify design, ensure stable operation in the pres- want to cause the comparator output to trip, IUNDER. Note
ence of noise at the inputs, and to reject supply noise that that the hysteresis being added, VHYS(EXTRA), is in addition
might be induced by state change load transients. The to the typical 10mV of built-in hysteresis.
hysteresis is designed such that the threshold voltage is
altered when the output is transitioning from low to high 400mV – VHYS(EXTRA)
R6 =
as is shown in Figure 12. IUNDER

External positive feedback circuitry can be employed
to increase the effective hysteresis if desired, but such R1 should be chosen such that R1 >> R6 so that VOUTA
circuitry will have an effect on both the rising and fall- does not change significantly when the comparator trips.

V+
9
LT6109-1 V+

V+
RIN
10 SENSEHI –
RSENSE
1 SENSELO + OUTA 8
ILOAD
V– V+
V+ R5
+ INC2 7 R1 VTH
R3
3 OUTC2
R6
– 400mV
REFERENCE

V–
5
R2
610912 F13

Figure 13. Noninverting Comparator with Added Hysteresis

610912fa

18
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
R3 should be chosen to allow sufficient VOL and compara- In the previous example, this is an error of 4.3mV at the
tor output rise time due to capacitive loading. output of the amplifier or 43µV at the input of the amplifier
R2 can be calculated: assuming a gain of 100.

R2 =
( )(
R1• V + – 400mV – VHYS(EXTRA) •R3 )
When using the comparators with their inputs decoupled
from the output of the amplifier, they may be driven directly
VHYS(EXTRA) by a voltage source. It is useful to know the threshold

voltage equations with the additional hysteresis. The input
For very large values of R2 PCB related leakage may falling edge threshold which causes the output to transition
become an issue. A tee network can be implemented to from high to low is:
reduce the required resistor values.
 1 1   V + •R1 
The approximate total hysteresis will be: VTH(F) = 400mV •R1•  + –
 R1 R2 +R3   R2 +R3 

 V + – 400mV 
VHYS = 10mV +R1•   The input rising edge threshold which causes the output
 R2 +R3  to transition from low to high is:
For example, to achieve IUNDER = 100µA with 50mV of  1 1
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 = VTH(R) = 410mV •R1•  + 
 R1 R2 
10k and V+ = 5V results in R2 = 4.12M.
The analog output voltage will also be affected when the Figure 14 shows how to add additional hysteresis to an
comparator trips due to the current injected into R6 by inverting comparator.
the positive feedback. Because of this, it is desirable to R7 can be calculated from the amplifier output current which
have (R1 + R2 + R3) >> R6. The maximum VOUTA error is required to cause the comparator output to trip, IOVER.
caused by this can be calculated as:
400mV
 + R6  R7 = , Assuming (R1+R2) >> R7
∆VOUTA = V •  IOVER
 R1+R2 +R3 +R6 

V+
9
LT6109-1 V+

V+
RIN
10 SENSEHI –
RSENSE
1 SENSELO + OUTA 8
ILOAD
V– V+ R6
V+
– INC1 6 R1 VTH
R3
4 OUTC1
R7
+ 400mV
REFERENCE

V–
VDD 5
R2
610912 F14

Figure 14. Inverting Comparator with Added Hysteresis

610912fa

19
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
To ensure (R1 + R2) >> R7, R1 should be chosen such The input falling edge threshold which causes the output
that R1 >> R7 so that VOUTA does not change significantly to transition from low to high is:
when the comparator trips.
 R1  R1
R3 should be chosen to allow sufficient VOL and compara- VTH(F) = 390mV •  1+  – VDD  
 R2   R2 
tor output rise time due to capacitive loading.

R2 can be calculated: Comparator Outputs

 V – 390mV  The comparator outputs can maintain a logic low level of
R2 = R1•  DD  150mV while sinking 500µA. The outputs can sink higher
 VHYS(EXTRA)  currents at elevated VOL levels as shown in the Typical

Performance Characteristics. Load currents are conducted
Note that the hysteresis being added, VHYS(EXTRA), is in
to the V– pin. The output off-state voltage may range
addition to the typical 10mV of built-in hysteresis. For very between 0V and 60V with respect to V–, regardless of the
large values of R2 PCB related leakage may become an supply voltage used. As with any open-drain device, the
issue. A tee network can be implemented to reduce the outputs may be tied together to implement wire-OR logic
required resistor values. functions. The LT6109-1 can be used as a single-output
The approximate total hysteresis is: window comparator in this way.
 V – 390mV  EN/RST Pin
VHYS = 10mV +R1•  DD 
 R2
The EN/RST pin performs the two functions of resetting
For example, to achieve IOVER = 900µA with 50mV of total the latch on the comparators as well as shutting down the
hysteresis, R7 = 442Ω. Choosing R1 = 4.42k, R3 = 10k LT6109. After powering on the LT6109, the comparators
and VDD = 5V results in R2 = 513k. must be reset in order to guarantee a valid state at their
outputs.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R7 by Applying a pulse to the EN/RST pin will reset the compara-
the positive feedback. Because of this, it is desirable to tors from their tripped state as long as the input on the
have (R1 + R2) >> R7. The maximum VOUTA error caused comparator is below the threshold and hysteresis for an
by this can be calculated as: inverting comparator or above the threshold and hysteresis
for a noninverting comparator. For example, if VINC1 is
 R7  pulled higher than 400mV and latches the comparator, a
∆VOUTA = VDD • 
 R1+R2+R7  reset pulse will not reset that comparator unless its input

is held below the threshold by a voltage greater than the
In the previous example, this is an error of 4.3mV at the 10mV typical hysteresis. The comparator outputs typically
output of the amplifier or 43µV at the input of the amplifier unlatch in 0.5µs with 2pF of capacitive load. Increased
assuming a gain of 100. capacitive loading will cause increased unlatch time.
When using the comparators with their inputs decoupled Figure 15 shows the reset functionality of the EN/RST
from the output of the amplifier they may be driven directly pin. The width of the pulse applied to reset the compara-
by a voltage source. It is useful to know the threshold tors must be greater than tRPW(MIN) (2µs) but less than
voltage equations with additional hysteresis. The input tRPW(MAX) (15µs). Applying a pulse that is longer than
rising edge threshold which causes the output to transi- 40µs typically (or tying the pin low) will cause the part
tion from high to low is: to enter shutdown. Once the part has entered shutdown,
 R1 the supply current will be reduced to 3µA typically and the
VTH(R) = 400mV •  1+ 
 R2  amplifier, comparators and reference will cease to function

610912fa

20
 LT6109-1/LT6109-2
APPLICATIONS INFORMATION
until the EN/RST pin is transitioned high. When the part on VOUTA. Circuitry connected to OUTA can be protected
is disabled, both the amplifier and comparator outputs from these transients by using an external diode to clamp
are high impedance. VOUTA or a capacitor to filter VOUTA.
When the EN/RST pin is transitioned from low to high Power Up
to enable the part, the amplifier output PMOS can turn
on momentarily causing typically 1mA of current to flow After powering on the LT6109, the comparators must be
into the SENSEHI pin and out of the OUTA pin. Once the reset in order to guarantee a valid state at their outputs.
amplifier is fully on, the output will go to the correct cur- Fast supply ramps may cause a supply current transient
rent. Figure 16 shows this behavior and the impact it has during start-up as shown in the Typical Performance
Characteristics. This current can be lowered by reducing
RESET PULSE WIDTH LIMITS
COMPARATOR
the edge speed of the supply.
EN/RST RESET
tRPW(MIN)
2µs
Reverse-Supply Protection
tRPW(MAX)
15µs
The LT6109 is not protected internally from external rever-
sal of supply polarity. To prevent damage that may occur
OUTC1 610912 F15

OUTC2 during this condition, a Schottky diode should be added

tRESET in series with V— (Figure 17). This will limit the reverse
0.5µs (TYPICAL)
current through the LT6109. Note that this diode will limit
Figure 15. Comparator Reset Functionality the low voltage operation of the LT6109 by effectively
reducing the supply voltage to the part by VD.
V+ = 60V
RIN = 100Ω Also note that the comparator reference, comparator output
and EN/RST input are referenced to the V– pin. In order to
ROUT = 10k

VEN/RST
2V/DIV preserve the precision of the reference and to avoid driving
the comparator inputs below V–, R2 must connect to the
0V
V– pin. This will shift the amplifier output voltage up by
VOUTA VD. VOUTA can be accurately measured differentially across
2V/DIV
R1 and R2. The comparator output low voltage will also be
shifted up by VD. The EN/RST pin threshold is referenced
0V
to the V– pin. In order to provide valid input levels to the
50µs/DIV LT6109 and avoid driving EN/RST below V– the negative
610912 F14
supply of the driving circuit should be tied to V–.
Figure 16. Amplifier Enable Response

610912fa

21
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
V+
9
LT6109-1 V+

V+
RIN
10 SENSEHI –
RSENSE
1 SENSELO + OUTA 8
VDD ILOAD +
VDD V– V+ R1
R3
4 OUTC – INC 6
VOUTA

R2
+ 400mV –
VDD REFERENCE
2
EN/RST
V–
5
+ 610912 F17

VD
–

Figure 17. Schottky Prevents Damage During Supply Reversal

TYPICAL APPLICATIONS
Overcurrent and Undervoltage Battery Fault Protection

12 LITHIUM
40V CELL STACK
IRF9640
0.1Ω TO
LOAD
+ 10µF 1M R10 100k 6.2V*
+ INC2 100Ω
10 1
+ 0.1µF 13.3k SENSEHI SENSELO
9 8
V+ OUTA VOUT
0.8A
5V
+ LT6109-1 OVERCURRENT 9.53k
2 6 DETECTION
10k RESET EN/RST INC1
4 100k
OUTC1 475Ω
3 7
OUTC2 INC2 30V 2N7000
V– UNDERVOLTAGE
5 DETECTION

6109 TA02

*CMH25234B

The comparators monitor for overcurrent and undervolt- The latching comparator outputs ensure the battery stays
age conditions. If either fault condition is detected the disconnected from the load until an outside source resets
battery will immediately be disconnected from the load. the LT6109 comparator outputs.

610912fa

22
 LT6109-1/LT6109-2
TYPICAL APPLICATIONS
MCU Interfacing with Hardware Interupts

0.1Ω
V+ TO LOAD Example:
100Ω 5V
OUTC2 GOES LOW
10 1 0V
SENSEHI SENSELO
9 8 VOUT
V+ OUTA
ADC IN
AtMega1280 5V
5 LT6109-1 MCU INTERUPT
PB0 2k
6 RESET 2 7
PB1 10k EN/RST INC2
7 3
PCINT2 OUTC2 6.65k
2 4 6 UNDERCURRENT ROUTINE
PCINT3 5V OUTC1 INC1
3 V–
ADC2 VOUT/ADC IN 1.33k
1 10k
PB5 5
6109 TA03 RESET COMPARATORS
610912 TA03b

The comparators are set to have a 50mA undercurrent will receive the comparator outputs as hardware interrupts
threshold and a 300mA overcurrent threshold. The MCU and immediately run an appropriate fault routine.

Simplified DC Motor Torque Control

VMOTOR

100µF
1k
0.1Ω

SENSEHI SENSELO
CURRENT SET POINT (0V TO 5V) BRUSHED
V+ OUTA VOUT
1µF DC MOTOR
0.47µF
LT6109 100k (0A TO 5A) 1N5818
5.62k 5V MABUCHI
RESET EN/RST INC2 RS-540SH
5
OUTC2 3.4k 2 – 4 V+
6 1 6
OUTC1 INC1 3 + MOD OUT IRF640
V– 1k 7
LTC6246
LTC6992-1
100k
78.7k 3 4
SET DIV 5V
GND 280k
1M
2
610912 TA04

The figure shows a simplified DC motor control circuit. feedback to a difference amplifier that controls the current
The circuit controls motor current, which is proportional in the motor. The LTC®6992 is used to convert the output
to motor torque; the LT6109 is used to provide current of the difference amp to the motors PWM control signal.

610912fa

23
LT6109-1/LT6109-2
TYPICAL APPLICATIONS
Power-On Reset or Disconnect Using a TimerBlox® Circuit

5V
9
LT6109-1 V+

RIN V+
100Ω 10 SENSEHI –

RSENSE
1 SENSELO + OUTA 8

ILOAD –
V R1
V+ 8.06k
INC2 7
R5 +
10k 3 OUTC2

–
R4 V– 400mV R2
10k V+ REFERENCE 1.5k
5V
+
4 OUTC1
R8 CREATES A DELAYED
30k Q1 C1 10µs RESET PULSE INC1 6
2N2222 0.1µF ON START-UP –
2 EN/RST R3
TRIG OUT 499Ω
OPTIONAL: R7 LTC6993-3
DISCHARGES C1 V–
WHEN SUPPLY
1M GND V+
5 610912 TA06

IS DISCONNECTED
SET DIV
R6
487k

The LTC6993-1 provides a 10µS reset pulse to the LT6109‑1. ground are restored, capacitor C1 can fully recharge and
The reset pulse is delayed by R7 and C1 whose time constant trigger the LTC6993-3 to produce another comparator reset
must be greater than 10ms and longer than the supply pulse. These optional components are particularly useful
turn-on time. Optional components R8 and Q1 discharge if the power and/or ground connections are intermittent,
capacitor C1 when the supply and/or ground are discon- as can occur when PCB are plugged into a connector.
nected. This ensures that when the power supply and/or

610912fa

24
 LT6109-1/LT6109-2
TYPICAL APPLICATIONS
Precision Power-On Reset Using a TimerBlox® Circuit

5V
9
LT6109-1 V+

RIN V+
100Ω 10 SENSEHI –

RSENSE
1 SENSELO + OUTA 8

ILOAD
V– R1
V+ 8.06k
INC2 7
R5 +
10k 3 OUTC2

–
R4 V– 400mV R2
10k V+ REFERENCE 1.5k
R8
100k +
4 OUTC1
1 SECOND DELAY 10µs RESET PULSE INC1 6
ON START-UP GENERATOR –
2 EN/RST R3
TRIG OUT TRIG OUT 499Ω
C1 LTC6994-1 LTC6993-1
0.1µF
GND V+ GND V+
C2 V–
R6
1M 0.1µF 5 610912 TA07

SET DIV SET DIV

R7 R5 R4
191k 681k 487k

610912fa

25
LT6109-1/LT6109-2
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)

0.889 ± 0.127
(.035 ± .005)

5.23
(.206) 3.20 – 3.45
MIN (.126 – .136)

3.00 ± 0.102
0.50 (.118 ± .004) 0.497 ± 0.076
0.305 ± 0.038
(.0120 ± .0015) (.0197) (NOTE 3) (.0196 ± .003)
10 9 8 7 6
TYP BSC REF
RECOMMENDED SOLDER PAD LAYOUT

4.90 ± 0.152 3.00 ± 0.102

DETAIL “A” (.193 ± .006) (.118 ± .004)
0.254 (NOTE 4)
(.010)
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006) 1.10 0.86
(.043) (.034)
DETAIL “A” REF
MAX
0.18
(.007)
SEATING
PLANE 0.17 – 0.27 0.1016 ± 0.0508
(.007 – .011) (.004 ± .002)
0.50
TYP MSOP (MS) 0307 REV E
NOTE: (.0197)
1. DIMENSIONS IN MILLIMETER/(INCH) BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

610912fa

26
 LT6109-1/LT6109-2
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 12/12 Addition of A-grade Performance and Electrical Characteristics 1, 3, 4, 11, 13, 15 (Fig10), 28
Correction to Typical Application diagram 1
Addition of A-grade Order Information 2
Clarification to Absolute Maximum Short Circuit Duration 2
Edits to Electrical Characteristics conditions and notes 3, 4
Clarification to nomenclature used in Typical Performance Characteristics 5-8
Clarification to Description of Pin Functions 8, 9
Internal Reference Block redrawn for consistency 9, 10, 12, 17, 18, 19, 25, 26
Edits to Applications Information 10-16, 18, 20-25
Addition of LT6108 to Related Parts 28

610912fa

27
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT6109-1/LT6109-2
TYPICAL APPLICATION
ADC Driving Application

SENSE SENSE
HIGH 0.1Ω LOW 0.1µF
IN OUT
VCC VREF
100Ω
COMP
10 1
SENSEHI SENSELO
9 8
V+ OUTA IN+ LTC2470
TO
VCC LT6109-1 0.1µF
2k MCU
VCC RESET 2 7
10k EN/RST INC2
3
10k OUTC2 6.65k
4 6
OUTC1 INC1
V–
1.33k
5
OVERCURRENT
6109 TA05

UNDERCURRENT

The low sampling current of the LTC2470 16-bit delta

sigma ADC is ideal for the LT6109.

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1787 Bidirectional High Side Current Sense Amplifier 2.7V to 60V, 75µV Offset, 60µA Quiescent, 8V/V Gain
LTC4150 Coulomb Counter/Battery Gas Gauge Indicates Charge Quantity and Polarity
LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V, Gain Settings: 10, 12.5, 20, 25, 40, 50V/V
LTC6101 High Voltage High Side Current Sense Amplifier Up to 100V, Resistor Set Gain, 300µV Offset, SOT-23
LTC6102 Zero Drift High Side Current Sense Amplifier Up to 100V, Resistor Set Gain, 10µV Offset, MSOP8/DFN
LTC6103 Dual High Side Current Sense Amplifier 4V to 60V, Resistor Set Gain, 2 Independent Amps, MSOP8
LTC6104 Bidirectional High Side Current Sense Amplifier 4V to 60V, Separate Gain Control for Each Direction, MSOP8
LT6105 Precision Rail-to-Rail Input Current Sense Amplifer –0.3V to 44V Input Range, 300µV Offset, 1% Gain Error
LT6106 Low Cost High Side Current Sense Amplifier 2.7V to 36V, 250µV Offset, Resistor Set Gain, SOT-23
LT6107 High Temperature High Side Current Sense Amplifier 2.7V to 36V, –55°C to 150°C, Fully Tested: –55°C, 25°C, 150°C
LT6108 High Side Current Sense Amplifier with Reference and 2.7V to 60V, 125µV Offset, Resistor Set Gain, ±1.25% Threshold
Comparator Error
LT6700 Dual Comparator with 400mV Reference 1.4V to 18V, 6.5µA Supply Current

610912fa

28 Linear Technology Corporation

LT 1212 REV A • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2011