LAB MANUAL

ANALOG ELECTRONICS LAB

(II B. Tech IV Semester EE)

Subject Code: 4EE7A

Established in year 2000

DEPARTMENT OF ELECTRICAL ENGINEERING

STANI MEMORIAL COLLEGE OF ENGINEERING & TECHNOLOGY,

PHAGI, JAIPUR – 303005

Website: www.smcet.in
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JAIPUR -303005

Analog Electronics Lab ( 4EE7A)

LIST OF EXPERIMENTS

1. Plot gain-frequency characteristics of BJT amplifier with and without negative

feedback in the emitter circuit and determine bandwidths, gain bandwidth products and
gains at 1kHz with and without negative feedback.
2. Study of series and shunt voltage regulators and measurement of line and load
regulation and ripple factor.
3. Plot and study the characteristics of small signal amplifier using FET.
4. Study of push pull amplifier. Measure variation of output power & distortion with load.
5. Study Wein bridge oscillator and observe the effect of variation in R & C on oscillator
frequency
6. Study transistor phase shift oscillator and observe the effect of variation in R & C on
oscillator frequency and compare with theoretical value.
7. Study the following oscillators and observe the effect of variation of C on oscillator
frequency: (a) Hartley (b) Colpitts
8. Design Fabrication and Testing of k-derived filters (LP/HP).
9. Study of a Digital Storage CRO and store a transient on it.
10. To plot the characteristics of UJT and UJT as relaxation.
11. To plot the characteristics of MOSFET and CMOS.

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO: 1

AIM: Plot gain-frequency characteristics of BJT amplifier with and without negative
feedback in the emitter circuit and determine bandwidths, gain bandwidth products and
gains at 1kHz with and without negative feedback.
EQUIPMENTS REQUIRED:
Equipment Specification Quantity
CRO Dual trace 20MHz 1
Function Generator - 1
Feedback Amplifier Kit - 1
Power Supply Regulated -
Connecting Wires - As per required
THEORY:
When a fraction of the output of an amplifier is combined with the input, feedback exists; if the
feedback opposes the original signal, it is negative feedback and if it increases the signal it is
positive feedback. A negative feedback amplifier, or more commonly simply a feedback
amplifier, is an amplifier which uses negative feedback to improve performance and reduce
sensitivity to parameter variations due to manufacturing or environmental uncertainties.
Amplifiers may be classified in four categories:-
1. Voltage Amplifier
2. Current Amplifier
3. Trans-conductance Amplifier
4. Trans-resistance Amplifier
In case of positive feedback if any increase in the output signal results in a feedback which on
being mixed with the input signal causes further increase in the magnitude of the output signal.
In any feedback amplifier we may use either the output voltage sampling or the output current
sampling. In the mixing system we may either use shunt feedback or series feedback.
The following four configurations of feedback are possible:-
1. Voltage Shunt Feedback- This uses output voltage sampling and shunt feedback.

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Analog Electronics Lab ( 4EE7A)

2. Voltage Series Feedback- This uses output voltage sampling and series feedback.
3. Current Shunt Feedback- This uses output current sampling and shunt feedback.
4. Current Series Feedback- This uses output current sampling and series feedback.
CIRCUIT DIAGRAM

Fig. 1.1 Series configuration

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Fig. 1.2 Shunt configuration

FOR VOLTAGE AMPLIFIER:

PRECAUTIONS
1. Do not touch the components on the kit.
2. Properly connect the CRO probe.
3. Properly connect the connecting wire on the kit.

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Analog Electronics Lab ( 4EE7A)

PROCEDURE
1. Apply a sine wave of 20mV peak to peak from a signal generator to the input terminal of
voltage shunt feedback amplifier.
2. Observe the output of voltage shunt feedback amplifier on a CRO by keeping feedback
terminal open.
3. Keeping the signal amplitude constant at 20mV vary the frequency from 1 Hz to 1MHz.
4. Draw the frequency response characteristics by taking gain on y-axis and frequency on x-
axis.
5. Calculate the bandwidth from the graph.
6. Connect the feedback short A and B terminals and now calculate the gain and again draw
frequency response curve.
7. Calculate again the bandwidth with feedback.

OBSERVATION TABLE
Voltage Shunt: i/p = 20mV
(a) Without feedback
Frequency Output(V) Gain (dB)

(b) With feedback:

Frequency Output(V) Gain (dB)

Voltage Series: i/p=20mV

(a) Without feedback
Frequency Output(V) Gain (dB)

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Analog Electronics Lab ( 4EE7A)

(b) With feedback

Frequency Output(V) Gain (dB)

FOR CURRENT AMPLIFIER:

PRECAUTIONS
1. Do not touch the components on the kit.
2. Properly connect the CRO probe.
3. Properly connect the connecting wire on the kit.
PROCEDURE
1. Apply a sine wave of 20 mV to the input of the current series feedback amplifier with
connecting G &H terminals.
2. Keeping the input signal amplitude constant, vary the frequency from 10 Hz to 1MHz.
3. Draw the frequency response characteristics by taking gain on Y-axis and frequency on X-
axis.
4. Calculate the bandwidth from the frequency curve without feedback.
5. Now disconnect G & H terminals to get gain with feedback.
6. In this condition also, calculate the bandwidth.
OBSERVATION TABLE
Current Shunt: i/p=20mV
(a) Without feedback
Frequency Output (V) Gain (dB)

(b) With feedback

Frequency Output (V) Gain (dB)

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Analog Electronics Lab ( 4EE7A)

Current Series:- i/p=20mV

(a) Without feedback
Frequency Output (V) Gain (dB)

(b) With feedback

Frequency Output (V) Gain (dB)

RESULTS
Hence we have studied feedback amplifier and observed the
Gain without feedback = …………..
Gain with feedback = …………..
Bandwidth without feedback = …………..
Bandwidth with feedback = …………..
and found that gain reduces but bandwidth increases due to feedback.
VIVA VOCE
1. What is the advantage of feedback?
2. Differentiate between positive & negative feedback.
3. Where you see feedback application circuit?
4. What is the condition of positive & negative feedback?
5. What is the application of mixer in circuit?

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO. 2

AIM: To Study of series & shunt voltage regulators & measure line & load regulation &
ripple factor
EQUIPMENT REQUIRED:
EQUIPMENT SPECIFICATION QUANTITY

Trainer board - 1

DC Voltmeter 0-30v 1

DC Ammeter 0-25mA 1

Patch chords & user manual - As per required

THEORY:
Regulated Power Supply
Regulated power supply is an electronic circuit that is designed to provide a constant dc
voltage of predetermined value across load terminals irrespective of ac mains fluctuations or
load variations. A regulated power supply essentially consists of an ordinary power supply and
a volt age regulating device, as illustrated in the figure 1. The output from an ordinary power
supply is fed to the voltage regulating device that provides the final output. The output voltage
remains constant irrespective of variations in the ac input voltage or variations in output (or
load) current.

Fig 1: Regulated Power Supply

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Series Voltage Regulation

Transistors Q1 and Q2 are used as direct coupled feedback amplifiers in which output voltage
variations are returned as feedback to oppose the input changes. The base of transistor Q2 is
connected to variable tape of potentiometer R3.
Shunt Voltage Regulation
Figure 2 shows the circuit of transistorized shunt regulator. We can recognize that the Zener
diode has been replaced by transistor Q1 and two resistors R1 and R2.
Line Regulation
The Line regulation is measured by varying the input voltage for the same given load Current.
Load Regulation
The Load regulation is measured by varying the load current for the same input voltage.
CIRCUIT DIAGRAM

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Analog Electronics Lab ( 4EE7A)

PRECAUTIONS:
1. Do not touch the components on the kit.
2. Properly connect the connecting wire on the kit.
3. Switch off the power supply after use.
PROCEDURE:
1. Connect ckt as shown in fig.2 connect a 0-10 mA meter in load path. Connect a 30v
variable supply at input terminals.
2. Measuring load regulation
Apply the input voltage Vin and then vary the load current I from 0-25mA in steps.
Note the corresponding output voltage. Plot I V/s Vo and I V/s % regulation.
% regulation = ((no load voltage-load voltage)/ no load voltage)*100.
Table 1: For load line regulation
S. No Load current I Vo % Regulation
(mA) (volts)
1
2
3. Measuring line regulation:
Keep the load resistance constant at 15 mA load current. Vary input voltage from 15V
to 25V. Note the corresponding output voltage. Plot Vin vs Vo & Vin vs % regulation.
Table 2: For line regulation:
S. No Vi (V) Vfl(V) V nl(V) % regulation
1.
2.
% regulation = (Vi-Vfl)/ Vnl *100
CALCULATION:
𝑛𝑜 𝑙𝑜𝑎𝑑 𝑣𝑜𝑙𝑡𝑎𝑔𝑒−𝑙𝑜𝑎𝑑 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
% 𝑙𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = ∗ 100.
𝑛𝑜 𝑙𝑜𝑎𝑑 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑉𝑖−𝑉𝑓𝑙
% 𝑙𝑖𝑛𝑒 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = ∗ 100.
𝑉𝑛𝑙
𝑟𝑚𝑠 𝑣𝑎𝑙𝑢𝑒 𝑜𝑓 𝑎𝑐 𝑐𝑜𝑚𝑝𝑜𝑛𝑒𝑛𝑡
𝑅𝑖𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 = 𝑑𝑐 𝑣𝑎𝑙𝑢𝑒

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Analog Electronics Lab ( 4EE7A)

RESULT:
We have studied the series & shunt voltage regulators & measured line & load regulation &
ripple factor. The calculated values of % load regulation is ……….., % line regulation
is…………and ripple factor is………….
VIVA VOE:
1. What do you mean by regulated power supply ?
2. Differentiate between load and line regulation?
3. Where we need regulated power supply?
4. Which IC we use for voltage regulation?

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Analog Electronics Lab ( 4EE7A)

EXPERMENTS NO: 3

AIM: To study the F.E.T. Amplifier

EQUIPMENTS REQUIRED:

Equipment Specification Quantity

Trainer Kit. 1

DC Current Meter 0 – 15 mA 1

DC Voltmeter 0–5V 1

DC Voltmeter 0 – 20 V 1

Regulated Power Supply 0 – 20 V DC 1

Regulated Power Supply 0 – 5 V DC 1

Connecting wires - As per required

THEORY:
Field effect transistors, or FETs, are commonly used in many industrial circuits. The FET is
classified as a unipolar transistor that contains a gate & a single channel of solid state material
terminated at the ends. The input to the channel is called the source & the output is known as
the drain. Both n & p channel FETs are available.
If DC is applied to the channel of an FET through the source & drain terminals, a resulting
current will occur. The electrode of the device is used to control the current through the
channel.
The gate is made of p material where the channel is of n material. When the gate is reversed
biased it reduces the current carriers passing through the channel. When the gate has large
reverse bias voltage it will stop the flow of current carriers through the channel completely.
This is called the pinch of voltage of FET. Any variation in gate voltage will cause a
corresponding change in channel current ID. Through this control method a small gate voltage
can be used to control current, which permits amplification to be achieved. The FET is very
similar in operation to a vacuum – tube triode & has a high resistance gate –source input
junction. Transfer Characteristics and Ouptput Characteristics of FET are shown in figure 1
and figure 2 respectively.

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Analog Electronics Lab ( 4EE7A)

CIRCUIT DIAGRAM

Fig 1: Transfer Characteristics Fig 2: Output Characteritics

PRECAUTION:
1. Do not touch the components on the kit.
2. Connect the CRO probe properly.
3. Properly connect the connecting wire on the kit.

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Analog Electronics Lab ( 4EE7A)

PROCEDURE:
* To plot transfer characteristic:
Connect 0 – 20 V D.C. variable supply at VDS input terminals & 0-5 V at VGS input terminals
of the trainer. Keep voltage to minimum level by VGS adj & VDS adj potentiometers.
Connect 0-5V DC voltmeter to measure VGS and 0-20V DC Voltmeter to measure VDS.
1. Also connect current meter 0-15 mA to measure ID.
2. Adjust VDS voltage to be 10 volt, & VGS for zero volt. Record the current ID.
3. Increase VGS voltage in steps & record corresponding ID current in the observation
table (1).
4. Increase VGS until current ID approaches zero. Plot a graph of VGS v/s ID.
* To Plot Output Characteristics:
1. Keep VGS constant say at 0V, & increase VDS in steps and record the corresponding ID
as shown in the observation table (2)
2. Repeat the above procedure 1, for different values of VGS (Say -0.5V,-1.0V, etc)
3. Plot a graph of VDS v/s ID for different VGS
OBSERVATION
TABLE 1
S. No. VGS (Volts) ID (mA)
1 0
2 -1.0
3 -1.5
4 -2.0
5 -2.5
6 -3.0
7 -3.5
8 -4.0
9 -4.5
10 -5.0
11 -5.5
12 -6.0

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TABLE 2
VDS VGS =0 VGS = - 1V VGS = - 2V VGS = - 3 V VGS = - 4V
(Volts) ID ID ID ID ID
0
0.5
1.0
1.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5

RESULT: We have studied and drawn the graph for Transfer and Output characteristics of
FET.

VIVA VOCE
1. Why FET is called a Unipolar device?
2. What are the advantages of FET?
3. What is trans-conductance?
4. What are the limitations of FET?
5. Relation between µ, gm and rd?
6. In the constant-current region, how will the IDS change in an n-channel JFET?

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Analog Electronics Lab ( 4EE7A)

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT- 4
AIM: To verify condition for maximum power O/P, efficiency of Class A and Class B push
pull amplifier also observe crossover distortion and determine bias condition for no
crossover distortion.
EQUIPMENT REQUIRED:

Equipment Specification Quantity

Class B push- pull amplifier 1

Trainer Kit.

Function Generator

AF Power Amplifier 1

Digital Multi meter 1

Regulated Power Supply 0 – 20 V DC 1

Connecting wires - As per required

THEORY:
In single ended amplifier i.e. Amplifier using single transistor appreciable distortion results due
to non linearity of transistor transfer characteristics. This distortion may be reduced
considerably by push pull operation transistor.
The basic circuit of a push-pull amplifier is consists of using two N-P-N transistor. The input
signal is applied to the input of the two transistors through a center tapped transformer of
TR1.The voltage at the bases of the two transistor T1 and T2 are in push pull in phase
opposition. Therefore:
Now let input voltage V1 at the base of Transistor T1 be
V1 = Vm Cos wt. ………….………………………………. (1)
The voltage at the base transistor T2 is equal and opposite to V1 and given by,
V2 = - V1 = Vm (Cos .+ Δ ) ….. ……………………………. . (2)
The collector current of Transistor T1 is given by,

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Analog Electronics Lab ( 4EE7A)

I1 = ic + B0 + B1 Cos  +B2 Cos 2 + B3 Cos 3 … …….

(3)
The collector current of Transistor T2 is given by,
I2 = ic + B0 + B1 Cos ( +Δ )+B2 Cos2( + Δ )+ B3 Cos 3 +……….
I2 = ic + B0 -B1 Cos ( + Δ )+B2 Cos2( +Δ ) - B3 Cos 3 +………
It may be seen that the two output current I1 and I2 flow through the primary of output
transformer tR2 in opposite directions. The total output current in the secondary is then
proportional to the difference between collector current I1 and I2,
Thus
I0 = K (I1-I2)= -2K (B1 Cos wt + B3 Cos 3wt+……………………….………………..(4)
From the above equation, we find that push-pull operation has balanced out all even harmonics
in the out.
Conversion Efficiency: A measure of the ability of an active device to convert the DC power
of the supply in to the AC power delivered to the load is called the conversion efficiency.
η = Signal power delivered to load/ DC power supplied to output circuit * 100 %
CIRCUIT DIAGRAM:

Fig :- Push Pull Amplifier

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Analog Electronics Lab ( 4EE7A)

PROCEDURE:
1. Switch ON the experiment board by connecting the AC power card to the mains.
2. Feed a sine wave of some amplitude approximately 1.2 V of audio frequency
approximately at 1.2 KHz to the primary of the TR1 .
3. Adjust the DC current Ic in the primary of the output Transformer TR1.
4. Also measure the VCE (Vcc) of the transistor that VDC is 12V.
5. Now calculate the DC power:
PDC = VDC * IDC
= 12*50 *10-3 = 600 mW.
6. Now increase the input signal amplitude until distortion just notified at the output of the
secondary of the output transformer TR2.
7. Measure the value of the AC voltage Vac=2 Vp-p, by connecting an 8 kohm loud
speaker.
OBSERVATION:
1. Find the peak to peak value of AC voltage.
Vp-p = ……….Volts
CALCULATION:
𝑉𝑎𝑐 𝑎𝑝𝑝𝑙𝑖𝑒𝑑 2
1. Theoretical Pac = = (22/8) W = 500mW
𝑅𝐿
𝑃𝑎𝑐
2. Theoretical Efficiency (%) = 𝑃𝑑𝑐 × 100 %
500
= 600 × 100 %

= 77.8%
3. Observed Vac observed = 2 x Vp-p
𝑉𝑎𝑐 𝑜𝑏𝑠𝑒𝑟𝑣𝑒𝑑 2
4. Observed Pac observed = W
𝑅𝐿
𝑃𝑎𝑐 𝑜𝑏𝑠𝑒𝑟𝑣𝑒𝑑
5. Observed Efficiency (%) = × 100 %
𝑃𝑑𝑐

= …………….%
𝑂𝑠𝑒𝑟𝑣𝑒𝑑 𝐸𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑐𝑦−𝑇ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙 𝐸𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑐𝑦
6. % 𝑒𝑟𝑟𝑜𝑟 = × 100 %
𝑇ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙 𝐸𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑐𝑦

= ………………………. %

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Analog Electronics Lab ( 4EE7A)

RESULT:
Hence we studied push pull amplifier, calculated the efficiency of Push Pull Amplifier and %
error.
VIVA VOCE:
1. Why we use iron core in transformer?
2. What is the role of Q2 transistor in push pull amplifier?
3. Why we use push pull amplifier?
4. What is the role of transformer?
5. How many types of transformer?

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO. 5
AIM: To study wein bridge oscillator and observe the effect of variation in R and C oscillator
frequency.
EQUIPMENT REQUIRED:
COMPONENT SPECIFICATION QUANTITY
Oscillator Kit - 1
CRO Dual trace 20 MHz 1
CRO Probe - As per required
Connecting Wires - As per required
AC Power Supply Regulated -
THEORY:
A Wien bridge oscillator is a type of electronic oscillator that generates sine waves. It can
generate a large range of frequencies. The circuit is based on an electrical network originally
developed by Max Wien in 1891. The bridge comprises four resistors and two capacitors. It
can also be viewed as a positive feedback system combined with a band-pass filter. Wien did
not have a means of developing electronic gain so a workable oscillator could not be realized.
The Circuit Diagram given in figure shows an RC network which is the basic frequency
determining network in the wein bridge oscillator. This type of RC oscillator is commonly
used in the frequency range from 1 Hz to 5 MHz.
Let us calculate the frequency.
−𝑗𝑅
𝑉𝑜 𝜔𝐶
=
𝑉𝑖 1 3𝑅
(𝑅 2 − ) − 𝑗 𝜔𝐶
𝜔2𝐶 2
Realigning the function by multiplying the numerator and denominator by the complex
conjugate of the denominator, we do
R² = 1/(ω²C²) or ω = 1/RC
Hence for the oscillator to the function, the overall two stages RC amplifier gain Av must be
greater than or equal to 3 so as to make up for the attenuation in the RC feedback network and
the output must be in phase with the input.

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Analog Electronics Lab ( 4EE7A)

CIRCUIT DIAGRAM:

PRECAUTIONS:
1. Do not touch the components on the kit.
2. Connect the CRO probe properly.
3. Properly connect the connecting wire on the kit.
4. Switch off the power supply after use.

PROCEDURE:
1. Connect the circuit as shown in fig. With three independent jumpers.
2. Absorb the output of weins bridge oscillator on a CRO.
3. Adjust CRO till we understand the output is sine wave.
4. Measure the time period of the sine wave calculate in the frequency f=1/T.
5. Repeat the measurement for other capacitor combinations also.

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OBSERVATION TABLE:
S. No. Conditional Practical form Theoretical form Error
1
2
3
CALCULATION:
1
𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 = 2𝜋𝑅𝐶
1
𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 = 2𝜋×1𝑘×0.1𝜇𝑓

Frequency = 16 KHz

Error = Calculated frequency – Observed Frequency

= 16 KHz - Observed Frequency

RESULT: We have studied the wein bridge oscillator and calculated the error observed the
effect of variation in R and C oscillator frequency. The error between calculated
and observe frequency is ……………………….
VIVA VOCE
1. What is the frequency range of Wien Bridge Oscillator?
2. How does we get 180 degree phase shift?
3. What is the balancing condition of Wien Bridge?
4. How does bark hussain criteria is fulfilled in Wein Bridge Oscillator?

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO.6
AIM: To construct RC phase shift oscillator and to measure the output frequency.
EQUIPMENT REQUIRED:
S.NO. COMPONENT SPECIFICATION QUANTITY

1. Oscillator kit - 1
2. CRO Dual trace 20 MHz 1
3. Power supply 0-20 V DC 1
4. Patch chords - As per requirement

THEORY:-
All types of the feedback oscillator are based on the principal that any amplifying device
having an output larger than the required controlling input can be self exciting i.e., can provide
its own input, if a definite fraction of the output is feedback to the input in proper magnitude
and phase. The manner in which the feedback from the output to the input is achieved is the
distinguishing features between the various forms of the oscillator circuits. The gain of an
amplifier with feedback is given by
𝐴
𝐴𝑓 =
1 − 𝛽𝐴
Where A is the gain without feedback, β is the feedback factor. If Aβ=1 the gain with feedback
is infinity. Under such condition the amplifier provides its own input. The condition for
production and maintenance of oscillations may be achieved in a variety of ways. RC phase
shift oscillator is one of such network.
The conventional RC amplifier stage shift the phase by 180. The amplifier is followed by three
cascaded RC network, the output of the last RC combination being feedback to the amplifier
input. At a particular frequency the phase shift offered by the RC networks will be exactly 180,
and at that frequency the total phase shift offered by the complete circuit is 360 or 0 leading to
oscillations provided the amplifier gain makes up for the attenuation due to the RC network.
The frequency of the oscillation for the RC phase shift network is given as:-

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Analog Electronics Lab ( 4EE7A)

f=1/2π √𝟔𝑹𝑪
At this frequency each RC section of the feedback network introduce a phase shift at 60 degree
β= - 1/29 i.e. the phase shift attenuates the signal 29times. To make the loop gain unity the
amplifier gain should be equal or greater than 29
CIRCUIT DIAGRAM:

Fig1: RC phase shift oscillator

PRECAUTION:
1. Do not touch the components on the kit.
2. Connect the CRO probe properly
3. Properly connect the connecting wire on the kit.µ
PROCEDURE
1. Connect phase shift network outer to the transistor base input as shown in the circuit.
2. Put SPOT switch in down position.
3. Switch on the power supply.
4. Observe the output waveform at on CRO. .
5. Measure the frequency and verify the theoretical value given by the equation

F0 =1/2π 6RC

6. The value of R&C can be varied to observe the effect on oscillator frequency

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OBSERVATION:
Observe the waveform on the CRO and measure the time period of the waveform
T = ………………….Sec.
CALCULATION:
Observed frequency is calculated with the help of observed time period.
Observed Frequency = F observed = (1/T) = ……….
Theoretical value of the frequency is calculated by the formula:

Fcalculated = 1/(2π 6RC)

Now R = 22k
C = 3300pf
Therefore
Fcalculated = 1/(2π√6×22K×3300PF)
= 1.11 MHz
ERROR= Fcalculated - Fobserved

RESULT:
Hence we have studied the RC phase shift oscillator and find the frequency =…….. Hz of the
designed oscillator. The error calculated is …………….
VIVA VOICE
1. How to define stability of oscillator?
2. What is RC phase shift oscillator frequency?
3. What is phase shift network circuit?
4. What is tolerance?
5. What is efficiency of RC phase shift oscillator?

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EXPERIMENT NO:- 7(a)

AIM: To study and calculate output frequency of colpits oscillator.
EQUIPMENT REQUIRED:
S.NO. COMPONENT SPECIFICATION QUANTITY
1. Oscillator kit - 1
2. CRO Dual trace 20 MHz 1
3. Power supply 0-20 V DC Regulated 1
4. Patch chords - As per required

THEORY:
All types of feedback oscillators are based on the principle that any amplifying device having
an out larger than the required controlling input can be made self – exciting , i.e., can provide
its own input, if a definite fraction of the output in proper magnitude and phase. The manner in
which the feedback from the output to the input is achieved is the distinguishing feature
between the various forms of feedback from of the gain of an amplifier with feedback is given
by
𝐴
𝐴𝑓 =
1 − 𝛽𝐴
Where A is the gain without feedback, β is the feedback factor. If Aβ = 1 the gain with
feedback is infinity. Under such conditions, the amplifier provides its own input, i.e., it works
as an oscillator.
Colpits oscillator is one of the feedback sinusoidal oscillators. In a feedback oscillator, the gain
of the amplifier and the feedback loop must be ≥1. The condition for the oscillator, that the
feedback signal should provide 360degree phase shift to the input. In colpits oscillators the
feedback network comprises C1, C2 and L shown in the fig 1. Here C1 , C2 and L form a
frequency selective network, which oscillator at the frequency
1
𝑓𝑜 =
2𝜋√𝐿𝐶𝑒𝑞
𝐶1 𝐶2
Where 𝐶𝑒𝑞 =
𝐶1 +𝐶2

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CIRCUIT DIAGRAM

Fig 1: Colpits Oscillator

PRECAUTION:
1. Do not touch the components on the kit.
2. Connect the CRO probe properly.
3. Properly connect the connecting wire on the kit.

EXPERIMETAL PROCEDURE:
1. Connect the colpits network as shown in Fig.
2. Connect input coupling capacitor to the capacitor of tank circuit and R2 & RE to the centre of
capacitor of tank circuit then output of the oscillator on CRO.
3. Switch ON the power supply of the circuit by ON / OFF switch.
4. Note down the frequency of the observed signal i.e., (fo = 1/T).
3. Note down the values of capacitors from kit and calculate the C equivalent.
4. Calculate the frequency using the formula. Compare this value with the practical value.

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OBSERVATIONS:
1. Observe the waveform with CRO and measure the time period
2. Calculate the frequency of the observed waveform.
CALCULATIONS:
Theoretical Value:
Calculate the theoretical value with the help of formula
1
𝑓𝑜 = 2𝜋√𝐿𝐶𝑒𝑞

𝐶1 𝐶2
Where 𝐶𝑒𝑞 = 𝐶1 +𝐶2
1
𝑓𝑜 = 2𝜋√140𝜇 ×0.165𝜇

fo = 0.104058
Observed Value:
Calculate the observed value of frequency with the help of time period as observed from the
waveform.
Error:
Error = 0.104058 - Observed value

RESULT:
Hence we have studied the Colpit’s oscillator and find the frequency =…….. Hz. The error
between observed and theoretical value is …………….

VIVA VOCE

1. What is tank circuit? How it’s work?

2. What is the application of colpit’s oscillator?
3. What is the range of frequency?
4. How it is differ from Hartley?
5. Explain role of capacitance in colpit’s oscillator.

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EXPERIMENT NO:- 7(b)

AIM:-
To study the Hartley oscillator using a transistor

EQUIPMENT REQUIRED:-
Component Specification Quantity
Oscillator kit - 1
CRO Dual trace 20 MHz 1
Mili-ammeter 0-500 Ma 1
POWER Supply 0-20 V DC Regulated 1
Patch chords - As req.

THEORY:
A feedback network (αv) is found as:

The tank circuit determines the operating frequency of the Hartley oscillator. As the tapped

inductors are in series, the sum of must be used when calculating the value of fr
A Hartley oscillator is shown in Figure 18-5. The operating frequency is determined by the
tank circuit. By formula:

Where L=L1+L2+2*(L1*L2)1/2
The key to understanding this circuit is knowing how the feedback circuit produces its 180°
phase shift (the other 180° is from the inverting action of the CE amplifier). The feedback
circuit produces a 180° voltage phase shift as each inductor causes a 90° phase shift, the
voltage at the top of C1(the output voltage) must be 180° out of phase with the voltage at the
bottom of L2(the feedback voltage).

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CIRCUIT DIAGRAM:

Fig 1: Hartley Oscillator

PRECAUTIONS:-
1.Built in DC supply should be 12V.
2.Provision for connecting signal generator,CRO,and ammeters.
3.Patch chords should be referred to the user manual for the proper functioning.
EXPERIMENTAL PROCEDURE:
1.connect the hartley network as in the fig.1.
2. Switch on the power supply of the unit.
3. Observe the output of the oscillator on the CRO.
4. Compute the frequency F=1/T from CRO.
3. Note down the value of the capacitor from the kit.
4. Calculate the theoretical frequency of the cicuit using the formula

Where L=L1+L2+2*(L1*L2)1/2

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CALCULATIONS:
Theoretical value:
F=1/2π√LC
F=1/2π√140µ×2200PF
F=51.66 MHz(theoritical value)
Observed Value:
Calculate the observed value of frequency with the help of time period as observed
from the waveform.

Error = 51.66 - observed value

RESULT:
Hence we have studied the Hartley’s oscillator and find the frequency =…….. Hz. The error
between observed and theoretical value is …………….

VIVA VOCE:
1. How many types of oscillator?
2. What is Hartley oscillator frequency?
3. What is tank circuit?
4. What is tolerance?
5. What is efficiency of Hartley oscillator?

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO. 8(A)

Aim: To study a K derived high pass filter (T-Network).
EQUIPMENT REQUIRED:
S.No. COMPONENT SPECIFICATION QTY
1. Analog Board AB49 1
2. Function Generator ST4060 1
3. Dual Channel Oscilloscope 20 MHz 1
4. Patch Chord 2mm
5. Multimeter 2
THEORY:
A Filter is network of active and /or passive circuit elements so connected, so as to permit
certain frequency signals without (or with less) attenuation and stop (or with high attenuator)
other Frequency signals.
This HP filter stops all frequencies below a cut off frequency f1 and allows all frequencies
above the cut off frequency
R0 =√L/C ……………………………………….(1)
fc =1/4π√LC ……………………………………….(2)
Dividing eq.1 by eq.2 we get
√LC
×4π√LC = R0÷fc
1

4πL = R0/ fc ………………………………………(3)

CIRCUIT DIAGRAM:

Fig 1: T network of High Pass K Filter

PRECAUTIONS:

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Analog Electronics Lab ( 4EE7A)

1. Connection should be properly.

2. Take the reading very carefully.
3. All the connections should be tight.
4. Do not touch any loose wire.
EXPERIMENTAL PROCEDURE:
1. Connect the inductance as shown on the kit.
2. Connect the Audio signal generator with 600 Ω output impedance to the input of the
filter. If the signal generator has 50 Ω output impedance adds a series resistance of 550
Ω to its output.
3. Terminate the filter output with 600 Ω passive resistance.
4. Connect the two channels if the oscilloscope to the input & output of the filter.
5. Set the signal amplitude to about 1V rms at 1 KHz.
6. Vary the frequency from 0 to 10 KHz in small increments of frequency and measure
a. Input Voltage
b. Output Voltage
c. Frequency
d. Phase shift between input and output (in pass band only)
7. Plot the frequency vs. attenuation (dB) and frequency f0 (-3dB point) cut off
frequencies f1 and f2 compare it with the theoretically calculated value. The small
difference if any is due to measurement in accuracies and/or tolerance of components
used in the filter.
OBSERVATION TABLE:-
S. No Frequency Vin Vout Voltage gain (db) Phase
(volts) (volts) Av=20 log (Vout/Vin) shift
1
2
3

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CALCULATION:
Voltage gain (For each frequency)
Av=20 log (Vout/Vin)
Cut off frequency =
Bandwidth of K derive T high pass filter= f2 –f1
RESULT:
K derived high pass filter (T-Network) has been studied and the observed bandwidth of K
derive T high pass filter is ………….Hz.

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EXPERIMENT NO. 8(B)

AIM: To study a K derived high pass filter (−Network).
EQUIPMENT REQUIRED:
S. No. COMPONENT SPECIFICATION QTY
1. Analog board AB49 1
2. Function generator ST4060 1
3. Oscilloscope 20 MHz 1
4. Patch chord 2mm
5. Multimeter 2
THEORY:
A Filter is network of active and /or passive circuit elements so connected, so as to permit
certain frequency signals without (or with less) attenuation and stop (or with high attenuator)
other Frequency signals.
This HP filter stops all frequencies below a cut off frequency f1 and allows all frequencies
above the cut off frequencies.
R0 = ………………...……………….(1)

fc =1/ …………………………………(2)
Dividing eq.1 by eq.2 we get

× = R0÷fc

4πL = R0/ fc …………………………………(3)

CIRCUIT DIAGRAM:

Fig 1:  Network of High Pass K Filter

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Analog Electronics Lab ( 4EE7A)

PRECAUTIONS:
1. Connection should be properly.
2. Take the reading very carefully.
3. All the connections should be tight.
4. Do not touch any loose wire.
EXPERIMENTAL PROCEDURE:
1. Connect the function generator at Vin of k derive high pass filter kit and observe the
input oscilloscope CH-I.
2. Set the value of function generator at 4 Vp-p,100Hz sine wave signal.
3. Observe the output waveform between points Vout on oscilloscope CH-II.
4. Calculate the voltage gain [Av=20 log (Vout/Vin)] in db.
5. Repeat the process for various frequency ranges up to 100 KHz and plot the graph
between frequency and gain(db).
6. Note the value of frequency for which there is -3 db gain, this frequency is known as cut
off frequency at which, output voltage Vout=0.707Vin.
7. Calculate the cut off frequency and determine the difference between real and measured
cut off frequency.
8. Calculate the bandwidth of high pass filter.
OBSERVATION TABLE:
S. No. Frequency Vin Vout (volts) Voltage gain(db)
(volts) Av=20log(Vout/Vin)
1
2
3
4
5
6
7
8

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CALCULATION:
Voltage gain (For each frequency)
Av=20log(Vout/Vin)
Cut off frequency =
Bandwidth of K derive high pass filter= f2 –f1
RESULT:
K derived high pass filter (-Network) has been studied and the observed bandwidth of K
derive  high pass filter is ………….Hz.

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO. 8(C)

AIM:-
To study of a K derived low pass filter (T-Network).
EQUIPMENT/COMPONENT REQUIRED:-

S.No. COMPONENT SPECIFICATION QUANTITY

1. Analog board AB49 1

2. Function generator ST4060 1

3. Oscilloscope 20 MHz 1
4. Patch chord 2mm
5. Multimeter 2

THEORY
A Filter is network of active and /or passive circuit elements so connected, so as
to permit certain frequency signals without (or with less) attenuation and stop (or with high
attenuator) other Frequency signals.
This LP Filter allows frequency below a cut off frequency f1 and stops all
frequencies above the cut off frequency.

R0 = ----eq (1)

fc =1/ ----eq (2)

Dividing eq.1 by eq.2 we get

× = R0÷fc

4πL = R0/ fc ----eq (3)

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CIRCUIT DIAGRAM

EXPERIMENTAL PROCEDURE:-
1.Connect a signal generator with 600 ohms source impedance to the input of the filter.
Terminate the output with a 600 Ω Resistive load.
2.Set the input voltage to approximately 1V rms at 1 KHz using a VTVM or FET input volt
ohm meter.
3.Vary the input frequency from 0 to 10 KHz in small frequency steps.
4.Measure input and output at each frequency
5.Repeat the process for various frequency ranges upto 100 KHz and plot the graph between
frequency and gain(db).
6.Note the value of frequency for which there is -3 db gain,this frequency is known as cut off
frequency at which,output voltage Vout=0.707Vin.
7. Calculate the cut off frequency and determine the difference between real and measured cut
off frequency.
8.Also measure and draw a graph between frequency versus the phase difference between input
& output. The total phase shift would be 180o in the pass band.
9.Calculate the bandwidth of T low pass filter.

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OBSERVATION TABLE

S.No. Frequency Vin (volts) Vout Voltage gain (db) Phase shift
(volts) Av=20log(Vout/Vin)

CALCULATION
Voltage gain (For each frequency)
Av=20log(Vout/Vin)
Cutoff frequency =
Bandwidth of K drive low pass filter= f2 –f1
RESULT

PRECAUTIONS:-
1.Connection should be properly.
2.Take the reading very carefully.
3.All the connections should be tight.
4.Do not touch any loose wire.

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Analog Electronics Lab ( 4EE7A)

EXPERIMENT NO. 8(D)

AIM:-
To study of a K derived low pass filter ( -Network).
EQUIPMENT/COMPONENT REQUIRED:-

S.No COMPONENT SPECIFICATION QUANTITY

1. Analog board AB49 1

2. Function generator ST4060 1

3. Oscilloscope 20 MHz 1
4. Patch chord 2mm
5. Multimer 2

THEORY
A Filter is network of active and /or passive circuit elements so connected, so as to permit
certain frequency signals without (or with less) attenuation and stop (or with high attenuator)
other Frequency signals.
This LP Filter allows frequency below a cut off frequency f1 and stops all
frequencies above the cut off frequency.

R0 = ----eq (1)

fc =1/ ----eq (2)

Dividing eq.1 by eq.2 we get

× = R0÷fc

4πL = R0/ fc ----eq (3)

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CIRCUIT DIAGRAM

Fig 9(D).1

EXPERIMENTAL PROCEDURE
1.Connect the function generator at Vin of k derive low pass filter AB49 board
and observe the input oscilloscope CH-I.
2.Set the value of function generator at 4 Vp-p,100Hz sine wave signal.
3.Observe the output waveform between points Vout on oscilloscope CH-II.
4.Calculate the voltage gain[Av=20 log(Vout/Vin)] in db.
5.Repeat the process for various frequency ranges upto 100 KHz and plot the graph
between frequency and gain(db).
6.Note the value of frequency for which there is -3 db gain,this frequency is known as
cut off frequency at which, output voltage Vout=0.707Vin.
7. Calculate the cut off frequency and determine the difference between real and measured cut
off frequency.
8. Calculate the bandwidth of low pass filter.

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OBSERVATION TABLE
S.No. Frequency Vin (volts) Vout (volts) Voltage gain (db)
Av=20log(Vout/Vin)

CALCULATION
Voltage gain (For each frequency)
Av=20log(Vout/Vin)
Cutoff frequency =
Bandwidth of K drive low pass filter= f2 –f1
RESULT

PRECAUTIONS
1.Connection should be properly.
2.Take the reading very carefully.
3.All the connections should be tight.
4.Donot touch any loose wire.
Viva voce
1. What is the difference between T & pie filter ?
2. What is the role of inductor in filter?
3. What is the role of capacitor in filter?
4. What is the operation of filter?
5. Where we use filter in circuit?

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Analog Electronics Lab ( 4EE7A)

EXPERMENTS NO - 9
AIM:
To study of digital storage C.R.O.
Apparatus required : - (a) D.S.O. kit (b) Function generator (c) Probes

GENERAL INFORMATION:
This Oscilloscope easy to operate the logical arrangement of the
control allow any one quickly become familiar with the operation of the instrument however
immediately after on packing the instrument should be check for mechanical damage and loose
part in the interim or if there is transport damage the supplier must informed immediately
CONTROL & READ OUT:
The following description assume that instrument is not set to
component tester mode if the instrument is switched on All important Setting are displayed in
the readout the LED located on the front Panel assist operation and indicate additional
information incorrect operation and the electrical end position of control knob are indicated by
a warning beep.
(1)POWER: Push button and symbols for ON (1) and OFF.
(2) AUTOSET: Briefly depressing this push button this slot results in an automatic signal
related instrument setting (AUTOSET), if the signal frequency & height are suited for
automatic triggering (AT).
(3)RM: - The remote Control mode can be Switched On or OFF via the RS-232 interface
(4)INTENES: - Knob with associated Push button and LEDs this control knob is adjusting
both the trace and read out intensity.
(5)TR: The tracer rotation control can be adjusted with small screwdriver

(6)FOCUS: The control knob effect bath the trace and readout sharpness.
(7) STOR. ON/HOLD: Push button with two functions
(8)STORE ON: Pressing & holding the push button (yt or xy) by to storage mode and vice
versa

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(9) HOLD: - The current contain of the memory are protect against over writing when HLD
(HOLD) instead of channel information (eg.y1…) Is displayed in the readout
(10) PTR/PK Det: -Briefly pressing select the PRE and POST trigger value.
(11) PK DET: -Pressing &holding switches the peak detection on or off.
(12) STOR. MODE: this function is not available in analog this mode is charging many signal
like RFR ,ENV, AVM, ROL .
(13) SINGLE: Push button switches the signal event-capturing mode on or off signal mode is
indicated by sol LED.
(14) RESET (RES): -Briefing pressing the signal push button causes a reset activating the
trigger cut if yet mode is active the result depends on the signal capture mode.
(15)REFERENCE: the instrument is contain two non volatile signal data memories.
(16) SAVE/RECALL: -The instrument contain nonvolatile memories the operator to save
instrument setting and to recall them can use this’
.(17) TRS: -The instruments contain a trace separation Function which is required In alternate
time base mode.
(18) y-pos (1): -The vertical trace position of CH-1can be set with this control knob.
(19) y-pos (11): -The vertical trace position of CH-11 can be set with this mode.
(20) NM-AT: --- (SLOPE): - Push button with a double function and associated NM-LED
Press and hold the push button to switch over from automatically to normally triggering
Briefing pressing this push button selects with slope of the signal is used or triggering the time
base generators.
(21) TR: -Trigger indicator
(22) LEVEL: control knob
This control knob enables an exposition shift of the signal in yt and analog xy mode.
(23) XMAG*10: -Push button and LED
Each time this push button is pressed *10led located above switch on or off.
(24) VOLT/DIV: -control knob
This knob for CH 1 has a double function the following description relates to the i/p attenuator
function (VAR LED dark)

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(25) CH I: -
VAR pressing holding the push button select the volt/div
(26) DUAL: Push button button with multiple function
Briefly pressing this push button switches over dual mode then both deflection coefficient are
displayed .The previous triggering setting stays as it way but can be changed.
(27) TRIG: -with the aid of this button select alternate trigger source available.
(28) VOLT/DIV: -control knob
This knob for ch 11 has a double function the following description relates to the I/p
attenuator.
(29) CH 2
VAR: -Push button with several function
Channel mode: briefing pressing the push button set the instruments to ch2 (mono ch 2) mode.
(30) VAR: -pressing &holding this button select volt/div
(31) TRIGG MODE: -Pressing the upper &lower push button select the trigger coupling.
AC, DC, HF, NR, LF, TVL, TVP.
(32) DEL pos: -The function of this control knob applied to the hold of time setting
(33) TIME/DIV: -
This switch shows time base function.
(34) ALT: -The instruments contain two time base designated and b with the and of the b time
base signal part display by the time base can be expanded in direction.
(35) DEL. Trig: -Push button with double function
VAR
DEL. TRIGUNCTION: -
(a) analog mode only
(b) Digital mode only
(c) Analog- digital mode only
(36) VAR: - analog mode only: -pressing &holding the DEL.TRIG. -VAR push button selects
the time /div control knob function between time base switch and variable the current setting is
displayed the VAR LED located knob.

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(37)INPUT CH 1: -The BNC socket is the signal I/p for ch 1 in xy mode signal at I/p are used
for y deflection.
(38) AC/DC: -push button with two function
Input coupling: briefly pressing this button switch over from AC ( ) to DC ( ) input
coupling &vice versa
Probe factor: -pressing &holding the push button select the indicated deflection coefficient
channel 1 displayed in the read out between 1:1 and 10:1.
(39) GD INV: -push button with two functions
GD; -each time this push button is pressed briefly the I/p ch1 is switched from active to
inactive and vice versa.
INV: -pressing &holding this push button switch the channel (1) invert function on or off.
(40) Ground socket: -4mm banana jack galvanic ally connected to safety earth
(41) INPUT CH 11: -
BNC socket is the signal I/p for ch 2 to the xy mode, signal at this i/p are used or the x
deflection the outer (GND) is galvanic ally connected to the instrument gnd and consequently
to the safely earth contact of he line /main plug.
(42) AC/DC; - Push button with two function
(43) GD/INV: -each time this pushbutton is pressed briefly the I/p ch 2 is switch from active to
inactive and vice versa.
INV (STORAGE MODE) pressing &holding this button switches the ch2 invert (inv)
function on or off.
(44) TRIG EXT/INPUT (Z): -BNC socket with two function the outer (gnd) connection is
galvanic ally connected to the instrument gnd and consequently to the safety earth contact to
line plug
TREG EXT: _ this is the ext trigger signal input if ext triggering is selected briefly pressing
the (TRIG-24)
(45) Z-I/p:-if neither component test nor external trigger coupling.
(46) PRINT MENU:-briefly pressing the push button start a documentation (hard copy) if the
following precondition are met

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The oscilloscope must be connected to external mode HAMAG interface HO79-6.The

software version installed in HO79-6 should not be <v2.00.
MENU: pressing &holding the push button activates the display of the main menu. It contains
the submenus SETUP calibrate and HO79 if connected.
(47) ON/OFF
CH1 /11: - ……… - push button with several unction
On/off: -pressing &holding push button switch switches both curser line on or off.
CH1/11: -this function is required and available only in dual and xy mode if…(43) measured
is active
(48) Track function: -
Briefly pressing simultaneously both pushes button on/off-ch1/11-----------------------switches
over from signal curser line operation to track mode and vice versa.
(49)… -push button with two functions
1/11… - briefly pressing this push button changes the active (controllable) curser in sequence
1-11-1if TRK (track) mode is not active.
……….:-pressing &holding this push button change from voltage to time or frequency
measurements &vice versa.

(50) CURSER: -center based lever

The active curser line in track mode: both lines can be shifted in selected direction.

(51) CAL: -push button concentric socket

(52)CT: -pressing the push button switches the instrument over from
Oscilloscope to component test analog mode and vicevsrsa

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EXPERMENTS NO: -9(b)

AIM OF THE EXPERIMENT: To study the C.R.O. and measure the time period,
amplitude, frequency and phase angle using lissajous figure.
APPARATUS REQUIRED: Dual trace C.R.O., crocodile cable, function generator (2 MHz),
BMC cable.
THEORY: The cathode ray oscilloscope (C.R.O.) is an extremely useful laboratory
equipment. C.R.O’s are used to investigate waveforms and other time varying quantities, from
DC or very low frequencies to very high frequencies. C.R.O’s are basically very fast “graph
plotters” that display an input signal against time (or sometimes against) other signal. The
graph is plotted by a bright spot of light moving over the screen. If the input voltage
waveform is repetitive, it is possible to make it as stationary and thereby study it or measure it
and even photograph it by camera. Since the CRO can display almost all types of waveforms
appearing at different points of a circuit, no wonder that the CRO has been called as the “Third
eye” of the electronics engineers.
FRONT PANEL CONTROLS OF A DUAL TRACE OSCILLOSCOPE.
The front panel controls of a Dual Trace Oscilloscope are shown in the figure. The controls can
be divided into four major groups.
(1) Control
(ii) Horizontal group
(iii) Vertical group
(iv) Trigger group

(i) Control group: - This group includes the following controls:

(a)Power On/Off: This control turns the power of the device on or off.
(b)Intensity: It is a part of (a) and controls the brightness of the CRT.
(c)Focus: This controls the size of electron beam spot on the screen.
(d)Trace rotation: It is used to make the beam horizontal (if not).
(e)Calibration: It provides standard signal to calibrate vertical amplifier controls.

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(ii) Horizontal group: - This group includes the following controls:.

(a) Sweep time: It determines the time/div required to sweep the beam from left to right on the
CRT screen. Thus the period and frequency can be determined.
(b) Horizontal position: It moves the trace left and right on the screen.
(c) Sweep mode: It controls the modes such as AUTO, NORM and SIGNAL.

(iii)Vertical group: - The various controls in this group are:

(a) Input connector: The signal from external circuit to the CRO is applied at this point.
CHA(X) and CHB(Y) are the two input connectors.
(b) Input coupling: This control gives the multiplying factor by which actual div. occupied by
the signal is to be multiplied.
(c) X5 mag: It increases the gain of the vertical amplifier by five times.
(d) Vertical mode: It includes the control such as CHA, CHB, ALT, CHOP, ADD and X-Y.

(iv)Trigger group: - The various controls in this group:

(a) Trigger “LEVEL”: It decides what minimum amplitude vertical signal is required to trigger
the horizontal sweep.
(b) Slope: Occurring of a trigger on a negative going or positive going edge of the input
waveform is decided by this control.
(c) Source: This includes following sub controls:
LINE: This indicates that 50 Hz a.c. line will cause triggering.
EXT: This means an external triggering signal is to be used.
INT: It indicates that source is selected by CHA/CHB/NORM
(d) Coupling: The coupling control allows us to tailor the triggering. It has sub selections such
as AC, DC, HFR, LFR and TV.
(e) External trigger input: When external signal is to be to be used for triggering, it provides
the input connector.

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Specifications of a Typical Dual Trace C.R.O.

Maximum sensitivity : 5 mV/div
Bandwidth : 15 MHz
Operating temperature : 5 C to 40 C

Cathode Ray Tube:

Measuring area : 8 x 10 Div

Total accelerating voltage : 2 kilovolt
Screen : p 31 medium persistence green trace

Vertical Amplifier:
Display mode : CHL A, B, A and B
Input coupling : AC/DC
Bandwidth : DC: 0 to 15 Hz
AC: 10 Hz to 15 Hz
Input impedance : 1MB/35 Pf

Observations:

(a) For Simple Fig. :

Number of volts/div in channel 1=

Number of volts/div.in channel 2=
Peak to peak voltage in channel 1=
Peak to peak voltage in channel 2=

Time period =

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Frequency =

(b) For Lissajous Fig. :

sinΦ = Y2/Y1

fy/fx = (No. of horizontal tangencies) / (No. of vertical tangencies)

RESULT: We have studied analog CRO and measured the time period, amplitude and
frequency

PRECAUTIONS:
(1) The knob should be adjusted carefully.
(2) The calibration of the C.R.O. should be done carefully.

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EXPERIMENT NO: 10
AIM
To study the UJT characteristics and Relaxation Oscillator using UJT.
Equipments required:-
S.NO. COMPONENT SPECIFICATION QUANTITY
1. UJT Trainer kit - 1
2. CRO DUAL TRACE 20 Mhz 1
3. DC Voltmeter 0-15V 2
4. DC Ammeter 0-10 mA 1
5. Power supply Regulated -
6. Patch chords - As per requirement

THEORY
The UJT is a three terminal semiconductor device with negative resistance characteristics. It
consists of a n-type silicon with a small p-type insert (emitter) near to one of the ends. The two
ohmic contacts at the ends of the n-type bar constitute two terminals-Base-1 and Base-2. The
rectifying contact is called the Emitter and Base-1 terminals.
As usually employed, a fixed interbase potential VBB is applied between B1 and B2. The most
important characteristics of UJT are that of the input diode between E and B1. If B2 is open-
circuited so that IB2=0 , then the input volt-ampere relationship is that of the usual is open-
circuited so that IB2=0 ,then the input volt-ampere relationship is that of the usual p-n junction
diode. The input current-voltage characteristics are plotted for IB2=0 and also for a fixed value
of interbase voltage VBB.The later curve is seen to have the current-controlled
negative-resistance characteristics which is single-valued in current but may be multivalued in
voltage. A qualitative explanation of the physical origin of the negative resistance will now be
given. If IE=0 then silicon bar may be considered as an ohmic resistance Rbb between base
leads. Usually RBB lies in the range between 5 to 10K. Between B1 (or B2) and the n side of
the emitter junction the resistance is RB1 (or RB2),so that RBB=RB1+RB2. Under this condition
of zero or very small emitter current the voltage on the n side of the emitter junction is n VBB ,

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where n=RB1/RBB is called the Intrinsic Stand-off Radio. This parameter is specified by the
manufacturer and usually lies between 0.5 and 0.75.If VE is less than n VBB, then the p-n
junction is reverse biased and the input current is negative. The maximum value of this
negative current is the reverse saturation current IEO . If VEE is increased beyond n VBB the
input diode becomes forward-biased and IE goes positive. However, as already noted in
connected with the fig. the current remains quite small until the forward bias equals the cut in
voltage Vr.The emitter current increases the charge concentration between E and B1 because
the holes are injected in the n-type silicon. Since conductivity is proportional to charge density,
the resistance RB1 decreases with increasing emitter current. Hence, for voltage above the
threshold value Vr, ,IE is increased .Since the current is increasing while the voltage is
decreasing, then this device possesses a negative resistance.
After the emitter current has become very large compared with IB2,then we may neglect IB2..
Hence, for a very large IE,the input characteristics asymptotically approaches the curve for
IB2=0.This behavior results in a minimum or valley point where the resistance changes from
negative to positive. For current in excess of the valley current IV the resistance remains
positive. This portion f the curve is called the saturation region.
At maximum voltage or peak voltage VP the current is very small and hence the region to left
point is cutoff region. For many applications the most important parameter is peak voltage Vp,
which as explained above is given by
VP=n VBB + Vr
UJT RELAXATION OSCILLATOR
A relaxation oscillator must be biased for astable operation; that is, the load line determined by
V and R must intersect the input characteristic in the negative resistance region. The resistors
Rb1 and Rb2,are not essential to the circuit but are included because the voltages developed
across these resistors may prove useful. The capacitor C charges to the peak voltage Vp, the
device turns ON, and the capacitor discharges to valley voltage VV, whereupon the cycle
repeats. The charging time T1 is given by
T1=RECE n (V-Vv)/(V-Vp)

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Pulses develop across Rb1 and Rb2 during the interval when the device is ON and the capacitor
is discharging. The pulse at B1 has an abrupt leading edge, but the anticipated abrupt drop at
the trailing edge may not be easily apparent if the holding current is small in comparison with
the current at the moment of breakdown. The B2 current is smaller, being the B1 Current minus
the emitter current, but is more constant during the capacitor discharge.
The period of oscillation and thus the frequency is determined primarily by the values of RE
and CE.If RE is within the range, the period of oscillation is given by:
T=R E C E n (V-Vv)/(V-V p)
Where V is supply voltage.

EXPERIMENTAL PROCEDURE
A.UJT Characteristics
1. Connect the circuit as shown in fig.
2. Make sure potentiometer P2 is in its minimum position (anti clockwise direction).

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3. Adjust (VBB) the potentiometer P1 to 5V and vary (VEE) the potentiometer P2 in clock wise
direction and note down the values of the voltmeter and milliammeter.
4. Tabulate the values in the table and draw the graph between voltage VEE and current IE.
5. Repeat the steps from 1 to 4 for different values of VBB.

B.Relaxation Oscillator
1. Connect the circuit as shown in fig.
2. Observe the waveform at emitter, base1 and base2 on CRO.
3. Calculate the frequency of the waveforms.
4. Compare the practical frequency with that of the theoretical formula.
Note:
Theoretical formula for frequency is f=1/T
Where T=RECE n (V-VV)/(V-VP)
A. Calculate VV and VP from the waveform
Also calculate n by using
VP’=n VBB’+Vr
5. Compare theoretical and practical frequencies.
6. Repeat above procedure for different RECE combinations.

OBSERVATION TABLE
VBB=5V
SR.NO VEE(V) IE(mA)
1.
2.
3.
4.
5.

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RESULT Study Of Ujt is successfully done

PRECAUTION:-
Do not touch the components on the kit.
4. Connect the CRO probe properly.
5. Properly connect the connecting wire on the kit.
6. Switch off the power supply after use.

Viva voce
1. Which transistor is used for firing?
2. Why it is called unipolar?
3. Where we need relaxation oscillator?
4. How UJT differ from FET ?
5. Discuss curve of UJT?

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EXPERIMENT NO :-11
AIM – To plot the characteristics of MOSFET and CMOS
APPARATUS –experiment kit, CRO probes,
THEORY:
MOSFET(metal–oxide–semiconductor field-effect transistor)
The metal–oxide–semiconductor field-effect transistor (MOSFET) is a transistor used for
amplifying or switching electronic signals. Although the MOSFET is a four-terminal device
with source (S), gate (G), drain (D), and body (B) terminals,[1] the body (or substrate) of the
MOSFET often is connected to the source terminal, making it a three-terminal device like
other field-effect transistors. Because these two terminals are normally connected to each other
(short-circuited) internally, only three terminals appear in electrical diagrams. The MOSFET is
by far the most common transistor in both digital and analog circuits, though the bipolar
junction transistor was at one time much more common.
In enhancement mode MOSFETs, a voltage drop across the oxide induces a conducting
channel between the source and drain contacts via the field effect. The term "enhancement
mode" refers to the increase of conductivity with increase in oxide field that adds carriers to
the channel, also referred to as the inversion layer. The channel can contain electrons (called
an nMOSFET or nMOS), or holes (called a pMOSFET or pMOS), opposite in type to the
substrate, so nMOS is made with a p-type substrate, and pMOS with an n-type substrate (see
article on semiconductor devices). In the less common depletion mode MOSFET, detailed later
on, the channel consists of carriers in a surface impurity layer of opposite type to the substrate,
and conductivity is decreased by application of a field that depletes carriers from this surface
layer.[2]
The 'metal' in the name MOSFET is now often a misnomer because the previously metal gate
material is now often a layer of polysilicon (polycrystalline silicon). Aluminium had been the
gate material until the mid-1970s, when polysilicon became dominant, due to its capability to
form self-aligned gates. Metallic gates are regaining popularity, since it is difficult to increase
the speed of operation of transistors without metal gates.

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Likewise, the 'oxide' in the name can be a misnomer, as different dielectric materials are used
with the aim of obtaining strong channels with smaller applied voltages.
An insulated-gate field-effect transistor or IGFET is a related term almost synonymous with
MOSFET. The term may be more inclusive, since many "MOSFETs" use a gate that is not
metal, and a gate insulator that is not oxide. Another synonym is MISFET for metal–
insulator–semiconductor FET.

P-channel

N-channel

JFET MOSFET enh MOSFET enh (no bulk) MOSFET dep

Metal–oxide–semiconductor structure
The traditional metal–oxide–semiconductor (MOS) structure is obtained by growing a layer of
silicon dioxide (SiO2) on top of a silicon substrate and depositing a layer of metal or
polycrystalline silicon (the latter is commonly used). As the silicon dioxide is a dielectric
material, its structure is equivalent to a planar capacitor, with one of the electrodes replaced by
a semiconductor. When a voltage is applied across a MOS structure, it modifies the distribution
of charges in the semiconductor. If we consider a p-type semiconductor (with the density
of acceptors, p the density of holes; p = NA in neutral bulk), a positive voltage, , from gate
to body (see figure) creates a depletion layer by forcing the positively charged holes away from
the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile,
negatively charged acceptor ions (see doping (semiconductor)). If is high enough, a high
concentration of negative charge carriers forms in an inversion layer located in a thin layer

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next to the interface between the semiconductor and the insulator. Unlike the MOSFET, where
the inversion layer electrons are supplied rapidly from the source/drain electrodes, in the MOS
capacitor they are produced much more slowly by thermal generation through carrier
generation and recombination centers in the depletion

in the inversion layer is the same as the volume density of holes in the body is called the
threshold voltage. When the voltage between transistor gate and source (VGS) exceeds the
threshold voltage (Vth), it is known as overdrive voltage.

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CMOS(Complementary metal–oxide–semiconductor):

CMOS is a technology for constructing integrated circuits. CMOS technology is used in

microprocessors, microcontrollers, static RAM, and other digital logic circuits. CMOS
technology is also used for several analog circuits such as image sensors (CMOS sensor), data
converters, and highly integrated transceivers for many types of communication. Frank
Wanlass patented CMOS in 1963 (US patent 3,356,858).
CMOS is also sometimes referred to as complementary-symmetry metal–oxide–
semiconductor (or COS-MOS).[1] The words "complementary-symmetry" refer to the fact that
the typical digital design style with CMOS uses complementary and symmetrical pairs of p-
type and n-type metal oxide semiconductor field effect transistors (MOSFETs) for logic
functions.[2]
Two important characteristics of CMOS devices are high noise immunity and low static power
consumption. Since one transistor of the pair is always off, the series combination draws
significant power only momentarily during switching between on and off states. Consequently,
CMOS devices do not produce as much waste heat as other forms of logic, for example
transistor–transistor logic (TTL) or NMOS logic, which normally have some standing current
even when not changing state. CMOS also allows a high density of logic functions on a chip. It
was primarily for this reason that CMOS became the most used technology to be implemented
in VLSI chips.
The phrase "metal–oxide–semiconductor" is a reference to the physical structure of certain
field-effect transistors, having a metal gate electrode placed on top of an oxide insulator, which
in turn is on top of a semiconductor material. Aluminium was once used but now the material
is polysilicon. Other metal gates have made a comeback with the advent of high-k dielectric
materials in the CMOS process, as announced by IBM and Intel for the 45 nanometre node and
beyond

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CMOS as an Inverter

CMOS characteristics

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PROCEDURE:
1) First we connect the dual battery source in input and output part of the circuit as a V GS
and VDS.
2) Then we connect the the current source between the drain to source.
3) First we constant the input voltage source and vary the output the voltage source.
4) After this we constant the output voltage source and vary the input voltage source.
RESULT: we have successfully plot the characteristics of MOSFET and CMOS.

PRECAUTION :
1. The connections should be made properly and tightly.
2. Check all the connections before switching ON the kit.

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