A P P L I C AT I O N N O T E

De-Embedding and Embedding S-Parameter

Networks Using a Vector Network Analyzer
Introduction
1.50

Traditionally RF and microwave components have been designed in packages with 1.00

coaxial interfaces. Complex systems can be easily manufactured by connecting 0.50

0.00

a series of these separate coaxial devices. Measuring the performance of these -0.50

components and systems is easily performed with standard test equipment that -1.00

-1.50

uses similar coaxial interfaces.

L

-2.00

However, modern systems demand a higher level of component integration, lower

power consumption, and reduced manufacturing cost. RF components are rapidly
shifting away from designs that use expensive coaxial interfaces, and are moving
toward designs that use printed circuit board and surface mount technologies
(SMT). The traditional coaxial interface may even be eliminated from the final
product. This leaves the designer with the problem of measuring the performance
of these RF and microwave components with test equipment that requires coaxial
interfaces. The solution is to use a test fixture that interfaces the coaxial and non-
coaxial transmission lines.

The large variety of printed circuit transmission lines makes it difficult to create
test equipment that can easily interface to all the different types and dimensions
of microstrip and coplanar transmission lines [1] (Figure 1). The test equipment
requires an interface to the selected transmission media through a test fixture.
Accurate characterization of the surface mount device under test (DUT) requires
the test fixture characteristics to be removed from the measured results. The test
equipment typically used for characterizing the RF and microwave component
is the vector network analyzer (VNA) which uses standard 50 or 75 ohm coaxial
interfaces at the test ports. The test equipment is calibrated at the coaxial
interface defined as the “measurement plane,” and the required measurements
are at the point where the surface-mount device attaches to the printed circuit
board, or the “device plane” (Figure 2). When the VNA is calibrated at the coaxial

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interface using any standard calibration kit, the DUT measurements include the test
fixture effects.

Over the years, many different approaches have been developed for removing the
effects of the test fixture from the measurement, which fall into two fundamental
categories: direct measurement and de-embedding. Direct measurement requires
specialized calibration standards that are inserted into the test fixture and measured.
The accuracy of the device measurement relies on the quality of these physical
standards [2]. De-embedding uses a model of the test fixture and mathematically
removes the fixture characteristics from the overall measurement. This fixture “de-
embedding” procedure can produce very accurate results for the non-coaxial DUT,
without complex non-coaxial calibration standards.

Measurement Device Measurement

Plane Plane Plane

SMT
Device

Coaxial Coaxial
Interface Interface

Coplanar Microstrip
Test Fixture

Figure 1. Types of printed circut Figure 2. Test fixture configuration showing

transmission lines the measuremen and device planes

The process of de-embedding a test fixture from the DUT measurement can be
performed using scattering transfer parameters (T-parameter) matrices [3]. For this
case, the de-embedded measurements can be post-processed from the measurements
made on the test fixture and DUT together. Also modern CAE tools such as the Keysight
Advanced Design System (ADS) have the ability to directly de-embed the test fixture
from the VNA measurements using a negation component model in the simulation [3].
Unfortunately these approaches do not allow for real-time feedback to the operator
because the measured data needs to be captured and post-processed in order to
remove the effects of the test fixture. If real-time de-embedded measurements are
required, an alternate technique must be used.

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It is possible to perform the de-embedding calculation directly on the VNA using a
different calibration model. If we include the test fixture effects as part of the VNA
calibration error coefficients, real time de-embedded measurements can be displayed
directly on the VNA. This allows for real-time tuning of components without including the
fixture as part of the measurement.

The following sections of this paper will review S-parameter matrices, signal flow
graphs, and the error correction process used in standard one and two-port calibrations
on all Keysight vector network analyzers such as the E5080A ENA Vector Network
Analyzer. The de-embedding process will then be detailed for removing the effects of a
test fixture placed between the measurement and device planes. Also included will be a
description on how the same process can be used to embed a hypothetical or “virtual”
network into the measurement of the DUT.

S-parameters and Signal Flow Graphs

RF and microwave networks are often characterized using scattering or S-parameters
Port 1 Port 2
[4]. The S-parameters of a network provide a clear physical interpretation of the
transmission and reflection performance of the device. The S-parameters for a two- a1
S11S12
b2

port network are defined using the reflected or emanating waves, b1 and b2, as the S21S22
b1 a2
dependent variables, and the incident waves, a1 and a2, as the independent variables
(Figure 3). The general equations for these waves as a function of the S-parameters is b1 S11S12 a1
shown below: b2 S21S22 a2

Figure 3. Definition of a two-port

b1 = S11a1 + S12a2 S-Parameter network
b 2 = S21a1 + S22a2

Using these equations, the individual S-parameters can be determined by taking the S21
a1 b2
ratio of the reflected or transmitted wave to the incident wave with a perfect termination
S11 S22
placed at the output. For example, to determine the reflection parameter from Port 1,
b1 a2
defined as S11, we take the ratio of the reflected wave, b1 to the incident wave, a1, using
S12
a perfect termination on Port 2. The perfect termination guarantees that a2 = 0 since
there is no reflection from an ideal load. The remaining S-parameters, S21, S22 and S12, Figure 4. Signal flow graph
representation of a two-port
are defined in a similar manner [5]. These four S-parameters completely define the two- S-parameter network
port network characteristics. All modern VNAs, can easily measure the S-parameters of
a two-port device.

Another way to represent the S-parameters of any network is with a signal flow
graph (Figure 4). A flow graph is used to represent and analyze the transmitted and
reflected signals from a network. Directed lines in the flow graph represent the signal

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flow through the two-port device. For example, the signal flowing from node a1 to b1
is defined as the reflection from Port 1 or S11. When two-port networks are cascaded,
it can be shown that connecting the flow graphs of adjacent networks can be done
because the outgoing waves from one network are the same as the incoming waves of
the next [6]. Analysis of the complete cascaded network can be accomplished using
Mason’s Rule [6]. It is the application of signal flow graphs that will be used to develop
the mathematics behind network de-embedding and modifying the error coefficients in
the VNA.

Defining the Test Fixture and DUT

Before the mathematical process of de-embedding is developed, the test fixture and the
DUT must be represented in a convenient form. Using signal flow graphs, the fixture and
device can be represented as three separate two-port networks (Figure 5). In this way,
the test fixture is divided in half to represent the coaxial to non-coaxial interfaces on
each side of the DUT. The two fixture halves will be designated as Fixture A and Fixture
B for the left-hand and right-hand sides of the fixture respectively. The S-parameters
FAxx (xx = 11, 21, 12, 22) will be used to represent the S-parameters for the left half of
the test fixture and FB xx will be used to represent the right half.

Fixture A DUT Fixture B

FA21 S21 FB21

FA11 FA21 S11 S22 FB11 FB22

FA12 S12 FB12

Figure 5. Signal flow graph representing the test fixture halves and the device under test (DUT)

If we wish to directly multiply the matrices of the three networks, we find it mathematically
more convenient to convert the S-parameter matrices to scattering transfer matrices
or T-parameters. The mathematical relationship between S-parameter and T-parameter
matrices is given in Appendix A. The two-port T-parameter matrix can be represented as
[T], where [T] is defined as having the four parameters of the network.

T11T12
T =
T 21T12

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Because we defined the test fixture and DUT as three cascaded networks, we can easily
multiply their respective T-parameter networks, TA, TDUT and TB. It is only through the useof
T-parameters that this simple matrix equation be written in this form.

[ TMeasured ] = [ TA ] [ TDUT ] [ TB ]

This matrix operation will represent the T-parameters of the test fixture and DUT
whenmeasured by the VNA at the measurement plane.

General matrix theory states that if a matrix determinate is not equal to zero, then the
matrix has an inverse, and any matrix multiplied by its inverse will result in the identity
matrix. For example, if we multiply the following T-parameter matrix by its inverse matrix,
we obtain the identity matrix.

10
[ T ][ T ] -1 =
0 1

It is our goal to de-embed the two sides of the fixture, TA and TB, and gather the infor-
mation from the DUT or TDUT. Extending this matrix inversion to the case of the cascaded
fixture and DUT matrices, we can multiply each side of the measured result by the
inverse T-parameter matrix of the fixture and yield the T-parameter for the DUT only. The
T-parameter matrix can then be converted back to the desired S-parameter matrix using
the equations in Appendix A.

-1 -1
[ TA ] [ TA ] [ TDUT ] [ TB ] [ TB ] = [ TDUT ]

Using the S or T-parameter model of the test fixture and VNA measurements of the total
combination of the fixture and DUT, we can apply the above matrix equation to de-embed
the fixture from the measurement. The above process is typically implement-ed after the
measurements are captured from the VNA. It is often desirable that the de-embedded
measurements be displayed real-time on the VNA. This can be accom-plished using
techniques that provide some level of modification to the error coefficients used in the
VNA calibration process.

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Test Fixture Models
Before we can mathematically de-embed the test fixture from the device measurements,
the S or T-parameter network for each fixture half needs to be modeled. Because of
the variety of printed circuit types and test fixture designs, there are no simple textbook
formulations for creating an exact model. Looking at the whole process of de-embed-
ding, the most difficult part is creating an accurate model of the test fixture. There are
many techniques that can be used to aid in the creation of fixture models, including
simulation tools such as Keysight Advanced Design System (ADS) . Often observation
of the physical structure of the test fixture is required for the initial fixture model. Mea-
surements made on the fixture can be used to optimize the fixture model in an iterative
manner. Time domain techniques, available on most network analyzers, can also be very
useful when optimizing the fixture model [2].

Let’s examine several fixture models that can be used in the de-embedding process. We
will later show that some of the simpler models are used in the firmware of many vector
network analyzers to directly perform the appropriate de-embedding without requiring the
T-parameter matrix mathematics.

The simplest model assumes that the fixture halves consist of perfect transmission lines
of known electrical length. For this case, we simply shift the measurement plane to the
DUT plane by rotating the phase angle of the measured S-parameters (Figure 6). If we
assume the phase angles, 0A and 0B, represent the phase of the right and left test fixture
halves respectively, then the S-parameter model of the fixture can be represented by the
following equations.

0 e -j 0A lA lB
SA =
e-j 0A 0
0A = ßlA 0B = ßlB
Port 1 DUT Port 2
Z0 = 50Ω Z 0 = 50Ω
0 e -j 0B
SB = Measurement Device Device Measurement
e-j 0B 0 Plane Plane Plane Plane

Figure 6. Modeling the fixture using an ideal transmission line

The phase angle is a function of the length of the fixture multiplied by the phase constant
of the transmission line. The phase constant, ß, is defined as the phase velocity divided
by the frequency in radians. This simple model assumes that the fixture is a lossless
transmission line that is matched to the characteristic impedance of the system. An easy

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way to calculate the S-parameter values for this ideal transmission line is to use a software
simulator such as Keysight ADS. Here, each side of the test fixture can be modeled as
a 50-ohm transmission line using the appropriate phase angle and reference frequency
(Figure 7). Once the simulator calculates all the S-parameters for the circuit, the information
can be saved to data file for use in the de-embedding process.

Left-hand side of test fixture

Term TLIN Term

Term 1 TL1 Term 2
Num = 1 Z = 50.0 Ohm Num = 2
Z = 50 Ohm F = 1 GHz Z = 50 Ohm

S PA RA M E TE RS

S_Param
SP1
Start = 1.0 GHz
Stop = 5.0 GHz
Step = 100 MHz

Figure 7. Keysight ADS model for the test fixture using an ideal two-port transmission line

This model only accounts for the phase length between the measurement and device
planes. In some cases, when the fixture is manufactured with low-loss dielectric materials
and uses well-matched transitions from the coaxial to non-coaxial media, this model may
provide acceptable measurement accuracy when performing de-embedding. An improved
fixture model modifies the above case to include the insertion loss of the fixture. It can also
include an arbitrary characteristic impedance, ZA, or ZB, of the non-coaxial transmission
line (Figure 8). The insertion loss is a function of the transmission line characteristics and
can include dielectric and conductor losses. This loss can be represented using the
attenuation factor, a, or the loss tangent, tanδ.

lA lB

0A = ßlA 0B = ßlB
Port 1 aA DUT aB
Port 2
Z 0 = 50Ω Z0 = 50Ω

Device
Device Measurement
Measurement Plane
Plane Plane
Plane

Page 7
Figure 8. Modeling the fixture using a lossy transmission line
To improve the fixture model, it may be possible to determine the actual characteristic
impedance of the test fixture’s transmission lines, ZA and ZB, by measuring the physical
characteristics of the fixture and calculating the impedance using the known dielectric
constant for the material. If the dielectric constant is specified by the manufacturer with a
nominal value and a large tolerance, then the actual line impedance may vary over a wide
range. For this case, you can either make a best guess to the actual dielectric constant or
use a measurement technique for determining the characteristic impedance of the line.
One technique uses the time domain option on the vector network analyzer. By measuring
the frequency response of the fixture using a straight section of transmis-sion line, the
analyzer will convert this measurement into a Time Domain Reflectometer (TDR) response
that can be used to determine the impedance of the transmission line. Refer to the
analyzer’s User’s Guide for more information.

Once again, a software simulator can be used to calculate the required S-parameters for
this model. Figure 9 shows the model for the test fixture half using a lossy transmission line
with the attenuation specified using the loss tangent. For this model, the line impedance
was modified to a value of 48-ohms based on physical measurements of the transmission
line width and dielectric thickness and using a nominal value for the dielectric constant.

Left-hand side of test fixture

Term TLINP F = 1 GHz Term

Term 1 TL2 TanD = 0.002 Term 2
Num = 1 Z = 48.0 Ohm Mur = 1 Num = 2
Z = 50 Ohm L = 1000.0 mil TanM = 0 Z = 50 Ohm
K = 2.1 Sigma = 0
A = 0.002

S PA RA M E TE RS

S_Param
SP1
Start = 1.0 GHz
Stop = 5.0 GHz
Step = 100 MHz

Figure 9. Keysight ADS model for the test fixture using a lossy two-port transmission line

We will later find that many vector network analyzers can easily implement this model by
allowing the user to enter the loss, electrical delay and characteristic impedance directly
into the analyzers “calibration thru” definition.

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The last model we will discuss includes the complex effects of the coax-to-non-coaxial
transitions as well as the fixture losses and impedance differences we previously
discussed. While this model can be the most accurate, it is the hardest one to create
because we need to include all of the non-linear effects such as dispersion, radiation
and coupling that can occur in the fixture. One way to determine the model is by using
a combination of measurements of known devices placed in the fixture (which can be
as simple as a straight piece of transmission line) and a computer model whose values
are optimized to the measurements. A more rigorous approach uses an electromagnetic
(EM) simulator to calculate the S-parameters of the test fixture. The EM approach can be
very accurate as long as the physical test fixture characteristics are modeled correctly in
the simulator.

As an example, we will show a model created by optimizing a computer simulation

Coax Microstrip
based on a series of measurements made using the actual test fixture. We begin by L

modeling a coax-to-microstrip transition as a lumped series inductance and shunt

capacitance (Figure 10). The values for the inductance and capacitance will be optimized C

using the measured results from the straight 50-ohm microstrip line placed in the test
fixture. An ADS model is then created for the test fixture and microstrip line using this Figure 10. Simplified model of a
coax to microstrip transition
lumped element model.

The Keysight ADS model, shown in Figure 11, use the same lumped element
components placed on each side to model the two test fixture transitions. A small length
of coax is used to represent the coaxial section for each coax-to-microstrip connector.
A microstrip thru line is placed in the center whose physical and electrical parameters
match the line measured in the actual test fixture. This microstrip model requires an
accurate value for dielectric constant and loss tangent for the substrate material used.
Uncertainty in these values will directly affect the accuracy of the model.

Term L MLIN L Term

Term1 Coax L1 TL1 L2 Coax Term2
Num = 1 TL2 L = L1 pH Subst = “MSub1” L = L1 pH TL3 Num = 2
Z = 50 Ohm Di = 42.1 mil R= W = W1 mil R= Di = 42.1 mil Z = 50 Ohm
Do = 141.0 mil L = 1000.0 mil Do = 141.0 mil
C C
L = 300.0 mil C1 C2 L = 300.0 mil
Er = 2.1 C = Cap1 pF C = Cap1 pF Er = 2.1
TanD = 0.0001 TanD = 0.0001
Rho = 1 Rho = 1
Sigma = 0 Sigma = 0

Figure 11. Keysight ADS model of test fixture and microstrip line

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S-parameters measurements are then made on the test fixture and the microstrip thru line
using a vector network analyzer. The four S-parameters can be imported into the ADS
software. The model values for inductance and capacitance are optimized using ADS
until a good fit is obtained between the measurements and the simulated results. As an
example, Figure 12 shows the measured and optimized results for the magnitude of S11
using the test fixture with a microstrip thru line. All four S-parameters should be optimized
and compared to the measured S-parameters to verify the accuracy of the model values.
Because of non-linear effects in the transition, this simplified lumped element model for
the transition may only be valid only over a small frequency range. If broadband operation
is required, an improved model must be implemented to incorporate the non-linear
behavior of the measured S-parameters as a function of frequency.

Once the lumped element parameters are optimized, the S-parameters for each half of
the test fixture can be simulated and saved for use by the de-embedding algorithm. Keep
in mind that it is necessary to include the actual length of microstrip line between the
transition and device when calculating the S-parameters for the test fixture halves.

Measured vs Modeled S11

- 15

- 20

- 25

- 30
S11 (dB)

- 35

- 40

- 45

- 50

- 55

2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0

Frequency (GHz)

Figure 12. Comparison of S11 for the measured and modeled microstrip thru line

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The De-Embedding Process
Whether a simplified model, such as a length of ideal transmission line, or a complex
model, created using an EM simulator, is used for the test fixture, it is now necessary
to perform the de-embedding process using this S-parameter model. There are two
main ways the de-embedding process can be implemented. The first technique uses
measured data from a network analyzer and processes the data using the T-parameter
matrix calculations discussed in the previous section. The second technique uses the
network analyzer to directly perform the de-embedding calculations, allowing the user
to examine the de-embedding response in real-time. This technique is accomplished by
modifying the calibration error terms in the analyzer’s memory.

The static approach

This approach uses measured data from the test fixture and DUT gathered at the
measurement plane. The data can be exported from the network analyzer or directly
imported into a simulation tool, such as ADS. Using the fixture model, the de-embedding
process is performed using T-parameter matrix calculations or the negation model in
ADS [3]. Once the measurements are de-embedded, the data is displayed statically on a
computer screen or can be downloaded into the analyzer’s memory for display.

There are five steps for the process of de-embedding the test fixture using T-parameters:

Step 1: Create a mathematical model of the test fixture using S or T-parameters to

represent each half of the fixture.

Step 2: Using a vector network analyzer, calibrate the analyzer using a standard coaxial
calibration kit and measure the S-parameters of the device and fixture together. The
S-parameters are represented as complex numbers.

Step 3: Convert the measured S-parameters to T-parameters.

Step 4: Using the T-parameter model of the test fixture, apply the de-embedding equation
to the measured T-parameters.

[ TDUT ] = [ TA ] –1 [ TM ] [ TB ] –1

Step 5: Convert the final T-parameters back to S-parameters and display the results.
This matrix represents the S-parameters of the device only. The test fixture effects have
been removed.

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The real-time approach
This real-time approach will be detailed in the following sections of this application
note. For this technique, we wish to incorporate the test fixture S-parameter mode into
the calibration error terms in the vector network analyzer. In this way, the analyzer is
performing all the de-embedding calculations, which allows the users to view real-time
measurements of the DUT without the effects of the test fixture.

Most vector network analyzers are capable of performing some modification to the error
terms directly from the front panel. These include port extension and modifying the
calibration “thru” definition. Each of these techniques will now be discussed, including
a technique to modify the traditional twelve-term error model to include the complete
S-parameter model for each side of the test fixture.

Simple Corrections for Future Effects

Port extentions
The simplest form of de-embedding is port extensions, which mathematically extends
the measurement plane towards the DUT. This feature is included in the firmware of
most modern network analyzers. Port extensions assume that the test fixture looks like a
perfect transmission line of some known phase length. It assumes the fixture has no loss,
a linear phase response, and constant impedance. Port extensions are usually applied to
the measurements after a two-port calibration has been performed at the end of the test
cables. If the fixture performance is considerably better than the specifications of the DUT,
this technique may be sufficient.

Port extension only adds or subtracts phase length from the measured S-parameter. It
does not compensate for fixture losses or impedance discontinuities. In most cases, there
will be a certain amount of mismatch interaction between the coax-to-fixture transition
and the DUT that will create uncertainty in the measured S-parameter. This uncertainty
typically results in an observed ripple in the S-parameter when measured over a wide
frequency range. As an example, consider the measurements shown in Figure 13 of a
short placed at the end of two different constant impedance transmission lines: a high-
quality coaxial airline (upper curve), and a microstrip transmission line (lower curve). Port
extensions were used to move the measurement plane up to the short. However, as
seen in the figure, port extension does not compensate for the losses in the transmission
line. Also note that the airline measurement exhibits lower ripple in the measured S11
trace while the coax-to-microstrip test fixture shows a much larger ripple. Generally,
the ripple is caused by interaction between the discontinuities at the measurement and
device planes. The larger ripple in the lower trace results from the poor return loss of the

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microstrip transition (20 dB versus > 45 dB for the airline). This ripple can be reduced if
improvements are made in the return loss of the transition section.

Modifying calibration standards

Figure 13. Port extension applied to a measurement of a short at the

end of an airline (upper trace) and at the end of a microstrip transmis-
sion line (lower trace)

During calibration of the vector network analyzer, the instrument measures actual,
well-defined standards such as the open, short, load and thru, and compares the
measurements to ideal models for each standard. Any differences between the
measurements and the models are used to compute the error terms contained within
the measurement setup. These error terms are then used to mathematically correct
the actual measurements of the device under test. This calibration process creates a
reference or calibration plane at the point where the standards are connected. As long as
a precise model is known for each calibration standard, an accurate reference plane can
be established. For example, in some Keysight coaxial calibration kits, the short standard
is not a true short at the reference plane, it is actually an “offset” short. The offset short
consists of a small piece of coaxial transmission line placed between the connector
and the true short. When selecting a calibration kit (definition), you are instructing the
instrument to use the correct model for the offset short.

Another way to implement the reference plane or port extensions, discussed in the
previous section, would be to redefine the cal kit definitions for each of the calibration
standards. For example, if we wanted to extend each reference plane a value of
100 psec past the point of calibration, we can modify each standard definition to include
this 100 psec offset. This value would be subtracted from the original offset delay of the
short, open and load standards. The “thru” definition would include the total delay of

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the extensions from each port. As an example, when using the Keysight 85033E cal kit,
we would modify the short definition to have an offset delay of –68.202 psec (calculated
from 31.798–100 psec, with the original 3.5 mm short delay of 31.798 psec). The same
approach is applied to the open and load standards. The “thru” definition would have an
offset delay of –200 psec (0–100–100 psec, using the original thru delay of 0 psec). The
thru definition requires the delay contributions from the port 1 and port 2 port extensions.

The calibration kit definition actually includes three offset characteristics for each
standard [7]. They are Offset Delay, Offset Loss and Offset Impedance (Z0). These three
characteristics are used to accurately model each standard so the analyzer can establish
a reference plane for each of the test ports.

Fixture de-embedding can be accomplished by adjusting the calibration kit definition table
to include the effects of the test fixture. In this way, some of the fixture characteristics can
be included in the error terms determined during the coaxial calibration process. Once
the calibration is complete, the analyzer will mathematically remove the delay, loss and
impedance of the fixture. It should be noted that some accuracy improvements would
be seen over the previously discussed port extension technique, but some assumptions
made about the fixture model will limit the overall measurement accuracy of the system.
We will now discuss the implementation and limitations of modifying the cal kit definition
to include the characteristics of the test fixture.

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Offset delay
The test fixture will have electrical delay between the measurement plane and DUT due to
the signal transmission time through the fixture. For coaxial transmission lines, the delay
can be obtained from the physical length, propagation velocity of light in free space and
the permittivity constant.

ℓ √ εr
Delay (seconds) =
c
ℓ= Physical length in meters
εr = Relative permittivity
c = 2.997925 x 108 m/s

Here we assumed that the relative permeability, μr, equals one. Note the electrical delay for
transmission lines other than coax, such as microstrip, will have a require a modification
to the above equation due the change in the effective permittivity of the transmission
media. Most RF software simulators, will calculate the effective phase length and effective
permittivity of a transmission line based on the physical parameters of the circuit. The
effective phase can be converted to electrical delay using the following equation.

o
Delay (seconds) =
360 ƒ
Effective phase (degrees)
ƒ Frequency (Hz)

The “thru” standard would be modified to include the delay from the total fixture length.
The short, open and load standards would be modified to one half this delay, since we are
extending the reference planes half way on each side. Here we assume that the device
under test is placed directly in the middle of the fixture. Note that adjustments can be
made to the cal kit definition table should the fixture be asymmetrical. In this case two sets
of shorts, opens and loads would be defined, a separate set for each test port.

Offset loss
The network analyzer uses the offset loss to model the magnitude loss due to skin effect
of a coaxial type standard. Because the fixture is non-coaxial, the loss as a function of
frequency may not follow the loss of a coaxial transmission line so the value entered may
only approximate the true loss of the fixture. The value of loss is entered into the standard
definition table as gigohms/second or ohms/nanosecond at 1 GHz. The offset loss in

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gigohms/second can be calculated from the measured loss at 1 GHz and the physical
length of the particular standard by the following equation:

Offset loss
( )GΩ
s 1 GHz
=
dBloss 1 GHzC √ εr Z0
10 log10(e)ℓ

Where:
dBloss @ 1 GHz = Measured insertion loss at 1 GHz
Z0 = Offset Z0
ℓ = Physical length of the offset

Offset impedance
The offset impedance (Z0) is the characteristic impedance within the offset length.
Modification of this term can be used to enter the characteristic impedance of the fixture.

Figure 14 shows the true insertion loss of a microstrip thru line (lower trace). This figure
also shows a S21 measurement of the fixture “thru” after modifying the cal kit definition
to include the effects of the fixture loss (top curve). For this case, we would expect the
measured loss of the fixture “thru” (after calibration) to be a flat line with 0 dB insertion
loss. The actual measurement shows a trade-off between the high and low frequencies
by adjusting the offset loss to be optimized in the middle of the band. The offset loss
was set to 10 Gohm/sec for the FR-4 material used. For this case, a 3-inch length of
microstrip 50-ohm transmission line was used with an approximate dielectric constant
of 4.3 and loss tangent value of 0.012. The value of 10 Gohm/sec for the offset loss is a
good compromise across the 300 kHz to 9 GHz frequency range. This value can easily be
modified to optimize the offset loss over the frequency range of interest.

Figure 14. Measurement of a microstrip “thru” line (lower trace) and the test fixture “thru” after the VNA was
calibrated with a modified adapter loss (upper trace)

Page 16
Modifying the standards definition
Modification of the cal kit standards definition is easily performed on E5080A ENA or
other modern vector network analyzers. Figure 15 shows the definition table which is used
to change the offset delay, offset loss and offset impedance for the short, open, load and
thru model definitions.

Figure 15. E5080A ENA dialog showing the modified cal kit definition

We begin the process by selecting the coaxial cal kit that will be used to calibrate the
vector network analyzer over the frequency range of interest. We also require the values
for offset delay, loss and impedance of the test fixture. As an example, we will assume
that the total “thru” delay of the fixture is 650 psec, the offset loss is calculated as
10 Gohm/s and the offset impedance is 50 ohms. We will also assume that the fixture is
symmetrical and each half of the fixture introduces 325 psec of delay (this value will be
used to modify the short, open and load definitions). The selected coaxial calibration kit
definition will now be modified to include the characteristics of the test fixture.

Adjust the short delay to a value calculated by subtracting the delay introduced by the
fixture half, from the original definition. For example, when using the 85033E 3.5 mm
calibration kit, the original offset delay is defined as 31.798 psec. Change this value to
–293.202 psec (calculated from 31.798-325 psec, in our example). Modify the loss to
10 Gohm/s. The offset impedance can remain at 50 ohms for this example. Perform the
same adjustments for the open and load definitions.

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The thru delay is modified to a value equal to original delay minus the total delay thru the
test fixture. For this example, the modified thru delay would be set to –650 psec, since the
original delay is 0 psec. The thru loss is also set to 10 Gohms/ sec and Z0 is 50 ohms.

Once the standards definitions are modified to include the test fixture characteristics, the
updated cal kit can be saved as a user kit on the network analyzer. Give the new cal kit a
specific name to distinguish it from the other kits stored in the analyzer memory.

The analyzer calibration can now be performed using a standard coaxial, full two-
port calibration with the new cal definition selected for the cal kit type. The test fixture
is not connected until after the coaxial calibration is complete. The error correction
mathematics in the analyzer will include the effects of the test fixture loss, delay and
impedance in the calibration.

Changing the offset definitions will compensate for the linear phase shift, constant
impedance and, somewhat approximate the loss of the test fixture. Here we are
assuming that the loss of the fixture follows the skin effect loss of a coaxial transmission,
which in most cases is not exactly valid. It also assumes that any mismatches between
the transitions are solely created from an impedance discontinuity. Generally, the coaxial
to non-coaxial transition cannot be modeled in such a simple manner and more elaborate
models need to be implemented for the test fixture. Introduction of complex models for
the fixture will require modifying the twelve-term error model used by the VNA during the
error correction process. The next section describes the error model used by the vector
network analyzer and the process that can be used to modify the error terms stored in
the analyzer’s.

Modifying the Twelve-Term Error Model

In this section, we review the twelve-term error model used in the VNA to remove the
systematic error of the test equipment. We then develop the de-embedding mathematics
in order to combine the test fixture model into the VNA’s error model. In this way, the VNA
can directly display measurement data without including the effects of the fixture.

VNA calibration and error models

Measurement errors exist in any network measurement. When using a VNA for the
measurement, we can reduce the measurement uncertainty by measuring or calculating
the causes of uncertainty. During the VNA calibration, the system measures the magnitude
and phase responses of known devices, and compares the measurement with actual
device characteristics. It uses the results to characterize the instrument and effectively
remove the systematic errors from the measured data of a DUT [8]. Systematic errors are
the repeatable errors that result from the non-ideal measurement system.

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For example, measurement errors can result from directivity effects in the couplers,
cable losses and mismatches between the test system and the DUT. A typical two-port
coaxial test system can be modeled as having twelve errors that can be corrected.
These errors are characterized during system calibration and mathematically removed
from the DUT measurements. As long as the measurement system is stable over time
and temperature, these errors are repeatable and the same calibration can be used for
all subsequent measurements.

In a way, the VNA calibration process is de-embedding the system errors from the
measurement. Figure 16 shows the three system errors involved when measuring a
oneport device. These errors separate the DUT measurement from an ideal measurement
system. Edf is the forward directivity error term resulting from signal leakage through the
directional coupler on Port 1. Erf is the forward reflection tracking term resulting from the
path differences between the test and reference paths. Esf is the forward source match
term resulting from the VNA’s test port impedance not being perfectly matched to the
source impedance. We can refer to this set of terms as the Error Adapter coefficients
of the one-port measurement system. These forward error terms are defined as those
associated with Port 1 of the VNA. There are another three terms for the reverse direction
associated with reflection measurements from Port 2.

The VNA calibration procedure requires a sufficient number of known devices or

calibration standards. In this case three standards are used for a one-port calibration. The
VNA calculates the terms in the Error Adapter based on direct or raw measurements of
these standards. A typical coaxial calibration kit contains a short, open and load standard

Ideal
Measurement Edf Esf DUT
System

Erf

Error Adapter

Figure 16. Signal flow diagram of a one-port error adapter model

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for use in this step of the process. Once the Error Adapter is characterized, corrected
measurements of a DUT can be display directly on the VNA display. The equation for
calculating the actual S11A of the DUT is shown below. This equation uses the three
reflection error terms and the measured S11M of the DUT.

(S 11M – Edf)
S11A =
Esf ( S11M – Edf ) + Erf

Expanding the above model of the Error Adapter for two-port measurements, we find that
there exists an additional three error terms for measurements in the forward direction.
Once again, we define forward measurements as those associated with the stimulus
signal leaving Port 1 of the VNA. The additional error terms are Etf, Elf, and Exf for forward
transmission, forward load match and forward crosstalk respectively. The total number of
error terms is twelve, six in the forward direction and six in the reverse. The flow diagram
for the forward error terms in the two-port error model is shown in Figure 17. This figure
also shows the S-parameters of the DUT. This forward error model is used to calculate
the actual S11 and S21 of the DUT. Calculations of the actual S12 and S22 are performed
using the reverse error terms. The error model for the reverse direction is the same as in
Figure 17, with all of the forward terms replaced by reverse terms [8].

Exf

1 S21 Etf

Edf Esf S11 DUT S22 Elf

Erf S12

Figure 17. Signal flow diagram of the forward two-port error terms

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Modifying the error terms to include the fixture error
If we examine the forward error model and insert a test fixture before and after the DUT,
we can create a new flow graph model that includes the fixture terms. Figure 18 shows
the original forward calibration terms being cascaded with the fixture error terms. This
figure also shows how the two sets of error terms can be combined into a new set of
forward error terms denoted with a primed variable. The same holds true for the reverse
error model. It should be noted that for the VNA to correct for both the systematic errors
in the test equipment and errors in the test fixture, the combined error model must still fit
into a traditional twelve-term error model. This includes using a unity value for the forward
transmission term on the left side of the flow diagram [9].

1 FA21 S21 FB21 Etf

Edf Esf FA11 FA22 S11 S22 FB11 FB22 Elf

Erf FA12 S12 FB12

Fixture A Fixture B
DUT

Exf
1 S21 Etf’

Edf’ Esf’ S11 DUT S22 Elf’

Erf’ S12

Figure 18. Signal flow diagram of the combined test fixture S-parameters with the forward two-port error terms

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Renormalizing the modified error terms, we find the set of equations that are used to
represent the combined errors of the instrument and the fixture. Once these terms are
entered into the analyzer’s error correction algorithm, the displayed measurements will be
those of the DUT only at the device plane. The test fixture effects will be de-embedded
from the measurement.

(Erf FA11) ( Err FB22)

Edf = Edf + Edr = Edr +
(1 – Esf FA11) (1 – Esr FB22)

(Esf FA12 FA21) (Esr FB12 FB21)

Esf = FA22 + Esr = FB11 +
(1 – Esf FA11) (1 – Esr FB22)

(Erf FA12 FA21) (Err FB12 FB21)

Erf = Err =
(1 – Esf FA11) (1 – Esr FB22)2

(Elf FB12 FB21) (Elr FA12 FA21)

Elf = FB11 + Elr = FA22 +
(1 – Elf FB22) (1 – Elr FA11)

(Etf FA21 FB21) (Etr FA12 FB12)

Etf = Etr =
((1 – Elf FB22) (1 – Esf FA11)) ((1 – Elr FA11) (1 – Esr FB22))

Exf = Ex f
Exr = Exr

Edf = Forward (Port 1) Directivity Edr = Reverse (Port 2) Directivity

E sf = Forward (Port 1) Source Match Esr = Reverse (Port 2) Source Match
E rf = Forward (Port 1) Reflection Tracking Err = Reverse (Port 2) Reflection Tracking

Exf = Forward (Port 1) Isolation Exr = Reverse (Port 2) Isolation

Elf = Forward (Port 1) Load Match Elr = Reverse (Port 2) Load Match
E tf = Forward (Port 1) Transmission Tracking Etr = Reverse (Port 2) Transmission Tracking

FA11 = S11 Test Fixture A (left side) FB11 = S11 Test Fixture B (right side)
FA21 = S21 Test Fixture A (left side) FB21 = S21 Test Fixture B (right side)
FA12 = S12 Test Fixture A (left side) FB12 = S12 Test Fixture B (right side)
FA22 = S22 Test Fixture A (left side) FB22 = S22 Test Fixture B (right side)

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There are two error terms that are not modified in the equations. They are the forward and
reverse crosstalk error terms, Exf and Exr. Here we assume that the leakage signal across
the test fixture is lower than the isolation error term inside the instrument. In some cases,
this may not be a valid assumption, especially when using test fixtures with microstrip
transmission lines. Often radiation within the fixture will decrease the isolation between
the two test ports of the instrument. Before trying to model these isolation terms, we
must decide if the terms will introduce significant error into the measurement of the DUT.
If we are trying to measure a DUT that has 10 dB insertion loss (S21) and the isolation
of the fixture is 60 dB, the difference between these two signals is 50 dB and the error
introduced into the S21 measurement is less than 0.03 dB and 0.2 degrees. Unless
the DUT measurement has a very large insertion loss, on the order of the test fixture or
instrument isolation, then the crosstalk error terms can be used without modification and
often omitted altogether from the VNA calibration.

Should the DUT have a very large insertion loss, it may be necessary to include the
isolation term of the fixture in the de-embedding model. This term could be measured by
placing two terminations inside the test fixture and measuring the leakage or isolation of
the fixture.

Steps to perform de-embedding on the VNA

The de-embedding process begins with creating a model of the test fixture placed on
either side of the DUT. The accuracy of the model directly affects the accuracy of the de-
embedded measurements on the DUT.

The next step is to perform a standard coaxial two-port calibration on the VNA using
any calibration type such as SOLT (Short, Open, Load, Thru) or TRL (Thru, Reflect, Line).
Because this technique uses the traditional twelve-term error model, network analyzers
that use either three or four receivers can be used. This calibration is then saved to
the instrument memory. This same de-embedding technique can be applied to one-
port devices by modifying only the first three error terms, namely Edf, Esf, Erf for Port 1
measurements and Edr, Esr, Err for Port 2.

Using a full two-port calibration, the twelve error terms are modified using the model(s)
for each side of the test fixture. At this point, the VNA now displays the de-embedded
response of the DUT. All four S-parameters can be displayed without the effects of the
test fixture in real-time.

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To show the effects of fixture de-embedding on the calibration error coefficients, let’s
examine the directivity error term. Figure 19 shows the forward directivity error term for
a vector network analyzer. The lower trace is the directivity error using a standard 3.5
mm coaxial calibration kit. The upper trace is the same term modified to de-embed the
effects of a coax-to-microstrip test fixture. Because the directivity is the sum of all the
leakage signals appearing at the receiver input with a good termination placed at the test
port, uncertainty in this error term will generally affect the reflection measurements of
well-matched DUTs. For this example, unless de-embedding is performed, the test fixture
will degrade the capability for measuring return loss down to the raw performance of the
fixture, which is about 15 dB in this case.

Figure 19. Forward directivity error term (1) using standard coaxial calibration (lower trace)
and (2) modified to include the effects of a coax-to-microstrip test fixture (upper trace)

As a measurement example, let’s measure the return loss and gain of a surface-mount
amplifier placed in a microstrip test fixture. We can compare the measured results
when calibrating the analyzer using a standard two-port coaxial calibration versus de-
embedding the test fixture using a model of the coax-to-microstrip fixture. Figure 20
shows the measured S11 of the amplifier over a 2 GHz bandwidth. For the case when
using a standard coaxial calibration, the measured S11 shows excessive ripple in the
response due to mismatch interaction between the test fixture and the surface-mount
amplifier. When the test fixture is de-embedded from the measurement, the actual
performance of the amplifier is shown with a linear behavior as a function of frequency.

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Figure 20. Measured S11 of a surface mount amplifier. The trace with the large
ripple is the response using a standard coaxial calibration. The linear trace
shows the de-embedded response.

We can also examine the measured S21 with and without the effects of de-embedding
the test fixture. Figure 21 shows the measured gain response over the 2-4 GHz band.
Much like the S11 response, the measurement using a standard coaxial calibration shows
additional ripple in the S21 response. The overall gain is also reduced by about 0.5 dB
due to the additional fixture insertion loss included in the measurement. Once the fixture is
de-embedded, the measured amplifier gain displays more gain and lower ripple across the
frequency band.

Figure 21. Measured S21 of a surface mount amplifier. The lower trace shows
the response using a standard coaxial calibration and the upper trace shows
the de-embedded response.
Page 25
Embedding a Virtual Network
The de-embedding process is used to remove the effects of a physical network placed
between the VNA calibration or measurement plane and the DUT plane. Alternately, this
same technique can be used to insert a hypothetical or “virtual” network between the
same two planes. This would allow the operator to measure the DUT as if it were placed
into a larger system that does not exist. One example where this technique can be very
useful is during the tuning process of a DUT. Often the device is first pre-tuned at a lower
circuit level and later placed into a larger network assembly. Due to interaction between
the DUT and the network, a second iteration of device tuning is typically required. It is
now possible to embed the larger network assembly into the VNA measurements using
the de-embedding process described in this paper. This allows real-time measurements of
the DUT including the effects of the virtual network. The only additional step required is to
create the “anti-network” model of the virtual network to be embedded.

The anti-network is defined as the two-port network that, when cascaded with another
two-port network, results in the identity network. Figure 22 shows the cascaded networks
[S] and [SA], representing the original network and its anti-network. These two networks,
when cascaded together, create an ideal network that is both reflectionless and lossless.
If we insert these two networks, [S] and [SA], between the measurement plane and DUT
plane, we would find no difference in any measured S-parameter of the DUT. The process
of de-embedding moves the measurement plane toward the DUT plane. Alternatively,
the process of embedding a network would move the measurement plane away from
the device plane (Figure 23). Therefore, movement of the measurement plane toward
the DUT (de-embedding) through the anti-network, [SA], is the same as movement of the
measurement plane away from the DUT (embedding) through the network, [S].

[S] [S]

S21 SA21 1

S11 S22 SA21 SA22 = 0 0

S12 SA12 1

Figure 22. Definition of the identity matrix using a network and the anti-network representations

De-embed Embed
S21 S21

S11 [S] S22 DUT S11 [S] S22 DUT

S12 S12
Measurement Plane DUT Plane Measurement and
DUT Plane Page 26

Figure 23. Diagram showing the movement in the measurement plane during de-embedding of a two-port network
In order to embed a network, it is only necessary to first calculate the anti-network and
apply the same de-embedding algorithm that was previously developed. The equations for
calculating the anti-network are shown below.

S11 ( 1 – S22SA11 )
SA11 = SA12 =
( S11S22 – S21S12 ) S12

( 1 – S22SA11 ) ( SA12 SA21S22 )

SA21 = SA22 =
S22 ( S22SA11 – 1 )

As an example of embedding a virtual network into a measured response, let’s measure

a surface-mount amplifier with a virtual bandpass filter network placed after the amplifier.
Figure 24 shows the measured response before and after embedding the filter network.
The upper trace shows the measured gain of the amplifier only. Here the amplifier gain
is relatively flat over the 2 GHz bandwidth. The lower trace shows the response of the
amplifier and embedded filter network. In this case, the measured gain is modified to
include the effects of the bandpass filter network. By embedding a virtual filter into the
VNA’s error terms, we can optimize the amplifier’s gain using a model of the filter that is
not physically part of the actual measurement.

Figure 24. Measured S21 showing the effects of embedding a virtual bandpass filter network into the mea-
surement of a surface mount amplifier. Upper trace is the measured response of the amplifier only.
Lower trace shows the response including an embedded filter network.

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Summary
This application note described the techniques of de-embedding and embedding
S-parameter networks with a device under test. Using the error-correcting algorithms of
the vector network analyzer, the error coefficients can be modified so that the process of
de-embedding or embedding two port networks can be performed directly on the analyzer
in real-time.

Appendix A: Relationship of S and T Parameter Matrices

To determine the scattering transfer parameters or T-parameters of the two-port network,
the incident and reflected waves must be arranged so the dependent waves are related to
Port 1 of the network and the independent waves are a function of Port 2 (see Figure A1).
This definition is useful when cascading a series of two-port networks in which the output
waves of one network are identical to the input waves of the next. This allows simple
matrix multiplication to be used with the characteristic blocks of two-port networks.

The mathematical relationship between the T-parameters and S-parameters is shown

below in Figure A2.

a1 a2
Port 1 Port 2

b1 b2

a1 T11T 12 a2
=
b1 T 21T 22 b2

Figure A1. Definition of the two-port T-parameter network

T 12 T 11 T 22 – T 12T 21 S11 S 22 – S12S21 S 11

–
S11S12 T22 T 22 T11T12 S22 S21
= =
S 21S22 1 T21 T 21T22 S22 1
– –
T22 T22 S21 S21

Figure A2. Relationship between the T-parameters and S-parameters

Page 28
References
1. Edwards, T.C., Foundations of Microstrip Circuit Design, John Wiley & Sons, 1981

2. In-Fixture Measurements Using Vector Network Analyzers, Keysight Application Note,

May 1999

3. Use Keysight EEsof and a Vector Network Analyzer to Simply Fixture De-Embedding,
Keysight White Paper, October 1999

4. S Parameter Design, Keysight Application Note, April 1972

5. Understanding the Fundamental Principles of Vector Network Analyzers, Keysight

Application Note, May 1997

6. Hunton, J.K., Analysis of Microwave Measurement Techniques by Means of Signal

Flow Graphs, IRE Transactions on Microwave Theory and Techniques, March 1960.
Available on the IEEE MTT Microwave Digital Archive, IEEE Product Number JP-17-0-
0-C-0

7. Specifying Calibration Standards For The Keysight 8510 Network Analyzer,

Application Note, July 2000

8. Applying Error Correction to Network Analyzer Measurements, Keysight Application

Note, April 1999

9. Elmore, G., De-embedded Measurements Using the 8510 Microwave Network

Analyzer, Hewlett-Packard RF & Microwave Symposium, 1985

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Learn more at: www.keysight.com
For more information on Keysight Technologies’ products, applications or services,
please contact your local Keysight office. The complete list is available at:
www.keysight.com/find/contactus

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This information is subject to change without notice. © Keysight Technologies, 2001-2020, Published in USA, July 17, 2020, 5980-2784EN