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PLC with PIC16F648A microcontroller part 2
Article  in  ELECTRONICS WORLD · December 2008
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            Murat Uzam
            Yozgat Bozok University
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                                                                                                     Feature               PLC/MCU
PLC WITH PIC16F648A
MICROCONTROLLER
PART 2                                    ASSOCIATE PROFESSOR DR MURAT UZAM FROM NIGDE
                                          UNIVERSITY IN TURKEY PRESENTS A SERIES OF ARTICLES
T
          he basic software of this       ON A PROJECT THAT FOCUSES ON A MICROCONTROLLER-
          programmable logic              BASED PLC. THIS IS THE SECOND ARTICLE OF THE SERIES
          controller (PLC) called
UZAM_PLC makes use of general             AND IT COVERS THE BASIC SOFTWARE STRUCTURE OF
purpose 8-bit registers of RAM            THE UZAM_PLC
data memory of PIC16F648A. For
the sake of simplicity, we restrict
ourselves to use only BANK 0, i.e. all             the PLC’s scan cycle includes the             “get_inputs” and “send_outputs”. The
macros, including the basic definitions            following: obtain the inputs, run the user    endless PLC scan cycles are obtained by
explained here, to be defined by means             program, update the outputs. This cycle       means of the label “scan” and the
of 8-bit registers of BANK 0.                      repeats as long as the PLC runs.              instruction “goto scan”.
  The file “definitions.inc” (all the files          Before getting into the endless PLC            UZAM_PLC is fixed to run at 4MHz
explained here including “definitions.inc”         scan cycles, the initial conditions of the    with PIC16F648A’s internal oscillator. The
can be downloaded from                             PLC are set up in the initialisation stage.   watchdog timer is used to prevent user-
http://host.nigde.edu.tr/muzam/). It               These main steps can be seen from             program lock-ups. As will be explained
contains all of the basic macros and               Figure 1, where “initialise” is a macro for   later, the hardware timer TMR0 is utilised
definitions necessary for UZAM_PLC. In             setting up the initial conditions;            to obtain free-running reference timing
this article we will explain the contents          “get_inputs” is a macro for getting the       signals.
of this file. First of all, let’s have a look at   inputs; and “send_outputs” is a macro
the file called “UZAM_plc_8i8o_1.asm”              for updating the outputs. The “user PLC       FILE DEFINITIONS
shown in Figure 1. It is well-known that           program” must be placed between               Next, let’s consider the inside of the file
                                                                                                 “definitions.inc”. The definition of 8-bit
                                                                                                 variables to be used for the basic
                                                                                                 software and their allocation in BANK 0
                                                                                                 of RAM data memory are shown in
                                                                                                 Figure 2a and 2b respectively. Although
                                                                                                 we can define as many inputs and
                                                                                                 outputs as we want, for the sake of
                                                                                                 simplicity we define four 8-bit input
                                                                                                 registers and four 8-bit output registers
                                                                                                 (Q0, Q1, Q2, Q3).
                                                                                                   It is well-known that inputs taken from
                                                                                                   It is also necessary to define and
                                                                                                   initialise all variables used within a
                                                                                                   PLC. Necessary functions are all
                                                                                                   described as PIC Assembly macros to
                                                                                                   be used in UZAM_PLC. The macros
                                                                                                   described in this article could be
                                                                                                   summarised as follows: “HC165”
                                                                                                   (for handling the inputs), “HC595”
                                                                                                   (for sending the outputs), “dbncr”
                                                                                                   (for debouncing the inputs),
                                                                                                   “initialise”, “get_inputs”,
                                                                                                   “send_outputs”.
  Figure 1: The view of the file “UZAM_plc_8i8o_1.asm”
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 PLC/MCU                        Feature
                                                                        Figure 3: BANK macros
     Figure 2: (a) above – The definition of 8-bit variables to be   contacts always suffer from “contact bouncing”. To circumvent
     used for the basic software,                                    this problem we will define a “debouncing” mechanism for the
     (b) below – Their allocation in BANK 0 of RAM data memory       inputs and this will be explained later. In the “get_inputs” stage
                                                                     of the PLC scan cycle, the input signals are serially taken from the
                                                                     related 74HC/LS165 registers and stored in the registers. As a
                                                                     result, bI0, bI1, bI2 and bI3 will hold these bouncing input
                                                                     signals. After applying the “debouncing” mechanism to the
                                                                     registers bI0, bI1, bI2 and bI3, we obtain “debounced” input
                                                                     signals and they are stored in registers I0, I1, I2 and I3
                                                                     respectively.
                                                                        We don’t have to use all of these registers. For example, if we
                                                                     use just the “main board”, then we have 8 inputs and therefore
                                                                     we can just use bI0 and I0. Similarly, if we use the “main board”
                                                                     with an “I/O extension board”, then we have 16 inputs and,
                                                                     therefore, we must use bI0, bI1 and I0, I1. Currently, for the sake
                                                                     of simplicity we restrict ourselves to the main board and,
                                                                     therefore, we need to use bI0 and I0.
                                                                        In the “send_outputs” stage of the PLC scan cycle, the output
                                                                     information stored in the 8-bit registers Q0, Q1, Q2, Q3 are
                                                                     serially sent out to and stored in the related TPIC6B595 registers.
                                                                     This means that Q0, Q1, Q2, Q3 registers will hold output
                                                                     information and they will be copied into the TPIC6B595 registers
                                                                     at the end of each PLC scan cycle. We don’t have use all of these
                                                                     output registers. For example, if we use just the “main board”,
                                                                     then we have 8 outputs and, therefore, we can use just Q0.
                                                                        Similarly, if we use the “main board” with an “I/O extension
                                                                     board”, then we have 16 outputs and, so, we must use both Q0
                                                                     and Q1. Currently, for the sake of simplicity we restrict ourselves
                                                                     to the main board and therefore we need to use only Q0. Four 8-
                                                                     bit registers, namely M0, M1, M2 and M3, are defined for
                                                                     obtaining 32 memory bits (internal relays, in PLC jargon).
                                                                        To be used for the debouncer macro we define eight 8-bit
                                                                     registers (DBNCR, DBNCR+1, ..., DBNCR+7). In addition, the
                                                                     register DBNCRRED is also defined to be used for the debouncer
                                                                     macro. Temp_1 is a general temporary register declared to be
                                                                     used in the macros. Temp_2 is declared to be used especially for
                                                                     obtaining special memory bits as will be explained later. Timer_2
                                                                     is defined for storing high byte of the free-running timing signals.
30   ❙ December 08 - Electronics World                                                                         www.electronicsworld.co.uk
                                                                                               Feature               PLC/MCU
                                               Figure 6: The macro “HC165”
                                              OTHER VARIABLES                                 16777.216ms.
                                              The variable “LOGIC0” is defined to hold          Timing diagram of the free-running
                                              logical “0” value throughout the PLC            reference timing signals is depicted in
                                              operation. At the initialisation stage it is    Figure 5. Note that the evaluation of
                                              deposited with this value. Similarly, the       TMR0 (Timer_1) is independent from PLC
                                              variable “LOGIC1” is defined to hold            scan cycles, but Timer_2 is incremented
                                              logical “1” value throughout the PLC            within the “get_inputs” stage of PLC scan
                                              operation. At the initialisation stage it is    cycle on Timer_1 overflow. This is justified
                                              deposited with this value.                      as long as the PLC scan cycle takes less
                                                 The special memory bit “FRSTSCN” is          than 65.536ms.
                                              arranged to hold the value of “1” at the
                                              first PLC scan cycle only. In the other PLC     THE MACROS
 Figure 4: Definitions of one-bit variables   scan cycles following the first one it is       The macro “HC165” is shown in Figure 6.
                                              reset. The other special memory bit             The input signals are serially taken from
                                              “SCNOSC” is arranged to work as a “scan         the related 74HC/LS165 registers and
                                              oscillator”. This means that in one PLC         stored in the registers such as bI0, bI1, bI2
                                              scan cycle this special bit will hold the       and bI3 by means of this macro. The
                                              value of “0”, in the next one the value of      “num” defines the number of
                                              “1”, in the next one the value of “0” etc.      74HC/LS165 registers to be considered.
                                              This will keep on going for every PLC scan      This means that with this macro we can
  Figure 5: Timing diagram of the free-       cycle. Let us now consider the 16               obtain inputs from as many 74HC/LS165
  running reference timing signals            reference timing signals.                       registers as we wish.
  (T = 0.512, 1.024... 16777.216ms)              As seen later, TMR0 of PIC16F648A is           However, as explained before, we
                                              set up to count the 1/4 of 4MHz internal        restrict this number to be 4 at most for the
                                              oscillator signal, i.e. 1MHz with a prescaler   sake of simplicity; “var0” is the beginning
The low byte of free-running timing           arranged to divide the signal to 256. As a      of the registers to which the state of
signals is stored in TMR0 (recalled as        result by means of TMR0 bits (also called       inputs taken from 74HC/LS165 registers
Timer_1).                                     Timer_1) we obtain eight free-running           will be stored. This implies that there
   For accessing the RAM data memory          reference timing signals with the “T”           should be enough RAM locations reserved
easily, BANK macros are defined as shown      timing periods starting from 0.512ms to         after “var0” and, also, there should be
in Figure 3. The definitions of one bit       65.536ms. We’ll see later that the register     enough 74HC/LS165 registers to get the
variables are depicted in Figure 4. The       “Timer_2” is incremented on Timer_1             inputs from. There are some explanations
following definitions are self explanatory:   overflow. This also gives us (by means of       within the macro to describe how it works.
74HC165, TPIC6B595, 8 INPUTS, 8               Timer_2 bits) eight more free-running             As can be seen, this macro makes use of
OUTPUTS, 32 Memory Bits. Let us now           reference timing signals with the “T”           previously defined “data_in”, “clock_in”
have a look at the others.                    timing periods starting from 131.072ms to       and “sfht_ld” bits to obtain the input
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 PLC/MCU                          Feature
                                                                                           to be used. This means that with this
                                                                                           macro we can send output data serially to
                                                                                           as many TPIC6B595 registers as we wish.
                                                                                              However, as explained before, we
                                                                                           restrict this number to be 4 at most for the
                                                                                           sake of simplicity; “var0” is the beginning
                                                                                           of the 8-bit registers such as Q0 in RAM
                                                                                           from which the state of outputs are taken
                                                                                           and serially sent to TPIC6B595 registers.
                                                                                           This implies that there should be enough
                                                                                           RAM locations reserved after “var0” and,
                                                                                           also, there should be enough TPIC6B595
                                                                                           registers to hold the outputs.
                                                                                              There are some explanations within the
                                                                                           macro to describe how it works. As can be
                                                                                           seen, this macro makes use of previously
                                                                                           defined “data_out”, “clock_out” and
                                                                                           “latch_out” bits to send the output signals
                                                                                           serially to TPIC6B595 registers.
     Figure 7: The macro “HC595”                                                              The macro “dbncr” is shown in Figure
                                                                                           8. It can be used for debouncing eight
                                                                                           independent buttons, switches, relay or
                                                                                           contactor contacts etc. The timing diagram
                                                                                           of one channel of this debouncer is
                                                                                           provided in Figure 9. It can be seen that
                                                                                           the output changes its state only after the
                                                                                           input becomes stable and waits in the
                                                                                           stable state for the predefined debouncing
                                                                                           time “dt1” or “dt2”. The debouncing is
                                                                                           applied to both rising and falling edges of
                                                                                           the input signal.
                                                                                              In this macro, each channel is intended
                                                                                           for a “normally open contact” connected
                                                                                           to the PIC by means of a pull-down
                                                                                           resistor, as this is the case with
                                                                                           UZAM_PLC. It can also be used without
                                                                                           any problem for a “normally closed
                                                                                           contact” connected to the PIC by means
                                                                                           of a pull-up resistor.
                                                                                              The “debouncing times” such as 20ms,
                                                                                           50ms or 100ms can be selected as
                                                                                           required depending on the application. It
                                                                                           is possible to pick up different debouncing
                                                                                           times for each channel. It is also possible
                                                                                           to choose different debouncing times for
                                                                                           rising and falling edges of the same input
                                                                                           signal, if necessary. This gives a good deal
                                                                                           of flexibility. This is simply done by
                                                                                           chancing the related time constant
                                                                                           “tcnst_01” or “tcnst_10” defining the
                                                                                           debouncing time delay for each channel
     Figure 8: The macro “dbncr”                                                           and for both edges within the assembly
                                                                                           program.
                                                                                              Note that if the state-change-of-the-
signals from 74HC/LS165 registers.           RAM locations, and serially sent out to and   contact is shorter than the predefined
   The macro “HC595” is shown in Figure      stored in the related TPIC6B595 registers     “debouncing time”, this will also be
7. The output signals are stored in the 8-   by means of this macro. The “num”             regarded as bouncing and it will not be
bit registers such as Q0, Q1, Q2 and Q3 in   defines the number of TPIC6B595 registers     taken into account. Therefore, no state-
32   ❙ December 08 - Electronics World                                                                        www.electronicsworld.co.uk
                                                                                                Feature                PLC/MCU
                                                                                               no state-change is issued. If the output
                                                                                               signal (rego,bito) = 0 and the input signal
                                                                                               (regi,biti) = 1, then with each “rising
                                                                                               edge” of the reference timing signal
                                                                                               “t_reg,t_bit” the related counter
                                                                                               “DBNCR+num” is incremented by one. In
                                                                                               this case, when the count value of
                                                                                               “DBNCR+num” is equal to the number
                                                                                               “tcnst_01”, this means that the input
                                                                                               signal is debounced properly and then
                                                                                                state-change from 0 to 1 is issued for the
  Figure 9: Timing diagram of one channel of the debouncer                                      output signal (rego,bito).
                                                                                                  Similarly, if the output signal (rego,bito)
                                                                                                = 1 and the input signal (regi,biti) = 0,
change will be issued in this case. Each of   within this macro. Then, we can set up           then with each “rising edge” of the
the eight input channels of the debouncer     both debouncing times dt1 and dt2 by             reference timing signal “t_reg,t_bit” the
may be used independently from other          means of time constants “tcnst_01” and           related counter “DBNCR+num” is
channels. The activity of one channel does    “tcnst_10” as dt1 = (t_reg,t_bit) x              incremented by one. In this case, when
not affect the other channels.                tcnst_01 and dt2 = (t_reg,t_bit) x               the count value of “DBNCR+num” is
                                              tcnst_10 respectively.                           equal to the number “tcnst_10”, this
THE MACRO “DBNCR”                                If the input signal (regi,biti) = 0 and the   means that the input signal is debounced
Let us now briefly consider how the macro     output signal (rego,bito) = 0 or the input       properly and then state-change from 1 to
“dbncr” works. First of all, one of the       signal (regi,biti) = 1 and the output signal     0 is issued for the output signal
previously defined reference timing signals   (rego,bito) = 1, then the related counter        (rego,bito). For this macro it is necessary
is chosen as “t_reg,t_bit” to be used         “DBNCR+num” is loaded with “00h” and             to define the following 8-bit variables in
                                                                                               RAM: Temp_1, and DBNCRRED. In
                                                                                               addition, it is also necessary to define
                                                                                               eight 8-bit variables in successive RAM
                                                                                               locations, the first of which is to be
                                                                                               defined as “DBNCR”. It is not necessary
                                                                                               to name the other seven variables. Each
                                                                                               bit of the variable DBNCRRED is used to
                                                                                               detect the “rising edge” of the reference
                                                                                               timing signal “t_reg,t_bit” for the related
                                                                                               channel.
                                                                                               THE MACRO “INITIALISE”
                                                                                               The macro “initialise” is shown in Figure
                                                                                               10. There are mainly two tasks carried out
                                                                                               within this macro. In the former, first
                                                                                               TMR0 is set up as a free-running hardware
                                                                                               timer with the 1/4 of 4MHz internal
                                                                                               oscillator signal, i.e. 1MHz, and with a
                                                                                               prescaler arranged to divide the signal to
                                                                                               256. In addition, PORTB is initialised to
                                                                                               make RB0 (data in) as input and the
                                                                                               following as outputs: RB3 (clock out), RB4
                                                                                               (data out), RB5 (latch out), RB6 (clock in),
                                                                                               RB7 (shift/load). In the latter, all utilised
                                                                                               RAM registers are loaded with initial “safe
                                                                                               values”. In other words, all utilised RAM
                                                                                               registers are cleared (loaded with 00h)
                                                                                               except for Temp_2, which is loaded with
                                                                                               06h. As explained before, Temp_2 holds
                                                                                               some special memory bits, therefore, the
                                                                                               initial values of these special memory bits
  Figure 10: The macro “initialise”                                                            are put into Temp_2 within this macro. As
                                                                                               a result, these special memory bits are
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 PLC/MCU                         Feature
                                                                                  loaded with the following initial values:
                                                                                  LOGIC0 (Temp_2,0) = 0, LOGIC1
                                                                                  (Temp_2,1) = 1, FRSTSCN (Temp_2,2) = 1,
                                                                                  SCNOSC (Temp_2,3) = 0.
                                                                                  THE MACRO “GET_INPUTS”
                                                                                  The macro “get_inputs” is shown in
                                                                                  Figure 11. There are mainly three tasks
                                                                                  carried out within this macro. In the first
                                                                                  one, the macro “HC165” is called with
                                                                                  the parameters “.1” and “bI0”. This
                                                                                  means that we will use only the “main
                                                                                  board” and, therefore, the macro
                                                                                  “HC165” is called with the parameter
                                                                                  “.1”. As explained before, the input
                                                                                  information taken from the macro is rated
                                                                                  as “bouncing” information and,
                                                                                  therefore, this information is stored in
                                                                                  “bI0” register. For example if we decide
                                                                                  to use the “main board” connected to
     Figure 11: The macro “get_inputs”                                            three of the “I/O extension board” then
                                                                                  we must call the macro “HC165” as
                                                                                  follows: “HC165 .4,bI0”. This will take
                                                                                  four 8-bit bouncing input information
                                                                                  from the 74HC/LS165 ICs and will put
                                                                                  them to the four successive registers
                                                                                  starting with the register bI0.
                                                                                     In the second task within this macro,
                                                                                  each bit of bI0, i (i = 0, 1… 7) is
                                                                                  debounced by the macro “dbncr” and
                                                                                  each debounced input signal is stored in
                                                                                  the related bit I0, i (i = 0, 1… 7). In
                                                                                  general, 20ms time delay is enough for
                                                                                  debouncing both rising and falling edges
                                                                                  of an input signal. Therefore, to achieve
                                                                                  these time delays, the reference timing
                                                                                  signal, obtained from Timer_1, is chosen
     Figure 12: The macro “send_outputs”                                          as T00 (0.512ms period) and both
                                                                                  “tcnst_01” and “tcnst_10” are chosen to
                                                                                  be “40”. Then we obtain the following:
                                                                                  dt1 = T00 x tcnst_01 = (0.512ms) x 40 =
                                                                                  20.48ms, dt2 = T00 x tcnst_10 =
                                                                                  (0.512ms) x 40 = 20.48ms.
                                                                                     Note that in this series of articles for
                                                                                  the sake of simplicity we use just 8 inputs
                                                                                  and 8 outputs. If we want to add more
                                                                                  inputs and to debounce these inputs,
     Figure 13: A fraction of the first example program “UZAM_plc_8i8o_ex1.asm”   then we must organise the macro
                                                                                  “dbncr” and locate necessary number of
                                                                                  registers within the RAM.
                                                                                     The last task is about incrementing the
                                                                                  Timer_2 on overflow of Timer_1. In this
                                                                                  task, “Timer_2” is incremented by one
                                                                                  when the falling edge of the bit
                                                                                  “Timer_1,7” is detected. In order to
                                                                                  detect the falling edge of the bit
     Figure 14: A fraction of the second example program
                                                                                  “Timer_1,7”, “Temp_2,4” bit is utilised.
     “UZAM_plc_8i8o_ex2.asm”
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PLC/MCU                       Feature
THE MACRO “GET_OUTPUTS”                         EXAMPLES                                      respected outputs. That is to say that if
The macro “send_outputs” is shown in            Up to now we have seen the hardware           I0.0 = 0 then Q0.0 = 0 and, similarly, if
Figure 12. There are mainly four tasks          and basic software necessary for              I0.0 = 1 then Q0.0 = 1. This applies to all
carried out within this macro. In the first     UZAM_PLC. It is now time to consider a        8 inputs and 8 outputs.
one, the macro “HC595” is called with the       few examples. Before you can run the two        For the second example, please include
parameters “.1” and “Q0”. This means            simple examples considered here, you are      the user program shown in Figure 14
that we will use only the “main board”          expected to construct your own                within the “UZAM_PLC_8i8o_1.asm” and
and, therefore, the macro “HC595” is            UZAM_PLC hardware by using the                then save it as
called with the parameter “.1”.                 necessary PCB files and producing PCBs        “UZAM_PLC_8i8o_ex2.asm”. Next open it
   As explained before, the output              with its components.                          by MPLAB IDE and compile it. After that
information is taken from the register Q0          For the first example, include the user    by using the PIC programmer software
and this macro sends the bits of Q0 serially    program shown in Figure 13 within the         take the compiled file
to TPIC6B595 register. For example, if we       “UZAM_PLC_8i8o_1.asm” and then save           “UZAM_PLC_8i8o_ex2.hex” and by your
decide to use the “main board” connected        it as “UZAM_PLC_8i8o_ex1.asm”. The            PIC programmer hardware send it to the
to three of the “I/O extension board” then      next thing to do is to open it by MPLAB       program memory of PIC16F648A
we must call the macro “HC595” as               IDE and to compile it. After that, by using   microcontroller within the UZAM_PLC.
follows: “HC595 .4,Q0”. Then, the macro         the PIC programmer software take the            After loading the
“HC595” will take four 8-bit output             compiled file “UZAM_PLC_8i8o_ex1.hex”         “UZAM_PLC_8i8o_ex2.hex”, switch the
information stored in Q3, Q2, Q1 and Q0         and by your PIC programmer hardware,          4PDT in “RUN” and the power switch in
and send them serially to the four              send it to the program memory of              “ON” position. Now, you are ready to test
TPIC6B595 register ICs respectively.            PIC16F648A microcontroller within the         the second example program. In this case
   In the second task within this macro, the    UZAM_PLC.                                     the contents of “Timer_2” register are
watchdog timer is cleared. In the third task,      After loading the                          transferred to 8 outputs.
the “FRSTSCN” special memory bit is reset.      “UZAM_PLC_8i8o_ex1.hex”, switch the             Of course, in these two examples the
As the final task, within this macro the        4PDT in “RUN” and the power switch in         user programs include only PIC Assembly
“SCNOSC” special memory bit is toggled          “ON” position. Now, you are ready to test     instructions, but we will start using our
after a program scan, i.e. when it is “1” it    the first example program. You can see        own macro-based PLC instructions in the
is reset, when it is “0” it is set.             that all the inputs are transferred to the    next article. ■
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