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study materikal a study materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy materikal astudy

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- ae a cos an ap pop ppopsp 3 ea Total Num ~pech ELECTRIC! wo AL ENGINEERING. ) qn e. fy fs p J — oe ae oe Lie Se Wulb app = —— & YS) S ber of Pages 1 AN a Roll No. 6% SEMESTER, EMESTER EXAMINATION __(Mareh-2020) EE-302-ELECTRIC DRIVES Maximum Marks:20 3 Giving reasons explain briefly, why?(détempt any five) a] For stable operation of the drive > 1, SP] With dynamic braking the torque becomes zero speed for separately excited DC motor, while torque sieges to zero beforé zero speed for DC series motor. swe] Large de-rating is considered for 1 as against 30 converter fed sep. excited DC moter drive. SINo.|Bus Voltage | Generation owaR v VAR | MW * V, pu | 5, deg| MW | M o 7 Slack bus = T 1 0 . a I a - a 0 PV Bus 3 ze 1.04 - 20 r B - 3 =a nC AO NEON [ES =| PO. Bus " ) 4. Draw the impedance diagram showing all impedances in per unit, 2 1a) the following system. a Tr LR we O40 a Thi TLs "ad Load F ~~, The various ratings areas follows: Generator Gi : 50 MVA, 13.2kV,K=0.15 pu, 3 Generator Ga : 20 MVA, 13.8KV,X=0.15 pu“ % , Transformer Ti :80 MVA, 13.2 kV AN165 KV -Y, X Transformer Ty :40 MVA, 13.8 kV A/165 Y.kV_X Transmission Line TLi:Z=(50+j200) ohm ______Transmission Line TLz and TL; : 2 = 25 + j100) ot eee. JSF BRINE, Operating at Sy e a base of | ‘ "an transmission line Ee forthe system and 132 ky base in the -10 pu 10 pu coe Total No. i lo. of Pages 02 Roll No. .. VI SEMESTER aoe SEM EXAMINATION EE306 MICROPROCESSORS & MICROCONTROLLERS CHOURE ‘Max. Marks : 20 tempt all questions. Assume suitable missing data, if any. | Draw neat and clean diagrams wherever necessary Jinstructed. | Qa} Giving suitable reasons, explain why: . EPROM/PROM and RAM are required by 8085 uP and ROM is always placed in the first slot of memory. si. The bus operation is regulated through tri-state buffers. id Addition of similar signed numbers only can result in an overflow. iv. A machine cycle cannot be completed in 5 T-states. Y. 8085 P does not sample READY signal during BI machine cycle. [hs] [bj] Fill in the blanks or return values as instructed: i Testates consumed in the execution of instmetion DAA are ii. 8954H in Q1S formatis equal to in base 10. iii, If data is one arithmetic right shift, the new data is iv. Which interrupts remain active after execution of following instructions: SUB A; SIM; y, After the execution of following instructions the bit-wise Status of flag register is ‘ LXISP, FFFDs; POP PSW; [1x5] FFFC 18 FFFD 2D. FEFE 64 FFFF 4 eee Si i #3 of ROM Q2 Design a memory system for 8085A with ie te A tayicta : followed by 4 k bytes of RAM. Implemen' ee sumon VO. It using 2147 SRAM organised as 4k X J, a a aes has two contfol lines, CE & WE. To read the ¢ one ae WE =1.To write the device CE =0 & WE = ern. decoding, use a 74LS138 decoder. Draw logic fe ee memory system and address bit map. Other require = ae be implemented using standard gates. ROM is implem : using 27128A which is a 16k X 8 EPROM device. ) [3] Q3 Draw the timing diagram for the instruction OUT 255. [2] Q4 Write an assembly language program to count number of 1’s in a byte. Insert a delay of 1 second between each bit check and display the count at output port F9y in every pass. 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Giving reasons explain briefly, why? [a] Bi-directional Tristate buffers are indispensible for bussed architecture in microprocessors(/P). [b] For signed numbers only Arithmetic shift is performed. [c] Fold back in a memory organization is always avoided. [4] El and DI instructions are mandatory for the Interrupt routine. [e] Stack memory is implemented as LIFO type. L 2 [a] Design a memory map with contiguous and sequential memory address range to each memory chips of 4K, 2K, and 2K capacity without fold back for-8085 P. Draw a neat diagram and show the range assigned to each memory chip. [b] Draw a neat timing diagram with proper labelling of the instruction ‘OUT’ 3 [a] Solar insolation data is sampled every 2 minutes from a pyranometer and stored sequentially for 8 hours of a day. Write an 8085 uP assembly language program to estimate the time of maximum insolation in a day if the data stored from location 2200y. 25 [b] Write an 8085juP assembly language program to implement eight sample moving averaging over a sequence of 100 sampled data (from 20003), working form first eight samples to last eight samples. 4 Explain how a signed number can be expressed in terms of group of Describe the basic building of Booths’ algorithm for multiplication of signed numbers, by explaining the logic and components involved in it, Explain Q15 format for depicting the fractional numbers with an example. Use the algorithm and Q15 format for developing the multiplication for signed fractional numbers. Develop the-algorithm in assemble language. Write detailed comments in support of the algorithm. Bay

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