ORGANIZED BY

University of Cagliari DIEE

IDE
t?
Dip. Elettronica e Informatica
University of Padova XXV Workshop On Compound
SPONSORED BY Semiconductor Devices and
Integrated Circuits
Held in Europe

Grand Hotel Quattro Torri

Hotel Setar
Quartu S.Elena

Sardinia
ITALY

27-30 May 2001

INFM

DISTRIBUTION STATEMENT A
Approved for Public Release
Distribution Unlimited
20010801 043
 AD NUMBER DATE DTIC ACCESSION

REQUEST
1. REPORT IDENTIFYING INFORMATION
/. Put your n
A. ORIGINATING AGENCY on reverse
Lirv'J tyi- i-hcU ■ i 7-UJLo 2. Completer.
B. REPORT TITLE AND/OR NUMBER , 4
3. Attach ton
mailed to
C. MONITOR REPORT NUMBER 4. Useuncla
informatt
5. Do not ore
D. PREPARED UNDER CONTRACT NUMBER for 6 to 8

2. DISTRIBUTION STATEMENT DTIC:

HPPHOUED FOR PUBLIC RELEHSE 1. Assign A

2. Return It
DISTRIBUTION UNLIMITED

PROCEEDINGS
_
DT. EDITIONS ARE OBSOLETE
OCT 95
 Welcome Address
Welcome to the 25th Workshop On Compound Semiconductor Devices and Integrated
Circuits held in Europe (Wocsdice 2001).

If you like evocative suggestions, there is something fascinating in considering this journey of
our meeting: from Greece to Italy across the Mediterranean Sea: a (comfortable) Odyssey
that, in 2001, brings the most advanced technological knowledge towards unexplored
frontiers...
Arthur Clarke apart, there is in my opinion a very good point in having chosen Sardinia, Italy,
as the place for WOCSDICE 2001. It belongs to Italy, of course, but it is a particular Italy, far
from the leading edges of technology, and rich of history and nature; geographically far from
the other lands, but shining with his own splendour and proud to be "singular". And singular
events took place in Sardinia even in the Information Technology world: here the net was first
used to break the insularity. The first newspaper on-line in the world was born here, many
years ago. Now, it is from Sardinia that new stars of the Communication Market arose.
Few people (less than 2 millions), and two universities, at Sassari in the northern side, and
Cagliari, the main town of the island, where the very recent birth of the course of Electron
Engineering first brought the language of microelectronic physics and technology. Many of
us, professors, came from other towns, with the duty to start up this new adventure. Many
links with old friends, cooperation with more celebrated universities and a lot of daily work
were the ingredients to play with.
And now such a top event as WOCSDICE honours our efforts.
Let me then tray to pay, in this page, part of the huge debts that I got with the many people
who helped me. I wish to thank the Office of Naval Research International Field Office
(ONR-IFO) and the U.S. Army Research Laboratory - European Research Office (ARL-ER)
for their financial support.
For the same reason I will thank the Organisations to which I belong, the University of
Cagliari and the National Institute for Solid State Physics (Istituto Nazionale di Fisica della
Materia, INFM).
Thanks also to the logistic contribution from the many local administration offices: the
Assessorato al Turismo and the Azienda Autonoma di Soggiorno e Turismo of the town of
Cagliari, the corresponding Ufficio del Turismo of Quartu S.Elena, the Ente Provinciale del
Turismo (EPT) and the Ente Sardo Industrie Turistiche (ESIT).

And very very special thanks to Cinzia and Rosalba and Gigi, of Informatic Service for their
daily assistance during the past months up to now for creating the event.

Last, let me indicate the real chairman of WOCSDICE 2001, who solicited, selected,
distributed, invited peoples and papers, my friend Gaudenzio Meneghesso, who will bring this
appreciation to his University, the ancient and honourable University of Padua that, thanks to
him, is the actual co-organizer of WOCSDICE 2001.
His job is simply and impressively summarized in the huge program that follows this
welcome address.

Welcome again, a lot of thanks, too. And at the next appointment, WOCSDICE will have a
new group of colleagues and friends: form here, Cagliari, Sardinia, Italy.

Massimo Vanzi
WOCDICE2001 Chair
INTRODUCTION /

INDEX //

ORGANIZING COMMETTEE vii

STEERING COMMETTEE viii

INVITED PAPERS /*

SESSION I - MMIC and Advanced Circuits 1

INVITED
PBG-like frequency and angular selective devices 3
J. Danglot, T. Akalin, O. Vanbesien and D. Lippens

Ultra Compact Reflective Type Phase Shifter MMIC for L-Band 5

F. Blincter. R. Vogt and W. Bächtold,

Monolithic integration of Optoelectronic IH/V Devices with Silicon-Microelectronics 7

D. Fehly, H.-H. Wehmann and A. Schlachetzki

Monolithically Integrated Traveling-Wave Amplifier for Low-Cost Broadband 9

Optical Receiver
A. Orzati and W. Bächtold

lll-V material and device aspects for the monolithic integration of GaAs devices on 11
Si using GaAs/Si low temperature wafer bonding
A. Georgakilas. M. Alexe, G. Deligeorgis, D. Cengher, E. Aperathitis, Z. Hatzopoulos, G.
Halkias

Influence of the Integration on the Performance of Bidirectional Modules for Single 13

Fiber Application
H.-C. Neitzert and A. Piccirillo

SESSION II - Heterojunction Bipolar Transistors 15

INVITED
GalnP-GaAs HBT's for High Frequency and High Power Applications 17
S.L Pelage, D. Floriot, S. Cassette, N. Caillas, E. Chartier, N. Frapsauce, M. Surrugue,
J.C. Jacquet, S. Piotrowicz, M.A.diForte-Poisson

InSb Heterostructure Bipolar Transistor Operating at Room Temperature 19

T. J. Phillips. T. Ashley, T. M. Burke and A. B. Dean

Carbon Doped InP/lnGaAs-HBT: Consistent Small-Signal and RF-Noise Modelling 21

and Characterization
M. Agethen, S. Schulter, P. Veiling, W. Brockerhoff, F.-J. Tegude

Influence of the Emitter Orientation on the Current Gain of InP/lnGaAs DHBTs 23

/. Schnvder. M. Rohner, and H. Jacket

High speed fully self-aligned collector-up MHBTs 25

S. Demichel, R. Teissier, F. Pardo, F. Mollot and J-L Pelouard

Highly Efficient GalnP/GaAs HBTs for High Power Applications 27

J. Würff*\ P. KurpasM, R. Doerne^, B. Janke®, P. Heymann(a), A. Maaßdort*,
W. Doser1^, P. Auxemer/C\ H. Blanch, D. Pons(c), W. Heinrich^

Design Optimisation of InP/lnGaAs HBTs 29

A.A. Rezazadeh(a) and H Sheng(b),
SESSION III - GaN: material growth and device processing 31

INVITED
AIGaN/GaN HEMT's: epitaxial growth issues on various substrates, devices 33
fabrication, and insertion of GaN component into circuits.
Joseph Smart

Organometallic Vapor Phase Epitaxy Growth and Optimization of AIN/GaN MIS-type 35

Heterostructures
SM Hubbard, D. Pavlidis, V. Valiaev, A. Eisenbach
37
InGaN - a material for electronic devices?!
M. Seyboth, C. Kirchner, M. Kamp, I. Daumiller, M. Neuburger, E. Kohn
39
Power and Frequency Limits of AIGaN/GaN HEMT's
L F. Eastman,

Quantum 1/f Noise in GaN/AIGaN HFETs and Phase Noise in RTDs 41

P. H. Handel

Fabrication of 0.5-nm-AIGaN/GaN HEMTs based on a 2-inch-Stepper-Process 43

J. Hilsenbeck. R. Lossy, J. Würfl and H. Obloh

45
SESSION IV - Characterization of GaAs and InP-based devices
INVITED
Design and Fabrication Technology of Gate and Gate Recess for Ultrahigh-Speed 47
InP-Based HEMTs
T. Suemitsu, T. Ishii and H. Yokoyama

Fast Traps in InAIAs/lnGaAs/lnAIAs/lnP 2-DEG Channels 49

A. Matulionis, V. Aninkevicius, L Ardaravicius, J. Liberis, and D. Gasquet

Evaluation of SiNx Passivation on InP HEMTs at Room and Cryogenic Temperature 51

R. Limacher, M. Rudin, O.J. Homan, W. Bächtold

Simulation of ultra short channel InAIAs/lnGaAs/lnP High Electron Mobility 53

Transistors by a Coupled Solution of the Schrödinger Equation with a
Hydrodynamic Transport Model
J. Hontschel. R. Stenzel, W. Klix, C. Wölk, V. Ziegler, C. Gassier

Electron Saturation Velocity in Ga0«Ino^P as a Function of Temperature in Double 55

Heterojunction Bipolar Transistors
M. Yee, P.A.Houston and J.P.R. David

Non-Destructive Depth-Resolved Characterization of InGaP/GaAs Multi-Layer 57

Heteroepitaxial Wafers by Cathodoluminescence
F. Ishikawa and H. Haseaawa

Microwave Source Studies based on Reflection Type Oscillators and different 59

HEMT - Circuit Configurations
A. Megej and H. L Hartnagel

m
SESSION V - POSTER SESSION 61
Theoretical Investigation of Hot Electron Effects in InP-based HEMTs 63
A. Sleiman(a>. L Ferrantfa>, A. Di Carlo®, P. Luglfa) and G. Zandle^

The significant differences of AI203 (0001) substrate nitridation by a nitrogen radio 65

frequency plasma source at high and low substrate temperatures
S. Mikroulis{a). M. Zervos(a) V. Cimallaia), M. Androulidakfa), A. Kostopoulos{a), Ph.
Komninouw, M. Calamiotou{c' and A. Georgakilas{a)

Low temperature-grown Be-doped GaAs for ultrafast optoelectronic applications 67

S. Marcinkevicius<a~.J. Sieged, A. Gaarde^, F. Garetb), K. Bertulis(c> and A. Krotkus(c)

Properties of InAs/GaAs lasers grown by MOCVD - application to ridge-waveguide 69

geometry.
LKuna<a). F. Uherekfa'b>, J.Koväö<ab>, A. Vinczem, J.Jakabovic®, V.Gottschalch®

Tunable Laser Diodes based on the Quantum Confined Stark Effect 71

N.Le Thomas®. N.T. Pelekanos<b>, Z.Hatzopoulos<b>, P. Giletc), R. Hamelin®

Current Collapse in AIGaN/GaN HEMTs 73

A. Chini, F. Bruni, D. Buttari, G. Meneghesso, E. Zanoni

Monte Carlo simulation of short channel MOSFETs in 3C, 4H, and 6H-SiC 75
M. Youssef. M. Charef, and R. Fauquembergue.

60GHz 420mW/mm Low Gate Current GalnAs/lnP Composite Channel HEMT on 77

InP substrate.
M. Boudrissa E Delos, X Wallaert, D. Theron and J.C. De Jaeger

SESSION VI - Optoelectronics I 79

INVITED
New frontiers of Quantum Cascade devices: towards a THz laser 81
A.Tredicucci, R. Köhler, R. Colombelli, F. Capasso, C. Gmachl, M. C. Wanke, A. L
Hutchinson, D. L Sivco, and A. Y. Cho

Hot Electron Injection Laser: The internal Base Potential 85

R.C.P. Hoskens. T.G. van de Roer, G.A. Acket

Development of MOVPE Strained Piezoelectric InGaAs/GaAs/AIGaAs Quantum- 87

Well Double-Confinement Laser Structures on (111)A GaAs Substrates
J. Kim, S. Cho, A. Sanz-Herväs, A. Majerfeld and B. W. Kim

Failure Criteria for Optoelectronic Emitter Degradation 89

H.-C. Neitzert and A. Carbone

Optically Matched Side-Illuminated Photodetector for 1.3pm and 1.55pm 91

wavelength Use Suitable For Hybrid Platform Integration
J. Harari. L Giraudet, V. Magnin, J. Decobert, D. Decoster

Improved Ultra Fast All-optical Shift Register and it's application for Optical Fiber 93
Communication
Bo Tian, Wim van Etten, Wim Beuwer

Analysis and Modeling of Distributed Amplifiers 95

£. A. Karaaianni and. N. K. Uzunoglu

IV
SESSION VII - Optoelectronics II 97

INVITED
Development of InGaN on SiC LED and lasers at OSRAM 99
Volker Härle
Design and characterization of InGaAs/lnP avalanche photodiode 101
F. Uherek. D. Hasko and 0. Lenavel
Optical Mode Transformers for Low Loss Coupling Between Fiber and InP-Based 103
Photonic Circuits
K. Blarv. B. Bellini. Y. Hernandez, J.F Larchanche, J. Harari, J.P. Vilcot, F. Mollot,
D. Decoster
Heterostrucure Solder Bumps for Optoelectronic Integration 105
C.G. Fonstad. Jr..
Performance optimization of GaAs-based terahertz photomixer 107
M. Mikulics(a'b), J. Darmo{a-b), D. Buca{a), A. Fox{a\ M. Marso{a), A. Forstet and
P. Kordos{a)
Comparison of Traveling-wave and Lumped-element 1.55 urn Photomixer for 109
generation of THz radiation
M. N. Feiainov and V. Krozer

SESSION VIII - Device and Material Characterization 111

INVITED
The low frequency noise in electronic devices: an engineering sight 113
M. Boraarino and F. Fantini
Noise Behavior Of Advanced SiGe HBT 115
L Bary, G. Cibiel, J. Ibarra, 0. Llopis, R. Plana, J. Graffeuil, G. Niu, J.D. Cressler, Z. Jin,
S. Zhana. A.J. Joseph and M. Boraarino
IBIC Analysis of Gallium Arsenide Schottky Diodes 117
C. Manfredotti. E. Vittone.F. Fizzotti, A. LoGiudice, F. Nava
Electrical and optical properties of resonant tunneling structures with 119
interdigitated gates.
S.A.Vitusevich. A.E.Belvaev, N.Klein, W.Reetz, A.Förster, S.V.Danylyuk and D.I.Sheka
Carrier Mobility in a Forward-Biased Junction 121
A.R. St.Denis. D.L. Pulfrey and M. Vaidyanathan
Surface Acoustic Wave Investigation of the Near-Surface Layers Under Light 123
Irradiation
D.V. Lioubtchenko. I.A. Markov, T.A. Briantseva, V.E. Lyubchenko

12s
SESSION IX - Advanced Devices and Materials
INVITED
Premature Saturation in AIGaN/GaN HFET's. 127
R.J. Trew
Surface and nearsurface transformations in A3B5 semiconductors under typical 129
technology enforcements
D.V.Lioubchenko, T.A.Briantseva, V.E.Lvubchenko
New Concept of Antireflective Films With Silicon Oxynitrid Graded Refractive 131
Index
L Zighed, M. Remram, A. Abuarafah
Equivalent Circuit and High-Frequency Performance of the Resonant-Tunneling 133
diodes
M N. Feisinov
Optimisation Criteria for a Frequency Tripler with Anti-Serial Schottky Diodes 135
M. Krach. J. Freyer, and M. Claassen

Hexagonal Binary Decision Diagram Quantum Circuits on lll-V Nanowire Networks 137
- a Novel Approach toward Quantum LSIs-
H. Hasegawa and S. Kasai

Surface-Related Kink Effects in AIGaAs/GaAs Power HFET's 139

E. Tediosi. G. Verzellesi, C. Canali, G. Sozzi, R. Menozzi, C. Lanzieri

SESSION X - GaN-based Devices 141

INVITED 143
GaN on Silicon for High Power and High Frequency Electronics
Dr Eddie Piner

High Frequency Noise Studies in AIGaN/GaN MODFETs 147

S. S.H. Hsu, D. Pavlidis. J. S. Moon, M. Micovic, C. Nguyen, and D. GriderJeong
Optimization of AIGaN/GaN HEMT structures using the RoundHEMT technology 149
M. Marso. P. Javorka, A. Alam, M. Wolter, H. Hardtdegen, A. Fox, M. Heuken, P. Kordos,
and H. Lüth

Characterization of Temperature Dependence of AIGaN/GaN HEMTs 151

T. Mizutani. M. Akita and S. Kishimoto

Influence of Barrier Thickness on the High Power Performance of AIGaN/GaN 153

HEMTs
V.Tilak, B.Green, J.Smart, J.R.Shealy, L.F.Eastman

An investigation into the charge distribution and pinch off behavior of AIGaN/GaN 155
double heterostructure DH-FETs under Schottky and ohmic contacts.
M.Zervos. A.Kostopoulos, G.Constantinidis, M.Kayambaki, S.Mikroulis and
A.Georgakilas.

SESSION XI - SiC- and GaN-based devices 157

INVITED
Wide Bandgap Semiconductors Technologies for Microwave Power Amplifiers 159
C. Brylinski

Optimisation of Structure and Gate Leakage Effects in MOVPE AIGaN/GaN 161

Heterostructure Field Effect Transistors
WS Tan{a\ P A Houston(a), P J Parbrookia), DA WoodP, G Hilfa), C R Whitehouse{a) R W
Martin{b)
ECR-Silicon nitride passivation of Hl-V transistor 163
S.Shapovafa). V.Gurtovofa), A.Kovalchuk{a}, and C.Gaquiere(b)
The Optoelectronic Response of Extended Defects in 4H-SiC 165
Chi-Hsin Chiu(a>, PJM ParmiteP'\ K Hilton(b>, M J Uren(b) and J G Swanson<a)
4H-SiC p+-n-n+ Zener and IMPATT diodes 167
K. Vassilevskfab), K. Zekentesim. M. Lagadas{a), N. Papanicolaouic), A. Zorenko{d),
Leonid Romano(e)
Trap-Related Effects in 6H-SiC Buried-Gate JFET's 169
G. Meneghesso{a), A. Chinfa), E. Zanonfa\ G. Verzellesfb). E. Tediosfb), C. Canalfb\
A. Cavallinfc), A. Castaldinfc)

VI
 WOCSDICE 2001
ORGANIZING COMMETTEE
GENERAL CHAIR:
Prof. Massimo Vanzi
University of Cagliari, DIEE-INFM,
Piazza d'Armi, 09123 Cagliari,
ITALY
Tel+39 70 6755881,
Fax +39 70 6755890,
e-mail: vanzi@diee.unica.it

TECHNICAL PROGRAM CHAIR:

Dr. Ing. Gaudenzio Meneghesso
Universitä di Padova, D.E.I.,
via Gradenigo 6/A 35131 Padova,
ITALY,
Tel. +39-049-8277653,
Fax: +39-049-8277699,
e-mail: gauss@dei.unipd.it.

CONFERENCE SECRETARIAT:
Informatic Service,
Fax: +39 (70)827601
E-mail: ]nfeervi@tin.it

INTERNET
http://www.diee.unica.it/wocsdice/

VII
 STEERING COMMITTEE

Prof. Werner Bächtold

Swiss Federal Inst. of Techn. (ETHZ) Microwave Electronics Group Gloriastrasse 35, Zürich
8092, Switzerland, baechtold@ifh.ee.ethz.ch
Prof. Lester F. Eastman
Cornell University, School of Electrical Engineering, 425 Phillips Hall, Ithaca NY, 14853-
5401, United States of America, lfe@iiiv.tn.cornell.edu
Prof. Fausto Fantini
Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena e Reggio Emilia,
via Vignolese 905, 41100 Modena, Italy, fantini@dsi.unimo.it
Prof. Hans Ludwig Hartnagel
Technische Universität Darmstadt, Institut für Hochfrequenztechnik, Merckstr. 25, Darmstadt,
64283, Germany, hfmwe001@hrz2.hrz.tu-darmstadt.de
Prof. William M. Kelly
Univ. College Cork, N.M.R.C., Lee Maltings Prospect Row, Cork, Ireland
Prof. Erhard Kohn
Universität Ulm, Dept. of Electron Devices & Circuits, Albert Einstein Allee 45, Postfach
4066, Ulm 89069, Germany, erhard.kohn@e-technik.uni-ulm.de
Prof. Didier Lippens
Universite des Sciences et Tech, de Lillel, (IEMN), Depart. Hyperfr. et Semic. Avenue
Poincare BP 69, Villeneuve d'Ascq Cedex 59652, France. Didier.Lippens@IEMN.univ-lille1.fr
Prof. Arvydas Matulionis
Semiconductor Physics Institute, A. Gostauto 11, Vilnius 2600 Lithuania, matulionis@uj.pfi.lt
Prof. David Vemon Morgan
Cardiff University, School of Engineering, Head of the School of Eng. Queen's Buildings The
Parade, PO Box 925, Cardiff, Wales CF24 OYF, United Kingdom, morgandv@cardiff.ac.uk
Prof. Elias Munoz
Univ. Politecnica de Madrid, ETSI Telecomunicaciön IEL Ciudad Universitaria, Madrid
28040, Spain, elias@die.upm.es
Prof. Oimitris Pavlidis
The Univ. of Michigan, Solid-State Electronics Laboratory, EECS 2307 1301 Beal Avenue,
Ann Arbor, Ml 48109-2122, United States of America, pavlidis@umich.edu
Dr. Jean-Luc Pelouard,
L2M-CNRS, 196, Avenue Henri Ravera, BP 107, Bagneux CEDEX 92225, France,
Jean-Luc.Pelouard@L2M.CNRS.fr
Prof. Peter N. Robson
The Univ. of Sheffield, Dept. of Electron, and Electr. Eng., Mappin Street, Sheffield S1 3JD,
United Kingdom, p.robson@sheffield.ac.uk
Prof. Dr. Theo G. van de Roer
Eindhoven University of Technology, Department of Electrical Engineering, Division
Telecomm. Technology and Electromagnetics, P.O. Box 513 - EH8. Eindhoven 5600 MB,
The Netherlands. T.G.v.d.Roer@tue.nl
Prof. Hartwig W. Thim
Johannes Kepler, Universität Linz, Inst, für MikroElektronik, Altenbergerstr. 69, Linz 4040,
Austria. h.thim@jk.uni-linz.ac.at
Dr.-Ing. Joachim Würfl,
Ferdinand-Braun-Institut, für Höchstfrequenztechnik (FBH), Head Process Technology
Department, Rudower Chaussee 5, Berlin 12489, Germany, wuerfl@fbh-berlin.de

VIII
 INVITED SPEAKERS

The low frequency noise in electronic devices: an engineering sight.

M. Boraarino and F. Fantini
Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena e Reggio Emilia,
via Vignolese 905, 41100 Modena, Italy

Wide Bandgap Semiconductors Technologies for Microwave Power Amplifiers.

C. Brylinski
THALES LCR (formerly Thomson-CSF/LCR) Domaine de Corbeville, F-91404 Orsay Cedex

GalnP-GaAs HBT's for High Frequency and High Power Applications.

S.L. Pelage, D. Floriot, S. Cassette, N. Caillas, E. Chartier, N. Frapsauce, M. Surrugue,
J.C. Jacquet, S. Piotrowicz, M.A.diForte-Poisson
THALES LCR (formerly Thomson-CSF/LCR) Domaine de Corbeville, F-91404 Orsay Cedex

Development of InGaN on SiC LED and lasers at OSRAM.

V. Härte
Osram Opto Semiconductors GmbH & Co. OHG

PBG-like frequency and angular selective devices.

J. Danglot, T. Akalin, O. Vanbesien and D. Lippens
Institut d'Electronique et de Microelectronique du Nord - Universite des Sciences et
Technologies de Lille -59652 Villeneuve d'Ascq Cedex, France

GaN on Silicon for High Power and High Frequency Electronics.

E. L Piner
Nitronex Corporation, 628 Hutton Street, Suite 103 Raleigh, NC 27606.

AlGaN/GaN HEMTs: epitaxial growth issues on various substrates, devices

fabrication, and insertion of GaN component into circuits.
J. Smart
V.P. of advanced Technology.RF Nitro Communications

Design and Fabrication Technology of Gate and Gate Recess for Ultrahigh-Speed
InP-Based HEMTs.
T. Suemitsifa). T. Ishifa) and H. Yokoyama{b)
(a) NTT Photonics Laboratories 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198,
Japan
(b) NTT Advanced Technology Corp. 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-
0198, Japan

New frontiers of Quantum Cascade devices: towards a THz laser.

A.Tredicuccfa\ R. Köhler™ R. Colombellfb), F. Capasso{b), C. Gmachfb), M. C. Wanke(b\ A.
L Hutchinson{b), D. L Sivcom, and A. Y. Cho{b)
(a)Scuola Normale Superiore and INFM, Piazza dei Cavalieri 7, 1-56126 Pisa (Italy)
(b)Bell Laboratories, Lucent Technologies, 600 Mountain Avenue, Murray Hill, NJ 07974
(USA)

Premature Saturation in AlGaN/GaN HFET's.

R.J. Trew
ECE Department, Virginia Tech University, Blacksburg, VA

IX
 SESSION I
MMIC and Advanced Circuits
Chair: Prof. Hans L. Hartnagel
Monday May 28, 2001
8.40 am PBG-like frequency and angular selective devices
J. Danglot, T. Akalin, O. Vanbesien and D. Lippens
INVITED Institut d'Electronique et de Microelectronique du Nord - Universite des
Sciences et Technologies de Lille -59652 Villeneuve d'Ascq Cedex, France

9.05 am Ultra Compact Reflective Type Phase Shifter MMIC for L-Band
F. Ellinger, R. Vogt and W. Bächtold,
ETH-Zürich, CH-8092 Zürich, Switzerland,

9.20 am Monolithic Integration of Optoelectronic lll/V Devices with Silicon-

Microelectronics
D. Fehly, H.-H. Wehmann and A. Schlachetzki
Institute for Semiconductor Technology Technical University Braunschweig,
Braunschweig, Germany

9.35 am Monolithically Integrated Traveling-Wave Amplifier for Low-Cost

Broadband Optical Receiver
A. Orzati and W. Bächtold
Swiss Federal Institute of Technology, Gloriastrasse 35 CH-8092 Zurich,
Switzerland

9.50 am lll-V material and device aspects for the monolithic integration of GaAs
devices on Si using GaAs/Si low temperature wafer bonding
A. Georaakilas{a\ M. Alexe{b), G. Deligeorgis{a}, D. CengheP', E.
Aperathitis{a), Z. Hatzopoulos{B) and G. Halkias(c)
(a) Microelectronics Research Group, FORTH, IESL and Univ. Crete,
Physics Dept., P.O. Box 1527, 711 10, Heraklion-Crete, Greece
(b)Max Planck Institute of Microstructure Physics, Weinberg 2, D-06120
Halle, Germany
(c) NCSR "Demokritos", Inst. of Microelectronics, P.O. Box 60228, 15310
Agia Paraskevi, Greece

10.05 am Influence of the Integration on the Performance of Bidirectional

Modules for Single Fiber Application
H.-C. Neitzeria) and A. Piccirillo(b>
(a) Universitä di Salerno, DIME, Fisciano, Italy,
(b) Telecom Italia Lab, Torino, Italy
 PBG-like frequency and angular selective devices
J. Danglot, T. Akalin, O. Vanbesien and D. Lippens

Institut d'Electronique et de Microelectronique du Nord

Universite des Sciences et Technologies de Lille
59652 Villeneuve d'Ascq Cedex, France

Abstract: The frequency and angular selectivity properties of PBG-like microstructures are more specially
addressed with the aim to use them for innovative filtering and radiating elements. The concepts, used here, are
quite general and can be applied to both optical and microwave devices. We exemplified the potential of such
structures with three examples. Two concern the possibility of (i) fabricating compact filters with a two-side
microstrip approach, the potential application being modules for steerable rf antenna and (ii) the micromachining
of optical waveguides with the generic OADM multiplexer for WDM. The third one is dealing with the
possibilities afforded by PBG structures for improving the radiation pattern of rf and optical sources.

Introduction:

Photonic Band gap (PBG's) Material systems are now attracting much interest with the prospect of high
performance devices aimed at operating at microwave or optical frequencies [1]. Basically a periodic modulation
of the refractive index (the permittivity) induces forbidden gaps in their electromagnetic spectrum. On the other
hand, the modulation of their structure, in a fashion similar to the semiconductor potential, gives rise to an
angular selectivity such as the anisotropy resulting from the crystallographic directions.
In this communication, we take advantage of such properties for analyzing filtering and radiating elements. To
address these possibilities we report on (i) the microstrip-type filter with the structuring of their ground plane,
(ii) a radiating element embedded in a Fabry-Perot cavity and (iii) a directional coupler for the ADD DROP
operation.

Two side patterning for microstrip-type filters

We report first on experimental analysis of photonic band gap microstrip-type filters by means of vectorial
analysis at microwave frequencies. The periodically frequency selective structure was achieved via ground plane
patterning and the influence of a shielding in close proximity was more specially addressed,
(a) (b)

f[ r 1 . f1 tiffiw/ V
) l/y K

J
J

\ /
V, I
V
8 10 12 14 16 18 20
Frcq (GHz)

Fig. 1 frequency spectrum for the one side protoptype (a) and the two side circuit (b)

We used a relatively quite high dielectric constant for the microstrip substrate with a 1.27 mm-thick duroid 6010
(dielectric permittivity of 10). The prototypes were fabricated at the University of Pampelona by conventional
printed-circuit techniques including the surface drilling of holes. Fig. 1 (a) and (b) shows the frequency
dependence of the scattering parameters Sn and S2i measured and calculated using the HFSS code. A
satisfactory agreement can be noted in the magnitude and the frequency of pass and stop band at least up to 10
GHz. The novelty in the present work stems from the combination of two patterns, one implemented upside as
for a conventional microstrip filter with inductive and capacitive transmission line sections whereas the other one
was patterned with holes. Figure 1(b) shows the calculated Sll and S21 scattering parameters for a two side
structure filter. The top pattern is formed via a printed technology with successive high and low impedance
section wl= 1.2mm and w2 = 8mm respectively. The back side ground plate is etched with holes of radius
3.5mm with a period of 14.1 mm. The holes are under the high impedance sections.
Directive antenna [2]

In this section, we investigate the conditions of directivity for dipole antennas (Fig. 2(a)) embedded in PBG-like
cavities. It is shown that the primary reason for a high directivity is the evanescence of electromagnetic wave in
the PBG mirror. In practice, this implies to operate in the forbidden gap of the PBG material which constitutes
the mirrors. A high transmission level of the structure, taken as a whole, is explained by a defect-assisted
resonant transmission (2(b)). Under these conditions, simple Bragg reflectors ID-photonic Band Gap structure
can be used. This auto-focus effect (2(c)) is similar to that demonstrated over the past with resonant cavity
antenna bounded by Bragg reflectors,
(a) (b) (c)

0.0 N-**
\ /'■■■: i
7/ \\
-5iÖ
\
10.0 :\ \
\ : l
'—15.0 \
S3
^20.0
VA
\
-25.0
\^ A\ ^/ i
■ll
i

-30,0
2.0 4.0 ß.O B.0
ITreq (GHz)

Figure 2 illustration of lens effect (a) radiation pattern for an isolated dipole (b) the resonant effect in the gap and (c) the focusing effect

Optical Add Drop [3]

The conditions for frequency selective coupling between two electromagnetic waveguides in a Photonic Band
Gap dielectric technology (Fig. 3(a)) are investigated using a whispery Gallery mode resonator. The study is
conducted via electromagnetic simulations (3(b)) by addressing the directivity and selectivity issues. It is shown
that the direction of feeding is essential in the directivity issue with interference patterning. As expected with a
proper choice of PBG configuration, high intrinsic quality factor cavity can be demonstrated so that the loaded
cavity meets the requirement of highly selective add or drop operation (3(c)). The possibility to preserve the
coupling performances under finite vertical structuring is on the other hand addressed.

B"

1.315 1.32
Longueur d'ondc (um)

Figure 3 illustration of the PBG-like technology for inte I optics (a) hole drilling in a semicoductor on a submicron scale (b) modeling of
the guiding propoerties with a linear defect (c) directional coupling.

Conclusion.
Numerous degrees of freedom are now afforded by the use of PBG-like structure. In this context we
demonstrated the concepts of wave guiding and filtering via distributed or local defects are quite general with
potential applications in FDM and WDM.

Acknowledgement: The work on filter was carried out in the frame work of a collaboration with the Pampelona University. The study on
integrated optics is supported by a french research agency contract.

References
[1] See for instance Photonic Band Gap material edited by CM. Soukoulis, Kluwer Academic Publishers
[3] T. Akalin et al. 24th ESTEC Antenna Workshop on innovative periodic antenna, photonic band gap, fractal and frequency selective
structures, May/June 2001
[4] J. Danlot, et al., IEEE Microwave and Guided Wave Letters, Vol. 9, N°7, July 1999
 Ultra Compact Reflective Type Phase Shifter MMIC for L-Band
Frank Ellinger, Rolf Vogt and Werner Bächtold,
ETH-Zürich, CH-8092 Zürich, Switzerland, e-mail: ellinger@ifh.ee.ethz.ch

Abstract —This paper presents an ultra compact of microstrip lines, the 90° 3 dB branch-line coupler
reflective type MMIC phase shifter at 1.2 GHz is realized with lumped elements, which can be
for an aero navigation radar, which has been calculated as follows [6]:
fabricated using a commercial GaAs MMIC 1
process. A 3 dB 90° coupler with lumped elements C,= (1)
2-n.ß
was used to significantly reduce the circuit size in
comparison to former approaches using Z
microstrip branch-line or lange couplers. A phase J1
(2)
2nf^2
shift range of 210° is obtained using reflective
loads, which can be varied by MESFET 1
varactors. The loss is 4.6 dB ±1 dB, the 1 dB 2 -Cj (3)
input compression point is higher than 7 dBm (2nf)2L1
and the chip area is only 0.9 mm2. To our with port impedance Z and frequency f.
knowledge, this is the smallest reflective type
phase shifter at L-band, reported to date. Reflective Loads
90° 3dB Coupler
i Li«
Introduction
Due to their low control complexity (only one C2 C2
control voltage), low loss, good stability against Li CüC-block'
In Cl- pnoi» -VW—i
temperature changes and low sensivity on process ■Mrias ♦control

tolerances, reflective type phase shifters (RTPS) are

frequently used in radar systems. The first RTPS was Out O-
""" L, "I~ CDC-M Rbias
-wv—• T Cunp-block
introduced by [1] and has been improved by [2] and
several other works. However, the compactness of
Cvarartor
T
Cvar.*.^[0.5..2.4pFl
= [0.!
these circuits is particularly limited by the size of the >T, A L,Md=20nH
Ci = 3pF f IW= 2k?
branch-line couplers, which use microstrip lines with C2= 1.2pF A Coc-«ock= 1'12pF
lengths of A,/4. Recently, a work has been done to Li = S.2nH CHF-Wock= 30pF
reduce the size of an L-band RTPS down to
Fig. 1: Circuit topology of the RTPS using lumped
12 mm x 60 mm by folding the microstrip lines of
elements.
the coupler [3]. Nevertheless, these phase shifters
still consume too large sizes for compact radar
The reflective loads consist of varactor diodes
systems. A C-band GaAs MMIC RTPS has been
(Cvaractor), which are resonated by inductors (L|0ad).
reported in [4], for which the size was reduced to
Simulations have been performed in HP SERIES IV
3.6 mm x 1.6 mm.
using a modified TOM H model [7] for the MESFET
The major design issue of our work was to further
varactors and S-parameter files for the inductors.
reduce the RTPS size by substituting the microstrip
Inductors have been optimized using Sonnet [8]. The
lines of the branch line coupler by lumped element
equivalents [5]. To our knowledge, the RTPS inductors L{ and Lload have line thicknesses of 6 urn,
presented here has the smallest size at L-band, spacings of 5 urn and line widths of 15 urn and
reported to date, independent of the applied MMIC 5 urn, respectively. The varactor diodes are realized
technology. using deep depletion MESFETs (gate width =
1000 urn, gate length = 0.6 urn) with the drain and
Circuit Design the source connected together. The phase of the
The RTPS was fabricated using the Triquint TQTRx circuit can be adjusted by the control voltage VCOntroi.
GaAs MMIC process. The circuit topology of the which is fed through the bias resistors Rbjas.
designed RTPS is shown in Fig. 1. Input and output,
which are matched to 50 D, are symmetrical. Instead
A photography of the MMIC RTPS, mounted on a
duroid test substrate, is shown in Fig. 2. The size is
0.85 mmx 1.1 mm.

m ■ i" n:..ji|K:.:. ■'■ ■'.'' ,,.pi >J"-i*U''!"i'!.-. ^-■VFKmWM""

b
■istefi
HaM' -&BnggSBä*Taaffl
-1 0 1
ilSift? J(tiBitlS&3i!iBlt>l< ■!,' 'i iSjuS!
Control voltage [V]
'■ün^rifeT i": sSKSgv-v .:., «»«id lauster Fig. 4: 1 dB input compression point versus control
.BäH? ':- :^^H*-"i, i" ISAM ?s Off
I mm voltage.
PiSSi y-^HSffi^ffiHal . '■-"-■=■:■---.-' iT■ «P.
Conclusion
A reflective type phase shifter MMIC at L-band has
PIP ail"
BSP
m been presented, which has been designed for an aero
navigation radar system. The circuit has an excellent
Fig. 2: Photograph of the RTPS MMIC, chip size is large signal performance and allows a continuously
0.85 mmx 1.1 mm. adjustable 210° phase shift with moderate signal loss
and high return losses. By using a 90° 3 dB coupler
Measurements with lumped elements instead of microstrip lines, the
Fig. 3 shows the phase shift, the signal loss and the circuit size has been significantly reduced in
input and output return loss versus control voltage at comparison to former approaches. To our
1.2 GHz. A signal loss of -4.6 dB 61 dB and return knowledge, the presented circuit is the smallest
losses of higher than 12.5 dB are measured within a reflective type phase shifter at L-band, reported to
phase control range of 210°. date.
125
References
75 -5 [1] R. N. Hardin, E. J. Downey, J. Munushian, "Electronically variable
phase shifter utilizing variable capacitance diodes ", Proc. IRE, Vol. 48,
25 -10 -a May 1960, pp. 944-945.
[2] M. E. Bialkowski, N. C. Karmakar, "An L-Band 90" hybrid coupled
EZ -25 -15 00
phase shifter using UHF band p-i-n diodes", Microwave and Optical
<o
<*>S -75 j^y^fi x -20
00
Technology Letters, Vol. 21, No.l, April 5, 1999, pp. 51-54.
[3] M. E. Bialkowski, N .C. Karmakar, "Design of compact L-Band 180°
phase shifter", Microwave and Optical Technology Letters, Vol. 2,
-125 —^4, j -25 U5
CO
No.2, July 20,1999, pp. 144-148.
O [4] F. D. Paolo, "A simple, high yield 6 to 18 GHz GaAs monolithic phase
-175 __-V_J -30 shifter", Microwave Journal, April 97, pp. 92-104.
■
■ •
[5] T. Ohira, Y. Suzuki, H. Ogawa, H. Kamitsuna, "Megalithic microwave
-225 -35 signal processing for phased-array beamforming and steering", IEEE
Trans. Microwave Theory Techn., Vol. 45, No. 12, Dec. 1997, pp. 2324-
-10 12 3 4 5 6
2332.
[6] R. W. Vogel, "Analysis and design of lumped and lumped distributed
Control voltage [V] element directional couplers for MIC and MMIC applications ", IEEE
Trans. Microwave Theory Techn., MTT-40, Feb. 1992, pp. 253-262.
Fig. 3: Measured phase (solid line), signal loss (solid line) [7] F. Ellinger, J. Kucera, W. Bächtold, "Improvements on a nonlinear GaAs
and return losses (dotted) versus control voltage, MESFET model", IEEE MTT-S International Microwave Symposium,
Baltimore, June 98, page 1623-1626.
f=1.2 GHz. [8] J. Kucera, "Highly integrated RF transceivers", Ph. D. Thesis, Diss.
ETHNo. 13361, Zurich, Dec. 1999.
Fig. 4 shows the large signal performance of the
circuit. Within the 210° phase control range, the
1 dB compression point is higher than 7 dBm.
Within a bandwidth of 50 MHz, centered at 1.2 GHz
and within a phase range of 210°, Sii and S22 are less
than -12 dB and the signal loss variations are smaller
than 6 0.5 dB.
 Monolithic Integration of Optoelectronic lll/V Devices

with Silicon-Microelectronics

D. Fehly, H.-H. Wehmann and A. Schlachetzki

Institute for Semiconductor Technology, IHT@TU-BS.DE
Technical University Braunschweig, Hans-Sommer-Str. 66, D-38106 Braunschweig, Germany

A major impediment to the introduction of optical fiber communication to the subscriber area
is the lack of inexpensive and mass-produced optoelectronic converters. Such a device
should make use of the highly developed microelectronics on silicon and of the optoelec-
tronic potential of Ill/V-compound semiconductors. The latter generally are of a direct elec-
tronic band structure so that they can be utilized as light emitters, in contrast to the indirect
Si.
In this contribution we report on the monolithic integration of optoelectronic IMA/ devices to-
gether with MOS circuits in Si with (100) crystallographic orientation which is commonly used
in industry. Because of its potential for mass-production we employ the metal-organic va-
pour-phase epitaxy to deposit the IIIA/-semiconductor films. We conduct our fabrication pro-
cess in such a way that the production steps typical for lll/V alloys do not unfavourably in-
terfere with the Si technology, i.e. we fabricate the MOS circuits first, excluding the metalli-
sation, after which the lll/V devices are made. Finally, the metal interconnection is estab-
lished.
We demonstrate the feasibility of our process by a metal-semiconductor-metal (MSM) pho-
todetector on the basis of InGaAs which is monolithically integrated with a 3-stage MOS am-
plifier on a Si substrate (cf. Fig.1). To accommodate the mismatch of the lattice constant of
the Si substrate and the InGaAs photodetector fitted to InP (about 8 %) we placed a se-
quence of GaAs and InP films as well as an InGaAs/lnP superlattice in between.
Our experiments show that the performance of the MOS circuits do not deteriorate when
they are subjected to the high-temperature steps of the epitaxial growth. The amplification
factor is 27 and 34 db with or without this heat treatment, respectively. The corresponding
figures for the 3-db roll-off frequency are 143 and 98 kHz. The characteristic features of the
photodetector (dark current, illumination sensitivity) do not differ from each other substan-
tially whether the device is produced on a Si substrate or on the native substrate InP.
The crucial test for any integration on a Si substrate is the proof of efficient electrolumines-
cence. We present measurements of light emission at a wavelength of about 1.5 urn of a
large-area surface-emitting LED. The comparison of the same device structure, but made on
an InP substrate, reveals that in the high-current regime the emission is reduced only by a
factor of about 3 on the Si substrate. In the latter case, no emission saturation due to heat
dissipation is observed since the thermal conductivity of Si is much larger than that of InP. In
addition we investigated the emission of a ridge-waveguide type of laser structure. If the di-
mensions of the device will be reduced our results suggest that cw laser action can be ex-
pected. Such a reduction of the lateral dimensions can be achieved by area-selective epi-
taxy. It offers the additional advantage of fewer threading dislocations which penetrate the
epitaxial film at an angle of 60°.
The intention of our experiments is to show that the lll/V technology can be incorporated in
the well-established Si processes, i. e. the former has to be adapted to the requirements of
the latter. Therefore, our devices have relatively large dimensions. If state-of-the-art submi-
cron devices are employed unwanted outdiffusion might occur due to the high temperatures
during the epitaxial growth of the Ill/V-semiconductor layers.
We conclude by a discussion of the diffusion effects which can be expected in an advanced
0.4 urn CMOS process when the thermal load of the epitaxial Ill/V-crystal growth is applied.
The result is that the thermal budget can be kept constant if appropriate annealing steps
during CMOS fabrication are postponed to the epitaxy.

Ill/V area -
Fig. 1: SEM photograph of interdigitated MSM photodetector (enlarged upper right) monolithically
integrated on (100)Si with 3-stage MOS-amplifier (left part).
 Monolithically Integrated Traveling-Wave
Amplifier for Low-Cost Broadband Optical Receiver
A. Orzati, Student Member, IEEE, W. Bächtold, Fellow, IEEE

Abstract — A monolithically integrated traveling-wave output line termination. Cascoded transistors were used for
amplifier (TWA) has been designed and fabricated using the two main reasons. First, this configuration shows
commercial GaAs TQTRx 0.6nm process, showing lOdB gain significantly higher maximum available gain at high
from DC to 12GHz and an open eye-diagram for 10Gb/s NRZ frequencies compared to a single transistor. Second, its
digital transmission. Cascode cells have been used as amplifying highly increased output resistance drastically lowers the
stages. Size reduction has been obtained by substituting the output-line losses, thus increasing the overall frequency
input and output transmission lines with LC networks. This performance of the amplifier.
amplifier is a good candidate as front end in a low-cost
broadband optical receiver.
Index Terms — TWA, broadband amplifier, MMICs, optical
communication system.

I. INTRODUCTION

High-speed receivers for multi-gigabit optical

communication systems have been increasingly needed in the
last years. The front-end amplifier represents a key
component of the receiver. Therefore it is becoming a market
issue to design and fabricate low-cost, broadband amplifiers
for this application. The goal of this work was to indicate that
the traveling-wave amplifier topology is a suitable candidate
for a 10Gb/s front end in low-cost optical communication
systems. For this reason a commercial low-cost high-yield
GaAs process like the TriQuint TQTRx was chosen. At a cost Figure 1: Schematic of the designed TWA.
of 0.8 US$/mm2 for mass production, this process provides
0.6um E-FETs with a f, of around 18GHz and high-Q The drawback of most traveling-wave amplifiers is the large
inductors. chip size, in most cases due to the considerable dimensions of
II. CIRCUIT DESIGN
transmission lines in the circuit layout. For this reason,
lumped elements were used in the synthesis of the input and
The schematic of the designed circuit is shown in Fig.l. It is output line, thus reducing the required chip size. By choosing
a classical traveling-wave amplifier topology ([l]-[4]) the appropriate transistor geometry, the input transmission
consisting of an input and output line both terminated with a line could be realized using only 1.3nH spiral inductors
resistor, and cascode circuits as gain cells. An input voltage is together with the input capacitance of the cascode cell [5].
applied at the input line terminal and travels down to its Due to the high inductance values required, the same
terminated end where it is absorbed by the resistor. As the approach could not be used for the output line, hence
voltage wave propagates, the different amplification stages capacitive elements had to be added. The line terminations do
are excited and the signal is amplified and transmitted to the not exactly match the in and output line impedance (50O).
output line where two voltage waves are generated in This causes reflections, thus deteriorating the return losses,
opposite directions. If the phase velocities of the input and but results in a flatter frequency response.
output line are the same then the voltages traveling in the The layout of the fabricated circuit is shown in Fig. 2. The
forward direction on the output line add in phase. The signal total chip size is 1.36 mm2, corresponding in a mass
components traveling in the opposite direction add not in production cost of around 1US$. The supply voltage is 4V
phase and the remaining components are absorbed by the and the total DC current is 19mA.

A. Orzati, Swiss Federal Institute of Technology, Gloriastrasse 35 CH-8092

Zurich, Switzerland, Email: orzati@ifh.ee.ethz.ch, Phone: 0041 1 6322818,
Fax: 0041 16321198.
; , -'.^ 1.,..'! ■ "■■-»«»»»»^■■■■■IIIPIM—B

The eye-diagram shows a good opening and demonstrates the

suitability of this amplifier as an optical receiver front-end for
a 10Gb/s optical communication system. This result has been
achieved due to the excellent broadband performance of the
traveling-wave topology.

IV. CONCLUSIONS

In this paper a DC-12GHz traveling-wave amplifier has been

■■■■nHttniB designed and fabricated using a low-cost high-yield

commercial GaAs process. The TWA topology was
implemented using lumped elements instead of the traditional
Figure 2: Photograph of the fabricated circuit. transmission lines. S-parameter and eye-diagram
measurements showed that this amplifier is suitable as a
III. RESULTS receiver front end in an optical communication system. To
the author's knowledge this is the first work presenting a DC-
After fabrication, characterization of the circuit was 12GHz traveling-wave amplifier fabricated on a low-cost
performed. S-parameter measurements were carried out using high-yield GaAs MESFET process, using lumped elements
a HP-8510B network analyzer. As it can be seen from the instead of transmission lines.
measurement results in Fig.3, the amplifier shows around
lOdB gain up to 10GHz and has acceptable performances up
to 12GHz. The flat frequency response and the very good ACKNOWLEDGMENTS
return loss measurements at both input and output ports give
this amplifier the possibility to be successfully used in The author would like to thank Hansruedi Benedickter and
cascaded amplification chains. Iwan Schnyder for helping in the characterization of the
amplifier and Thomas Brauner for fruitful discussions.
N ' I
REFERENCES
■

\ [1] T. McKay et al, "A High-Performance 2-18.5-GHz Distributed

J^.
""_-.. z.\
,." - Amplifier-Theory and Experiment", in IEEE Transactions on
\yr^ '■ Microwave Theory and Techniques, Vol. MTT-34, No. 12, December
ü
~ \ = 1986.
• /'"' /"
■,
■\. /
;< \. [2] S. Deibele et al, "Attenuation Compensation in Distributed Amplifier
-2B-
v IN/?"""" Design", in IEEE Transactions on Microwave Theory and Techniques,
Vol. MTT-37, No. 9, Sepetember 1989.
-30-
v : [3] Y. Ayasli et al, "A Monolithic GaAs 1-13-GHz Traveling-Wave
l» 2o
Amplifier", in IEEE Transactions on Microwave Theory and
Techniques, Vol. MTT-30, No. 7, July 1986.
[4] J.B. Beyer et al, "MESFET Distributed Amplifier Design Guidelines", in
IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-
32, No. 3, March 1984.
[5] J. J. Kucera et al, "Highly integrated RF tranceivers", Diss. ETH Nr.
Figure 3: Measured S-parameters of the amplifier. 13361
In order to have a full characterization of the component eye-
diagram measurements for a 10Gb/s NRZ signal were
performed. The measurement result is reported in Fig. 4.

£ye Diakon-,

sei a.tp'i
ii t> K

Figure 4: Eye-diagram for a 10Gb/s NRZ signal.

10
m-V material and device aspects for the monolithic integration of GaAs devices on Si using
GaAs/Si low temperature wafer bonding

A. Georgakilas1*, M. Alexe2, G. Deligeorgis1, D. Cengher', E. Aperathitis', M. Androulidaki1, Z.

Hatzopoulos1 and G. Halkias3
1 Microelectronics Research Group, FORTH, ffiSL and Univ. Crete, Physics Dept, P.O. Box
1527, 711 10, Heraklion-Crete, Greece
2
Max Planck Institute of Microstructure Physics, Weinberg 2, D-06120 Halle, Germany
3
NCSR "Demokritos", List, of Microelectronics, P.O. Box 60228, 15310 Agia Paraskevi, Greece

ABSTRACT

A new process for wafer scale integration of GaAs devices on Si has been investigated. The
process is based on low temperature bonding of epitaxial GaAs to Si wafers, either plain Si
substrates or planarized fully processed CMOS wafers. The method is especially suitable for
monolithic integration of high quality GaAs optoelectronic interconnects (O/Is) on Si CMOS
chips and its development was undertaken within the ESPRIT MEL-ARI OPTO project
BONTEC.
We will describe the basic process flow and will present the most important aspects of
the work concerning the III-V material and devices, which was required to demonstrate the
feasibility of this new GaAs-Si integration process. The low temperature wafer bonding is very
demanding for the design, growth and processing of the III-V epitaxial structures. There are very
strict requirements on the morphological characteristics of the epitaxial GaAs wafer, i.e. a fiat
surface without any protruding defects or layer steps is needed. In Molecular Beam Epitaxy
(MBE) growth, this practically means that a single growth (no regrowth) is required and special
care is needed to eliminate hillock type oval defects and any other epitaxial spikes. The
GaAs/AlGaAs device heterostructures are grown with an inversed epitaxial structure on GaAs,
after the inclusion of an AlAs etch stop layer. Following GaAs-Si wafer bonding, backside
thinning of the GaAs substrate is used in order to leave a thin epitaxial heterostructure on Si,
which is then processed into III-V devices. Thinning is performed using chemical mechanical
polishing (CMP) or wet etching to remove most of the substrate, and RIE dry etching to
selectively remove the remaining GaAs material without affecting the heterostructure that is
protected by the AlAs etch stop layer.
Our III-V work has addressed these issues. Good bonding was achieved by eliminating
the hillock - type oval defects created during MBE growth. The performance capabilities of both
laser diode (LD) and photodiode (PD) devices fabricated from a unique multiple quantum well
(MQW) GaAs/AlGaAs LD structure with 2-32 QWs were determined. Cleaved mirrors LDs (Fig.
1), non-guided wave and guided wave PDs were fabricated and measured, for structure
optimization. A structure with 4 QWs was selected for demonstrating the integrated O/Is on Si. A
BC13 reactive ion etching (RIE) process was developed and lasers with RIE mirrors were
fabricated, exhibiting typical threshold current density values around 1.6 KA/cm2 with best
results being less than 1 KA/cm2. The process was applied successfully on bonded GaAs
structures and integrated LDs and PDs were fabricated on Si (Figs. 2, 3) with similar performance
characteristics to reference devices fabricated on GaAs substrates. Various test devices and
structures, including GaAs MESFET transistors, were also integrated on Si using the same
bonding process and were studied to provide a more general understanding of the process.

Acknowledgments: EU has supported this work through ESPRIT 28998 project "BONTEC".

E-mail: alexandr@physics.uoc.gr

11
 -T— 2 QWs structure
-■— 4 QWs structure
-•— 8 QWs structure
80 --*—16 QWs structure.
70
60
50
40
TO 30
S 20
I
111 10
0
500 1000 1500 2000 2500
2
Current density [A/cm ]

Figure 1.Emitted optical power of 50x400 micron broad area lasers with cleaved mirrors,
fabricatedfrom GaAs/AlGaAs GRINSCH structures with 2, 4, 8 and 16 QWs.

4,5
- Laser's smited power
4,0
E.
- Photodiode's current
0)
3,5-
S
o 3,0
Q.

500 1000 1500 2000

Current density (A/cm2)

Figure 2. Emitted power of a 10x250 micron laser diode with etched mirrors fabricated from a GRINSCH
structure with 4 QWs and response of the photodiode for a laser diode - photodetector system.
All components are realized using the same structure.

Figure 3. SEM view of integrated GaAs optoelectronic devices, fabricated by theBCl3 RIE-based process.

12
 INFLUENCE OF THE INTEGRATION ON THE PERFORMANCE OF
BIDIRECTIONAL MODULES FOR SINGLE FIBER APPLICATION
Heinz-Christoph Neitzert * and Agnese Piccirillo #

* Universitä di Salerno, DIIIE, Fisciano, Italy, # Telecom Italia Lab, Torino, Italy

Optical access network components need to operate in uncontrolled environments. In particular the
sensitivity of their performance to temperature variations is of great interest. A key component for
full duplex operation over a single optical fiber, as foreseen in a passive optical network (PON)[l j,
is the bidirectional (BIDI) optoelectronic module. While there is an ample literature regarding the
temperature dependence of the optoelectronic emitter performance, in particular of 1300nm Fabry-
Perot (F-P) lasers [2,3], the temperature dependence of other BIDI device parameters is less
documented. While most commercially available BIDI modules are micro-optic type devices, there
are strong efforts to develop low-cost integrated devices [4,5,6].
Here we compare 32 BIDI modules with different degree of integration, which can be classified in 6
different categories (see Table 1), depending on the type of optical interconnect technology and
emitter and receiver wavelength allocation. Most devices were micro-optic (Mo) modules, that
means that emitter and receiver contained in different TO-like packages were assembled with
micro-optic components. Additionally we also measured BIDFs were emitting and receiving
functions were assembled on a single silicon optical bench (SiOB) and first commercial BIDI
devices using planar waveguide technology (PLC). Parameter extraction during temperature cycling
tests (between -40°C and +85°C) enabled a rapid evaluation of the temperature behaviour and
stability of the different modules. A complete temperature cycle lasted about 100min (Fig.l) and
only a small hysteresis was found between the values of the parameters extracted during increasing
and decreasing temperature ramps (see Fig.2). The measured coefficients of the wavelength change
vs. temperature for the modules with lasers emitting around 1550nm were all within a small range
between 0.53nm/K and 0.58nm/K, while for the 1300nm emitting devices values between
0.26nm/K and 0.47nm/K have been observed. Comparing these values to the FSAN specifications
[7] (1260-1360nm window and 1480-1580nm window), it can be stated that the maximum
permitted wavelength change within the -40°C to +85°C temperature range can be met by all
modules if the room temperature wavelength has been selected properly.
In Table 1 the optical crosstalk (OCT) and the fiber coupled receiver responsivity (R) at 25°C, the
optical backreflection (OBR) at 1300nm and at 1550nm and the tracking error (TE) of the optical
power for constant monitor diode current for the different types of bidirectional modules are given.
Most striking are the low fiber coupled responsivities of the planar waveguide devices, due to
coupling losses between the waveguides and the optical fiber or receiver diode chip. The tracking
error of most modules was - independent of the type of technology - below the usually specified
ldB margin within the whole temperature range. A comparison of the single wavelength modules
with different technologies shows that the PLC type modules have about lOdB higher optical
crosstalk values compared to the micro-optic devices. In the case of the WDM modules, the mean
values of the micro-optic module crosstalk is about 20dB lower than the optical crosstalk of the
silicon optical bench (SiOB) modules. In Fig. 3 it can be seen that for all types of characterized
modules the crosstalk did not vary significantly with temperature. Comparing the emitting
properties of a large number of Fabry-Perot lasers from different manufacturers (Fig.4) we observed
a strong correlation between the values of the laser threshold currents and the characteristic
temperatures independent of the emitting wavelength (1300nm and 1550nm). This means that there
is a tradeoff between low theshold currents and good high temperature behaviour for these lasers.

13
 | 1600 11 11 > i 11 i "[ r r'T'i i| i i i

SiOB1513

5 1550
"3

■g 1500 §a
«
a «o
a
'■&

_J I 1 I I L
o
0 12 3 4 -50 0 50 100
time (h) temperature (°C)
Fig. 1: Temperature and optical power measured during Fig. 2: Temperature dependence of the emitting
temperature cycling with constant monitor current wavelength and optical power of a SiOB module
of a Silicon optical bench BIDI module
90 i . | i i . , | I'TT 1 ' ' , i ! i I i i 1 i ,
-10 1 i T I IT! f I p'-r-TT-pT-i-TT-p rrrT-|-n

•
00 80 - •
™ -20 ; • o<P -
70 ;
• • o
2« -30
■

S 60 - • o o -
o -o—PLC1313
5 -40 -•- SiOB1513 50 •
73 -T-M01313 • •
£a. -50 -A--M01513 o • 1300nm laser
40 o 1550nm laser
o . A---A- A
A

■ I ' * ' < i ' ' ' ' I ' i ' * ' * ' ' ' 30
, 1 1 1 . 1 ,!,,<,!,, i
-60
-50 0 50 100 0 5 10 15 20 25 30
temperature (°C) threshold current at 25°C (mA)
Fig.3: Temperature dependence of the optical crosstalk Fig. 4: Characteristic temperature of different BIDI
of different types of bidirectional modules F-P lasers as a function of the 25°C threshold current

Module type OCT (dB) TE (dB)- R(AAV) OBR(dB) OBR (dB)

at 25°C 40...+85°C at 25°C at 1300nm at 1550nm

Mol313 -27.5 / -30.6 0.26 / 0.58 0.30 / 0.35 -14.3 / -19.7 -17.2 / -18.6
Mol315 -42.0 / -71.1 0.43 / 1.00 0.52 / 0.79 -10.0 / -12.8 -19.7 / -62.5
Mol513 -48.9 / -57.3 0.28 / 0.99 0.55 / 0.85 -51.1 / -74.7 -6.4 / -17.7

SiOB1315 -27.5 1.06 0.57 -15.5 -56.4

SiOB1513 -24.3 1.34 0.46 -56.4 -19.8

PLC1313 -16.4 / -18.0 0.43 0.10 / 0.13 -39.2

Table 1: Optical crosstalk, tracking error, responsivity and optical back reflection of different types of BIDI modules

References
IM D.W.Faulkner, J.Lightwave Technol. 7,1741, (1989)
111 Y.Sakata, T.Hosoda and Y.Inomoto, Proc. of ECOC'97, 99, (1997)
III M.Yamada, T.Anan, K.Tokutome and S.Sugou, Photon. Technol. Lett. 11,164, (1999)
/4/ R.Matz,J.G.Bauer, P.Clemens, G.Heise, H.F.Mahlein, W.Metzger, H.Michel and G.Schulte-Roth, Photon. Technol. Lett. 6,
1327,(1994)
151 H.Kimura, T.Kurosaki and T.Hashimoto, Proc. of ECOC'98, 481, (1998)
16/ M.Hamacher, H.Heidrich, R.Kaiser, P.Albrecht, W.Ebert, S.Malchow, M.Moehrle, W.Rehbein. H.Schroeter-Janssen and
R.Stenzel, Proc. of ECOC'98, 639, (1998)
111 FSAN Requirement Specifications, Ed. J.A.Quayle, http://www.labs.bt.com/profsoc/access/atlanta.html

14
 SESSION II
Heterojunction Bipolar Transistors
Chair: Prof. Dimitris Pavlidis
Monday May 28, 2001

10.45 am GalnP-GaAs HBT's for High Frequency and High Power Applications
S.L Delaae, D. Floriot, S. Cassette, N. Caillas, E. Chartier, N. Frapsauce,
INVITED M. Surrugue, J.C. Jacquet, S. Piotrowicz, M.A.diForte-Poisson
THALES LCR (formerly Thomson-CSF/LCR) Domaine de Corbeville, F-
91404 Orsay Cedex

11.10 am InSb Heterostructure Bipolar Transistor Operating at Room

Temperature
T. J. Phillips, T. Ashley, T. M. Burke and A. B. Dean
DERA, St Andrews Road, Malvem, WR14 3PS, UK

11.25 am Carbon Doped InP/lnGaAs-HBT: Consistent Small-Signal and RF-Noise

Modelling and Characterization
M. Agethen, S. Schüller, P. Veiling, W. Brockerhoff, F.-J. Tegude
Solid-State-Electonics Dept. Gerhard-Mercator-University Duisburg, ZHO /
LT 207, Lotharstrasse 55, D-47057 Duisburg, Germany

11.40 am influence of the Emitter Orientation on the Current Gain of InP/lnGaAs

DHBTs
/. Schnyder, M. Rohner, and H. Jacket
Electronics Laboratory, Swiss Federal Institute of Technology, CH-8092
Zurich, Switzerland

11.55 am High speed fully self-aligned collector-up MHBTs

S. Demichefa), Ft. Teissie?a), F. Pardo(a), F. Molloth) and J-L Pelouarcfa)
(a) LPN-CNRS, 196 Av. H. Ravera, BP 29, 92222 Bagneux Cedex - France
(b) IEMN, Avenue Poincarre, BP 69, 59652 Villeneuve dAscq - France

12.10 am Highly Efficient GalnP/GaAs HBTs for High Power Applications

J. Würfel P. Kurpasw, R. Doerne^, B. Janke®, P. Heymann(a), A.
Maaßdorf3), W.Doser™, P. Auxemer^, H. Blanch, D. Pons(c), W.
Heinrich^
a) Ferdinand-Braun-lnstitut (FBH), D-12489 Berlin - Germany
b) urns GmbH, D-89081 Ulm - Germany
c) urns Orsay, F-91404 Orsay Cedex - France

12.25 am Design Optimisation of InP/lnGaAs HBTs

A.A. Rezazadeh{a) and H Sheng1^,
(a) Department of Electronics Engineering King's College London, Strand,
London. WC2R 2LS, UK.
(b) Current Address: Nortel Networks. NORTEL Networks, Ottawa, Ontario,
CANADA

15
16
 GalnP-GaAs HBT's for High Frequency and High Power Applications

S.L. Pelage, D. Floriot, S. Cassette, N. Caillas, E. Chartier, N. Frapsauce,

M. Surrugue, J.C. Jacquet, S. Piotrowicz, M.A.diForte-Poisson

THALES LCR (formerly Thomson-CSF/LCR) Domaine de Corbeville,

F-91404OrsayCedex

HBT technology is now considered a mature technology for mobile phone

applications. Those applications below 2GHz require medium power level not
exceeding 2W and low DC bias. HBT technologies for higher frequencies and power
levels need to use higher current densities and DC bias. The impact on thermal
management and reliability is therefore crucial. This paper will address an overview
of the technologies to be developed to achieve reliable high efficiency integrated
amplifiers above 3GHz and up to 20GHz.

17
18
 InSb Heterostructure Bipolar Transistor Operating at Room Temperature
T. J. Phillips*, T. Ashley, T. M. Burke and A. B. Dean
DERA, St Andrews Road, Malvern, WR14 3PS, UK

We have previously demonstrated room temperature operation of InSb FETs using the technique of
carrier exclusion/extraction [1]. In this paper we show that ambient temperature operation of bipolar
devices can also be achieved.

0.1 0.2 0.3 0.4 0.5 0.6 0.7

Vce/V

Introduction
The performance of transistors (both FET and bipolar) made from narrow bandgap semiconductors is
limited by the effect of intrinsic carriers, which cause excess leakage in the off-state, and also
contribute to impact ionisation. We have pioneered the use of carrier exclusion/extraction to reduce
the carrier concentration in the active region of a device by many orders of magnitude. This
technique has now been applied to bipolar devices [2].

-0.1 -0.05 0.05 0.1 0.15 0.2 0.25

Vbe/V

19
Bipolar Device Design
The device design is similar to a conventional bipolar design, with InSb used for all layers except for
the emitter, which is made from Alo.05Ino.95Sb and provides a valence band barrier at the emitter-base
junction. The base is highly p-type doped, but at present does not contain the p++ implant that will
provide the full carrier extraction benefit. However the base can still be reverse-biassed to extract
carriers from (mainly) the low-doped collector region. The emitter size is 6 um x 25 urn, and the
collector size 22 um x 25 urn.

Device Results
The resulting device shows low voltage output characteristics, with drain voltages up to 0.6 V and
base voltages up to 0.25 V (0.05 V steps). The two lowest lines on the output characteristic are with
a negative bias applied to the base, showing how the carrier extraction technique reduces leakage and
suppresses breakdown (in fact at negative base voltages the device shows a breakdown voltage of
over 1.2 V). The device also shows excellent transconductance, as shown in the characteristic above,
limited at higher current by series resistance in the device, which needs optimising. The base-emitter
diode shows a reverse current, even at positive base voltages, due to the removal of the thermally
100

0.01

0.001
-0.15 -0.05 0.05 0.15 0.25

generated carriers from the device, and passes through zero current at V\,e = 0.25 V. Because of this,
the differential current gain is very large (hence the output characteristic above is shown with base
voltage as the parameter). AC measurements on these 6 urn emitter devices are very promising,
showing anfr of over 25 GHz in a device not optimised for high speed performance.

Modelling and Discussion

Modelling shows that addition of a p++ implanted base contact results in a factor of eight reduction in
leakage current (see graph above). It also shifts the base-emitter turn-on voltage down towards zero.
Scaling of the device leads to a predicted/r of over 600 GHz for devices with 1 um emitters.

[1] T. Ashley, A. B. Dean, C.T. Elliott, R. Jefferies, F. Khaleque and T. J. Phillips, 1997, 'High-
Speed, Low-Power InSb Transistors', IEDM Technical Digest, 751.
[2] T. J. Phillips, 2000, 'Narrow Bandgap Bipolar Transistors', UK Patent Application No.
0012925.4.

20
 Carbon Doped InP/InGaAs HBT: Consistent Small-Signal
and RF-Noise Modelling and Characterization
Michael Agethen, Silja Schüller, Peter Velling+, Wolfgang Brockerhoff, Franz-Josef Tegude

Solid-State Electronics Department, Gerhard-Mercator-University Duisburg, Germany

+
now with IPAG - Innovative Processing AG, Duisburg, Germany

Abstract
InP/InGaAs-HBT are most interesting components for high gain, high speed and power applications. In this work a
consistent small-signal and noise parameter model for these devices is presented. Different devices in three mesa
technology are investigated, varying with respect to emitter, base and collector layer thickness and compositional base
grading. Besides bias dependent characterization, temperature depending properties between 15K and 380K are
investigated, too, by measurements as well as modelling. These studies based on a broad yet specific data base allows
for correlating intrinsic device properties, like e.g. noise sources, to relevant device regions, thus supporting the
physical understanding and improvement of design.

1 Introduction temperature TA during measurement. With the help of

In case of HBT rf-noise parameter modelling there are this model the small-signal as well as rf-noise
different approaches to model all high frequency noise behaviour of HBT devices can be described in the
parameters (minimum noise figure Fmin, equivalent frequency range from 45 MHz up to 40 GHz and
noise resistance RB, and optimum generator reflection 2 GHz up to 18 GHz, resp.
coefficient ropt), which describe the rf-noise behaviour
of the investigated device. 3 Investigated Devices and Results
Devices under test are carbon doped InP/InGaAs non
2 Physically Relevant Small-Signal self-aligned HBT with an emitter area y*E = 30um2,
and RF-Noise Parameter Model of grown by LP-MOVPE with non gaseous sources
HBT (TBAs/TBP, DitBuSi/CBr4, TMIn/TEGa) in nitrogen
Fig. 1 shows the physically relevant "T"-like consistent carrier gas. The InGaAs base layer is carbon doped
small-signal and rf-noise model of HBT based on the (p > 1019cm"3) and a high temperature in-situ annealing
typical 3-mesa structure of HBT realised on InP [1]. To sequence is carried out in TMAs/N2 ambient at
all resistances equivalent noise temperatures are T > 600°C to activate the carbon doping in the base.
associated. Adding only four intrinsic equivalent noise Tab. 1 gives an overview of the layer sequences of
temperatures the rf-noise parameter modelling becomes investigated devices.
possible. In addition these temperatures are correlated
to specific device resistances as base-emitter as well as Tab. 1: Layer sequences of the investigated devices
base-collector junction or base and collector sheet Layer width tl nm
resistances. The contribution of the parasitic resistances
is assumed to be thermal noise only, and therefore their M1965 M2000 M2005
equivalent noise temperature is equal to the ambient E-Cap 135 135 135
Emitter 65 65 65
Base 70 140 140
Collector 270 270 200
Sub- 270 270 270
Collector

Bias and temperature dependent rf-measurements are

performed for all devices and will be presented during
presentation. To compare the rf-noise performance of
>■
the HBT, the results of measured and modelled noise
"mm Intrinsic HBT] :
''OUT
parameters at room temperature will be shown for
identical bias condition in active device region
(collector-emitter voltage KCE = 1.2 V and collector
current Ic = 10 mA). Fig. 2 shows the influence of the
Eo- layer widths on the minimum noise figure Fmin. With
rising layer widths, the values of the minimum noise
Fig. 1: The consistent small-signal and rf-noise figure increases. The strongest influence is obvious
equivalent circuit of the HBT. looking on the base width, the minimum noise figure

21
 8
Sample To demonstrate the bias dependent behaviour of the
• M1965 intrinsic noise sources, Fig. 5 shows as an example the
dB ♦ M2000 ■■_j£V4j*
K ▼ M2005
I 6

0 2 4 6
8 10 12 14 GHz 18
frequency f optimum generator reflection coefficient T^
Fig. 2: Minimum noise figure Fmia for various HBT
Fig. 4: Optimum generator reflection coefficient ropt
samples.
for various HBT sample.
increases drastically with wider base layer (M2000 and
M2005). = 4k- 0)
The same strong influence of the base width on rf-noise R,
parameter is obvious for the equivalent noise resistance
Rn, too (fig. 3). If the base width is high, Rn increases. intrinsic base noise current ibb,„ in dependence on base
But with smaller collector width, the lowest values of current shot noise. This noise source shows an linear
Rn are achieved (M2005). dependence on the base current shot noise, but includes
an high offset. The gradient and this offset have to be
2500 investigated in more detail. The other intrinsic noise
sources are identical to base or collector dc current shot
noise.
16

£ _pA ^-J^-^^--^^'
■Jib' _u--'^«r
8 = -^""V^*-:::
:
6 8 10 12 14 GHz 18
""^"""" i
Sample
frequency f • M1965
Fig. 3: Equivalent noise resistance Rn for various * M2000
▼ M2005
HBT samples. ..., 1 .... i .... i .... i ... . .... i ... .
0 12 3 4 5 PA/VHZ 7
The HBT with lowest collector width show the base current shot noise iB s
smallest magnitude of optimum generator reflection Fig.5: Intrinsic base resistance noise source current
coefficient Topt (fig. 4). i'bb,n hi dependence on base current shot noise
Evolutionary optimisation algorithm in combination /B,s for various HBT samples.
with multi-bias approach are used to determine the
small-signal parameter as well as the equivalent noise 5 Conclusion
temperature of the consistent model [2]. The lines in A consistent small-signal and rf-noise parameter model
the above given figures represent the modelled data, for InP based HBT is presented. The advantage of this
which describe all measured entities very well. model is the physical relevance using the "T"-like
model and the correlation of intrinsic noise sources to
4 Intrinsic Noise Sources specific device regions.
As a result of the above mentioned small-signal and rf-
noise parameter model a localization of various noise 6 Literature
sources in the specific device regions is possible. With
[1] J.S. Yuan, "SiGe, GaAs, and InP Heterojunction
the parameter extraction results, the spectral densities
of the four intrinsic noise current sources can be Bipolar Transistors", Wiley-Interscience, John
calculated with formula (1) and investigated in Wiley & Sons, Inc., New York
dependence on bias condition, here in dependence on [2] M. Agethen et al., "Small-Signal Modelling of
shot noise currents due to dc device currents IB and Ic. HBT Using Evolutionary Multi-Bias Optimization
The resistance Rx and equivalent noise temperature Tx Algorithm", Proc. Of 11th III-V Semiconductor
represent the various intrinsic noise sources. Device Simulation Workshop, IEMN, Villeneuve
d'Ascq, France, May 1999

22
 Influence of the Emitter Orientation on the Current Gain
oflnP/InGaAsHBTs
I. Schnyder, M. Rohner, and H. Jäckel
Electronics Laboratory, Swiss Federal Institute of Technology, CH-8092 Zürich, Switzerland

Introduction
One of the major problems of self-aligned InP HBTs is their relatively low current gain ß. In [1] we stated that the current
gain can be improved by choosing a larger distance between the base-emitter junction and the base contacts. In this paper we
explain the physical mechanisms responsible for this effect [2].

Devices - Experimental Results

For our analysis we used both InP/InGaAs DHBT [1] and SHBT [3] devices with the identical epitaxial base-emitter layer
structure. Aligning both device types (DHBTs and SHBTs) along the [010] (diagonal) and the [Oil] (horizontal) direction on
a (100) InP substrate, two different geometries for the emitter mesa were obtained (see Figure 1). For a horizontal SHBT the
emitter undercut Ye was measured ~ 20 run, for a diagonal SHBT it was measured ~400nm. The measured Gummel plots
of these two geometries for a SHBT layer structure show identical collector current densities while the base current densities
differ by more than one order of magnitude at low bias (see Figure 2). The current shift in Figure 2 is due to different effective
base emitter junction areas and different base access resistance caused by the two different emitter geometries. The change in
base current between the diagonal and the horizontal geometries is also observed for DHBT devices.

Diagonal (0) Horizontal (9)

p-MnGaAsBase fjk IbMk {^Ichllh IbMlk i Ic-pcri

n~-InGaAs Collector
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Vbe [V]

Figure 1: Schematical cross-sections of HBTs with horizontally Figure 2: Comparison ot the measured Gummel
(labelled with the subscript 0) and diagonally (labelled with the plots of transistors with the two different emitter
subscript 0) emitters. orientations.

Theory
To explain the correlation between emitter undercut and current gain degradation, two physical mechanisms have to be taken
into account: (a) surface states at the emitter sidewall and (b) surface states at the extrinsic base surface. As shown in [4],
surface states at the emitter sidewall cause a Fermi level pinning close to the neutrality level Em along the emitter sidewall
(see Figure 3). At low bias, this Fermi level pinning causes an electron accumulation, which increases the perimeter emitter
current Ie,peri in Figure 1 along the emitter sidewall. At high bias, the emitter surface becomes depleted. In that case the whole
emitter current flows in the emitter bulk region (Ie,buik> bulk emitter current). Surface states at the extrinsic base surface [5]
form a conducting channel between the base-emitter junction and the base contacts in which the channel base current h,chan
flows in parallel to the bulk base current h,buik-
It is the combination of these two mechanisms in case of low bias which degrades the current gain ß: Electrons which flow
along this emitter sidewall (Ie,Peri) enter the base and become trapped in the conductive base surface channel because of

23
their low kinetic energy, thereby contributing to the channel base current h,chan- Using 2D drift/diffusion and Monte Carlo
simulations, the measured influence of these two mechanisms on the current gain could be reproduced [2]. The channel base
current Ib,chan can be reduced by more than one order of magnitude by enlarging the emitter undercut by aligning the devices
along the diagonal direction [2]. The drawback of an enlarged emitter undercut (ye,e ~ 20 nm vs. Fe>0 ~ 400 nm in our case)
is a small loss of RF-performance (fmax) because of an increase of the base access resistance by ~ 10-20%, depending on the
base layer sheet resistance.

Emitter Contact
Emitter Contact

Ev
i
y
vk
X E
X E
B
B
C
C

Figure 3: Band diagrams in a schematical HBT: along the emitter sidewall, in the emitte^ase bulk and along the base emitter
heterointerface. On the left: low bias case (VBE = 0 V), on the right: high bias case. (Ec: conduction band; Ev: valence band;
Fn: electron Fermi level; Fp: hole Fermi level; EH0: charge neutrality level)

Conclusion
An analysis of current gain degrading mechanisms for InP/InGaAs HBTs was carried out. We found that the combination of
two effects is responsible for the current gain degradation at low bias [2]. The influence of these effects on the current gain
ß can be reduced providing a larger emitter undercut either by aligning the emitter mesa diagonally along the [010] direction
on a (100) wafer or by other processing techniques. The resulting increase of the base access resistance is thereby the main
drawback for our specific devices, which are not optimized yet. Analysis of more samples with different emitter undercuts and
further optimization will be required to obtain the optimal tradeoff between the current gain ß and the base access resistance of
the device, and to examine the reproducibility of the emitter undercut.

References
[1] I. Schnyder, M. Rohner, D. Huber, C. Bergamaschi, and H. Jäckel, "Development of a Novel InP/InGaAs(P) DHBT
Process for Power Applications," Proceedings of WOCSDICE 2000. Aegean See, Greece.
[2] M. Rohner, I. Schnyder, D. Huber, C. Bergamaschi, and H. Jäckel, "Gain Limitations of Scaled InP/InGaAs Heterojunc-
tion Bipolar Transistors," to be published in Journal of Applied Physics, vol. 89, no. 12, June 2001.
[3] D. Huber, R. Bauknecht, C. Bergamaschi, M. Bitter, A. Huber, T. Morf, A. Neiger, M. Rohner, I. Schnyder, V. Schwarz,
and H. Jäckel, "InP/InGaAs Single HBT Technololgy for Photoreceiver OEIC's at 40 Gb/s and beyond," IEEE Journal of
Lightwave Technology, vol. 18, pp. 992-1000, July 2000.
[4] S. Tiwari, D. J. Frank, and S. L. Wright, "Surface Recombination in GaAlAs/GaAs Heterostructure Bipolar Transistors,"
Journal of Applied Physics, vol. 64, no. 10, pp. 5009-5012,1988.
[5] C. H. Henry, R. A. Logan, and F. R. Merritt, "The Effect of Surface Recombination on Current in A^Ga^As Hetero-
junctions," Journal of Applied Physics, vol. 49, no. 6, pp. 3530-3542,1978.

24
High speed fully self-aligned collector-up MHBTs

S. Demichel, R. Teissier, F. Pardo, F. Mollot* and J-L. Pelouard

LPN-CNRS, 196 Av. H. Ravera, BP 29,92222 Bagneux Cedex - France

*IEMN, Avenue Poincarre, BP 69,59652 Villeneuve d'Ascq - France
e-mail: Jean-Luc.Pelouard@L2M.CNRS.fr

InP-based heterojunction bipolar transistors (HBT) have already shown great potential in
high-speed electronics due to their excellent high-frequency characteristics!;1]. However
further advances in HBT design and technology are necessary to improve their performance
and respond to the needs in high-speed circuits such as those for high bite rate optical
telecommunications (160 Gbit/s or faster).

The Metal Heterojunction Bipolar Transistor (MHBT) has already demonstrated a large
potential for ultra high speed behavior[2'3]. The metallic collector (Schottky contact) is used
to reduce both the transit time and the charging time in the base-collector transition layer.
Based on a fully self-aligned collector-up process, the entire transistor (except pad
connections) is patterned with only one photo-lithographic step using selective wet etching
and undercut-based processing.

In this paper we present improvements on the lateral geometry of the device and its
consequences on the dynamic behavior. It is shown that the fully self-aligned process allows
the fabrication of deep submicron devices (e.g. emitter finger widths smaller than 0.4 mm)
without any use of e-beam lithography. As a result, this low-cost process leads to dramatic
reduction of the device parasitics. For example the length of the base access region is shorter
than 0.2 mm and the base-collector capacitance may be as small as 6 fF. Taking into account
these improvements coming from the device processing, MHBTs as fast as fT = finax = 265
GHz have been fabricated and characterized. This dynamical behavior is analyzed, showing
there is still room for even faster behavior.

References:

(1) "Submicron lateral scaling of HBTs and other vertical-transport devices : towards
THz bandwidths", M. Rodwell et al. GaAs IC symp. (2000)
(2) "Fully self-aligned InP/InGaAs Heterojunction Bipolar Transistors grown by
chemical beam epitaxy with a Schottky collector", J-L. Pelouard et al., IPRM Proc,
393 (1993).
(3) "Novel approach for InP-based ultrafast HBTs", N. Matine et al., IPRM Proc, 137
(1996).

25
26
 Highly Efficient GalnP/GaAs HBTs for High Power Applications
J. Würfl, P. Kurpas, R. Doerner, B. Janke, P. Heymann, A. Maaßdorf, W. Doser*,
P. Auxemery**, H. Blanck*, D. Pons**, W. Heinrich

Ferdinand-Braun-Institut (FBH), D-12489 Berlin - Germany

*ums GmbH, D-89081 Ulm - Germany
**ums Orsay, F-91404 Orsay Cedex - France

Introduction etching the total topology of the HBT device reaches

4 um. This very high topology requires optimized proc-
GaAs-based heterojunction bipolar transistors (HBTs)
essing to deal with. We found that after only slight ad-
are increasingly used for power applications in mobile
aptations our thick-resist stepper-lithography is able to
communications. Beside the huge market of cellular
provide the required resolution. A 300 nm thin SiNx
handsets, which requires highly efficient HBTs oper-
layer served for passivation. The 2 pm thick intercon-
ated at low supply voltage, the potential of HBTs is very
nect metal climbs the base mesa on its gentle sloped
promising for applications in base station circuits, too.
side oriented along the (011) plane as shown in Fig. 1.
This application requires highly linear HBT power cells
which can be operated at a collector-emitter voltages HBT single finger devices with an emitter area of
around 25V. We report on GalnP/GaAs HBT power 3x30 urn as well as power cells with a total emitter
cells, which can be operated at bias voltages up to area of 2400 urn2 are fabricated. DC measurements
26V. The dependence of base-collector (BVcb0) and are performed using a commercial wafer mapping
collector-emitter (BVce0) breakdown voltages on the system. The power performance is characterized by S-
collector structure are given. Results of DC characteri- parameter and load-pull measurements at 2 GHz.
zation confirm the high quality of epi-material and
processing. Finally, results of on-wafer power meas-
urements demonstrate good performance.

Experimental
The high voltage HBT structures (HV-HBTs) are grown
on 4-inch GaAs substrates in an Aixtron AIX2400
Planetary™ MOVPE reactor. The layer structures
mainly consist of a 700 nm GaAs subcollector layer
(n=5x1018 cm"3), a 2800 nm thick GaAs collector layer
(doping variation n=4 - 20x1015 cm'3), a 100 nm GaAs
base layer (p=4x1019 cm"3), a 40 nm Gao.51lno.49P
emitter layer (n=5x1017 cm'), and GaAs and InGaAs
contact layers. Si and C are used for the n-type and p-
type doping, respectively. The HBT process technology
is based on a two-mesa approach in order to access
the base and the collector layers. Device isolation is Fig. 1: SEM picture showing the base contact interconnection climbin
provided by He-ion implantation through the subcol- the 3 pm high base mesa.
lector layer. The lateral emitter and base definition is
based on a selective dry-etching process as already Results
described in detail in [1]. WSiN/Ti/Pt/Au, Pt/Ti/Pt/Au Table 1 shows the measured collector-base (BVcb0)
and Ni/Ge/Au/Ni/Au metal systems are used for the and collector-emitter breakdown voltage (BVoeo) of HV-
emitter, base and collector contacts, respectively. In- HBTs with 2.8 [im collector thickness and different
terconnections are made by Ti/Pt/Au metal and emitter doping levels in comparison with our "standard" low-
thermal shunts are formed by a 20 urn thick electro- voltage HBT (collector: 1.0 Mm, 2 x 1016 cm'3). In-
plated Au layer [1]. creasing breakdown voltages with higher collector
For the etching of the very thick collector layer, which thickness and with lower doping level are confirmed.
has three times the thickness as compared with the High breakdown voltages: BVcb0 up to 70 V and BVce0
common low-voltage HBTs, sulfuric acid is used taking above 40 V, respectively, are obtained for the lowest
advantage of its superior selectivity against a 20 nm collector doping level.
thin GalnP etch-stop layer. After the collector wet-

27
 collector layer breakdown voltage S-parameter measurements yield fr values of 24 GHz
thickness doping BVcbo BVceo and fmax values above 50 GHz for 1x3x30 urn2 HV-
(um) (cm"3) (V) (V)
HBTs with a collector doping of 6x1015 cm"3. The onset
1.0 2x10lb 28 13
2.8 2x101B 40 18
of Kirk effect is observed if the collector current density
2.8 8x1015 54 26 exceeds 2x104 A/cm2.
2.8 6x1010 63 33 Fig. 4 shows the results of an on-wafer load pull meas-
2.8 4x101& 69 41
urements performed on HV-HBTs with different emitter
Table 1: Dependence of Collector-base and collector-emitter break-
areas. The collector doping was 6x1015 cm"3. The tran-
down voltage on thickness and doping level of collector sistors utilized thermal drain structures and emitter
Fig. 2 presents typical Gummel plots measured on HV- ballasting; collector biasing has been 26 V. Before on
wafer measurements the wafers have been thinned to
HBTs and on a "standard" HBT. Comparable high cur-
100um and mounted to a heat sink using thermal
rent gain, low recombination currents and good junc-
grease. According to Fig. 3 a nearly linear scaling of
tion idealities are obtained for HV-HBTs. Fig. 3 shows
RF output power with total emitter area has been ob-
the output characteristics of HV-HBTs with the collector
tained. 2400 urn2 devices deliver an output power of
doping of 6x1015 cm'3. At higher current densities
7.5 W at 2 GHz. This corresponds to a power density
{> 2.5x104 A/cm2) these HV-HBTs are destroyed al-
of about 300 kW/cm2. Typical values for the power
ready at 20V. However, at current densities well below
added efficiency are around 55%. For these devices
1x104 A/cm2 device operation at voltages higher than
the optimum load impedance is in the range of 30 Q.
40 V is possible. The strong dependence of the maxi-
This high impedance level is a result of the high volt-
mum operating voltage on current density is obviously
age operation conditions and is more than one order of
caused by insufficient thermal stabilization and lack of
magnitude higher as compared to low-voltage HBTs of
ballasting of this type of devices.
comparable output power. It demonstrates the potential
of these power cells to be efficiently combined to very
105 — high voltage HBT high power microwave amplifiers.
: (collector 2,8|jra 6x101W'): 9x10"2
ß =91/n =1.13/n =1.04
103 9xirr -o- RF-output power PRF
standard HBT -I-Thermal losses P\oss
(collector 1,0Mm, 2x1016cm'a):
I 101 !p =87/n=1.18/n=1.04 ftriO"^
^ 1
s
o
_o Iff1 9x10* Q.

Iff3 9x1(f
1000 2000 3000

10. 9X10"1 Emitter Area (pm2)

0,0 0,5 1,0 1,5
Fig. 4: RF output power P of different power cells versus total emitte
area; collector bias: 26 V
Fig. 2: Comparison of Gummel plots obtained for high voltage HBT and
low voltage "standard" HBT (1x3x30 urn2). Conclusions
Very promising results are obtained on special HBTs
4x10" L (mA)
for high-voltage operation. HV-HBTs utilizing thermal
drain structures combined with emitter ballasting tech-
niques operated at 26 V and delivered 7.5 W of micro-
wave power at a PAE of 55% at 2 GHz.

Acknowledgements
The financial support by the Bundesministerium für
Bildung, Forschung und Wissenschaft (BMBF) under
contract KomModul 01BM050 is gratefully acknowl-
edged.
20 30 40 50
vCE(v) REFERENCES
Fig. 3 Output characteristics of high voltage and "standard" HBTs.
[1] M. Achouche, S. Kraus, T. Spitzbart, M. Rudolph, P. Kurpas,
Destruction of devices is visible after critical lc and Vce is reached.
D. Rentner, F. Brunner, E. Richter, T. Bergunde, P. Heymann,
P.Wolter, H. Wittrich, M. Weyers, J. Wurfl, G. Tränkle Inst.
Phys. Conf. Ser. 166 (1999) 297.

28
 Design Optimisation of InP/InGaAs HBTs
A.A. Rezazadeh and H Sheng*,
Department of Electronics Engineering
King's College London, Strand, London. WC2R 2LS, UK,
Tel/Fax: +44 (0)20 7848 2879/ Email: ali.rezazadeh@kcl.ac.uk
*NortelNetworks. NORTEL Networks, Ottawa, Ontario, CANADA

Heterojunction Bipolar Transistors (HBTs) based on the InP/InGaAs material system have attracted much
attention in recent years. The intrinsic advantages of this system, namely high mobility, small conduction to
valence band offset ratio and small band gap of InGaAs among many others, have destined its suitability for
a variety of high frequency, low power optoelectronic and telecommunication applications.

In this paper, the design optimisation of InP/InGaAs HBTs for high DC and RF performance is investigated
by employing a physics-based analytical model[l]. This model follows the current balancing concept [2, 3],
combining both the thermionic-field-emission (TFE) current across the heterointerface at base/emitter (b/e)
junction and the diffusion current in the quasi-neutral bulk regions. Appropriate Fermi-Dirac statistics
correction is made to the TFE formulation and utilized for all heavy doping layers. Bandgap narrowing
(BGN) of heavily doped layers and its effect on the band discontinuity at the b/e heterointerface are also
included. Doping dependence of parameters, such as mobility and lifetime, for Ino.53Gao.47As and InP are
described by the least square fits to the reported data in the literature. Recombination current in the b/e
space charge region, including Shockley-Read-Hall (SRH), radiative and Auger mechanisms are modelled.
In addition, at high current levels where the potential drop across the ohmic contacts and the bulk
semiconductor region is significant, the actual junction potential is modified by taking into account of the
emitter, collector and base resistances due to the ohmic contacts and also the resistivity in the current path.
Good agreement is found between the simulation and measurements for the InGaAs/InP HBTs studied.

InP/InGaAs HBTs often incorporate an undoped spacer layer between the base and emitter for the purpose
of preventing base dopant out-diffusion and/or lowering the conduction band spike of the b/e heterojunction.
Although the insertion of this undoped spacer layer improves the injection efficiency of the device, hence
the collector current, the dependency of the base side depletion layer width with the spacer alters the
contribution of the SCR from the base side. Figure 1 and 2 show the simulated Gummel plots for typical
InGaAs/InP HBTs with low (LB) and high base (HB) doping levels, respectively, for various spacer layer
thicknesses. Also shown in Fig. 1 are the measured data for two devices fabricated at King's College
London with 20 and 200Ä spacer, which agree well with the results predicted by the simulations. It can be
seen that for both LB and HB structures, collector current increases with the spacer. This increase is much
faster and larger in quantity in the HB than that in the LB structure. For the HB, by insertion of a 60Ä
spacer layer, the collector current is improved by almost a factor of 300. However, this collector current
improvement is accompanied by the base current increase due to the recombination current from the base
side. Figure 3 and 4 give the simulated collector current dependence of the DC current gain for the
corresponding spacer thicknesses. As it can be seen that, the current gain decreases with the spacer in both
cases. For the LB, gain decreases with the initial increase of spacer, but negligible change is seen after 60Ä.
However, for the HB, the gain reduces only slightly for spacer below 60Ä, but decreases significantly and
consistently after 60Ä to 200Ä. It should be noted that this current variation is most apparent at low
collector current where recombination is important. These suggest that the spacer has a significant influence
on the DC current gain of the InP/InGaAs devices, both in terms of magnitude and its dependency on
collector current. Furthermore, depending on the base doping level, the sensitivity of current gain change
with respect to spacer layer also differs. For InGaAs/InP HBT structures studied here, due to the
recombination current contribution from the InGaAs base, no improvement in gain is made by insertion of
the spacer layer. Nevertheless, for HB, since the thin spacer (<60Ä) does not reduce the gain much, it can
be used to reduce the device turn-on voltage. Details of these results with further theoretical and

29
experimental DC data will be discussed in the full paper. The basic device structure for simulation is as
follows: Emitter: 5xl017cm"3/1000Ä,Base: lxl018cm"3or Ixl019cm3/1000A, Collector: 2.5x1016cm"3/4000Ä.
l.OE+0 1.0E+0
1.0E-1 1.0E-1
1.0E-2 1 1.0E-2
1.0E-3 1.0E-3
a
1.0E-4 1.0E-4
1.0E-5 n ff/ Jf^^" 1.0E-5
l.OE-6 -i 1.0E-6
r \
1.0E-7 1 Spacer Layer (Ä) 1.0E-7
1.0E-8 1.0E-8
1.0E-9 20
1.0E-9
— — 200
l.OE-10 1.0E-10 -i
—#— 20 [Measured]
1.0E-11 1 —♦— 200 [Measured] 1.0E-11
1
1.0E-12 1.0E-12
1 1 1 ' 1
0.00 0.40 0.80 1.20 0.00 0.40 0.80 1.20
Base-Emitter Voltages (V) Base-Emitter Voltages (V)
Figure 1: Simulated and Measured Gummel Plot of Figure 2: Simulated Gummel Plot of a typical
a typical InP/InGaAs HBT with InP/InGaAs HBT with NAB=lxl019cm"3 and
3
NAB=lxl(rcm- and WB=1000Ä WB=1000Ä
l.OE+4 -J 1.0E+3

l.OE+2 -^

IÜ 1.0E+1 -
/
U
/ Spacer Layer (A)
0
/ - — 60
1.0E+0 •
- - ■ 80
/ - • • 100

- 200
1.0E+0 | i mill) iiiiiin IIIIIIII| IIIIIIII| lining mini) 1 null] 1111111) 1.0E-1 immij i 11iniij i mini] iiiiiiii| iniiiii] iiiiiiiij iiiniiij iniiiii
1.0E-9 1.0E-8 1.0E-7 !.0E-6 1.0E-5 1.0E-4 1.0E-3 1.0E-2 1.0E-1 1.0E+0 1.0E-9 1.0E-8 1.0E-7 l.OE-6 1.0E-5 1.0E-4 1.0E-3 1.0E-2 1.0E-1
Collector Current (A) Collector Current (A)

Figure 3: Simulated DC current gain of a typical Figure 4: Simulated DC current gain of a typical
InP/InGaAs HBT with NAB=lxl018crn3 and InP/InGaAs HBT with NAB=lxl019cm"3 and
WB=1000Ä WB=1000Ä

Acknowledgement: This project is supported by the UK Engineering and Physical Sciences

Research Council.
References:

[1] H. Sheng, A.A. Rezazadeh and D. Wake, 5th International IEEE Conference on Electron Devices for
Microwave and Optoelectronic Applications, EDMO'97, p.199, 1997
[2] A.A. Grinberg, M.S. Shur, R.J. Fischer and H. Morkoc, IEEE Trans. Electron Devices, Vol. 31, p.
1758, 1984
[3] S. Searles and D.L. Pulfrey, IEEE Trans. Electron Devices, Vol. 41, p. 476, 1994

30
 SESSION III
GaN: material growth and device processing
Chair: Prof. Vernon David Morgan
Monday May 28, 2001
2.30 pm AIGaN/GaN HEMT's: epitaxial growth issues on various substrates,
devices fabrication, and insertion of GaN component into circuits.
INVITED Joseph Smart
V.P. of advanced Technology.RF Nitro Communications

2.55 pm Organometallic Vapor Phase Epitaxy Growth and Optimization of

AIN/GaN MIS-type Heterostructures
S.M. Hubbard, D. Pavlidis, V. Valiaev, A. Eisenbach
Department of Electrical Engineering and Computer Science, The University
of Michigan, Ann Arbor, Ml 48109-2122, USAD.

3.10 pm InGaN - a material for electronic devices?!

M. Seyboth®. C. Kirchner1^, M. Kampm, I. Daumille^, M. NeuburgeP'\ E.
Kohn(c>
(a)Dept. of Optoelectronics, University of Ulm, D-89081 Ulm, Germany
(b) now with Global Light Industries, 47475 Kamp-Lintfort, Germany
(c)Dept. of Electron Devices and Circuits, University of Ulm, D-89081
Ulm.Germany

3.25 pm Power and Frequency Limits of AIGaN/GaN HEMT's

L F. Eastman,
Electrical and Computer Engineering Cornell University, Ithaca, NY 14853-
5401

3.40 pm Quantum 1/f Noise in GaN/AIGaN HFETs and Phase Noise in RTDs
P. H. Handel
Department of Physics and Astronomy, Univ. of Missouri-St. Louis,St. Louis
MO 63121

3.55 pm Fabrication of 0.5-nm-AIGaN/GaN HEMTs based on a 2-inch-Stepper-

Process
J. Hilsenbec^. R. Loss/a\ J. Würffa) and H. Oblohih)
(a) Ferdinand-Braun-Institut für Höchstfrequenztechnik, Albert-Einstein-Straße
11,12489 Berlin, Germany
(b) Fraunhofer-Institut für Angewandte Festkörperphysik, Tulla-Straße 72,
79108 Freiburg, Germany

31
32
 AlGaN/GaN High Power Transistor Materials and Devices
Joseph A. Smart, Jeffrey B. Shealy, Lester F. Eastman, and J.R. Shealy

RFNitro Communications Inc., Charlotte North Carolina 28269, USA

Over the past several years, rapid advances have been demonstrated in epitaxial
growth and device processing of GaN-based transistors. As the technology matures,
substrate selection, device fabrication techniques, and reliability become important
factors in the commercialization of GaN. Undoped AlGaN/GaN transistor structures have
been grown on sapphire, SiC, and silicon substrates. Discrete GaN-based devices have
been fabricated from all three of these substrates and compared. The best microwave
performance is observed on device on SiC substrates, followed by sapphire, then silicon.

Introduction

The synthesis of GaN and related alloys is accomplished by flow modulation

techniques in a custom-built, cold wall OMVPE reactor. A unique high temperature
nucleation process using thin AlGaN films is used to produce atomically flat growth on
sapphire, SiC, and silicon substrates. This process simplifies the growth by eliminating
large temperature ramps, while producing high resistivity (>1 xlO8 Q-cm) GaN films. An
additional A1N barrier layer is inserted just after planarization of the film on SiC and
silicon substrated structures to reduce affects from the substrates. Undoped AlGaN/GaN
heterostructures were grown on c-plane sapphire, 4H semi-insulating SiC, and 10 Q-cm
(lll)p-type silicon.

Devices were fabricated using standard photolithography and e-beam techniques.

Ohmic contacts were formed using a Ti/Al/Ti/Au metallization. Ni/Au was used for the
Schottky gates. In all cases silicon nitride was used for surface passivation of the ungated
regions. Devices were dc and RF tested and compared. In addition, channel temperatures
were measured on large periphery devices fabricated on sapphire and SiC substrates.

Results and Discussions

Nucleation conditions varied substantially between the three different substrates.

After optimization of the Al content in the AlGaN nucleation layer, atomically flat device
quality GaN films were achieved on each substrate type. The resulting 2DEG at the
AlGaN/GaN heterostructure exhibited room temperature mobilities of 1700 cm2/V's,
1505 cm2/V's, and 900 cm2/Vs on sapphire, SiC, and silicon respectively, all with a
nominal 1 x 1013 cm'2 electron sheet density. The mobility on SiC is limited by defects
that originate in the substrate and propagate through the entire epitaxial layer. Although
the heterostructure on silicon substrates is atomically flat as determined by TEM studies
(Figure 1), the relatively low mobility on silicon is attributed to scattering from regions
were the crystal is tilted by 0.25 ° relative to the <0001> direction. This tilt originates

33
 nÄKJaWl 2nm!

^ffijtrj^nh'jvHj ü'r q in

AlGaN/GaN
^riterfiace

Figure 1. High resolution TEM of AlGaN/GaN heterostructure on a silicon substrate.

Arrows indicate the heterostructure showing an atomically abrupt interface

from defective regions in the nucleation layer unique to growth on silicon. Other
complications with GaN epitaxial growth on silicon include surface conversion from p-
type or semi-insulating to n-type when heated in hydrogen, and auto-doping of the GaN
buffer layer near the substrate/epitaxy interface.

A small-signal comparison of transistors fabricated from the different substrates is

shown in Figure 2. The small-signal unity current gain Ot) was measured at the peak
extrinsic transconductance of 300, 215, and 150 mS/mm for SiC, sapphire, and silicon
substrated devices. The lower than expected values for devices on silicon is a direct result
of the conductive substrate charge being coupled under small-signal conditions.
; ' ' • i 1 I i I I r

0.15 urn ,..-:

1 1

80 - 4H-SiC .„.--*'"" 1
'S* 60 0.30 um ^..-- Sapphire :
T 1 .--•" .»-"'
CJ,
40 ': 0.75 |im
Or : i -•;;;:;' ;,.«r'J^ — (ni)Si ;
20
1 U-cmp-type '.
n 1 li L 1 , . i , , , i '. , . -

0 2 4 6 8
Inverse Gate length (urn-1)

Figure 2. Measured extrinsic^ versus inverse gate length for AlGaN/GaN HEMTs

Removing the silicon substrate under the active regions improves the frequency
response of the transistors, indicating that ac coupling to the substrate is the limiting
factor for these transistors. However, by releasing the GaN epitaxy from the silicon
substrate effectively removes the heat-sinking path for heat dissipated by the device.
Novel heat sinking techniques will have to be developed before GaN on silicon becomes
a commercially viable technology.

Conclusions

Device quality GaN films have successfully been grown on sapphire, SiC, and
silicon substrates. High room temperature electron mobilities at high sheet densities have
been achieved on heterostructures grown on each substrate type, translating into low
channel resistivity adequate for transistor applications. Devices fabricated on silicon
substrates exhibit lower than expected frequency response, and complicate the growth
process.

34
 Organometallic Vapor Phase Epitaxy Growth and
Optimization of AIN/GaN MIS-type Heterostructures
S.M. Hubbard, D. Pavlidis, V. Valiaev, A. Eisenbach

Department of Electrical Engineering and Computer Science,

The university of Michigan, Ann Arbor, MI 48109-2122, USA
Tel: (734) 647-1778, Fax: (734) 763-9324, E-mail: pavUdis@umich.edu

Ill-Nitride based MODFET devices have shown great promise for high-frequency/high-power
applications. For the most part, these devices are based on AlGaN/GaN type heterostructures.
The binary compound A1N is also expected to be a good insulating material with high dielectric
constant. There exists the possibility of using an AIN/GaN system to create metal-insulator-
semiconductor field effect transistors (MISFETs) [1]. Use of an A1N insulator has the advantage
of maintaining high electron mobility in the channel and at the same time improving
transconductance without degradation of gate leakage [2]. Unfortunately, there exists a large
lattice mismatch between A1N and GaN. From the growth standpoint, we are challenged to grow
both high quality A1N and GaN epilayers, which also exhibit good electronic properties.

Low-pressure Organometallic Vapor Phase Epitaxity (OMVPE) was used to grow AIN/GaN
MIS-type heterostructures. Grazing Incidence X-Ray Reflectivity (GDCRR) was used to calibrate
the A1N growth. In addition, X-Ray Diffraction and Atomic Force Microscopy were used to
verify GaN and A1N material quality and surface morphology. Experiments were conducted by
varying both the A1N thickness (from 30 A to 350 A) and the A1N V/III ratio (from 1.25 slm NH3
to5slmNH3).

For the highest V/III ratio, AFM scans show the A1N is growing in a 3-D island growth mode
often seen for Ill-nitride materials with high Al composition. Surfaces of these samples exhibit
defects 100-200 nm in size propagating out from dislocations in the underlying GaN channel
layer. As seen in Figure 1, these defects decrease in size and density for very thin A1N layers,
indicating the presence of an initial A1N wetting layer before the formation of defects [3].
nn*wamw
Flatten

ESEpEfS

IP
■JwBM if
KSÜ4
Digital Instrubtents HanoSoope
Soan size
Soar» rate
HuMker or samples
[Nave Data
2.000 UM
1.001 Hz
512
Hetjfht
■I Digital Instruments NanoScope
Scan size
Scan rate
NuMber of samples
1.537 UM
1.001 Hz
512

BlSIHSfilSK Data scale 15.00 nx lnasre Data

Data scale
Height
15.00 rm

B
811.001
QQ9H

Figure 1. (A) AFM scan of 8 nm thick AIN layer showing typical defect formation (B) AFM
scan ofSnm thick AIN showing reduction of defects for thin AIN layers.

35
Van der Pauw Hall-effect measurements were performed on the high V/III ratio samples at
temperatures ranging from 20K to 300K. As the A1N thickness was increased, 2DEG sheet
carrier concentration increased and Hall mobility decreased. The decrease in electron mobility
with increasing A1N thickness is related to a higher percent of the sheet carrier concentration
being located very near the interface for thicker A1N [4]. Interface scattering is thus increased
and mobility degraded. The optimal A1N thickness was found to be approximately 50 Ä. The
measured room temperature and 20K mobilities for this sample were 980 cm2/Vs (^=8.14 x 1012
cm"2) and 3230 cm /Vs (ns=7.76 x 1012 cm"2), respectively. To our knowledge, this is the best
reported mobility for OMVPE grown AIN/GaN MIS structures.

In addition, the effect of V/III ratio on A1N surface morphology was studied. The V/III ratio was
varied by changing the ammonia flow during A1N growth. GIXRR was again used to calibrate
the A1N thickness as a function of V/III ratio. Three 11 nm thick A1N samples of varying
ammonia flow (1.25 slm, 2.5 slm, and 5 slm) were studied using AFM and Hall effect
measurements. Defect formation was drastically reduced in the case of 1.25 slm and 2.5 slm
ammonia flow (see Figure 2b). In Figure 2a we see the effect of the V/III ratio on the electronic
properties of the structures. The optimal ammonia flow in terms of mobility and sheet carrier
concentration was found to be 2.5 slm (|u = 891 cm2/Vs, ns = 2.15el3 cm"2). Further work to
optimize the AIN thickness at this V/TII ratio is in progress.

11 nm AIN MS vs. Ammonia flow

%
y
^*vS;
\\

^
\
\x
^
W
I:
^
s. ]
ko.25 Bl«**»l InstruirantE HanoSoopo
Sow size 1,000 im
j Soan rate 1,001 Hz
I Nuttbor or saHpt« 612
0.50 i II»BB Data
Data coal«
Htijht
7.000 n»

0 ■ 0.00
2 3
Ammonia flow (slm)
4
B
Figure 2. (A) Hall properties ofllnm AIN MIS structures vs. V/III ratio (B) AFM scan of 11
nm AIN structure grown with 1.25 slm ammonia flow.

Acknowledgments

Work supported by ONR (contract no. N00014-92-J-1552 and N00014-00-1-0879)

References

1 F. Nakamura et al., "AIN and AlGaN growth using low-pressure metalorganic chemical vapor
deposition",/. Crystal Growth, 195, 1998, p. 280-285.
2 H. Kawai et al., "An AIN/GaN insulated gate heterostructure field effect transistor with regrown n+
GaN source and drain contacts", J. Crystal Growth, 189/190,1998, p. 738-741.
3 S. Keller et al., "Metalorganic chemical vapor deposition of high mobility AlGaN/GaN
heterostructures:, J. Appl. Phys., 86 (10), 1999, p. 5850-5857.
4 Y. Zhang et al., "Charge control and mobility in AlGaN/GaN transistors: Experimental and theoretical
studies", J. Appl. Phys., 87 (11), 2000, p. 7981-7987.

36
InGaN - a material for electronic devices?!
M. Seyboth0, C. Kirchner0, M. Kamp0+, I. Daumiller*, M. Neuburger*, E. Kohn*
° Dept. of Optoelectronics, University of Ulm, D-89081 Ulm, Germany
+
now with Global Light Industries, 47475 Kamp-Lintfort, Germany
* Dept. of Electron Devices and Circuits, University of Ulm, D-89081 Ulm, Germany
Financial support by the Deutsche Forschungsgemeinschaft (DFG) is gratefully acknowledged

Introduction
AlGaN/GaN heterostructure field effect transistors have demonstrated highest microwave power densities
and high efficiencies due to the materials high breakdown field, high channel sheet charge density and 2DEG
properties [1]. Ill-nitrides are highly polar materials generating image charges of the bonded polarization charges
in die lattice on the surfaces. These image charges are dipole charges positioned at opposite planes, namely for
AlGaN/GaN FET structures at the substrate/GaN backplane, the AlGaN/GaN interface and at the surface of the
AlGaN layer. The surface however is a most sensitive portion of any planar device and such surface image
charges could be identified as a source of the large signal RF current compression in a number of GaN-based
HFETs [2].
In case of an InGaN channel sandwiched in between two GaN layers, both parts of the image charge dipole are
located within the quantum well. For Ga-face material at the GaN surface the spontaneous polarization image
charge is positive as in the AlGaN/GaN case. At 10% In-content the difference between the spontaneous
polarization of the GaN and InGaN lattice contributes to only 10% to the interface charges. 90% is generated by
the piezo polarization due to the strain in the InGaN layer. However, since both dipole charges reside in the
quantum well, the FET channel is ambipolar. Biasing the structure like in the case of an n-type FET, the source
region may become n-type under certain conditions and the drain p-type, thus developing a pn-junction in
between. To obtain an n-type channel alone, the hole concentration needs to be compensated by a shallow donor.
The compensation can be accommodated by channel doping of the lower part of the InGaN well or through
modulation doping from a doping spike in the bottom GaN barrier layer. Therefore in GaN/InGaN/GaN HFETs
the image polarization channel charge is not mirrored at the surface. During modulation of the channel by the
gate, the channel charge dipole is in essence that of the 2DEG and the donor, responding to the signal with the
time constant of the dielectric relaxation. It is therefore expected that these devices show an essentially reduced
large signal RF current compression phenomena.

250-

200

^ 150

i 100

50

—I— —I—
50 100 150 200 250
InGaN thickness [nm]

Figure 1 Electron mobility of GaN/InGaN/GaN heterostractures with various In content and InGaN layer
thickness.

Growth and Properties of InGaN

Growth of the device structures was performed in an Aixtron AIX 200 RF horizontal reactor system. On
sapphire substrate a nucleation layer was deposited, followed by a 3 urn thick GaN buffer, grown at 1050°C.

37
The device structure consists of a 20 nm InGaN channel, grown at 800 CC, using TMGa and TMIn as
metalorganic sources and is capped by a 20 nm GaN layer. Carrier gas for InGaN growth is nitrogen. N-doping
with silan as source is either realized in the GaN below or in the first 10 nm of the channel. For device
performance, a doping profile with steep ramps and a well defined total charge is necessary.
As InGaN is mostly employed as active layer in optoelectronics devices, optimization of InGaN layers is
usually done in terms of photoluminescence and electroluminescence efficiency. Typical QW structures consist
of 2 - 3 nm thick InGaN wells in between GaN layers, often it is strived for quantum dot formation to increase
the recombination efficiency. Requirements for horizontal electronic devices are quite different: a 20 nm thick
InGaN layer serves as channel, therefore the indium content had to be reduced approximately 10 % to obtain
reasonable horizontal mobilities.
Fig. 4 shows a comparison of mobilities for 20 nm channel thickness in comparison to Reed et al. [3]. This study
on critical layer thickness determination yielded a maximum mobility of u=240 cm2/Vs for a indium content of
10 %. The overall agreement with our data (u=250 cnrVVs for 10 % In) indicates a typical range for mobilities
for InGaN quantum wells optimized for optical properties. Thus, further InGaN-growth studies oriented versus
improved horizontal electrical properties may lead to a considerably enhanced device performance.

Device Characteristics
Fig 2. shows the device characteristics of a channel doped FET device with an In-content of 7% in the InGaN
well (as measured by photoluminescence on the control sample). For hole dipole charge compensation the rear
10 nm of the channel were doped by Si to nominally 2xl018 cm"3. The device can be pinched off with a gate bias
of Vg=-2.0 V and no parallel path is observed related to over-compensation.

Y623 GaN/lnGaN C6
300
Lg=0.5(jm
250 w=200(jm ^ 1.5V
E
IE
200

150 4^~
100 V
Jr
50
' r
£- -?f)V
0
4 6 10 12
VDS (V)

Figure 2. Output characteristics of a GaN/InGaN/GaN FET with channel doping for hole compensation with an
estimated 7% In-content.

In agreement with the Schottky diode characteristics for high voltage characteristics a maximum drain bias
above 100 V could be applied. Placing an optimum load line across this characteristic a maximum RF-power
capability of 2.5 W/mm could be inferred from this experimental structure
Since the prime motivation for this work was the reduction in large signal RF current compression, the large
signal characteristics were tested as described in [5]. Using a 50 Q load, the input of the device was adjusted to
obtain the maximum output current swing. The measurement is performed using three different setups and
multiple calibrations
The maximum frequency was determined by role off in gain, which could not be compensated by the input
signal above 6 GHz (fT = 9 GHz). Within the measurement precision no current compression in class A
operation was observed.

Literature

[1] W. Y. Feng, D. Kapolnek, J. P. Ibbetson, P. Parikh, B. P. Keller, and U. K. Mishra,

"Very-high power density AlGaN/GaN HEMTs," IEEE Transactions on Electron Devices, vol. 48 no. 3,
pp. 586-590,2001
[2] I. Daumiller, D. Theron, C. Gaquiere, A. Vescan, R. Dietrich, A. Wieszt, H. Leier, R. Vetury, U. K. Mishra,
I. P. Smorchkova, S. Keller, N. X. Nguyen, C. Nguyen, and E. Kohn, "Current Instabilities in GaN-based
Devices", IEEE Electron Device Letters, vol. 22, no. 2, 2001
[3] M.J. Reed, N.A. El-Masry, C.A. Parker, J.C. Roberts, S.M. Bedair, "Critical layer thickness determination
of GaN/InGaN/GaN double heterostructures," Appl. Phys. Lett., vol. 77, no. 25, 2000

38
 Power and Frequency Limits of AlGaN/GaN HEMT's

By

Lester F. Eastman, Electrical and Computer Engineering

Cornell University, Ithaca, NY 14853-5401

GaN has a large band gap (3.4 V), which allows electrical field strength up to 3 x
106V/cm before avalanche breakdown. This allows up to 7.5 times as high a drain-source voltage
as for GaAs-based microwave field effect transistors. The current can also be raised by the same
ratio, to maintain the same optimized load impedance, yielding up to 56 times as much power
into this same load impedance. In order to reach the higher current value, the periphery of the
GaN HEMT is made larger. The frequency response is presently nearly similar to that of GaAs
HEMT's, due to a similar value of the electron transit velocity. Using semi-insulating SiC
substrates, which have about 7.5 times the thermal conductivity of GaAs, the normalized heat
power dissipated can be at least 7.5 times that of GaAs.
Typically a 200-300 Ä Al.3Ga.7N barrier is grown on the Ga-face of ~ 1 \xm thick semi-
insulating epitaxial GaN buffer layer, which in turn is on AlGaN nucleation and sub-buffer layer
on the SiC substrate. Either 1040°C OMVPE, or 800°C gas-source MBE can be used. The
structure is entirely undoped, relying on the difference in electrical polarization at the top
heterojunction to induce the ~ 1 x 1013/cm2 2DEG. A shallow ECR Cl2 etch is used to isolate the
HEMT mesas, and Ti/Al/Ti/Au, annealed at 800° C for 30-40 sec, forms the ohmic contact. The
Ni/Au Schottky gate is formed with a mushroom-shaped cross section, using an exposed multi-
layered electron beam resist. A Si3N4 passivation layer is deposited and air bridges are added for
inter connections. The drain-source breakdown voltage and the reciprocal of the cut off frequency
both vary linearly with the effective gate length, made up of the gate footprint plus twice the
barrier thickness. For .20 jam effective gate length, these values are 35 V and 74 GHz,
respectively.
In addition to the breakdown voltage limit, there is a limit imposed by self- heating,
lowering the expected efficiency and power. The reciprocal of the low field mobility
experimentally rises as (T/300)18, raising the knee voltage due to the self-heating. Thermal
simulations show that the normalized temperature rise of the channels, placed 50 urn apart, is ~

39
12°/W for large periphery HEMT's, but is only 6.5 °/W for a two-channel .25 mm periphery
HEMT. The temperature rises super-linearly due to the SiC reduced thermal conductivity at
elevated temperature. At 10 W/mm heat dissipation, the small periphery HEMT knee voltage
more than doubles, lowering the drain efficiency. In class B operation at 10 GHz, with two .3 urn
gates, separated by 50 urn, the .25 mm periphery HEMT has 65% power-added efficiency when
biased at 13-15 V, but this becomes 42% power-added efficiency when biased at 45-48 V.
Automatic tuning is used on both the input and the output of the HEMT, and 7.6 W/mm is the
output normalized power at the higher drain bias, leaving 10 W/mm heat dissipation.
The frequency response is only moderately affected by the rise in channel temperature.
Monte Carlo calculations have shown that the peak electron velocity reduces only 5% for 100°
temperature rise. At room temperature the average transit velocity is < 1.3 x 10 cm/s. Monte
Carlo calculations for electron transport in bulk GaN show peak electron velocity of ~ 2.85 x 10
cm/s at room temperature, a value close to the experimental value determined from femto-second
optical pulse-probe measurements. In the HEMT technologies based on GaAs and InP substrates,
the average transit velocity derived from cut off frequency, has been 80-85% of the peak velocity
value. With improved design, and technology of materials and processing, the average transit
velocity of electrons in GaN HEMT's should reach 2.0 - 2.4 107 cm/s, approaching the value
gotten in InP HEMT's.
In conclusion, AlGaN/GN HEMT's will dominate in microwave and mm wave high
power amplifiers in the future, opening up a new technology for Radar and communication
transmitters.

Research supported by ONR contract N00014-96-1-1223, monitored by Dr. John Zolper,

and Raytheon, Triquint, Teledyne, Northrop Grumman, R.F. Nitro, BAE (Sanders), GE, and
Welch Allyn. Contributions by Prof. J. Richard Shealy, Dr. W.J. Schaff, J. Smart, V. Tilak, B.
Green, T. Prunty, J. Hwang, H.T. Kim. and several other present and former graduate students are
gratefully acknowledged.

40
 Quantum 1/f Noise in GaN/AlGaN HFETs and Phase Noise in RTDs
Peter H. Handel
Department of Physics and Astronomy, Univ. of Missouri-St. Louis, St. Louis MO 63121

Abstract - The present paper applies the quantum theory of 1/f noise to predict the 1/f fluctuations
in GaN/Al0 15Ga0 85N doped-channel HFETs. It compares the experimentally measured values of the
effective 1/f noise parameter with the theoretical value, as a function of the device parameters, of drain
voltage, drain current and gate voltage. There is remarkable agreement between theory and experiment, as
demonstrated by the dependence of the noise on gate voltage. The quantum 1/f theory is also used to
calculate from first principles the 1/f noise present in the device parameters and in the resulting system
frequency from resonant tunneling diodes (RTDs). In general, quantum 1/f fluctuations in the dissipative
elements lead to a Q"4 dependence of the spectral density of phase noise, where Q is the quality factor.

I. HFETs. To find the noise, the number of charge carriers is first taken as the net induced charge,
divided by the charge of the electron. The element of resistance dR along the current can be written

dR = dy/quN' = Zp.nC[VGs^VT-V(y)] > W

where ^ is the electron mobility, N' the number of carriers per unit length of the channel, C the gate capacity
per unit area, VGS =VG-VS the gate to source voltage, VT the threshold value of VGS> and V(y) the potential the
channel at a distance y from the source, or Y-v from the drain. Note that the rectangular bracket in the
denominator is a first approximation only, based on the simple capacitor model. In general, as we shall see
below, Fermi statistics is applicable, essentially replacing the bracket [ ] by kBT{exp([ ]/kBT) -1}, where kB is
Boltzmann's constant. The quantum 1/f noise in the element of resistance is given by the basic quantum 1/f
formula for mobility fluctuations [2]
<(8dR)2>f oc0 , , , ,, „
(dR)2 =jäN with a0=(2a/7t)[(l/l+s)(2(Av/c)2/3 + (s/l+s)]; s=2N'e2/mec2; oc^eVch (2)
Here a is the fine structure constant 1/137, dN is the number of carriers in the element of resistance
dN = ZQndy/q (3)
and Qn=-C(VGS-VT) is the charge per unit area under the gate, while q=-e is the charge of the electron and me
the electron mass. Using Eq. (1) for dR, and Eq. (3) for dN, we obtain
a0 q«0dy
f<(6dR)2>f=[dy/qnN']2Mj = >n2Z3c3[VGS-VT-V(y)]3 • (4)

Multiplying on both sides with the channel current

I = -dV/dR = -ZjinC[VGs-VT-V(y)]dV/dy (5)
and integration, yields
VDS
B •> f q«odV qa0 VDS
fI<(8R)2>f= JHnZ2c2[VGS-VT-V]2 " u^C2 VG*(VG*-VDS) ' W

0
Here VG*=VGS"VT- This simple summation of spectra is justified, because both theory and experiment have
shown that the fluctuations of the various elements dR are uncorrelated, down to the smallest experimentally
accessible lengths, and down to the electronic correlation length. Dividing both sides with IR2 and replacing
VDS/I by R on the r.h.s., we obtain with Fermi statistics as mentioned above

„ ww»^ )o-,Jv'!^,1^V &", «„VW _(7

pa<W) >,- J ^ + £ ^ ~ff j ;y-+z^w tort^-F/r.)]}- >
Here we used the conventional quantum 1/f noise formula for the sub-threshold part of the channel. For
a GaN/AlxGai.xN doped n-channel HFET this yields the spectral density of VDS in terms of device width Z,
current lch, and thermal voltage kT/q by renewed multiplication with Ich.

41
 Using the fact that the velocity of the carriers
shows strong saturation in that section, to include
Fig. 1: Dependence of aH
impact ionization effect, we split up the integral at V(y)
on gate voltage at VDS=5V
aH = VG»-Vth and write the corresponding second part of
the integral in Eq. (20) separately, with the number of
carriers per unit channel length defined as N' = ICh/qvs,
x Experiment
where vs is the saturation velocity. We also replace the
+ Iheory / ratio v(E)/E by 3.5 fio, where u.0 is the low-field
mobility. This allows us to find a theoretical expression
/ for the experimental 1/f noise constant defined by
0--
ow,=
*exp [Sv/V]L7ReLi (8)
corn V
k A ..21
qZ 2
coh
Lu
tLlcL. + — a-J0L{l_ <+
a
V v )}
Q'DsV- V D^V lhVr
^eff'th'DS A
ch n
'DS
5-- R is the channel resistance and VG*=VGS-VT. The
experimental values of a measured by Balandin et al.
[1], are 4.9, 4.2, 11, 16 and 17, in units of 10"5
corresponding to VG* values of 2, 3, 3.45, 4.25 and 5
2 volts respectively. Eq. (3) yields about 3.6, 4.5, 7.5,11
1 3
9 4.2 9.6 16
and 16 in the same units. The agreement between
x Expera *- 17i0exp-5
theory and experiment is remarkable, (Fig. 1)
+ TliftOf i;*. 3.6 4.S
16-IOKXP-S considering the absence of free parameters in this first
principles quantum 1/f calculation.

HRTDs. Resonant tunneling diodes have been proposed as generators ofTHz oscillations and radiation They consist of
two potential barriers enclosing a quantum well. Electrons penetrating the potential barriers by tunneling are controlled by the
quasistationary energy levels defined by the penetrating the potential barriers by tunneling are controlled by the quasistationary energy
levels defined by the potential well. Iftheir energy is close to the first energy level in the well, resonance occurs, and a peak lp of the
current through the diode occurs. ThiscorrespondstoanappliedbiasvoltageVp. Ifhowever, the applied voltage increases further, only
a negligibly small non-resonant current trickle remains at the voltage V=Vv and a broad valley is observed in the W characteristic.
Scattering processes that reduce the energy of the carriers to a value close to eVp will always be present, generating a finite current
minimum fy at Vy. Between Vp and Vvtheie is a negative diflerentialc»ncructance
G=-(lp-fyy(Vv-Vp) (9)
on the 1/V curve, that is used to generate oscillations. The 1/fnoise ink/is given by Eq. (2)wi1h
(Av/c£=2eVv/m. (10)
Taking for instance Vp=0.4V,lp=2.5 ltfA/m2, Vv=0.6V,fy=4107A/n?, we obtain withr%fO.068irb,
NV2St(f)=2aA/f=7.4/0.06810* =13 107 (11)
Nis given by
N=tlv/e, (12)
where T is the life time ofthe carriers. With a cross-sectional area of 106cm2andT=1010,weobtainN=2.5 105.
Finally, the quantum 1/ffrequency fluctuations can be obtained from the formula [2]
StoKlAKÄSfcKj (13)
This finally yields withEq. (2), both for SL^and for the spectral density S^ of phase fluctuations
S&yraKl/4Q'X4o(/37rX2eVVm^(f/27tv)2SA(|), (14)
for the fractional frequency fluctuation spectiumextabitedbytheRTDiftel^

REFERENCES
[1] A. Balandin, S. Cai, R. Li, K.L. Wang, V. Ramgopal Rao and C.R. Vishwanathan: "Flicker Noise in
GaN/Al0.15Gao.85N Doped Channel HFETs", IEE-ED Transactions 19, 475-477 (1998).
[2] P.H. Handel: "Noise, Low Frequency", Wiley Encyclopedia of Electrical and Electronics
Engineering, vol. 14, pp. 428-449, John Wiley & Sons, Inc., John G. Webster, Editor, 1999.

42
 Fabrication of 0.5-jLim-AIGaN/GaN HEMTs
based on a 2-inch-Stepper-Process
J. Hilsenbeck1, R. Lossy1, J. Würfl1 and H. Obloh2
1Ferdinand-Braun-lnstitutfürHöchstfrequenztechnik, Albert-Einstein-Straße 11, 12489 Berlin, Germany
2
Fraunhofer-lnstitut für Angewandte Festkörperphysik, Tulla-Straße 72, 79108 Freiburg, Germany

We report on DC parameters and radio frequency small signal performance of AIGaN/GaN-

HEMTs based on a 2-inch process line using stepper lithography.
The epilayers were grown by MOCVD on sapphire and consist of a 2.8 jam semi insulating GaN
buffer layer, a 3 nm AIGaN spacer layer, a 12 nm doped AIGaN supply layer (ND = 1x1019 cm"3),
a 10 nm AIGaN barrier layer and a 5 nm thin GaN cap layer.
The HEMT fabrication starts with the ohmic contact (Ti/AI/Ti/Au/WSiN). Since the WSiN
metallization layer is done by a sputter process, the e-beam-evaporated Ti/AI/Ti/Au-layers are
totally encapsulated. Thus the contact morphology is still smooth with excellent contact edges
even after annealing at 850°C. The average value of the ohmic contact resistance is 0.54
Dmm. After the contact fabrication device isolation by mesa etching has been done, followed by
the gate contact (LG = 0.5 ^m), the interconnection metallization and the air bridge technology.
Figure 1 shows SEM pictures of an AIGaN/GaN HEMT.
From DC measurements excellent homogeneity could be observed. Within a range of 2 - 3 %
the average values of the maximum transconductance gm,max> the maximum drain-source-
current lDs,max and the pinch off voltage VP are 205 mS/mm, 620 mA/mm and -3.95 V,
respectively (Figure 2).
The average value of the source resistance Rs determined from DC measurements is 1.04
Qmm leading to an intrinsic transconductance of 275 mS/mm. With a gate-2DEG-separation of
35 nm the effective 2DEG electron velocity is calculated to be 1.1x107 cm/s, which is one of the
best values ever reported. Together with the Hall measurements (n2DEG = 9x1013 cm"2, jj.n = 900
cm2/Vs, T = 300 K) these data suggest excellent microwave performance.
From small signal equivalent circuit extraction a very good correspondance between theory and
measurement could be observed (see Figure 3 a). The extracted source resistance is 1.1 Qmm,
thus the intrinsic transconductance is determined to be 263 mS/mm and agrees very well with
the DC data. With a gate length of 0.5 nm cut off frequency fT and the maximum frequency of
are 23 and 60 GHz
oscillation fmax > respectively ( see Figure 3 b).

43
 »Mill
; ;*Sgalvanic air bridge V&ää .rii^k.^^At^
[%,■:, 'technology i ■.■yj.n.v^:: •■£ '-rf^^-steria.,

Figure 1: SEM image of an AIGaN/GaN-HEMT utilizing air bridge technology. Left: AIGaN/GaN
multi finger Transistor, right: AlgaN/GaN HEMT in detail.

||©§

4.0 4.1 40 4.0 \>'fi& 208 <!07 201

3.9 40 3.9 39 205-210»« 205

yV
-yBJR.
::3.'0- .*& 39 39 208 209 202

39 39 208! 206

lDS0 = 616 mA/mm, a = 11 mA/m m lDS0 = 3.95 V, a = 0.08 V gmmax= 206 mS/mm, a = 4 mS/mm

Figure 2: DC-wafer maps of saturation current at 0V gate bias lDSo, Pinch-off voltage Vp and
extrinsic transconductance gmirnax. The main flat is located at the top of the wafer maps.

Gain /dB
40-
UGS = -2.5V

Figure 3 a: Hybrid chart of measured Figure 3 b: Current gain and maximum

and simulated S-parameters (VGs = -2.5 unilateral gain (VGS = -2.5 V, VDS = 12 V, f =
V, VDS = 12 V, f = 50 MHz .. 50 GHz). 50 MHz .. 50 GHz).

44
 SESSION IV
Characterization of GaAs and InP-based devices
Chair: Prof. Werner Baechtold
Monday May 28, 2001

4.40 pm Design and Fabrication Technology of Gate and Gate Recess for
Ultrahigh-Speed InP-Based HEMTs
INVITED T. Suemitsu™. T. Ishif1} and H. Yokoyama{2)
(1) NTT Photonics Laboratories 3-1 Morinosato Wakamiya, Atsugi,
Kanagawa 243-0198, Japan
(2) NTT Advanced Technology Corp. 3-1 Morinosato Wakamiya, Atsugi,
Kanagawa 243-0198, Japan

5.05 pm Fast Traps in InAIAs/lnGaAs/lnAIAs/lnP 2-DEG Channels

A. Matulionis{a), V. Aninkevicius{a), L Ardaravicius{a\ J. Liberis{a), and D.
GasqüeF
(a) Semiconductor Physics Institute, A. Gostauto 11, 2600, Vilnius, Lithuania
(b)CEM2, Universite Montpellier II, Place E. Bataillon, F-34095 Montpellier,
France

5.20 pm Evaluation of SiNx Passivation on InP HEMTs at Room and Cryogenic

Temperature
R. Limacher. M. Rudin, O.J. Homan, W. Bächtold
Institut für Feldtheorie und HöchstfrequenztechnikEidgenössische
Technische Hochschule Zürich, CH-8092 Zürich, Schweiz

5.35 pm Simulation of ultra short Channel InAIAs/InGaAs/lnP High Electron

Mobility Transistors by a Coupled Solution of the Schrödinger
Equation with a Hydrodynamic Transport Model
J. HöntscheP. R. Stenze(a), W. Kli^, C. Wölhfc), V. Ziegler**, C. Gassier'
(a) University of Applied Sciences Dresden, Frtedrich-List-Platz 1, D-01069
Dresden, Germany,
(b) Dresden University of Technology, Mommsenstr. 13, D-01062 Dresden,
Germany
(c) DaimlerChrysler AG, Research and Technology, Wilhelm-Runge-Strasse
1, D-89081 Ulm, Germany

5.50 pm Electron Saturation Velocity in Gao.52lno.48P as a Function of

Temperature in Double Heterojunction Bipolar Transistors
M. Yee, P.A.Houston and J.P.R. David
Department of Electronic and Electrical Engineering, University of Sheffield,
Mappin Street, Sheffield S1 3JD, UK

6.05 pm Non-Destructive Depth-Resolved Characterization of InGaP/GaAs Multi-

Layer Heteroepitaxial Wafers by Cathodoluminescence
F. Ishikawa and H. Hasegawa
Research Center for Integrated Quantum Electronics and Graduate School
of Electronics, and Information Engineering, Hokkaido University, Sapporo
060, Japan

6.20 pm Microwave Source Studies based on Reflection Type Oscillators and

different HEMT - Circuit Configurations
A. Megej and H. L Hartnactel
Technische Universität Darmstadt, Institut für Hochfrequenztechnik,
Merckstr. 25, Darmstadt, 64283, Germany

45
46
 Design and Fabrication of Gate and Gate Recess for Ultrahigh-Speed
InP-Based HEMTs
Tetsuya Suemitsu, Tetsuyoshi Ishii and Haruki Yokoyama*
NTT Photonics Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan
Tel: +81-46-240-2795, Fax: +81-46-240-2872, e-mail: sue@aecl.ntt.co.jp
*) present address: NTT Advanced Technology Corp., Atsugi, Kanagawa 243-0198, Japan
InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) are the fastest transistors, exhibiting a cutoff
frequency (fT) of over 350 GHz [1-3]. Current research interest is divided into two major areas: (i) manufacturability and
reliability, focusing on the 40-Gb/s optical-fiber communications and millimeter-wave applications with regard to InP-
HEMTs with gate lengths longer than 100 nm, and the further improvement of high-frequency performance for over-
100-Gb/s optical communications and (ii) higher frequencies such as the G band (140-220 GHz) regarding sub-100-nm
gate devices. Indeed, the highest fT was achieved by 30-nm-gate HEMTs with a recessed gate structure [3]. As the gate
length becomes shorter, the extrinsic gate region (i.e., the gate recess) comes to play an important role in the fT, fmax,
breakdown, and reliability of HEMTs [3,4].
The heterostructure design and gate structure is depicted in Fig. 1. The gate length is defined by the opening at the
Si02 film, which is patterned with e-beam lithography. A fullerene-incorporated nanocomposite e-beam resist [5] was
used to achieve extremely short gate length of 30 nm [1]. The gate Schottky contact was deposited on the i-InAlAs by
two-step recess etching, i.e., first removing the n-InGaAs/n-InAlAs cap layer by wet etching and then removing the InP
layer by dry etching [1]. The InP layer is employed as an etch stop layer for the controllability of the threshold voltage of
HEMTs. In addition, the InP recess surface was found to have a passivation effect that suppresses the kink effect and the
frequency dispersion of the transconductance [6,7]. The kink effect is modeled by the change in the source resistance
(and thus the extrinsic transconductance) caused by the accumulation of holes generated by impact ionization [8]. An
electroluminescence study indicated that the generated holes accumulate in the source side of the HEMT [9]. The influ-
ence of the hole accumulation was found in the results of a 2D numerical analysis (Fig. 2), in which the I-V characteris-
tics of the 100-nm-gate HEMT models having different hole lifetime are compared. The longer lifetime, which means
more accumulation of holes, gives the kink effect and an explosive increase in the drain current (on-state breakdown) at
lower drain voltage. With respect to the kink effect, the role of the recess surface is significant. The gate recess covered
with InP (Fig. 1) gives the normal I-V characteristics; even the lateral depth of the gate recess (Lside) exceeds 260 nm
(Fig. 3a). When InAlAs is exposed in the gate recess, on the other hand, the collapse of the drain current and the kink
effect are observed at Lside of 120 nm (Fig. 3b). Due to the carrier depletion caused by the surface pinning, devices with
a strong kink effect have a resistive gate recess. The carrier depletion also makes the device characteristics sensitive to
the hole accumulation. A light irradiation study, in which the electron-hole pairs are produced by illumination instead of
impact ionization, indicated that the decrease in the parasitic resistance primarily increases the drain current and, at large
light powers, the drain current is boosted more due to the shift in the threshold voltage that is caused by the positive
charges of holes accumulated under the gate (Fig. 4) [10].
The typical high-frequency characteristics of 30-nm-gate HEMTs with Lside of 260 nm are shown in Fig. 5. The
20-dB/decade roll-offline gives fT of 368 GHz, which is the highest fT ever achieved by any kind of transistor. The gate
length dependence of fT is characterized by fT = [2n{xex + Lg/vs)}~1, where iex, Lg and vs are the extrinsic delay time,
gate length and carrier velocity, respectively. The Lg-fT dependence of InP-HEMTs gives vs of 2.7 x 107 cm/s, which is
larger than that of the other two materials (GaAs and Si in Fig. 6). As Lg becomes shorter, however, the influence of Tex
becomes more significant as shown in the fitting curves with different Tex in Fig. 6. The Tex is the delay independent of
Lg, and consists of the charging time and the transit time to run in the excess gate region ascribed to the difference
between the effective and nominal gate length. Evidence of parasitic effects on high-frequency characteristics was
observed in the Lside dependence of fT, the parasitic resistance (Rs) and capacitance (Cgd) of 30-nm-gate HEMTs (Fig. 7).
This result suggests that the maximum fT is given by Lside optimized so as to minimize the contribution of Rs and Cgd.
Since the intrinsic delay Lg/vs is estimated to be 0.11 ps at Lg = 30 nm, xex becomes the principal factor limiting fT in
such a short gate range. The design of the gate and gate recess structure, therefore, should be improved to suppress these
parasitic components, both resistance and capacitance.
[1] T. Suemitsu, et al., IEDM, p. 223, 1998.
[2] A. Endoh, et al., Int. Conf. on Indium Phosphide and Related Materials, p. 87, 2000.
[3] T. Suemitsu, et al., Topical Workshop on Heterostructure Microelectronics, p. 2, 2000.
[4] T. Enoki, et al., Jpn, J. Appl. Phys., vol. 37, p. 1359, 1998.
[5] T. Ishii, etal., Appl. Phys. Lett., vol. 70, p. 1110, 1997.
[6] G Meneghesso, et al., IEDM, p. 227, 1998.
[7] G Meneghesso, et al., WOCSDICE, 2000.
[8] T. Suemitsu, et al., IEEE Trans. Electron Devices, vol. 45, pp. 2390, 1998.
[9] N. Shigekawa, et al., IEEE Electron Dev. Lett., vol. 16, p. 515, 1995.
[10] T. Suemitsu, etal., Int. Conf. on Indium Phosphide and Related Materials, 2001.

47
 Source Gate

: HriAIAs
2 3
Drain voltage [V]
Fig. 1: Schematic cross section of InP-based HEMT. Fig. 2: Numerical analysis of I-V characteristics of 100-nm-
gate HEMT with different lifetimes of holes in InGaAs chan-
nel (1 and 103 ps). Gate voltages: 0.2 V top, -0.2 V step.

I L
■!■■■■
120 nm ^_^-
| ■""■■ i-T T
L s!do : 260 nm
:
0.6 .,a.
E r -:
0.4

c
0.2
'E
□
-—■:

0
0 12 0 1 ?. 12 0 1
Drain-to-source voltage [V] Drain-to-source voltage [V]
a) Recess surface: InP b) Recess surface: InAlAs

Fig. 3: Impact of recess surface material of 100-nm-gate InP-HEMTs: a) Recess surface is InP. Gate voltage: 0.4 V top, -0.1 V
step, b) Recess surface is InAlAs. Gate voltage: 0.4 V top, -0.2 V step.

0.4
8
v
7 c
I 6 v„

i i

10° 101 102 103 10" 10* 10 100 1000

Incident light power (xW]
Frequency [GHz]
Fig. 4: Light-irradiation-induced change in drain current and Fig. 5: Typical high-frequency characteristics of 30-nm gate
gate-recess resistance (R^ess) of a kmk device (InAlAs recess HEMTs. Lateral depth of gate recess (Lside) is 260 nm. Gate
surface with Lsjde = 120 nm) in pre-kink bias (gate voltage and voltage and drain voltage are 0.15 and 0.7 V, respectively.
drain voltage are 0 and 0.5 V, respectively).

400 l ' ' ' '.

- ' ' ' I ' ' !'■!■■

350 L
■
T~*^^ :
- 0.8 |
- ..o *
■KT 300 ~ - 0.6 g
.-■©-''"'
I
o - ...o-- Rs ■

.J-250 - or ~*" - 0.4 I"

; 0-.. C . LL
200
" "■ia.
-£ ~ 0.2 %
- ■ia- ■---0 ■

150 " , , , , i , , , , I , , i i I , 1 1 ,
100 150 200 250 300 100 200 300 400
Gate length [nm] LM
side
[nm]

Fig. 6: Gate length dependence of cutoff frequency of FET's Fig. 7: Cutoff frequency (fT), source resistance (Rs) and
based on InP, GaAs and Si. Dotted curves for InP-HEMT are feedback capacitance (Cgd) versus lateral depth of gate
calculated with various extrinsic delay time (xex). recess (Lside) for 30-nm-gate HEMTs.

48
 Fast Traps in InAlAs/InGaAs/InAlAs/InP 2-DEG Channels
A. Matulionis (a), V. Aninkevicms (a), L. Ardaravicius (a), J. Liberis (a),
and D. Gasquet (b)
(a) Semiconductor Physics Institute, A. Gostauto 11, 2600, Vilnius, Lithuania
Fax: 3702627123, e-mail: matulionis@uj.pfi.lt
(b) CEM2, University Montpellier II, Place E. Bataillon, F-34095 Montpellier, France
Channels containing a two-dimensional electron gas (2-DEG) are widely used in high-
electron-mobility transistors (HEMTs). An undoped InGaAs quantum-well layer confined
between two InAlAs barrier layers supports excellent high-speed low-noise performance of
the transistors at millimeter-wave frequency [1]. A drawback of Al-containing structures
comes from traps acting at frequencies up to several hundreds of megahertz [2, 3]. No data on
the trap origin and location is available; the traps are likely distributed either at the interfaces
[2, 4] or in the bulk of InAlAs barrier layer [2, 5]. Our results on microwave noise show that
the trap levels in question are located on the substrate side from the InGaAs well. The trap
energy is estimated to be near 0.25 eV below the conduction band edge of InAlAs.
The mobile electrons for the investigated InGaAs quantum-well channels are supplied
by the donor planes located in the InAlAs barrier layers. Channels 13Q and 14Q have the
donor plane on the surface side from the well, channel 15Q has two donor planes on the both
sides. The typical 2-DEG densities and electron mobilities at 77 K are 2.4 1012 cm"2 and 37
000 cm2/(V s) for the one-side-doped channels (13Q and 14Q) and 4.3 1012 cm"2 and 11 900
cm2/(V s) in the case of two-side doping (channel 15Q). Channel 13Q contains lattice-
matched InGaAs (53% of InAs), channel 15Q contains strained InGaAs (70% of InAs), and
channel 14Q combines layers with 53% and 70% of InAs.
The subband energies and the
Fermi energy are studied using a self-
14Q
consistent solution of the coupled
Schrödinger-Poisson equations, taking
into account the subband occupation at
traps y 80 K (Fig. 1). According to the
calculations, the mobile electrons
Fermi traps
energy
occupy the lowest two subbands.
Noise temperature is measured
0.1 eV
in 0.22-10 GHz frequency range at 80 K
20 nm
temperature using coaxial and
waveguide radiometric techniques (for
details see, for example, [1]).
Fig. 1. Subband diagrams for one-side-doped (14Q) and The generation-recombination
two-side-doped (15Q) channels.
noise is observed at microwave and
lower frequencies (Fig. 2). In the two-
side-doped heterostructure 15Q, this
noise dominates in the wide range of electric fields (Fig. 3) indicating that the thermal
equilibrium electrons interact with traps as well as the hot electrons do. The noise source with
similar cutoff frequencies is essentially weaker in the one-side-doped channels at low and
moderate electric fields (Fig. 3), but the source is strong at high electric fields (Fig. 2, 14Q).
The lattice strain is not a prerequisite for formation of the trap levels in question: channel
14Q shows the noise behaviour similar to that of the lattice-matched one 13Q (Fig. 3).
Consequently, for channels 13Q and 14Q, the electrons must be hot to be trapped.

49
 InAIAs/tnGaAs/lnAIAs InAIAs/lnGaAs/lnAIAs/lnP
80 K 104 650 MHz n£ -
80 K U ;
£"
^W

temperature
■ 15Q/ ™fl -■

o
CO
6
2
/\x
102 ■ ^ :

1 10 0.1 1
Frequency (GHz) Electric field (kV/cm)

Fig. 2. Frequency-dependent noise temperature Fig. 3. Field-dependent noise temperature

for channels 14Q (squares) and 15Q (circles) at at 650 MHz for different channels: lattice-
different electric field: moderate (open symbols) matched (13Q, triangles), splitted (14Q,
and high (closed symbols). squares), and strained (15Q, circles).

The experimental data show that, for the two-side-doped channel 15Q, the electrons
can be trapped already at thermal equilibrium and at low electric fields. This is possible if the
trap level energy is almost equal the Fermi energy. Since the electrons are confined in the
quantum well, the traps might be located either on the heterointerfaces or in the bulk of
InAlAs near the heterointerfaces. In the latter case electron tunneling takes part. Figure 2
shows that the experimental data can be fitted by the sum of two Lorentz-type contributions
with essentially different cutoff frequencies (200 MHz and 1.5-A GHz) superimposed onto
the almost 'white' contribution due to the hot-electron velocity fluctuations. This result is in
line with essentially different confinement of the electrons occupying the lowest two
subbands. It is believed that the less-confined electrons undergo a faster trapping assisted by
tunneling. Assuming that the conduction band offset equals 0.55eV, data of Fig. 1 (15Q)
suggest that the trap levels are at about 0.25 eV below the conduction band of InAlAs.
An additional information is available from the noise data obtained for the one-side-
doped channels 13Q and 14Q. In absence of the donor plane on the substrate side, the
conduction band of the InAlAs layer moves upward in respect to the Fermi level (Fig. 1). The
traps, located on or near this interface, move up as well. They become out of reach for the
equilibrium electrons. Since we observe that the generation-recombination noise is quite
weak at low electric fields in channels 13Q and 14Q (Fig. 3), the traps on the surface side
should be excluded from the consideration. The remaining traps are those located on the
substrate side high above the Fermi level. This conclusion is supported by the experimental
data on the generation-recombination noise arising at high electric fields in one-side-doped
channels: only high-energy electrons can be trapped efficiently (see 14Q in Fig. 2).
Support under Contract V-019-2001 of the Lithuanian National Science and Education
Foundation is acknowledged.

[1] Hartnagel H L, Katilius R, and Matulionis A, Microwave Noise in Semiconductor Devices, Wiley,
New York, 2001.
[2] Ng G I, Pavlidis D, Tutt M, Weiss R M, and Marsh P, IEEE Trans, on ED, 42, 523-532 (1992).
[3] Matulionis A, Aninkevicius V, and Liberis J, Microelectronics Reliability, 40, 1803-1814 (2000).
[4] Berntgen J, et al., Proc. 20th WOCSDICE'96, Vilnius, Lithuania, 1996.
[5] Victorovitch P, et al., IEEE Trans, on Electron Devices 43, 2085-2100, 1996.

50
 Evaluation of SiNx Passivation on InP HEMTs at Room and
Cryogenic Temperature
R. Limacher, M. Rudin, O.J. Homan, W. Bächtold
Laboratory for EM Fields and Microwave Electronics, Swiss Federal Institute of Technology, CH-8092 Zürich, Switzerland

Abstract — The performances of surface passivated the ohmic contacts. To study the effect of this
and non-passivated InP high electron mobility passivation, two chips have been produced in the same
transistors (HEMTs) are presented. After adding a run. The SiN„ passivation layer has been applied to one
SiN, passivation layer a shift of the threshold voltage of the chips.
2.0(iiii
Vth from -0.35V to -0.25V and an increase in the
maximum transconductance GM^* of 5% was
observed. A similar behavior can be seen with non-
passivated devices after a certain storage time. A 10 nm rMn^jGa^As
15nm ln0J,2ÄI„ „As
comparison of the rf and noise performances shows SH doping
no significant degradation after passivation. 10nm In, „AI^As
50 nm lnt,3GiV„As

300 nm lr\,„AI^,As

1. Introduction
625 |im InP

In certain applications like radio astronomy and deep

space communication there is a need for receivers with Figure 1: Cross-view of 0.2um InP based HEMT device
high sensitivity and ultimate noise performance. Most
receivers in these applications make use of cryogenic
amplifiers with GaAs or InP HEMT devices in the 3. Measurement Results
front-end. InP HEMT devices are preferred devices for
millimeter-wave frequency applications, whereas they Prior to the SiNx passivation DC measurements were
are not very often used in receivers at lower microwave carried out. After the passivation DC characteristics
frequencies. Work has been carried out to improve gain show a shift of the threshold voltage V* from -0.35V to
and noise performances of InP HEMTs at room and -0.25V and an increase in the maximum
cryogenic temperatures. The work presented in [1] transconductance GM,max of 5% (see Figure 2). This
shows a possible advantage of InP HEMTs over GaAs effect is likely due to a change of the surface potential
HEMTs at lower microwave frequencies with regard to caused by the SiNx passivation layer.
cryogenic noise performance.
To avoid a degradation of the device performances and
to stabilize the T-gate mechanically, a SiNx passivation
layer has been applied. In this paper, we present a
comparison of passivated and non-passivated devices in
regard to dc, rf and noise performances. All
measurements are based on devices with bondable pads.

2. Device Fabrication

The HEMT structure studied in this work consists of an V„M

n-doped Ino.53Gao.47As cap layer, an Ino.52Alo.48As Figure 2: Transconductance Gm [mS/mm] before (line)
Schottky barrier layer, a Si-5 doping plane, an and after (dots) SiNx passivation
Ino.52Alo.4gAs spacer, an Ino.53Gao.47As channel and an
Ino.52Alo.48As buffer layer.
The devices have a gate length of 0.2 pm and a gate While DC parameters do not vary with time on devices
width of 2x75um. The T-shaped gate was defined by an after passivation, they do on non-passivated ones. An
electron beam lithography process with a triple PMMA- increase of GM>n,ax and a shift of Vft can be observed on
based resist layer stack. Gate recess through the non-passivated devices. Figure 3 shows this behavior
Ino.53Gao.47As cap layer was done using a highly after a period of four months. A possible explanation is
selective wet chemical etching process. A cross-section that the natural oxidation of the surface of the InAlAs
of the device is shown in Figure 1. Schottky layer of the non-passivated HEMTs finally
The SiNx coating of the passivated devices has a originates a similar change in DC characteristics of the
thickness of 130 nm. The nitride was deposited by devices as device passivation. After four months, a
plasma enhanced chemical vapor deposition (PECVD) further comparison of rf s-parameters and cut-off
at 120°C with a deposition rate of 14 nm/min. The frequency fr (see Figure 4) confirms the similar
passivation layer was applied over the gate and part of behavior of the passivated and non-passivated devices.

51
No significant differences between the two types can be Our noise parameter measurement system allows Fmin
noted. measurements at room temperature only. At cryogenic
temperature, the noise temperatures Tn of hybrid two-
600 stage amplifiers have been measured, fabricated with
passivated and non-passivated devices. Initially the first
500
and second stages of the amplifier were fabricated with
1 400 non-passivated devices. Then, the non-passivated
E 300 device of the first stage was replaced by a passivated
one. The noise performances were measured with both
200
configurations. Figure 6 shows the noise temperature Tn
100 of a two-stage hybrid amplifier. No significant shift in
0
Tn can be seen.
-0.5
V0EM

Figure 3: Shift in transconductance Gra [mS/mm] of

non-passivated HEMTs over a period of four months non-passivated
passivated

3 4 5 6 7 8 9
Frequency [GHz]

Figure 6: Noise temperature Tn of two-stage amplifiers

10 with passivated (dots) and non-passivated (line) devices
Frequency [GHz]
at cryogenic temperature (15 K)
Figure 4: Measured h2i at room temperature of a
passivated (dots) and non-passivated (line) device at 4. Conclusions
Vds=0.5V and Ids=10mA (with pad parasitics included)
A comparison of the device performances of passivated
and non-passivated InP HEMT devices shows an
The noise performances at room and cryogenic improvement of the passivated devices in terms of time
temperatures were our main criterion of studying the stability. While DC characteristics do not vary with
influence of device passivation. The measured time for passivated devices, they do for non-passivated
minimum noise figure Fmin at room temperature is ones. Additionally, rf and noise performances show no
shown in Figure 5. In the lower GHz range a slight significant differences between the two devices. A
improvement of the noise performance of passivated slight improvement of the noise performance at lower
devices can be noted. It is presumed that the passivation microwave frequencies for the passivated devices can
reduces the surface trapping effects which has a also be noted. In order to further investigate the effect
positive impact on the noise performance. The noise of passivation and aging low frequency noise
measurements were done at the same bias conditions of measurements will be performed.
Vds=0.5V and 1^=10mA.
5. Acknowledgment

The authors would like to thank H.P. Meier and Bruno

Graf for processing the devices and J.D. Gallego with
Centra Astronomico de Yebes, Spain for performing
the cryogenic noise measurements.

6. References

[1] I. Lopez-Fernandez, J.D.G. Puyol, OJ. Homan,

A.B. Cancio, "Low-noise cryogenic X-band
amplifier using wet-etched hydrogen passivated
10 14 1 26 InP HEMT devices"
Frequency [GHz]

Figure 5: Minimum noise figure Fmin at room

temperature of passivated and non-passivated devices at
Vds=0.5V and Ids=10mA

52
 Simulation of Ultra Short Channel InAlAs/InGaAs/InP High Electron Mobility
Transistors by a Coupled Solution of the Schrödinger
Equation with a Hydrodynamic Transport Model
J. Höntschel1, R. Stenzel1, W. Klix2, C. Wölk3, V. Ziegler3, C. Gassier3
1 University of Applied Sciences Dresden, Friedrich-List-Platz 1, D-01069 Dresden, Germany, Phone:
+49-351-462 2692, Fax: +49-351-462 2193
E-mail: hoentsch@et.htw-dresden.de
1
Dresden University of Technology, Mommsenstr. 13, D-01062 Dresden, Germany
' DaimlerChrysler AG, Research and Technology, Wilhelm-Runge-Strasse 11, D-89081 Ulm, Germany

The simulation and measurement of ultra short channel high electron mobility transistors (HEMT),
based on InAlAs/InGaAs/InP, are presented. These structures are experimentally investigated at the
DaimlerChrysler AG. For the simulation the device simulator SIMBA is used, where several
physical models (e.g. drift diffusion (DD) model, hydrodynamic (HD) transport model and a
coupled solution of the Schrödinger equation [1] with a HD transport model) are included.
The device structure used for the simulation is represented in Fig. 1 together with the doping
densities. Fig. 2 and Fig. 3 show the calculated output and transfer characteristics, respectively.
Additionally the results of a HD transport model and measurement data are inserted. Essential
physical effects (e.g. short-channel and overshoot effects), which determine the behavior of the
HEMT structure, can be identified in the corresponding device characteristics. The difference
between the simulation models consists in the computation of the electron density at the hetero
interface, which was exactly calculated by a solution of the Schrödinger equation with a HD
transport model. Fig. 4 shows the power gain as a function of frequency (MSG/MAG). The transit
frequency fT = 132 GHz and the maximum frequency of oscillation fmax = 176 GHz are obtained by
a dynamic simulation at the working point VDs = 1.1 V and VGs = -0.3 V. In this point the device
possesses the maximum transconductance with gm = 760 mS/mm.
The capability of device simulation contains the possibility to investigate scaling effects. The
performance, especially the output and transfer characteristic, of InAlAs-based HEMT has been
evaluated as a function of gate length (1G) in the range from 1G = 7 nm to 1G = 120 nm and for a
corresponding scale of vertical dimensions. In Fig. 5 the output characteristic are illustrated for
different gate lengths at VGs = 0.
/ÖU i
" V =-0.8V...0.2V; AV =0.2V
GS GS J^^'
700-
Measurement Data -■• • ^s^^*^ ^
60nm ^0nr!\ 60nm Schrödinger Eq.— ^^^ ^^"
600-
HD-Model - - s/ ^j*^" '■
,?/ --ä*-^^ ■
Source . Gate Drain
500-i
11nm InGaAs n ri*= 5.4'10"cm*
22 nm InGaAs i Cap-Layer
E 400-
Doplng-Pulse 'dp ^0-*****^ ^S
14nmlnAIAsi (Supply-Layer) 'JJTsS^T' >^
7.010"cm-*\ E
4nm InAIAs I (Spacer)
'mr*'' ^s*"-*^*
300- JjE?' _^~—^Z^^'
20 nm InGaAs i (Channel) £V ^j^-gtfTtr^"
JyJs*^~'~~ ~ ■■*■"''
700- 4^r .*•■■" -üJ-J^

75 nm InAIAs i (Buffer) iW •■'*" rr^r-^^^-^ "

jfr* -~~-TI *""' j

100-
InPi (Substrate)

0- f l|IIIH T— ","' *7"~-, , r—i ( . - « 1 J

0.5 1.5
Vos(V)
Fig. 1 Structure of the InAlAs/InGaAs/InP- Fig. 2 Output characteristic for different
HEMT simulations models

53
 700 r ■"'-■— S. 40-
Measurement Data - •• ■
// Measurement Data
600-- Schrödinger Eq. — AV -

; HD-Model-- f Simulation —
500

vDS=i.ov/
E 400 ft \
E
I...

300-

200 -.
I... .■.." I

100
//
IT
■r--»—• i—i"—1
-1.4 -1 -0.5 0 0.1 1 10 100 1000
Vcs (V) f(GHz)
Fig. 3 Transfer characteristic for different Fig. 4 Calculated and experimental results of
simulations models MSG/MAG (VDS = 1.1 V; VGS = -0.3 V)

The behavior at extremely short gate lengths shows essential scaling effects like short-channel and
overshoot behavior. As a result of dynamic simulation at the working point VDS = 1.1 V, VGS = -0.3 V
for a 60 nm gate length fmax = 650GHz was obtained. With the 30 nm gate length device
fmax = 710 GHz can be achieved. The gate to channel aspect ratio, the threshold voltage and the
maximum transconductance, for the gate lengths in the range from lG = 7nm to 1G= 120 nm, are
summarized in Table 1.

1700 T ——T-™T -,--,■ ,-, T

30- -

CO

CD 20- ^^\

CD
CO

1°:
■

fmax = 650 GHz \

0-
0 1 1 1C) 100 10
VDS (V) f (GHz)
Fig. 5 Output characteristic for different gate Fig. 6 MSG/MAG for the HEMT-Structure with
lengths at VGS = 0 1G = 60 nm (VDS = 1.1 V; VGS = -0.3 V)

Table 1 Parameters of the ultra short channel InAlAs/InGaAs/InP-HEMTs

Gate length 1G (nm) 7 15 30 60 120

Gate to channel aspect ratio 2.33 3.0 3.0 4.0 6.66
Threshold voltage Vth (V) -0.85 -0.75 -0.9 -1.1 -0.9
Maximum transconductance
2600 2225 1875 750 738
gm (mS/mm)
[1 ] C. Pigorsch, W. Klix, R. Stenzel. Microelectronic Engineering, 43-44 (1998), pp. 325-333

54
 Electron Saturation Velocity in Gao.52Ino.4sP as a Function of Temperature
in Double Heterojunction Bipolar Transistors
M. Yee, P.A. Houston and J.P.R. David
Department of Electronic and Electrical Engineering
The University of Sheffield
Mappin Street
Sheffield SI 3JD, UK

Introduction
Heterojunction Bipolar Transistors (HBTs) are GalnP using the Kirk Effect as a function of
recognised as useful devices for high power temperature.
and high speed operation. Crucial to defining
Experiment
the frequency limits of operation is a A graded base Gao.52Ino.48P/AlGaAs-
knowledge of electron saturation velocity in
/Gao.52lno.48P Double Heterojunction Bipolar
the collector over the range of operating
Transistor (DHBT) with aluminium mole
temperatures. As the collector current in the
fraction varying from 0.11 at the collector end
HBT increases, the electric field at the base
to 0.21 at the emitter end is used to determine
edge of the junction aproaches zero. When the
the electron saturation velocity of GalnP. The
electric field at that junction reaches zero,
0.11 Al composition at the collector end
holes from the heavily doped base spill over
ensured a zero conduction band spike there
into the collector, compensating the negative
[2]. Pulse biasing the DHBT (typical pulse
charges, thus prevent the electric field from
length of 1ms with pulse repetition frequency
becoming positive. Any further increase in the
of 1 s) was done to minimise device self-
collector current results in the formation of a
heating. The current density for the onset of
'base push-out' region [1]. This increase in
base push-out, i.e. Kirk current density, can be
minority-carrier charge storage in the base
determined when the current gain falls with
causes a degradation in current gain ß of the
increasing collector current (Figure 2).
device and hence limits the current density in
the device. The onset of 'base push-out'
Figure 3 shows measured Kirk current density
occurs at the Kirk current density, JK, given
as a function of applied collector-base voltage
by, of a Gao.52lno.4sP/AlGaAs/Gao.52lno.48P DHBT
at temperatures of 22°C to 200°C. The
2e(TCB + Vu-RcIc+RBIB)
JK =<lVsc Nc+ 0) resultant electron velocity saturation of GalnP
qwc2 against temperature is obtained from the
slopes of Figure 3 and is shown in Figure 4.
where q is the electron charge, vsat is the
saturation velocity, VCB is the applied The advantage of measuring the Kirk current,
collector-base voltage, VM the collector-base as a function of VCB is that the saturation
built-in voltage, e is the permittivity of the velocity can be determined from the gradient
collector, Re and RB the collector and base of the JK versus VCB characteristics. This
series resistance respectively, Nc is the procedure is independent of the collector
collector doping density and Wc the collector doping density and hence eliminates the need
layer thickness of doping Nc- (VcB+Vb,~ to measure it accurately.
RCIC+RBIB) is the base-collector junction
voltage, which allows for the voltage drop An electron saturation velocity of 4.6 x 10
across the resistance between the contacts and cm/s was obtained at room temperature.
the junction as shown in Figure 1. Figure 4 also shows that the electron
saturation velocity decreases rapidly with
In this work, we report the first direct increasing temperature. This rapid decrease
measurement of electron saturation velocity in has important implications for the

55
deterioration of frequency performance of
HBTs in this materials system at normal 1.6^
operating temperatures in power applications. ^0.22
1A-. 20°C ^0.20
-- 60°C
— 100°C r0.18
[1] C.T. Kirk, "A Theory of Transistor Cut-off 1.2-j
Frequency Falloff at High Current Densities,"
— 150°C y* s E- 0.16
IRE Trans. Electron Dev. vol. ED-9, no. 2, pp. £i.o-i
o
200°C r 0.14<
164, 1962.
lo.8J ■- 0.12-*
[2] B.-C. Lye, P.A. Houston, H.-K. Yow and C.C.
Button "GalnP/AlGaAs/GalnP double hetero-
i-aio
"^0.6i ^0.08
junction bipolar transistors with zero
conduction band spike at the collector," IEEE 0.4^ ^0.06
Trans. Electron Dev. vol. 45, no. 12, pp. 2417, r 0.04
1998. X"" Increasing
0.2^ Temperature r 0.02
nr\
U.U ^' i i i i | i i i i | i i i i | i i i i ■ u.uu
r>nn

0.0 0.5 1.0 1.5 2.0

Vm(V)

Figure 3: Temperature dependent Kirk

current density (JK) and Kirk current (IK) at
various collector-base biases.

Figure 1: HBT in common-emitter

configuration with internal base and
collector series resistance.

0 40 80 120 160 200

Temp(°C)

Figure 4: Variation of electron saturation

velocity with temperature in Gao.52Ino.4sP

Figure 2: Current gain versus collector

current at 20°C, 60°C, 100°C, 150°C and

56
 Non-Destructive Depth-Resolved Characterization of InGaP/GaAs
Multi-Layer Heteroepitaxial Wafers by Cathodeluminescence

Fumitaro Ishikawa and Hideki Hasegawa

Research Center for Integrated Quantum Electronics and Graduate School ofElectronics and Information
Engineering, Hokkaido University, N-I3, W-8, Kita-ku, Sapporo 060-8628, Japan
Tel: +81-11-757-1163, Fax:+81-11-757-1165, e-mail: hasegawa@rciqe.hokudai.ac.jp

Depth-resolved cathodeluminescence is shown to be a powerful technique for contactless,

non-destructive characterization of advanced multi-layer heteroepitaxial wafers.

Introduction
For research as well as mass production of advanced heterostructure devices, a method for
non-destructive, highly sensitive and non time-consuming characterization of buried hetero-
structure layers and their interfaces in epitaxial wafers is strongly desired.
CathodeluminescenceD(CL) allows depth-resolved measurements by changing acceleration
voltage, leading to characterization of carrier profiles, surface and bulk deep states, Schottky
interfaces, often by name of LEEN[1]. However, application to heterointerfaces has not been
made.
The purpose of this paper is to demonstrate a cathodeluminescence interface spectroscopy
(CLIS) technique as a powerful contactless and non-destructive characterization method of multi-
layer heteroepitaxial structures through the results taken on various InGaP/GaAs multilayer
heteroepitaxial wafers.

Principle and Theoretical Analysis

The principle of the CLIS technique for a simple heterostructure consisting of two materials
A and B is schematically shown in Fig.l. The structure gives, at an electron acceleration voltage,
Vacc, two near-bandgap CL peaks with peak intensities UCVaoc) and lB(Vacc). Since the penetration
depth of electons is strongly dependent on VaCc, U and IB depend also strongly on Vacc. Plots of
iA(Vacc) and lB(Vacc) vs. Vacc are defined as CLIS spectra. If CLIS spectra for the ideal case
without any defects are known by a detailed computer simulation, or by experiments on near-ideal
reference samples, then any deviations in measured spectra from ideal CLIS spectra such as
change in spectra shapes and intensities, and/or appearance of unexpected CL peaks, indicate that
some unwanted anomalies are present in the heterostructure. Then, by a subsequent computer
analysis, it should be possible to identify the causes of the anomalies.
For theoretical analysis of CLIS spectra, a ID Scharfetter-Gummel vector-matrix type self-
consistent semiconductor simulation program which our group developed for analysis of
photoluminescence[2] was modified to obtain CLIS spectra. Excitation by incident electrons was
obtained by calculating the Everhart-Hoff electron energy loss curve[3].

Feasibility Study
In order to experimentally investigate the feasibility of the CLIS technique, a well
characterized commercial high quality InGaP/GaAs single heterostruacture grown by MOVPE
was investigated. Two peaks A and B coming from InGaP and GaAs were seen, as shown in
Fig.2(a), and the CLIS spectra shown in Fig.2(b) agreed well with the theoretical analysis.

57
 Application to Multi-Layer Wafers
InGaP/GaAs single heterostructure and quantum well samples were grown by gas source
molecular beam epitaxy (GSMBE) using tertiarybutylphosphine as the P source[4]. These
samples showed existence of anomalous peaks in addition to the expected GaAs peak, the InGaP
peak and the QW peak. From the theoretical analysis of their CLIS spectra, the anomalous peaks
were found to come from the InGaP/GaAs interfaces, suggesting formation of P-vacancy related
interface defects due to improper group V switching. In fact, under the optimal growth condition,
these peaks could be removed. Finally, the CLIS technique was applied to MOVPE grown HBT
wafers. Observed CL and CLIS spectra are shown in Fig.3(a) and (b). Four CL peaks were
observed. From their CLIS spectra as well as their energy positions, they were assigned to the
InGaP/GaAs interface related "deep emission" peak, the GaAs-base band edge emission peak, the
GaAs-base C-related exciton emission peak and the GaAs n sub-collector peak, respectively.

[1] T.M.Levin, GH.Jessen, F.A.Ponce and LJ.Brillson, J.Vac.Sci.&Technol. B 17 (1999) 2545.

[2] B. Adamowicz and H. Hasegawa, Thin Solid Films 367 (2000) 180.
[3] T. E. Everhart and P. H. Hoff, J. Appl. Phys. 42 (1971) 5837.
[4] H. Sai, H. Fujikura, A. Hirama and H. Hasegawa, Solid State Electron. 43 (1999) 8.

Electron
beam

c Vacc=10kV
3
.a „^L.
Photon CO
energy Vacc=20kV "^ ' " P4
to
c

Vacc o
Fig.l Principle of CLIS technique. 1.3 1.4 1.5
Energy [eV]

1.8 2.2
Energy [eV]
(a)

'5 10 15 20 25 30
Accerelation voltage [kV]
(b)

Fig.3 (a) CL and (b) CLIS spectra from an

10 20 30 MOVPE HBT wafer.
Ü Accerelation voltage [kV]
<b)
Fig.2 (a) CL and (b) CLIS spectra from a reference sample.

58
Microwave Source Studies Based on Reflection-Type
Oscillators and Different HEMT-Circuit
Configurations
A. Megej and H. L. Hartnagel
Insitut für Hochfrequenztechnik, Technische Universität Darmstadt, Mercksttaße 25,
D-64283 Darmstadt, Germany. E-mail: megej@tu-darmstadi.de

ration. As the feedback element, which helps to

Abstract achieve the negative differential resistance at the input,
A systematic study of maximally broadband VCO de- acts the gate-source capacitance of the active pHEMT.
signs Is undertaken. The theoretical efforts lead to the The Simulation results demonstrated that the transistor
practical renlization of two fully monolithically inte- is already unstable without any additional elements,
grated VCÖs based on the refiectlon-type technique. Furthermore, the magnitude of the input reflection
Employing the diode tuning, the practical realisations of coefficient is greater than unity above a. certain fre-
PHDEMT-MMICs exhibit 14% and 2%% bandwidth of quency, Due to this effect, the unwanted low-
oscillations. frequency oscillations can easily be suppressed. Al-
though the forward gain of a common-source configu-
Introduction ration is very low, it falls off very gradually with fre-
quency. Therefore, constant performance over a wide
Wide-band voltage-controlled oscillators are an essen- rane;e is possible.
tial part in a variety of applications. The increasing use The basic schematic, of this oscillator is shown m
of the monolithically integrated circuits (MMlC'sJ has Fig, 1 including the biasing network. An 8x75 urn
created the need for high-performance MMIC-VCO's. pHEMT acts as the active device within this circuit.
Further, HEMT oscillators are needed if they have to Another small 1x75 jim provides the DC to RF separa-
be integrated with HEMT amplifiers, mixers, and de- tion over a wide frequency range. The capacitor CFB
tectors to form a single-chip system. suppresses the circuit instability at higher frequency
The objective of this paper is to analyse two different values. Inductors Lw and capacitors CKt> realize further
approaches to the reflection-type VCO designs,
namely the common-drain and common-source tech- necessary bias networks.
niques and to describe two practical fully monolithi-
cally integrated implementations. The negative resis-
tance approach was chosen due to its relative design
and analysis simplicity. The measured relative band-
width of operation covered by single circuits varies
within the range of more than 13% up to almost 28%,
which are excellent results for these kind of devices.
The circuits were manufactured using she commer-
cially available 0.25 \xn\ pHEMT process PH25 of
UMSf.

Circuit Designs Considered Fig, 1. Basic schematic of the VCO with the oscillat-
ing pHEMT in common-drain configuration
Common-Drain Oscillator (TUDDES1J).
Oscillators based on the transistors in the so-called
"reverse-channel configurations" were first proposed Oscillator with Capacitively Induced Negative Resis-
tance
by Wade [1}. The drain terminal of a■ transistor tnthat
This kind of oscillators has often been used for micro-
case is biased with a negative voltage, thereby making
wave circuit design [2], The disadvantage of this con-
it to the electrical source. In this way, the disadvan-
cept is the very difficult bias supply. For this circuit,
tages of other basic configurations-especiafly in con-
nection with the heat sinking-can be overcome. Fur- one needs two bias networks: in the source and in the
drain paths of the transistor. Thus, the problem in con-
ther, the magnitude of the transistor input coefficient
becomes greater than unity below a certain frequency. nection with the DC supply doubles. In our case, we
In this work, the VCO implementation is presented use again the active biasing approach. A very small
1x30 urn pHEMT acts as a current source for a bigger
that is based on a real common-gate transistor configu-
6x40 urn oscillating transistor. The operation point of
' United Monolithic Semiconductors, Ulm/Germany and the active device changes significantly, but its high-
Orsay Cedex/Franee frequency behaviour is still very well suitable for the

59
oscillator design» The basic schematic of this oscillator Further advantage of the common-drain arrangement is
is shown in Fig. 2. the better heat-sinking since, in this case, one terminal
It can be shown mathematically [3] that for maximal of the transistor is directly connected to the ground.
bandwidth of oscillations the smallest transistor Tosc
and capacitance Cra have to be chosen.

realf;y<0

-p.i -O.ä

Tuning Voltage, VT(

Fig. 4. Measured output power of the circuits investi-

Fig. 2. Basic schematic of the VCO with capacitively gated
induced negative resistance (TUD DES 13).

Measured Results Conclusions

On-wafer measurements of the circuits .(VCOs includ- In this paper, the detailed analysis was applied to the
ing tlie corresponding buffer amplifiers) were per- reflection-type VCO design technique with the aim to
formed employing the spectrum analyser HP8565E. increase the frequency bandwidth of oscillations. In
Figures 3 and 4 show measured curves of the oscilla- particular, the commonly used common-source ar-
tion frequency and the output power of buffered VCO rangement with capacitively induced negative rests*
realizations in comparison to each other, The summary tance and the common-drain arrangement were com-
of the measured performance can be found in Table L pared to each other.
Further, two practical oscillator realizations are pre-
TABLE! sented and their measured performance is discussed.
MEASUREB CHARACTERISTICS OF TTJE VCO'S MANU- Incorporating integrated planar PHEMT-diode tuning,
FACTURED the circuits provide frequency tuning in a wide fre-
quency range with almost 14% and 28% relative band-
DES 1.1 DES1.3 width, which are very good results for these kind of
Frequency Range //GHz 5.21-5.98 1 4.61-6.09
13.8 27.7
circuits.
Relative Bandwidth Af//fl/%
Output Power /V,/dBm 8.3-10.3 11.245.5
Acknowledgement
The measured results show that the oscillator based on
the common-source transistor with capaeitive feedback This work was supported by the ADAM OPEL AG,
achieves larger bandwidth of oscillations and higher Rüsselsheim, Germany.
values of the output power, On the other hand, the
power course of the common-drain oscillator is flatter.
References

[1] P. C. Wade, "Novel F.E.T, power oscillator,"

Electronics Lett., vol. 14, pp. 672-674, Aug.
1978,
[2] A. Sweet, MC&MMIC amplifier and oscillator
circuit design, Norwood, MA: Artech House,
1990.
[3] A, Megej, K, Betlenhoff, and H. L. Hartnagel,
"Conditions for broadband MM1C voltage-
controlled oscillators based on theory and ex-
periments," IEEE M7T-S Int. Microwave Symp.
Dig., May 2001.
Tuning Voltage, v^^/V

Fig, 3, Measured frequency of the manufactured volt-

age-controlled oscillators.

60
 SESSION V
NIGHT POSTER (and Cheese) SESSION
Monday May 28, 2001
Theoretical Investigation of Hot Electron Effects in InP-based HEMTs
A. Sleiman<a). L Ferrantfa), A. Di Carlo®, P. Lugli<a> and G. Zandler1®
(a)INFM and Dept. Electronic Eng., University of Rome "Tor Vergata",. Via di Tor
Vergata Rome, Italy
(b) Walter Schottky Institute and Physics Dept.JU-München, Germany
The significant differences of AI203 (0001) substrate nitridation by a nitrogen radio
frequency plasma source at high and low substrate temperatures
S. Mikroulif\ M. Zervos{a) V. Cimalla{a\ M. Androulidakfa), A. Kostopoulos®, Ph.
Komninou{b), M. Calamiotou{c' and A. Georgakilas{a)
(a) Microelectronics Research Group, FORTH - IESL and University of Crete - Physics
Department, P.O. Box 1527, 711 10 Heraklion-Crete, Greece
(b) Aristotle University of Thessaloniki, Physics Dept. GR-540 04 Thessaloniki, Greece
(c) 3University of Athens, Physics Department, 157 84 Zografos, Greece
Low temperature-grown Be-doped GaAs for ultrafast optoelectronic applications
S. Marcinkevicius®.J. Sieged10, A. Gaarde^, F. Garef\ K. Bertulis® and A. Krotkus(c)
(a) Department of Optics, Royal Institute of Technology, S-100 44 Stockholm, Sweden
(b) LAHC-University of Savoie, 73 376 Le Bourget du Lac Cedex, France
(c) Semiconductor Physics Institute, A. Gostauto 11, 2600 Vilnius, Lithuania
Properties of InAs/GaAs lasers grown by MOCVD - application to ridge-waveguide
geometry.
LKuna<a>. F. Uherek(ab>, J.Koväc(a'b>, A. Vincze(a-b>, JJakaboviö®, V.Gottschalch®
a) International Laser Centre, llkovicova 3, SK-812 19 Bratislava, Slovakia
b) Dept. of Microelectronics, Faculty of Electrical Engineering and Information
Technology, Slovak University of Technology, llkovicova 3, SK-812 19 Bratislava,
Slovakia
(b) Fakultät für Chemie und Physik, Universität Leipzig, Linnestr.3-5, D-04103 Leipzig,
Germany
Tunable Laser Diodes based on the Quantum Confined Stark Effect
N.Le Thomas®. N.T. Pelekanos<b>, Z.Hatzopoulos<b>, P. Gllef*, R. Hamelin(c>
(a) Departement de Recherche Fondamentale sur la Matiere Condensee, CEA/Grenoble,
38054 Grenoble Cedex 9, France
(b)Fondation for Research and Technology-Hellas, P.O. Box 1527, 71110 Heraklion,
Greece
(c) LETI/CEA-G-DOPT, 38054 Grenoble Cedex 9, France
Current Collapse in AIGaN/GaN HEMTs
A. Chini, F. Bruni, D. Buttari, G. Meneghesso, E. Zanoni
Universita' di Padova, DEI, and INFM-Padova, via Gradenigo 6/A, 35131 Padova, Italy
Monte Carlo simulation of short channel MOSFETs in 3C, 4H, and 6H-SIC
M. Youssef. M. Charef, and R. Fauquembergue.
Institut d'Electronique et de Microelectronique du Nord, UMR-C.N.R.S 8520,
Departement Hyperfrequences et Semiconducteurs (D.H.S) Universite des Sciences
et Technologie de Lille, Avenue Poincare, B.P. 69, 59652 Villeneuve d'ascq Cedex,
France
60GHz 420mW/mm Low Gate Current GalnAs/lnP Composite Channel HEMT on
InP substrate.
M. Boudrissa E Delos, X Wallaert, D. The~ron and J.C. De Jaeger
Institut d'Electronique et de Microelectronique du Nord (I.E.M.N.) - U.M.R-C.N.R.S 8520,
Departement Hyperfrequences et Semiconducteurs (D.H.S.) Universite des Sciences et
Technologies de Lille Avenue Poincare - BP 69 - 59652 Villeneuve d' Ascq

61
62
 Theoretical Investigation of Hot Electron Effects in InP-based HEMTs
A. Sleiman, L. Ferranti, A. Di Carlo, and P. Lugli
INFM and Dept. Electronic Engineering,
University of Rome "Tor Vergata", Rome, Italy

Günther Zandler
Walter Schottky Institute and Physics Dept.,
TU-München, Germany

InP-based high electron mobility transistors (InP-HEMTs) have demonstrated excellent

high-frequency and high-gain performance [1]. Low breakdown voltage due to hot electron
phenomena remains the important disadvantage which limit the power applications of
these HEMTs. In this work a proper device design to enhance the breakdown voltage of
InP-HEMTs have been theoreticaly investigated.

It has been demonstrated that under near breakdown condition accumulation of holes
generated by impact ionization takes place in the gate source channel region, and, in the
lower layer and substrate; these clouds of holes gives rise to an enhanced drain current
via a parasitic bipolar effect (PBE) [2].

In order to quench the breakdown effect and increase the range of the usable drain
voltage in InP-based lattice matched HEMT (InP-LMHEMT) the approach of a body
contact (BC) [3] has been adopted. In this communication a 0.25^m double heterojunction
InP-LMHEMT with a BC has been investigated by using a Monte Carlo simulator [2,3].

Figure 1 presents the schematic cross section of the InP-LMHEMT with body contact. The
BC is formed by an ohmic back contact which extend over the whole bottom of the device
and a heavily p-type doped substrate with acceptor density NA-

Figure 2 shows the l/V characteristics of the InP-LMHEMT obtained in off-state VGs=-2.0 V
and for various situations. The curve labeled without BC shows the current response for
the InP-LMHEMT without BC, i.e a LM-HEMT with an undoped InP substrate and without
the ohmic back contact. The drain current shows a quick increase and goes directly to
breakdown for VDS=4V. By considering the InP-LMHEMT with a BC NA=5x10 cm"
(dashed line) the breakdown voltage has been shifted towards higher voltage. Thus the
BC improves the behaviour of the drain current in near breakdown condition and prevents
holes from accumulating in the channel and lower layers, thus eliminating the PBE.

REFERENCES
Corresponding author. E-mail: ammar.sleiman@uniroma2.it

[1] L. D. Nguyen. Proc. IEEE. vol. 80, pp. 494-518, 1992

[2] A. Di Carlo et. al. IEEE El. Dev. Lett. April 2000;
[3] A. Sleiman, A. Di Carlo, L. Tocca, P. Lugli et al. Semicond. sei. Technol. In press.
[4] A. Sleiman, A. Di Carlo, P. Lugli, and G. Zandler. lEEE.Trans. El. Dev. In press.

63
 InGaAs 240 nm 240 nm Cap Layer
120 nm 0.25 pm 3.5x10 cm
Si 8 dop
ln52AIAs undoped 25 nm 12 -2
5.10 cm.

ln52AIAs 4nm Spacer

ln53GaAs 40 nm Channel

lnS2AIAs 500 nm

InP Substrate p-type doped, NA

mm MWi.^Jilll^lin^MBIUMOIIiMM'P'Hyjyi^

llHSiE_!.__ _ _
m
Figure 1. Schematic cross-section of the lattice matched HEMT with body contact (BC).
The BC is formed by a highly p-type doped substrate connected to an ohmic back contact.

1500

Without BC
1200 With BC

E
E 900

£
600

300

Figure 2. Simulated InP-LM-HEMT characteristics obtained in off-state

condition (VGs=-2.0V). Without BC (continuous line)
the drain current goes directly to breakdown at VDS=4 V. With BC (dashed line), the
breakdown voltage is shifted from 4V to 5V.

64
The significant differences of A1203 (0001) substrate nitridation by a nitrogen radio
frequency plasma source at high and low substrate temperatures

S. Mikroulis1, M. Zervos1, V. Cimalla1, M. Androulidaki1, A. Kostopoulos1, Ph.

Komninou2, Th. Karakostas2, M. Calamiotou3 and A. Georgakilas1*

'Microelectronics Research Group (MRG), FORTH - IESL and University of Crete -

Physics Department, P.O. Box 1527, 71110 Heraklion-Crete, Greece
2
Aristotle University of Thessaloniki, Physics Department, GR-540 04 Thessaloniki,
Greece
3
University ofAthens, Physics Department, 157 84 Zografos, Greece

The sapphire nitridation is a very critical step in the epitaxial growth of GaN by all
growth methods. The nitridation of the (0001) A1203 surface by a N2 rf-plasma source
(HD25 of O.A.R.) used in GaN Molecular Beam Epitaxy has been investigated. Our
experiments aimed to clarify the effects of three parameters of the sapphire nitridation
treatment: (1) the ex-situ chemical preparation of sapphire, (2) the substrate temperature
during nitridation and (3) the intensity of the nitrogen plasma beam. Significant
nitridation occurred during 100min at a high temperature (HT), in the range of 550-
800°C, and the nitridated layers usually exhibited three-dimensional islands, while weak
nitridation occurred at a low temperature (LT) of 150°C and resulted to atomically flat
surfaces. Linear time dependence has been found for the HT nitridation and the nitridated
sapphire thickness extended to a region of approximately 1.5 nm, according to high
resolution electron microscopy (HREM) observations. However, a higher strain
relaxation was generally observed (by RHEED) for LT nitridation, although in one case
no relaxation was observed. Sapphire etching in a HF solution (before substrate
nitridation) created oxygen vacancies and increased the nitridation effect of the high
substrate temperature. Finally, the structure of the nitridated surface controlled the
polarity of overgrown GaN layers when a GaN nucleation layer was used. High
nitridation temperature resulted to Ga-face and low temperature to N-face polarities of
overgrown GaN films. The N-face material exhibited very good crystalline quality, while
high defect densities characterized the Ga-face GaN. HREM revealed the occurrence of
cubic pockets near the GaN/Al203 interface for the N-face material. The N-face layers
also exhibited higher photoluminescence intensities and shorter linewidths at 15K and
300K. An electron background concentration in the low 1016 cm"3 range and mobility
above 200 cm2/V.sec were determined for the N-face material by 300K Hall effect
measurements, while the Ga-face layers exhibited very high resistivity values.
Acknowledgements: This work has been supported by GSRT, through 99EA 320
project.

* Presenting author: A. Georgakilas. E-mail: alexandr@physics.uoc.gr

65
 Figure 2. Cross-section HRTEM images viewed
along <ll-20> GaN axis, a) LT nitridation
specimen: The sharp GaN/Ab03 interface,
depicted by the arrow, and "cubic pockets" in the
GaN nucleation layer are shown, b) HT nitridation
Figure 1. AFM photographs for (a) as-grown
specimen: an extended interfacial zone (1.5nm)
N-face GaN, (b) N-face GaN after etching in
between GaN nucleation layer and substrate is
KOH solution, (c) as-grown Ga-face GaN,
visible. The arrows indicate IDBs bounding a
(d) Ga-face GaN after etching in KOH
domain of inversed polarity.
solution.

Aluminum Nitrogen Figure 3. AES measurements on samples with

high nitridation temperature (#3, #4) and with low
nitridation temperature (#1,#2). Samples #1, #3
s
were etched in HF/H20 before nitridation
w
Z experiment while #2, #4 were degreased using
T3
w,««*^ organic solvents. The N(KLL) peak was only
observed for HT nitridation (samples #3, #4) and
was more intense in the sample with HF/H2O
Energy [180-1430eV]
preparation (sample #3).

66
 Low temperature-grown Be-doped GaAs for ultrafast optoelectronic
applications

S. Marcinkevicius,3 J. Siegert,8 A. Gaarder,3 F. Garet,b K. Bertulisc and A. Krotkusc

a Department ofMicroelectronics and Information Technology, Section Optics, Royal Institute of Technology,
S-100 44 Stockholm, Sweden
b LAHC-University ofSavoie, 73 376 Le Bourget du Lac Cedex, France
c Semiconductor Physics Institute, A. Gostauto 11, 2600 Vilnius, Lithuania

Development of computing and telecommunications necessitates continuously increasing

rates of data transmission. Future optical transmission systems, operating in the Tbit/s range,
will require all-optical devices and optoelectronic devices with picosecond and
subpicosecond response times. Besides, ultrafast semiconductor devices are also of interest
for many other applications, such as emission and detection of THz radiation, triggering of
high-speed electronics and characterization of high frequency microelectronics circuits.
Implementation of ultrafast optoelectronic devices imposes requirements on materials from
which the ultrafast optoelectronic components are fabricated. These requirements include:
ultrashort carrier trapping and recombination times, high carrier mobility, high dark
resistivity, good optical quality and high breakdown electrical field.
GaAs grown by molecular beam epitaxy at low temperature (LT) (200 - 300 °C) has
been shown to meet these needs.1 During the LT growth, about one percent of excess As is
incorporated into the material. The excess As mainly forms antisite defects, AsGa, situated in
the middle of the band gap. Ionised antisite defects act as carrier trapping and recombination
centres. A post growth annealing at high temperature (600 °C or more) induces precipitation
of part of the excess As improving quality of the layers and making them semi-insulating.
Further improvement of the LT-GaAs properties is achieved by doping the semiconductor
with beryllium.2 Beryllium, being a shallow acceptor in GaAs, ionises antisite defects and
increases the number of active traps. Be incorporation also reduces the number of
nonstoichiometry-related point defects in a LTG layer and improves its crystalline quality.
The goal of the LT-grown material engineering is to control the resistivity and the
trapping time by a fine adjustment of defect compensation ratio. In the present work we make
an attempt to find optimal parameters of Be-doped LTG GaAs by investigating carrier
trapping and recombination over a wide Be-concentration and annealing temperature range.
Here we should note that the carrier trapping time determines the response time of a device
while the recombination time establishes the time in which the device returns to its initial
state.
Carrier trapping times were measured by a time-resolved photoluminescence (PL) using
up-conversion set-up, which is based on a self mode-locking Ti:sapphire laser (80 fs, 95
MHz, 780 nm). Electrons, photoexcited with a short laser pulse, are trapped to the ionised
antisite defects at a rate which is much higher than the rate of the radiative recombination.
The decay of the PL signal reflects the rate of the electron trapping.
Fig. 1 shows PL transients for Be-doped (3><1017 cm"3) LT-GaAs samples annealed at
different temperatures. The carrier trapping rate decreases with increasing anneal temperature
demonstrating a decrease of the number of active electron traps because of As precipitation,
which is more effective at high temperatures. The dependence of the electron trapping time
on the anneal temperature becomes much weaker for higher Be concentrations (Fig. 2).

67
This can be understood taking into 10004
account that Be makes precipitation of
excess As less efficient. The overall
decrease of the trapping time with
increased Be-doping is determined by a
larger number of electron traps,
activated by Be-doping.
The trapped electrons stay in the
trapping levels until they recombine
with a photoexcited hole. To monitor
4 6 8 10 12 14
this hole trapping time, or Delay time [ps]
recombination time, we performed a Fig. 1. Photoluminescence transients for the LT-GaAs
two-colour pump-probe experiment Be-doped samples.
using an amplified Ti: sapphire laser
system and two optical parametric
generators. In the experiment, the pulse -//-
of 650 nm excites electrons from the -•-"A" ([Be]=3x10' 'cnrT
valence band and the neutral traps into -■-"B"([Be]=5x10*W)
-A-"C"([Be]=2x101!'crrf1)
the conduction band. The photoexcited
Q.
electrons are quickly captured to the
trap levels. The probe pulse has a
wavelength lower than the GaAs band CD

gap, 1460 nm, and a much lower Q

intensity. The changes in transmission
of the probe pulse are determined by
transitions of the trapped electrons into
0 450 500 550 600 650 700 750 800
the conduction band. When the trapped
Annealing temperature [°C]
electrons recombine with the
photoexcited holes, the transmission for Fig. 2. Photoluminescence decay times for different Be
the probe pulse returns to its initial concentrations and annealing temperatures.
level. The decay time of the induced
absorption provides the hole trapping
time. -
;\ [Be] = 1.6x1018
The dynamics of the induced absorption i \ annealed at 650 °C
for a sample with 1.6xl018 cm"3 Be is
c
shown on Fig. 3. The absorption decay o \ t = 4.1 ps

v^__
time is 4.1 ps. A similar decay time of 5 e-
o
m
ps is also observed for a sample with Be
<
concentration of 2.5><1017 cm-3.
Though this value is larger than the in&xd.-
electron trapping times, it shows that
10 20 30
Be-doped LT-GaAs has a potential to
be used in devices operating in a 100 Time, ps
GHz range. Fig. 3. Time-resolved absorption for LT-GaAs sample
with 1.6 xlO18 cm"3 Be.

1. see for example S. Gupta et al, IEEE J. Quantum Electron. 28, 2464 (1992).
2. P. Specht et al, J. Vac. Sei. Technol B17,1200 (1999).

68
 Properties of InAs/GaAs lasers grown by MOCVD application to ridge-
waveguide geometry.

L.Kuna1'*, F. Uherek1'2, J.Kovac1'2, A. Vincze1'2, JJakabovic2, V.Gottschalch3

1) International Laser Centre, Ilkovicova 3, SK-812 19 Bratislava, Slovakia

2) Dept. of Microelectronics, Faculty of Electrical Engineering and Information Technology, Slovak
University of Technology, Ilkovicova 3, SK-812 19 Bratislava, Slovakia
3) Fakultät für Chemie und Physik, Universität Leipzig, Linn6str.3-5, D-04103 Leipzig, Germany

*Phone: +421 7 654 21 575, fax: +421 7 654 23 244, e-mail: lacok(%ilc.sk

Index terms: semiconductor InAs/GaAs lasers, ridge-waveguide geometry

INTRODUCTION
In the recent work [1], we have reported on the investigation of InAs/GaAs monolayer quantum
wells and short period superlattice (SPS) structures in the light of laser action. The experimental studies
of oxide-insulated stripe geometry lasers have shown that the carrier collection is more efficient in SPS
structure placed in the middle of the active region.
It is well known that the oxide-stripe geometry leads to the rapid increased in threshold current
density as the stripe width is decreased due to lateral current spreading particularly when the sheet
resistance of top cap and cladding layer is < 2000 Ü [2]. To avoid this effect and to maintain lateral
mode stability, it is important to confine the carriers and optical field in direction parallel to
p-n junction plane. The above ideas are implemented in the ridge-waveguide geometry laser.

FABRICATION
Our laser structures were grown by MOCVD on n-doped (001) oriented GaAs substrate. Lasers,
as shown in the schematic in Fig. 1, consist of active region sandwiched between n-Alo.35Gao.65As
Si doped 1300 nm thick and p-Alo.35Gao.e5As Zn doped 550 nm thick cladding layers. To provide good
electrical contact with the metallic electrode, 5 nm
a highly doped p+-GaAs top capping layer eiai nuoc
15 nm thick is used. The active region o2
consisting of 9x1 ML InAs separated by ^^k P" -GaAs
9x2.5 nm GaAs barrier layers and completed - Al035 Ga^As
undoped GaAs »35 nm thick layers from \ ly
both sides. The growth details of these Rssmi ra*fi ■■■■-mnzmi — InAs/GaAs SPS
structures are described in [1]. — n - AL,.35 Ga„i7jAs
To produce ridge width of 5 |un,
a standard photolithography and wet
chemical etching is employed. Here, etching
— n - GaAs substrate
is stopped at « 50-100 nm above the active
region forming the ridge. Finally, the — metal AuGeNi
samples are cleaved into » 290 urn length,
and mounted substrate-side down onto base. Fig ; A cross.section 0f ridge-waveguide
InAs/GaAs short-period superlattice laser.

EXPERIMENTAL RESULTS
All lasers are measured under pulse regime with duty-cycle 1% to avoid effects from excessive
resistive heating. Samples are investigated in detail by performing the light versus current (L-I)
characteristics, spectral characteristics and near-field pattern measurements.
Fig. 2 shows typical L-I characteristic of a 5 urn ridge width fabricated laser at room temperature.
The threshold current is typically from 50 mA to 80 mA. It is clearly seen that the laser shows a linear
dependence of the optical power output on the pumping current without kinks. This behaviour is
believed to reflect a fundamental mode operation. It is confirmed by measurements of near-field
intensity distributions at various pumping current levels as can be seen in Fig. 3. It is obvious that the
near-field patterns are unchanged for various current operations.

69
 5 1 = 90 mA
I= 80 mA 5 ^m T = 300 K

I-
250- I« 90mA
1= 100 mA ^
1= 110 mA I \
o
S 4-
"J 200- / \
Ä
0)
o.
B J-
0 0
P" 2
-j-j—A^JJULi^LJLA__.
623 S24 635

wavelength [nm]
0 r\/-■
&
•m 150-
O
c
/
/
\
\

O c / ,' 1 \

it' *\M
T = 300 K m 100-
0
O a. / '' •''"• \
0 1' " '\
50-
0 s~ /'/ V\
Q. -";*:;:'.- --.:V*
0 0- —'—I—1—1—'—1—>—r-i—1—r—1—■—1—-—1 ,
30 40 50 60 70 80 90 100 110 120 130 distance
current [mA]

Fzg. 2. Pulsed light versus current (L-I) Fig. 3. Near-field patterns of a 5 \m width
characteristic of a 5 \im width ridge- ridge-waveguide InAs/GaAs laser for various
waveguide InAs/GaAs laser along with its pump currents.
spectrum measured at pumping current
of 90 mA.

In view of longitudinal mode behaviour, lasers exhibit the multi-longitudinal mode structure as can be
seen in connection with figure embedded into Fig. 2. The wavelength peak is observed at 924 nm. To
determine a characteristic temperature T0, the L-I characteristics of laser with a lower threshold current
are measured at various temperatures. As a result, T0 of 113 K is specified. Another examined
operating characteristic is the external differential quantum efficiency that is 18.6 percent at room
temperature.

CONCLUSION
In summary, we fabricated the ridge-waveguide InAs/GaAs lasers having the ridge width
of 5 (jm. In comparison with the oxide-stripe geometry lasers so fabricated, the ridge-waveguide
geometry lasers show the reduction of total threshold current density, as expected. In addition, stable
zero-order mode up to about two times threshold is obtained.

ACKNOWLEDGEMENT
This work is supported by VEGA grants No. 1/7600/20, No. 1/7653/20 and
German/Slovak/MLC international project of Slovak Ministry of Education.

REFERENCES:
[1] J. Kovac, L.Kuna, V. Gottschalk, G. Benndorf, M. Gerhard, D. Pudis, J. Jakabovic, J. Skriniarova,
"MOVPE growth and characterization of InAs/GaAs monolayer active region for laser structures",
Proceedings 8th European Workshop on MOVPE and related growth techniques 1999, pp. 409-412,
Praha
[2] W. T. Tsang, "The effect of lateral current spreading, carrier-out diffusion, and optical mode losses
on the threshold current density of GaAs-AlGaAs stripe geometry DH lasers", J. Appl. Phys. 49
(3),pp.l031-1044, 1978

70
 Tunable Laser Diodes based on the Quantum Confined
1
Stark
2
Effect 2 3 3
N.Le Thomas , N.T. Pelekanos , Z.Hatzopoulos , P. Gilet , R. Hamelin

'Döpartement de Recherche Fondamentale sur la Matiere Condensee, CEA/Grenoble, 38054 Grenoble Cedex 9,
France
2
Fondation for Research and Technology-Hellas, P.O. Box 1527, 71110 Heraklion, Greece
3
LETI/CEA-G-DOPT, 38054 Grenoble Cedex 9, France

Wavelength-tunable laser diodes (LDs) are very much in demand in upcoming

technologies such as optical telecommunications and optical interconnects. Recently [1], we
proposed and presented a proof-of-principle demonstration of an optically pumped tunable
laser device based on the quantum-confined Stark effect (QCSE). Such a device is compact,
requires single current control, and can exhibit wavelength-switching times below Ins. As a
next step, we undertook the realisation of an electrically pumped LD device based on the
same principle where appropriate band gap engineering intends to create a space charge field
on the active quantum well (AQW) during lasing.

In Figure 1, we show a schematic band diagram of the active region we propose. It

consists of three quantum wells (QWs) separated by two tunneling barriers. The central QW
is the AQW one whose lowest transition is the ground state of the whole structure. The outer
QWs are the collection QWs (CQWs), whose role is to collect the carriers that generate the
space-charge field. To assure efficient carrier injection in the AQW it is essential to keep the
barriers sufficiently thin to allow for carrier tunneling from the CQWs into the AQW. For
electrical injection, the active region is incorporated in the intrinsic region of a p-i-n diode.
The CQWs create a transient excess of electrons and holes on either side of the AQW, before
the carriers end up by tunneling in the AQW to participate in the lasing. The resulting space-
charge field acts on the AQW by the QCSE and tunes the emission wavelength AL with
increasing injection current, the space-charge field increases and XL redshifts further.

InGaAs/AlGaAs triple quantum well structures have been grown on GaAs substrate by
gas source molecular beam epitaxy with the triple quantum well at the centre of the intrinsic
region of a p-i-n diode structure. The tunneling barriers and cladding consisted of
Alo.3Gao.7As, the CQW and AQW of Ino.1Gao.9As, and the separate confinement region of
Alo.2Gao.8As. This structure was processed in broad mesa of 75um width and cavities of 1mm
length were cleaved.

Shown in figure 2 are the edge-detected spectra recorded at 100K with increasing
injected current density, between the lasing threshold 107A/cm2 and 2667A/cm2. To avoid
heating effects, injection current is pulsed at 1kHz with pulse widths 5us. We observe a clear
redshift of AL as the current is increased, that we attribute to the space-charge field created by
a small fraction of the injected carriers. Red-shifts of AL of up to 5nm in the 900nm spectral
region have been recorded at this preliminary stage.

71
 Tunneling Barrier Tunneling Barrier

n-side

CB >
u
K,
+
fLT^
Collection QW
p-side

Collection QW
Active QW
O p-side

Figure 1: Schematic illustration of the energy-band diagram for the tunable QCSE laser diode, without and with
electric field acting on the active quantum well.

910,0-,
I
909,5- NI M.I
I I I
.II _
909,0- -■- Hericr spectra ve^ength
,-■'

-♦-sMMiorspectreiwaden^ri
908,5- /
-Ä- rreenspectral waelergth
903,0-
''
,» 4
5nm
,' ,*- -'
/
-t
/ %'
C
i-
0>
0)
nnec
a'
I- J_

> / ft ■-■
r*v:r\
/ /
5 ev\A c
i
' I-
. -■— -»— -"•
L
■ '- -

904,0- W „■- *
f
903,5- ■-■
903,0-
0 500 1500 2030 250O
904O 9060 9080
Curert density [Nanf\
W avelength [A]

Figure 2: Edge emission spectra of the laser diode above threshold at 100K for various injected pulsed current
density

References
[1] V. Ortiz, N.T. Pelekanos, Guido Mula, Le Si Dang, Appl. Phys. Lett. 77, 788 (2000)

Corresponding author: Nicolas Le Thomas, Departement de Recherche Fondamentale sur la

Matiere Condensee, CEA/Grenoble, 38054 Grenoble Cedex 9, France
phone: +33 476 883 677, Fax: +33 476 885 197
email: lethomas@ drfmc.ceng.cea.fr

72
 Current Collapse in GaN HEMTs
A. Chini, F. Bruni, D. Buttari, G. Meneghesso, E. Zanoni
University ofPadova, DEI, Via Gradenigo 6/A 35131 Padova, and INFM-Padova, ITALY
tel. +39-049-8277738,fax: +39-049-8277699, e-mail: alfalfa@dei.unipd.it

Abstract— Results related to electrical instabilities in AlGaN/GaN II. CURRENT COLLAPSE IN OUTPUT CHARACTERISTICS
HEMTs will be presented. We have observed a large drain current and
Electrical instabilities related to a large drain current decrease
transconductance collapse, after the devices are biased in the dark at
have been observed in the tested devices. The drain "current
high VDs; end-resistance measurements and measurements with inverted
collapse" takes place by keeping biased the device in satura-
source and drain confirm that trapping occurs in the gate-drain access re-
gion, giving rise to an increase in the parasitic drain series resistance.
tion region, or simply by repeating test measurements. The col-
lapse can be recovered by illuminating the device with white
light. In figure 2, we consider the ID(VDS) measure up to 15
I. INTRODUCTION V with VGS=0 V: the measure with light is followed by ten re-
peated measurements in the dark. A drain current reduction is
GAN-BASED heterostructure field effect transistor are of
observed suggesting the presence of trapping effects. The "cur-
great interest for high-power and high-frequency applica-
rent collapse" is observed only in linear region, while it is almost
tions [1]. Although excellent electric characteristics have been
achieved, the reproducibility and reliability of these devices absent in saturation.
To explain this fact, we suppose that trapping phenomena
are seriously affected by the presence of trapping phenomena
takes place in the high-field gate-drain access region. Trapping
[2,3,4]. of electrons in the surface cause an increase of the drain series
AlGaN/GaN HEMTs tested (see fig. 1) were grown by resistance. Consequently at low VDS we note a decrease of the
MOCVD on sapphire substrate. These devices present a gate output characteristics slope, see Fig.3A . To confirm that the
width of 150/im, a gate-drain spacing of 0.5/xm, a gate-source trapped charge is in the gate-drain access region, we measured
spacing of 0.7/um, and a gate length of 0.5/xm. the devices by swapping source and drain; in figure 3B are de-
picted the Is vs VSD characteristics before and after a stress (in
Source Gate
Drain the dark) at high VDS- After the applied bias stress, the Is curve
presents the current collapse both in the linear and saturation
UID-AIGaN CAP region.
Si doped AIGaN DONOR
before the stress
UID-AIGaN SPACER
UID-GaN CHANNEL
-GaN BUFFER
Nucleation Layer after the stress V
(VDS==15V,VG8=0V)
Sapphire Substrate

Fig. 1. Schematic cross-section of the tested GaN HEMTs.

_, 1 1 1 1 1 h-
2 4 6 8 10
Drain-Source Voltage (V)

60 _^*—■ with light

before the stress
pi
3-50-
E
~40-
2
■ 1 2</iiä
^N^5^ first ten measurements
VGD = 0V

5 30 \/m™ in the dark after the stress 2'

(VDS-15V,VGS-0V)
120
o VGS=0V
10

0- t , 1 r- 1 1 1 , 1 ,
2 4 6 8 10
3 6 9 12 15
Source-Drain Voltage (V)
Drain-Source Voltage (V)

Fig. 2. Output characteristics (VGs=0 V) with light and first ten measure- Fig. 3. (A) ID VS VDS with VGs=0 V and (B) Is vs VSD with VGD=0 V
ments in the dark. Repeated measurements in the dark cause current col- before and after the stress. Stress conditions: 2 minutes at VGS = ov,
lapse. The I-V characteristics present negative differential resistance due to VDS = 15V
self-heating.
73
 III. END-RESISTANCE, AND TRASCONDUCTANCE [4] S. C. Binari et al, "Trapping Effects and Microwave Power Performance
MEASUREMENTS in AlGaN/GaN HEMTs", IEEE Trans. Electron Devices, vol. 48, pp. 560-
566, March 2001.
End-resistance measurements have been carried out before
14 16
and after a bias-stress (in the dark) with high VDS- The source STRESS r
resistance do not change after this test, while a large increase in ,-.12 VDS = 15 V
^v J^ 12"
the drain one takes place, see table I. This results supports the £10 VGS = 0V

idea that trapping phenomena occurs in the gate-drain access 8 ■

region. Moreover, the illumination (3 minutes) after the stress

detraps electrons and consequently the drain resistance recover fX\ VDS = 0.5V
S 4 /
the initial values.
TABLE I JJt, —i 1 1 1 i " —-

DRAIN AND SOURCE END-RESISTANCE BEFORE, AFTER THE STRESS AND -3-2-1 0 1
AFTER THE SUBSEQUENT ILLUMINATION (3 MINUTES). THE STRESS BIAS Drain-Source Voltage (V)
— before the stress — alter the stress
HAS VDS = 15 V, VGS=0V, DURATION 2 MINUTES.
-■- after the stress and light (31)
before after after
Fig. 4. ID vs VGS in linear region, after, before the stress and after the subse-
the stress the stress illumination quent illumination: the first and the third curve are superimposed.
R-DRAIN(^) 21.4 52.1 23.7
R-SOURCE(fi) 10.6 11.3 10.6
~—~
oO 30
STRESS 1'
To gather more information, we carried out also measure- ~ 50 " VDS = 15 V 25 |
ments as a function of VGS at different device status. Figure E
~40 . VGS = 0V 20 g
4 shows the ID and gm vs VGS characteristics before and after 1 c m
| 30 15l
minute of stress at VDS = 15V", VGS = 0V. A large decrease in u ■o
c
both ID and gm is observed, furthermore it can also be noticed a c 20 -10 o
' / VDS = 15 V - CO
slight threshold voltage shift. A subsequent illumination (3 min- °10 5 2
utes) allows the recovery of the initial electrical characteristics, i-
as shown in Fig. 4 (the line before stress and after stress and
-3 -2 -1 0
light (3') are superimposed). Drain-Source Voltage (V)
In Fig. 5 we note that ID and gm vs VQS, with VDS in satu- — before the stress — after the stress
ration region, do not exhibit any change after the applied bias- --- alter the stress and light (3')
stress. The ID and gm collapse in linear region and the absence Fig. 5. ID VS VQS measure with Vbs=15 V, after, before the stress and af-
of collapse in saturation suggest that trapping effects give rise to ter the subsequent illumination: after the stress the drain current and the
an increase of the drain series resistance. transconductance do not exhibit any change. This confirm that the "current
Figure 6 shows the normalized collapse of the gm peak value collapse" is negligible at high Vns, when the device is in the saturation
region.
observed in different stress condition (filled symbols). After il-
lumination a complete recovery can be observed (open symbol
in fig. 6). The "collapse" increases with increasing VDS up to
after the stress and light (3')
about 10V, and after it saturate.
STRESS 1
IV. CONCLUSIONS
VGS =-IV
In conclusion, we have studied the "current collapse" ob- VDS : OV -» 25V, 2.5 V/step
served in GaN-based HEMTs and it has been associated to the
presence of trapping phenomena in the gate drain access region.
This phenomena give rise to an increase in the parasitic drain
series resistance, and to a decrease of the trasconductance peak
values measured in the linear region. Finally, it has been ob- 0 5 10 15 20 25
served that the "current collapse" can be completely recovered Drain-Source Voltage of the stress (V)
by illuminating the device by white light.
Fig. 6. Maximum of gm (with VDs=0.5 V) after the stress and after the subse-
quent illumination, normalized to the value before the stress.
V. ACKNOWLEDGMENTS
This work was partially supported by MURST and PF CNR
MADESS II.
REFERENCES
[1] R. J. Trew, "Wide bandgap semiconductor transistors for microwave power
amplifiers", IEEE Microwave Magazine, vol. 1 (1), March 2000, pp.46-54
[2] G. Meneghesso et al.,"Diagnosis of trapping phenomena in GaN MES-
FETs", International Electron Devices Meeting (IEDM) 2000, San Fran-
cisco CA, December 10-13, 2000.
[3] R. Vetury et al., "The Impact of Surface States on the DC and RF Char-
acteristics of AlGaN/GaN HFETs", IEEE Trans. Electron Devices, vol.48,
pp. 560-566, March 2001.
74
 Monte Carlo simulation of short channel MOSFETs in 3C, 4H, and 6H-SiC

M. YOUSSEF, M. CHAREF and R. FAUQUEMBERGUE

Institut d'Electronique et de Microelectronique du Nord, UMR-C.N.R.S 8520

Departement Hyperfrequences et Semiconducteurs (D.H.S)
Universite des Sciences et Technologie de Lille
Avenue Poincare, B.P. 69, 59652 Villeneuve d'ascq Cedex, France
E-mail: mahmoud@sylvie.iemn.univ-IiIlel.fr
charef@ iemn.univ-lillel.fr

Silicon carbide (SiC) is a very interesting semiconductor material for high temperature, high
frequency, and high power applications. The main reasons are its high saturation velocity, large
thermal conductivity, high Schottky barriers, and high breakdown voltages

Short channel MOSFETs in 3C, 4H, and 6H-SiC are studied by using two-dimensional
numerical simulations by the Monte Carlo method to investigate high frequency performances.
Scattering mechanisms considered in our model are acoustic-deformation-potential scattering, polar
optical phonon scattering, intervalley phonon scattering processes, ionized-impurity scattering and
impact ionization. Our electron transport results (velocity-electric field characteristics, mobility) in
3C, 4H and 6H-SiC bulk materials compared to experimental data [l] and to Monte Carlo
simulations in the literature [2,3,4] gives a good agreement.

The simulated structure sketched in figure 1, has a gate oxide thickness of 45 A, a junction
depth of 0.1 urn. The source-drain extension [5] of length 0.1 urn have a Gaussien doping profile
with maximum concentration at a projected range of 100 A°, a parallel standard deviation and a
transverse standard deviation range close to 800 A° and 400 A° respectively. The channel doping
profile is also Gaussien. The doping level is 1019 cm"3 for the heavily doped region. A uniform
substrate doping concentration of 10 cm"3. For the surface scattering at the interface SiC/Si02, the
electrons are scattered according to a specular model, where the normal component of the
movement is reversed and the components parallel to the interface are maintained. In our model, we
assume no charges on the oxide/semiconductor interface and in the oxide. We are using a
coordinate system, where the y direction (figure 1) is parallel to the c-axis (4H and 6H-SiC).

For a gate length of 0.15 urn, the three ploytypes 3C, 4H and 6H-SiC are compared
regarding transconductance Gm, cut-off frequency Fc. The simulated results are shown in figures 2
and 3. The drain-source voltage Vds is 5 V. The results (figure 3) of these calculations show that the
maximum Fc for 3C, 4H and 6H-SiC are 190 GHz, 175 GHz and 150 GHz respectively. The
significantly lower Fc in 6H-SiC is a direct result of the lower electron mobility and to the higher
anisotropy for this material

To get a comparison with silicon, we have made 2D Monte Carlo simulations in silicon for
the same structure described above. The maximum cut-off frequencies versus gate length are plotted
(figure 4) for Si and 3C-SiC. The drain-source voltage is 2 V for Si and 5 V for 3C-SiC. These
results indicate that 3C-SiC MOSFETs could achieve better cut-off frequencies than Si MOSFETs (
a factor close to 1.5) with higher power densities. This is due to the higher saturation velocity
(2xl05 m/s) in 3C-SiC than in silicon (lxlO5 m/s). The simulation results show that SiC MOSFETs
are very promising for high power and high frequency operations.

75
 500
Lg=0.15 |im
Source Electrode
Drain

—e—3C-SiC
~ -a— 4H-SiC
-0-6H-S1C
iiiiiiiiiiiiniiii.il 11 ■ 1111

0 0.5 1 1.5 2 2.5 3 3.5 4

Vgs (V)

Fig. 1: Schematic cross section showing Fig. 2 : Transconductance versus gate-source

simulated device structure. voltage for 3C, 4H and 6H-SiC MOSFETs.
(Lg=0.15fim, Vds=5V).
200 ouu
Lg=0.15 pm
•
—-A—- Si
^400 --•--3C-SiC
X . \
0 - \
-300 -
A ^%
LL _ » v

| 200 - ''A.. X N
»
«— 3C-SIC E -

3 a— 4H-SiC w 100 _ "*-A

u o - 6H-S5C -
' 1 ' ■ ■' I ■ ■ ■■ I i i i i 1 i i i n ■ i i i i i i 1 i. J..1...1 i i i i i 1 i i i i i i i i i

0 0.5 1 1.5 2 2.5 3 3.5 4 0.05 0.1 0.15 0.2

Vgs (V) Lg (Mm)
Fig. 3 : Cut-off frequency versus gate-source Fig. 4 : Maximum Cut-off frequency versus
voltage for 3C, 4H and 6H-SIC MOSFETs. gate length for 3C-SiC and Si MOSFETs.
(Lg=0.15fim, Vds=5V).

References
1
1. A. Khan and J. A. Cooper, Jr., IEEE Transactions on Electron Devices, Vol. 47, No. 2, pp. 269-273 (2000).
2
K. Tsukioka, D. Vasileska and D.K. Ferry, Physica B 185,466 (1993).
3
H.-E. Nilsson, U. Sannemo and C. S. Petersson, J. Appl. Phys. 80, 3365 (1996).
4
R. Mickevicius and J. H. Zhao, J. Appl. Phys. 83, 3161 (1998).
5
M. Charef, F. Dessene, J. L. Thobel, L. Baudry and R. Fauquembergue, ESSDERC'93, Proceedings of the 23ri
European Solid State Device Research Conference, 628 (1993).

76
 60GHz 420mW/mm Low Gate Current GalnAs/InP Composite Channel
HEMT on InP substrate.
M. Boudrissa E Delos, X Wallaert, D. Theron and J.C. De Jaeger
Institut d'Electronique et de Microelectronique du Nord (I.E.M.N.) - U.M.R-C.N.R.S 8520
Departement Hyperfrequences et Semiconducteurs (D.H.S.)
Universite des Sciences et Technologies de Lille
Avenue Poincare - BP 69 - 59652 Villeneuve d' Ascq
ISi; mustafa.boudrissa@iemn.univ-lillel.fr
Power performances have been improved by studying different GalnAs/InP composite channel
structure (figure 1) and by processing different drain extension devices. By using composite channel
devices, we benefit from a better ionization threshold energy of the subchannel InP compared to the
only GalnAs channel (1.69eV against 0.92eV). The difference of conduction band offset between the
two materials (AEc=0.2eV) makes possible the electrons transfer from GalnAs to InP layer with the
same electronic properties instead of increasing their energy and ionizing in GalnAs channel [1-5]. The
main advantage is to reduce drastically the gate current issued from impact ionization. New process
technology have been applied to compare these structures [6-7].
The components exhibit a drain current IDS of 750mA/mm at VGS=+0V. The typical extrinsic
transconductance is 600mA/mm. The Schottky characteristic in reverse gate to drain diode is -8V. The
S-parameters are extracted from 1 to 40GHz. The cut-off frequency FT is 120GHz and the maximum
oscillation frequency FMAXis 300GHz obtained with a 0.15um gate length. Table 1 show sheet density
carrier, mobility and square resistance of epitaxies The gate current resulting from the impact
ionization phenomena (figure 2 and figure 3) was measured. It have been shown that the structure B
and C present a better gate current issued from impact ionization. It is lower to 40uA at VDS=4.5V
(figure 2) for a large extension device which constitute the better result among the three structures. So,
structures without second delta doping exhibit lower gate current. Figure 3 show the gate current
characteristic for three different drain extensions at VDs=3V for the structure C. Similar behavior have
been obtained with other epitaxies. At pinch-off, we show the current issued from tunneling effects. It
is very small because we have a large diode breakdown voltage whereas at open channel, we see
impact ionization current. In addition, the devices can not be biased over VDs=5V without main risk of
irreversible damage due to a large impact ionization in the channel. The lower impact ionization current
for large extension implies that we have a decrease of electric field peaks which become spread into the
structure. At low field, the GalnAs layer assume the conduction into the channel. At the exit of the gate
at pinch-off and at the edge of the area recess beside drain where the electric fields are greater, the
GalnAs and the InP undoped are depleted completely. A population of electron stay in the InP doped so
that is the interest of this structure which allow to reach high values of VDs with a lower gate current
and to obtain a great electron mobility in the channel and in access area. The devices have no kink
phenomena in their characteristics due to the low impact ionization in the InP channel. Also, we
improve power performances at 60GHz by reducing GalnAs channel and substitute the delta doping by
a bulk doping. Large extension devices generated 306mW/mm (structure A), 422mW/mm (structure E)
(figure 4) and 385mW/mm (structure Q at VDS=3V and VGS=-0.7V.
The structure and the topology play a significant role in term of performances optimization. Our
results suggest that the extension of drain reduce the gate currents resulting from impact ionization and
the structure optimization improves the power performances by improving carrier confinement in the
channel. At 60GHz, we obtained (structure B) a maximum power of 422mW/mm, a 5.4dB gain linear,
a 44% of drain efficiency and a 15% of PAE (figure 4) which constitutes the states of the art in term of
output power at 60GHz.

77
 Bibliography:
[1] Enoki & al, "GalnAs/InP double channel HEMT on InP" Proc. of the 4th Indium Phosphide and Related Materials
Conf.,pp.l4-17,1992.
[2] Matloubian & al, "GalnAs/InP Composite Channel HEMTs" IEEE Trans, on Elec. Dev., Vol.40, n°ll, pp. 2112,
1993.
[3] Enoki & al., "Design and characteristics of GalnAs/InP composite channel HFETs" IEEE Trans, on Elec. Dev.,
Vol.42, n°8,pp. 1413-1418, 1995.
[4] Chevalier & al. "V-Band high-power/low-Voltage GalnAs/InP composite channel HEMTs" Elec. Lett., Vol.34, n°4,
pp. 409-411, 1998.
[5] Matloubian & al. "InP based Power HEMTs " Conf. on Pseudomorphic HEMT Technology and Application, 1993.
[6] Zaknoune & al, "Non selective wet chemical etching ofGaAs and AlGalnP for device applications" JVST. B, Vol.16,
n°l, pp. 223-226, 1998.
[7] Fourre & al, "Selective wet etching of Lattice Matched GalnAs/AUnAs and metamorphic GalnAs/AlInAs on using
succinic acid / hydrogen peroxide solution" JVST. B, Vol.14, n°5, pp. 3400-3402, 1996.

G^7ln063As 5x101e cm^3 10nm Gaojulnj^As SxlO^cm-3 10nm G%„ln0MAs SxlO^crrf3 10nm

20nm AlosslnossAs 20nm Afe.Hilno.KAs 20nm

12 2 Sg =4 x 10" cnr2 &, =4x10" cm-2
- 8S = 4x10 cnr
AloeslnossAs 5nm Alo6s'"o36As 5nm Alo.Blno.ffiAs 5nm

Ga
o«lno.«As 8nm GWVHAS 14nm
Gao.47ln0.s3As 8nm

InP 4nm InP 4nm

InP 8nm
18 3
InP SI 2.5x10" cm-3 4nm InP SI 2.5x10 cm- 4nm
At.«l"62AS 5nm

- »a ■=1 x 10" cm-

2

Al^ln^As B.T.
AI,.„ln,,As B.T. AI,.,ln,As B.T.

InP S.I. substrate InP S.I. substrate

InP S.I. substrate

Epitaxy A Epitaxy B Epitaxy C

Figure 1: Structure of the HEMT with composite channel on InP substrate
Gate voltage (V)

Square
n,(I0,2.ein-!) fiH(cm2V"V)
Epitaxy resistance(Q)

300K 77K 300K 77K 300K 77K

A 3.4 3.1 6350 13200 290 151

B 3.7 3.2 6950 16900 244 117
C 4.0 3.8 7120 20900 216 78

Figure 2: Gate current characteristic of a large extension O.lSxlOOfim2

Table 1: Sheet density carrier, mobility and square resistance of epitaxies Composite Channel HEMT at VDs=4. 5 Vfor different structures.

Gate voltage (V)

Input power (dBm)

Figure 3 : Gate current characteristic of a 0.15xl00fim2 Composite Figure 4: P„„rPm and PAE at 60GHz of a lOOxO.lSfim2 Composite
Channel HEMT at VB^4.5Vfor different structures Channel HEMT (VDS=3V and VGs=-0.7V)

78
 SESSION VI
Optoelectronics I
Chair: Prof. Massimo Vanzi
Tuesday May 29, 2001

8.30 am New frontiers of Quantum Cascade devices: towards a THz laser

A.Tredicuccfa\ R. Kohlet R. Colombellfb), F. Capasso{b\ C Gmachf \ M.
INVITED C. Wanke{D), A. L Hutchinson{b), D. L Sivcoib\ and A. Y. Cho{'
(a)Scuola Normale Superiore and INFM, Piazza dei Cavalieri 7, 1-56126
Pisa (Italy)
(b) Bell Laboratories, Lucent Technologies, 600 Mountain Avenue, Murray
Hill, NJ 07974 (USA)

8.55 am Hot Electron Injection Laser: The Internal Base Potential

R.C.P. Hoskens. T.G. van de Roer, G.A. Acket
TU/e Eindhoven University of Technology, Department of Electrical
Engineering, Opto-Electronic Devices, EH8.16 Eindhoven, The Netherlands

9.10 am Development of MOVPE Strained Piezoelectric InGaAs/GaAs/AIGaAs

Quantum- Well Double-Confinement Laser Structures on (111)A GaAs
Substrates ,, ., ,„,
j. Kim<a>. S. Cho(a>, A. Sanz-Herväs(a>, A. Majerfeld8' and B.W. Kimw
(a) Department of Electrical and Computer Engineering, CB425, University of
Colorado, Boulder, CO 80309, U.S.A.
(c) Electronics and Telecommunications Research Institute, P.O. Box 106,
Yusong, Taejon 305-600, Korea

9.25 am Failure Criteria for Optoelectronic Emitter Degradation

H.-C. Neitzeria) and A. Carbone(b>
(a) Universitä di Salerno, DIME, Fisciano, Italy,
(b) Politecnico di Torino, Dip. di Fisica, Torino, Italy

9.40 am Optically Matched Side-Illuminated Photodetector for 1.3pm and

1.55pm wavelength Use Suitable For Hybrid Platform Integration
J. Hararfa). L Giraude^, V. Magnin(e), J. Decoberfb), D. Decoster13'
(a) Institut d'Electronique et de Microelectronique du Nord IEMN, Av.
Poincare, Villeneuve d'Ascq, France
(b) OPTO+, Groupement d'interet economique Alcatel Alsthom Recherche,
Route de Nozay, Marcoussis, France

9.55 am Improved Ultra Fast All-optical Shift Register and it's application for
Optical Fiber Communication
go Tian, Wim van Etten, Wim Beuwer
Telecommunication Engineering Group University Twente, 7500 AE,
Enschede, The Netherlands

10.10 am Analysis and Modeling of Distributed Amplifiers

E A. Karagianni and. N. K. Uzunoglu
Microwave and Fiber Optics Laboratory, Electroscience Division, Electrical
and Computer Engineering, NTUA

79
80
 New frontiers of Quantum Cascade devices:
towards a THz laser

Alessandro Tredicucci, Ruedeger Köhler

Scuola Normale Superiore and INFM, Piazza dei Cavalieri 7,

1-56126 Pisa (Italy)
Raffaele Colombelli, Federico Capasso,
Claire Gmachl, Michael C. Wanke, Albert L. Hutchinson,
Deborah L. Sivco, and Alfred Y. Cho

Bell Laboratories, Lucent Technologies, 600 Mountain Avenue,

Murray Hill, NJ 07974 (USA)

Abstract: despite the surging interest for a variety of applications involving wireless communications,
medical and security screening, etc., the range of frequencies 1-10 THz is still characterized by a critical
lack of compact, field-portable solid-state sources. However, semiconductor devices operating on transitions
between confined states of the conduction band are making important steps in this direction. A new breed of
quantum cascade lasers have been operated down to a frequency of 12.5 THz (24 urn) with continuous wave
emission achievable at X ~ 19 um. Powers of few mW are obtained at liquid nitrogen temperatures. Active
region design concepts and waveguide solutions here adopted provide useful insights in the important issues
for performance improvement and for future developments towards energies below the optical phonon
resonance.

Quantum Cascade (QC) lasers have rapidly established themselves as tunable coherent sources in
the mid-infrared (MIR) range of the electromagnetic spectrum [1]. High power pulsed and cw
operation has been achieved in the two atmospheric windows (3-5 urn and 8-13 urn) [2]. Research
has since expanded to new material systems, ultra high-speed operation and mode locking, and the
exploration of new frequency ranges [3]. The extension to the far-infrared range 1-10 THz is of
particular interest and represents a very exciting challenge in today semiconductor physics and
technology. At present, in fact, efficient, compact, solid-state sources for this spectral range, also
known as the "terahertz gap", are still lacking, while the commercial interest is particularly high,
thanks to the many applications in wireless communications, spectroscopy, medical and security
screening. However, several fundamental physical issues and technological difficulties need to be
answered in order for significant developments to take place. Increased accuracy in the band-
structure design becomes one of the key factors to ensure high electron injection efficiency and to
prevent hot-carrier effects. At these very long wavelengths, in proximity of the reststrahlenband,
anomalies in the dielectric constant of the semiconductor complicate laser operation. Furthermore,
free carrier absorption (increasing approximately with X2, X being the wavelength) becomes a
dominating factor in the optical losses, while electron-electron scattering can no longer be ignored
as a non-radiative relaxation channel. New types of waveguide concepts have to be adopted in order
to reduce the otherwise prohibitive layer thickness, enhance the optical confinement and control the
waveguide loss.

81
In this perspective, we discuss here the longest wavelength III-V semiconductor lasers ever
reported, operating down to the lowest frequency of 12.5 THz (X ~ 24 urn) [4]. They outperform in
terms of output power any other semiconductor source of comparable wavelength, and laser action
in continuous wave is also achieved up to X ~ 19 urn with output powers in the mW range. The
lasers are based on the QC scheme and rely on inter-miniband transition in so-called "chirped", i.e.
appropriately graded, superlattices [5], which guarantee a large material gain even for low transition
energies, close to the material forbidden reststrahlenband. They also employ a novel waveguide
concept based on surface plasmons, TM electromagnetic modes confined at a metal-semiconductor
interface. For wavelengths approaching the far infrared (X > 15 urn), the penetration depth (skin
depth) in the metal is largely reduced, so that a large mode confinement factor and low optical
losses are obtained [6].
Low-temperature (8 K) emission spectra for two different lasers (X ~ 21.5 urn and X ~ 24 urn) are
reported in Fig. 1. Under pulsed current excitation, the lasers oscillate on several longitudinal
modes as typical of the Fabry-Perot resonators adopted. The highest peak powers (~ 40 mW at 10
K) are achieved at X~ 17 urn with approximately 3 mW for the A,~24 urn device. Maximum
operating temperatures are 240 K at 17 um, 170 K at 19 um, 140 K at 24 urn.

22 23 24
Wavelength (micron)
Fig. 1 Pulsed (50 ns pulse width, 84 KHz repetition rate) emission spectra of sample D2691 (left panel) and
sample D2696 (right panel). Devices are 36 urn wide and 750 urn long. The drive currents are 1.6 A and
1.75 A respectively. The spectra were measured in rapid scan using a Nicolet Fourier transform infrared
spectrometer and a He-cooled Si-bolometer. The spectral resolution was set to 0.125 cm"1.

The output power in continuous wave as a function of drive current is reported in Fig. 2 for a
X ~ 19 |am device, by far the longest wavelength ever reported for continuous wave III-V
semiconductor lasers. Laser threshold was achieved at 370 mA (corresponding to a density
Jth = 3.2 kA/cm2), with the highest power (estimated to be around 1 mW per facet) at 460 mA. The
emission takes place on a single longitudinal mode, with the non-monotonic behaviour of the light-
current (L-I) characteristics correlating with mode hopping, as it can be seen from the inset. The
device did not operate in cw above 10 K.

82
 ~i 1 i 1 r~ "I *"

100 . ,,■ 19.16

/—^
■mM"
m
"

" 19.12 3
a
■■
80 ■-""
- 19.08 g>
u
d -
o
- 19.04 &
S60 ■■■ . 19.00
360 400 440 480 520
£ 40 Current (mA)
o
PL,
20
J
J
0 _i I i t i

320 360 400 440 480

Current (mA)
Fig. 2 Output power as a function of continuous wave drive current at a temperature of 10 K for a
A, ~ 19 urn Fabry-Perot laser device (375 um long and 31 um wide). It was recorded using a cooled
HgCdTe detector, and the estimated power is of the order of 1 mW. In the inset the observed emission
wavelength is reported for the various drive currents.

Complete and continuous single-mode operation over the whole current range is also achieved (for
the case of pulsed excitation too) thanks to the adoption of a dual-metal Bragg grating which
modulates the skin depth of the surface plasmon in a distributed feedback resonator.
Preliminary results have been obtained for QC light-emitting devices operating at ~ 3.5 THz.
Spontaneous emission data and theoretical calculations show promising possibilities for future
developments towards a THz coherent source.

References

[1] C. Gmachl, F. Capasso, R. KY'ohler, A. Tredicucci, A. L. Hutchinson, D. L. Sivco, J. N.

Baillargeon, and A. Y. Cho, IEEE Circuits and Devices 16,10-18 (2000).
[2] F. Capasso, C. Gmachl, A. Tredicucci, A. L. Hutchinson, D. L. Sivco, and A. Y. Cho, Optics
and Photonics News. 10 n. 10,31 (1999), and references therein.
[3] F. Capasso, C. Gmachl, R. Paiella, A. Tredicucci, A. L. Hutchinson, D. L. Sivco, J. N.
Baillargeon, and A.Y. Cho, IEEE J. Select. Topics Quantum Electron. 6, 931 (2000), and
references therein.
[4] R. Colombelli, F. Capasso, C. Gmachl, A. L. Hutchinson, D. L. Sivco, A. Tredicucci, M. C.
Wanke, A. M. Sergent, and A. Y. Cho, Appl. Phys. Lett., in press.
[5] A. Tredicucci, F. Capasso, C. Gmachl, D. L. Sivco, A. L. Hutchinson, and A. Y. Cho, Appl.
Phys. Lett. 73, 2101 (1998).
[6] A. Tredicucci, C. Gmachl, F. Capasso, A. L. Hutchinson, D. L. Sivco, and A. Y. Cho, Appl.
Phys. Lett. 76, 2164 (2000).

83
84
 Hot Electron Injection Laser:
The Internal Base Potential
R.C.P. Hoskens, T.G. van de Roer, G.A. Acket
TU/e Eindhoven University of Technology, Opto-Electronic Devices
P.O.Box 513, 5600MB, Eindhoven, The Netherlands
Tel. +31 (0)40 247 5116, Fax. +31 (0)40 244 8375
Email: R.C.P.Hoskens@tue.nl

Abstract: The Hot Electron Injection Laser (HEL), a three-terminal vertically integrated transistor-laser structure,
is designed to investigate and possibly utilise carrier-heating effects on the optical gain and wavelength chirp.
Simulations show the potential of carrier heating assisted gain switching to directly modulate the optical field
intensity at frequencies up to lOOGhz and to control the wavelength chirp. Second generation devices now show
losing at 70K. Bias-dependent spontaneous emission spectra at 70K also show independent control of the carrier
temperature inside the active region by both the injection current (+100K) and the heating voltage (+40K). The
relative influence of the heating voltage on the carrier temperature varies between devices. The large variation in
the base contact resistance seems to be responsible for this. A uniformly lower base resistance is expected to result
in higher carrier heating efficiencies.

Introduction phenomenon suggests the idea to enable high-speed

modulation and controlled wavelength chirp by
Improving the high-speed performance of semiconductor independently controlling the concentration and
lasers becomes increasingly urgent due to the increasing temperature of the injected carriers. This complementary
demand for transmission capacity in optical fibre systems. modulation technique is implemented by means of a novel
The data transmission speed has to be increased and the integrated transistor-laser structure [4]. The transistor
stability of the optical wavelength has to be increased. region allows us to independently control the electron
Recently, it has been recognized that the gain and refractive current injected into the laser region and thus the amount of
index in a lasing device are governed by the energy carriers inside the active layer (AL) [Fig. 1: Vbe].
distribution of the electron-hole plasma (carrier
temperature) as well as its density. The effects of the carrier
temperature are being studied now, for example, through
optical pump-probe experiments on semiconductor optical
amplifiers [1] and on short cavity and vertical cavity
surface emitting lasers [2],
External Base
_r potential

Vt*
n -GaAs Emitter Contact
n-AIGsAs Emitter
p -AlQa^ Base Contact' Vcb
n-AlGsAü LID richer
0.2 0.3 0.4
r*
Internal Base
1-lnGiiAs Active Layer
Distance {mfcron)

potential p-AIGaAs Cladding Figure 2: Energy band diagram through the centre of the
device. (A) Launcher's conduction band profile.
(B) Launcher's valence band barrier
p -GaAs Collector Contact
in effect a p-Emitter Both regions are connected by the low-doped launcher,
Sewt-Ifisulating GaAj Sobstrate' which takes up most of the voltage applied across the laser
[Fig. 1: Vcb]. The resulting electric field heats up the
Figure 1: Schematic design of the vertically integrated electrons in a controlled manner before they enter the
transistor-laser structure active layer [Fig. 2: A]. This enables the separate control of
This project focuses on utilizing the carrier-heating effects both the injected carrier current and energy.
to increase the modulation bandwidth while controlling the
Internal base potential
wavelength chirp [3], Simulations show the potential of
carrier heating assisted gain switching to directly modulate The direct link between the external heating voltage Vcb
the optical field intensity at frequencies up to 100GHz and and the internal voltage drop across the launcher [Fig. 2: A]
to control the wavelength chirp. determines, for a substantial amount, the carrier heating
efficiency. Other factors influencing this efficiency are the
Hot Electron Injection Mechanism launcher's conduction band profile, the launcher's material
The carrier density and temperature affect the modal gain composition and various carrier-carrier interaction
and index in an opposite manner and relax on different processes.
time-scales. The carrier energy distribution relaxes on a Lateral voltage drops in both base and collector layers have
timescale of picoseconds while the carrier concentration to be minimized accordingly. The base, as opposed to the
typically relaxes on a timescale of nanoseconds. This collector, is located in narrow region with stringent design

85
rules. It requires a highly doped, narrow band-gap, material HELe17a: Common base IV curve, Vbe(Vcb) at constant I
for proper bipolar operation but also confines about 5-10%
of the optical mode. Minimizing the optical absorption
means decreasing the doping level and increasing the band-
gap. This trade-off might result in a base layer that is
difficult to contact properly resulting in a lateral voltage
drop for non-zero base currents. The internal voltage drop
across the launcher will be lower and likewise the carrier
heating efficiency [Fig. 3].

1 1.5 2 2.5 3
Collector base voltage Vcb [V]

Figure 5: Decrease in the required base-emitter voltage to

keep the emitter current constant due to variations in the
non-zero internal base potential fAVbe/AVcbxI]
Increasing the applied collector-base voltage decreases the
required external base-emitter potential for a constant
emitter current. The internal base-emitter voltage is pinned
to the forward threshold voltage. Meaning the extra heating
0.4 o
Distance (micron voltage drops completely across the base (contact)
resistance.
Figure 3: Similar to figure 2, but with a non-zero base
These devices only show carrier heating due to variations
potential (C) due to a high base contact resistance
of the electron injection current (+100K). The electron
[common base configuration]
temperature is calculated from the slope of the high-energy
Leakage currents across the launcher tail of the spontaneous emission spectrum.
HEle17a: Electron temperature [K] vs. inj current & healing voltage, T=70K
The first HEL devices showed high threshold currents,
above 4kA/cm2, due to high (radiative) recombination
losses and intolerable high leakage currents [6]. The main
source of leakage current is holes leaking out of the active
region through the launcher and into the base [Fig. 2: B].
The heating voltage Vcb increases this leakage current by
decreasing the valence band barrier between the active
layer and launcher through the image force effect. Even
though the effect is unwanted, it does show evidence of a
proper, low-ohmic, base contact.
1 1.6 2
HELe17-1 #52: Optical power[a.u.] vs. Ic 8.Vcb.T=70K Heating voltage Vcb [V]

Figure 6: Carrier heating vs. injection current and Vcb

Devices having a slope AVbe/AVcb partly smaller than 1
do show carrier heating due to variations of the heating
voltage (+40K). Currently the highest efficiency is around
30K/V, still below expected levels [5]. These devices
switch on and off within a narrow band of heating voltages
[Fig. 4]. Both electrical and optical behaviour are instable
when lasing. Further work is necessary to explain these
1.5 2
phenomena.
Collector base voltage Vcb[V]

Figure 4: Optical power vs. injection current Ic and References

heating voltage. [2"d generation HEL] [1] A.P. de Boer et al. Appl. Phys. Lett., vol. 72, no. 23,
Lasing and carrier heating 1998, p. 2936-2938.
[2] O.D. Mücke et al. Appl. Phys. Lett., vol. 73, no. 5,
The second-generation devices showed a substantial 1998, p. 569-571.
decrease in hole leakage current. The InGaAs, instead of
GaAs, bulk active layer and the n-type doping of the [3] V.l. Tolstikhin et all. IEEE J. Quantum Electron., vol.
31, no. 5,1995, p. 814-832, 1995.
launcher increased the above-mentioned barrier effectively
[7]. Decreasing the width of the Base/Launcher/AL region [4] V.l. Tolstikhin et al. Appl. Phys. Lett., vol. 67, no. 26,
also decreased the radiative recombination losses inside the 1995, p. 3868-3870.
base and AL. Lasing is observed now at 70K, with [5] T.G. van de Roer. Proc. URSI XXVI, Toronto,
threshold current densities of about 625 A/cm2 [Fig. 4]. Canada, 13-21 Aug, 1999, p. 247.
These devices though show evidence of the above- [6] R.C.P. Hoskens et al. Proc. 22nd WOCSDICE 1999,
mentioned problems resulting from a high base resistance. Chantilly, France, 26-28 May, 1999, p. 95-96.
TLM measurements showed poor quality p-type contacts [7] R.C.P. Hoskens et al. Proc. 13th Annual IEEE/LEOS
on top of the thin AlGaAs base layer. Further evidence is Meeting, Puerto Rico, 13-16 Nov, 2000, p. 444-445.
given by the electrical behaviour [Fig. 5].

86
Development of MOVPE Strained Piezoelectric InGaAs/GaAs/AlGaAs Quantum-
Well Double-Confinement Laser Structures on (lll)A GaAs Substrates

Jongseok Kim, Soohaeng Cho, A. Sanz-Herväs, and A. Majerfeld

Department of Electrical and Computer Engineering, CB425, University of Colorado,
Boulder, CO 80309, U.SA.

B.W. Kim
Electronics and Telecommunications Research Institute, P.O. Box 106, Yusong,
Taejon 305-600, Korea

There is an increasing interest in <lll>-oriented strained Quantum Well (QW)

structures on GaAs because they may lead to the development of novel or enhanced
optoelectronic devices by exploiting the strain-induced Piezoelectric (PE) field [1]
and the extended critical layer thickness [2]. There are also emerging results on the
suppression of 3-D growth and the possibility of achieving atomically flat interfaces
on the (111)A surface [3]. There are a few reports on strained PE InGaAs QW laser
structures grown by MBE on (lll)B GaAs substrates [4]. However, regarding
MOVPE grown strained PE structures on {111} polar surfaces until recently there
were only a few reports showing initial optical characteristics of InGaAs/(Al,Ga)As
single confinement heterostructures. We recently demonstrated the successful
MOVPE growth of GaAs/AlGaAs and InGaAs/GaAs PE QW structures on (lll)A
GaAs substrates with excellent interfacial and optical properties [5,6].

In this report we present the MOVPE growth and extensive characterization of

[11 l]A-oriented InGaAs/GaAs/AlGaAs Double Confinement Heterostructures (DCH)
in an N-I-P configuration (P+ GaAs substrate) for application to devices exploiting
the PE effect. Undoped InGaAs/GaAs SQW structures were embedded between N-
and P-type AlGaAs layers with 30% of Al. The In contents and well widths of the
QWs are 17-20% and 70-110Ä, respectively. The structural and optical properties of
the QW structures were analyzed by High Resolution X-ray Diffractometry (HRXRD)
and Photoluminescence (PL) spectroscopy. The strained QW embedded in the N-I-P
DCH structure shows excellent structural and interfacial properties. HRXRD
analyses using both symmetric and asymmetric reflections show that the structures are
of high crystalline quality and that the QW strained layers are pseudomorphic.
Figure 1 shows a representative HRXRD measurement and a theoretical best-fit for an
N-I-P DCH structure. The calculated curve fits well the experimental profile without
the need to include macroscopic in-plane relaxation, which indicates that the InGaAs
QW is pseudomorphic. A narrow PL FWHM of 8.8 meV was achieved at 12 K for a
100 Ä QW with ~ 20% of In as shown in Fig. 2, which corresponds to an interfacial
roughness of about ± 1 monolayer. Laser diodes with conventional stripe geometry
were investigated. We will present the achievement of laser action in these DCH
laser diodes. To our knowledge this is the first observation of stimulated optical
emission from laser structures fabricated in the [111]A orientation.

Corresponding author (majerfel@spot.colorado.edu)

87
 JK 152 (lll)A A1
0.34Ga0.66As Substrate
224- asymmetric

Simul
-4000 -2000 0 2000
Relative angle (seconds of arc)

Fig. 1. The HRXRD profile and theoretical fit for a [111]A InGaAs/GaAs/AlGaAs
N-I-P laser structure.

JK240(111)A
N-I-P laser structure
Ep=1.315eV
FWHM=8.8 meV

1.3 1.4 1.5 1.6

Energy (eV)
Fig. 2. 12 K PL spectrum of a [ 111 ] A InGaAs/GaAs/AlGaAs N-I-P laser structure.

Acknowledgment: This work was partly supported by the Electronics and

Telecommunications Research Institute, Taejon, Korea.

References
[1] D. L. Smith, Solid State Commun. 57 (1986) 919.
[2] T. Anan, K. Nishi, and S. Sugou, Appl. Phys. Lett. 60 (1992) 3159.
[3] H. Yamaguchi, Y. Homma, K. Kanisawa, Y. Hirayama, Jpn. J. Appl. Phys. 38
(1999)635.
[4] T. Fleischmann, M. Moran, M. Hopkinson, H. Meidia, G. J. Rees, A. G. Cullis,
J. L. Sänchez-Rojas, and I. Izpura, J. Appl. Phys. 89 (2001) 4689.
[5] Soohaeng Cho, A. Sanz-Herväs, Jongseok Kim, A. Majerfeld, C. Villar and B.W.
Kim, Microelectronics J. 30 (1999) 455.
[6] Jongseok Kim, Soohaeng Cho, A. Sanz-Herväs, A. Majerfeld, and B. W. Kim, J.
Cryst. Growth 221 (2000) 525.

88
 FAILURE CRITERIA FOR OPTOELECTRONIC EMITTER DEGRADATION

Heinz-Christoph Neitzert * and Anna Carbone#

* Universitä di Salerno, DIIIE, Fisciano, Italy, # Politecnico di Torino, Dip. di Fisica, Torino, Italy

During aging studies of semiconductor lasers and light emitting diodes in general as a failure
criterion for the degradation of these emitters a combination of a 3dB decrease of the optical
emission for a given bias current and the increase of more than one order of magnitude of the
current at a given bias voltage is adopted [l].For possible applications in fiber-optic house cabling
systems [2] and in automotive optical bus systems the reliability of plastic optical fiber (POF)
components is of interest. In Fig.la we see the development of the normalized optical power of
LEDs emitting at 650nm from three different manufacturers and observe even under moderate
stressing conditions (constant current of 100mA applied at 25°C) already a considerable drop of the
optical emitted power during the first 100h of operation. Further monitoring of the optical power
and simultaneously of the reverse bias current at a given bias voltage (Fig.lb) of a LED from
manufacturer 2, however, shows that in this case (at 70°C) already after 50h the degradation stops
and subsequently the optical power is even slightly increasing. That means that the initial
degradation - even if the dark current increasese for more than one order of magnitude - is not
indicating a failing device but the missing burn-in process, often not suitable for low-cost devices.
While in Fig. lb we find a correlation between electrical and optical data, this is not always the case.
1.2 . ' "->■■■' i 'iiii
, , , | , , . 3 10"*
i;

': -■•■•—-current at-20V : 3.

1.1 r

7 - io-7 -s
■
0.9
1
0.8 -1*\\ optical power (mW) | -.- 10°
a
0.7 Li £
*
0.6 10-
20 40 60 80 100
50 100 150 200 250
time (h) time (h)
a) b)
Fig.l a) Initial optical power decrease during aging at 25°C of 650nm emitting LED's from different
manufacturers and monitoring of optical power and current of a LED from manufacturer 2 at 70°C

0 20 40 60 80 100 120
2.5
a) b) current <mA)

Fig.2 a) Current-voltage and b) Optical power-current characteristics of a LED emitting at 650nm

before and after ESD induced degradation
In Fig.2 for the same type of device, measured before and after degradation of a negative bias
human-body-model ESD pulse of-13500V we can see that extreme changes in the current-voltage

89
(I-V) characteristics - showing a largely enhanced forward bias current below 1.7V with a
hysteresis due to charge carrier trapping after degradation - have almost no consequences for the
optical power - current characteristics of the LED. 10" r | i [ i i i [ . , , , , ,
10* i i i | i i i j i i , | ... | I 1 1 '1
!
^ .' 1 :
before ESD
10" r undegraded VC5EL
10- r after-1250V ESD pulse
1 "*
2 io-6 r rc io-6 r |
■1 1
r

5 10- 1 ~*
u

IO"1 r
10"
1
:

10" i ... i i ... i 10" I I I I . I . I I I . I 1 I I I I . .

-10 6 -4-2 0 2 -10

-,u -8
-° -6
•" -4-2 0 2
a) voltage (V) b
) voltage (V)
Fig.3 Comparison of the current -voltage characteristics of GaAlAs/GaAs based proton implanted VCSELs
before and after degradation: a) due to constant current stress (3000h 20mA at 80°C) and b) due to
ESD pulse stress with an pulse amplitude of -1250V
10" 10" 1
' ' ' I ' ' ' ' I ' i ' ' I '
undegraded VCSEL

* J
N
A^YA Ia. 10"
o < 19
r
O a"
io- 2 '*•
<2. "5 - 5mA above threshold n
o c ■ 4mA below threshold 10"
to
c
§ I io-s
n 10"
b degraded
VCSEL

10-' 10'
10 100 1000 20

a) frequency (Hz)
b)
Fig.4 a) Current noise power spectrum of a GaAlAs/GaAs based VCSEL and b) current noise power spectral
density at 70Hz as a function of the laser bias current of the device before and after constant current
stress (as above). The VCSEL threshold currents before and after degradation are indicated by arrows.

In Fig.3a the current-voltage characteristics of a proton implanted GaAs/GaAlAs Vertical Cavity

Surface Emitting Laser (VCSEL) before and after ESD induced degradation is shown. In this case
the degradation resulted in a threshold current increase from 4.4mA to 5.3mA and the device
degradation is well observed in the I-V characteristics by an increase of the ideality factor, an
increase of the reverse bias current and a decrease of the reverse bias breakdown voltage.
After a constant current stress of the same type of VCSEL, resulting in a threshold current increase
from 4.4mA to 7.8mA, we did not see any significant modification of the I-V characteristics
(Fig.3b). In this case measurements of the noise power spectral density at low frequencies have
been found to be a much more sensitive indicator of the device degradation, as already reported for
optocouplers [3] and LEDs [4]. As shown in Fig.4a for the non degraded device, is the form of the
noise power spectrum changing abruptly at laser threshold from a 1/f - type behaviour below to a
lorentzian spectrum above threshold and the current noise power spectral density at 70Hz (Fig. 4b)
is increasing at the threshold for more than two orders of magnitude. In the case of the degraded
VCSEL we see in Fig.4b the shift of the first increase of the current noise power spectral density at
70Hz to a higher current value and that the behaviour above threshold is not monotonic anymore.

References
III M.Fukuda, Reliability and Degradation of Semiconductor Lasers and LEDs, Artech House, Boston 1991
111 P.Pastorino, M.Calzavara, P.J.Bradley, M.Cerisola, A.Ugge, H.C.Neitzert, G.Destefanis and V.Di Biase, Proc. of
the 7* Plastic Optical Fiber Conference, Berlin (1998), p.91
131 Y.Dai and J.Xu, Solid State Electron., 44, (2000), 1495
141 D.Ursutiu and B.K.Jones, Semicond.Sci.Technol. 11, (1996), 1133

90
 OPTICALLY MATCHED SIDE-ILLUMINATED PHOTODETECTOR
FOR 1.3/mi AND 1.55/on WAVELENGTH SUITABLE FOR
HYBRID PLATFORM INTEGRATION

J. Harari, L. Giraudet *, V. Magnin, J. Decobert*, D. Decoster

IEMN, Av. Poincare, 59652 Villeneuve d'Ascq, France

* OPTO+, France Telecom R&D, Route de Nozay, 91460 Marcoussis, France

Introduction
Since several years, the low cost integration of optoelectronic devices is a key problem for operators
working in the field of optical telecommunications. The cost of optical device packaging, in particular the
precise fiber pigtailing, was not critical when the optical links were used only in long haul
telecommunication systems, because this cost was supported by all the network users. But as the fiber gets
closer to the customer, the cost of optoelectronic devices is to be shared by a limited number of users. In
this context, both laser and photodetector must follow low cost packaging scheme, and the silicon
platform has demonstrated its interest by providing a precise alignment of a laser diode or a photodetector
in front of a monomode optical fiber [1]. Considering the photodetector, it should be side-illuminated,
with a large alignment tolerance, and should have a high responsivity. All these characteristics are difficult
to get together since the usual epitaxial structure of side-illuminated photodetectors requires a lensed fiber
to achieve an acceptable responsivity and consequently, the vertical alignment tolerance is small. For all
these reasons, we studied an optically matched side illuminated photodetector for hybrid integration on
silicon board.

Design and Optimisation

The device, presented in Figure 1, is made of a GalnAs/GalnAsP/InP photodiode, evanescently coupled
with a multimode optical waveguide. This waveguide is constituted of thin GalnAsP epilayers between
InP layers. This particular structure leads to large optical modes allowing a very good coupling efficiency
and a large vertical alignment tolerance when illuminated from a cleaved fiber [2]. The requirements
governing our design and optimisation were :
■ a high external quantum efficiency both at 1.3/mi and 1.55/un wavelengths (r| X).8)
■ a small sensitivity to optical polarization ( ±0.2 dB)
■ a high vertical alignment tolerance (better than 4/xm).
The parameters to be found are the thicknesses of all epilayers, the length of the input waveguide and that
of the photodetector active region. The optimization of the photodetector structure, defined by such a lot
of parameters, has been carried out by using a genetic algorithm coupled to a Bidimensional Finite
Difference Beam Propagation Method (2D-FD-BPM) [3]. As a result of this optimisation, the structure is
optically matched to a cleaved fiber. The total calculated waveguide structure is 7.2/rni thick and is based

91
on eight 0.1/un thick GalnAsP epilayers. The active region is 200,um long, with a 2/rni thick low doped
GalnAs absorbing layer. The GalnAsP N+ doped matching layer is 0.5/rni thick and the input waveguide
50/rni long.

N+GainAsP-,
N+cairv\sP
N+lnP
N+GairAsP
N+lnP
N+GainAsP
N+inP
N+cainAsP
N+inP
mmmmmm N+GainAsP'-
N+lnP

Figure 1. Typical structure of the Optically Matched Photodetector. In our case, we designed
a waveguide with eight thin GalnAsP (A,g=1.05/um) epilayers.

Fabrication and Characterization

The structure was grown by MOCVD and the photodiode was defined by mesa formation and P-type
contact lift-off. The measurement set-up is made of an automated XYZ piezoelectric positioner to
precisely align the cleaved fiber in front of the detector, and to measure the fiber position tolerances. The
optical polarization is changed by using a simple Lefevre set-up. The performances are very high : the
responsivities are respectively 1.05 A/W and 0.86 A/W at 1.55/im and 1.3jum wavelengths (quantum
efficiencies equal to 0.85 and 0.86 respectively), the vertical alignment tolerances (at -ldB) exceed 6.5/um
for both wavelengths and the sensitivity to optical polarization is lower than O.ldB.

Conclusion
We have carried out the design, optimisation, fabrication and characterization of a new evanescent
coupling photodetector suitable for hybrid platform integration. The resuks obtained are a high
responsivity, a high alignment tolerance and a low sensitivity to optical polarization. Because of the great
number of parameters to optimize, we used a genetic algorithm. All these results are promising and will be
applied to get low cost high frequency photodetectors suitable for hybrid report on silicon platform.

[1] D. Leclerc, P. Brosson, F. Pommereau, R. Ngo, P. Doussiere, F. Mallecot, P. Gavignet, I. Wamsler, G. Laube,
W. Hunziker, W. Vogt, H. Melchior, " High Performance Semiconductor Optical Amplifier Array for self
aligned Packaging using Si V-groove Flip-chip technique." IEEE Photon Tecbn Lett. Vol 7, n°5, May 1995.
[2] B. Mersali, F. Ghirardi, J. Brandon, G. Herve Grayer, A. Carenco, "Low-loss fibre-matched diluted multiple
quantum well waveguides." IEE Proc CptodectronicPartJ, Vol 141, n°5, Oct 1994.
[3] J. Harari, V. Magnin, "Modeling and Optimisation of optoelectronic devices." Proc ESSDERC99 ppl03-110.

92
Improved Ultra Fast All-optical Shift Register and it's application for
All-optical Fast Packet Switch
Bo Tian, Wim van Etten, Wim Beuwer
Telecommunication Engineering Group
University of Twente, 7500 AE, Enschede, The Netherlands
Tel: 31-53-4892819, Fax: 31-53-4895640, Email: b.tian@el.utwente.nl

Abstract: the improvements ofan all-optical shift register beased on Self Electro-optic Effect Devices are presented.
It can provide 8Gbps throughput for a 75pm long device. The ultra fast speed at SOGbps is achievable with some
improvements. Due to the convenience of operation in optical domain and electrical domain, it is very suitable for
optical header processing; it is a candidate solution ofIP over WDM.

Introduction is keeping at 0.55mW constantly; the wavelength is

1520nm; the switching of S-SEEDs is shown in Figure 2.
In paper [1], an all-optical shift register was presented, this The switching time can be as short as 0.125ns, which
shift register can be operated in electrical domain as well as means the S-SEEDs can operate at a speed of 8Gbps.
in optical domain. It is very suitable for optical header
processing, and ideally can be used in fast photonic
switching. Unfortunately since the implementation was
based on a 326um long device, the device capacitance
limited the switching speed.
In this paper, several improvements are applied to the
-1.0V
device both internally and externally. By using a short
device (75pm long), the switching speed can be up to 50 Figure 2 Switching voltage of S-SEEDs, the input pulse of
Gbit/s. Considering the advantage of this device and the peak value of lmW, the wavelength is 1520nm
character of MPLS switching, an all-optical MPLS switch
2) By integrating with external components as shown in
based in SEEDs is presented. Figure 3. An inductor compensates the device capacitance.
v
Improvement of SEEDs
The detail of the device physics can be found in [2]. A
SEED'S (Self Electro-optic Effect Devices) photo current- Pin »-1 ■HI—, s
voltage characteristic for different waveguide lengths are SEED
shown in Figure 1. The input laser power is -6dBm at
1520nm; considering coupling losses of the waveguide, the
estimation of the input power into the device of -12dBm is
reasonable. A region of negative differential resistance was Pin ggp,
observed in waveguides as long as 326 urn or shorter. The SEED X"
size of the device should be optimized, if the size is too
large, the device capacitance becomes larger, as a Figure 3 Improvement of SEED by using external
sequence, the switching speed is lower. On the other hand, intergated components
if the device is too small, the absorption of photons will be
more inefficient.

rsrzzr^zi
There are several ways to improve the switching speed of
the S-SEEDs (Symmetric SEEDs): 1) By adding more
.ov
quantum well layers, reducing the length of the device, the
device capacitance will be decreased, however the photo ov
current can stay at the same level.

— 0s 0.5ns 1.0ns
— 75 urn Figure 4 switching voltage of S-SEEDs with external
1 resistor (12kQ) and inductor (1 uH)
1
I 10 From Figure 4, we can see by using a integrated inductor,
the device switching speed can be up to 10Gbit/s
* 3) By using a pair of pump pulses before the data is
2 4 injected into the device.
Reverse bias (V)
This operation uses a state-preset pulse operating at
wavelength several nanometers longer than the SEEDs
Figure 1 Photo current-voltage characteristic for different working wavelength. When the working wavelength is
waveguide lengths increased, the current peak will shift to higher voltage [2].
With the device 75um long, the switching simulation was At the longer wavelength, the I-V curves tilt inward as
performed by applying an input data pulse of peak value of shown in Figure 5 resulting in a single point of intersection.
lmW, initial value of O.lmW, the referencing input power If the power of the state-preset pulse is much greater than

93
the input signal PI and P2, and the state-preset pulse is constructed by using an S-SEEDs array is used to shift the
equally applied to the set and reset windows, the SEEDs IP packets. Optical connections (i.e. passive optical
will be at the unstable state until the state-preset pulse is waveguides) are integrated between two neighbour
removed. After that any difference between Pj„l and Pm2 memory cells. The clock signals of CLK and CLK can be
will unambiguously determine the state of the S-SEED. generated by current modulating two laser diodes. After the
This operation reinitializes the device before each inputs to two clock signals are coupled into the chip, they can be
set the state of S-SEED, while allowing the clock and input splitted by integrated beam splitters into CLK and CLK
signal to operate at the desired wavelength. The order of signals, which are connected to the odd memory cells and
operation is state-preset pulse initializes the S-SEEDs at the even memory cells respectively. "Data in" and "Ref"
unstable point: P^l and Pta2 values determine the S-SEED: signals can be coupled into the first S-SEED optical
and clock pulses read out the S-SEED states. The switching window by a coupling system; the input signals and optical
timing is showed in Figure 6. clock signals are coupled to the SEED windows by an
s(vjf effective waveguide coupler. A switch controller provides
the clock synchronization, interface, label swapping, and
network layer routing function by reading for LSRs (Label
Switching Routers) and LERs (Label Edge Routers) and
writing the all-optical shift register for LERs.

Figure 5 I-V switching characters of SEEDs at longer

wavelength Optical

um Pump pulses Xj>X\

Data input beam \] S-SEED memory cell

Referenceinput X\

Electrical path

Figure 9 The implementation of all-optical MPLS switch

based on SEEDs
Conclusion
Figure 6 Switching timing of S-SEEDs with set-preset In this paper, we proposed three methods to improve the
beams switching speed of an all-optical shift register based on
2.0V- SEEDs, which can be used to implement an all-optical fast
packet switch, optical wavelength convenor, optical
1.0V modulator and optical memory. With combination of two
improvements, the achievable speed of 50Gbps throughput
is competitive for ultra fast optical communication systems.
Compared with other optical interconnection systems, the
-1.0V integrated scheme we present here, can replace the
800ps necessary mirror arrays, zoom lenses etc., and therefore it
is easier to realize and more stable.
Figure 7 switching voltage of S-SEEDs with external
800u.W pump pulses Acknowledgement
The switching time can be shortened to 30ps as follows This work is part of the project "All-optical packet switch
from Figure 7, which means the speed of 33 Gbit/s is based on SEEDs". This project is supported by the Dutch
achievable. Technology Foundation (STW).
4) If we combine the two methods, a better improvement References
can be seen in Figure 8, the switching speed can be up to [1] Bo Tian, Wim van Etten, Wim Beuwer, "Gigabit All-
50Gbit/s. optical Shift Register and It's Perspective Application
2.0V for Photonic Fast Packet Switches", Proceeding of
GlobeCom 2000, pp. 1201 -1204.
1.0V [2] H.G.Bukkems, et al. "An InGaAsP/InGaAs quantum
well suitable for a Self Electro-Optic Effect Device",
Proceeding of IEEE/LEOS Symposium Benelux
Chapter, 1999, pp.243-246.
0s 400ps 800ps [3] Daniel O. Awduche, et al. "Multi-Protocol Lambda
Figure 8 switching voltage of S-SEEDs with external Switching: Combining MPLS Traffic Engineering
resistor (12kD), inductor (luH) and external 600uW pump Control With Optical Crossconnects",
pulses http://search.ietf.org/internet-drafts/draft-awduche-
mpls-te-optical-02.txt.
An all-optical MPLS switch based on SEEDs
In Figure 9, an all-optical MPLS switch based on a SEEDs
shift register is presented. An all-optical shift register

94
ANALYSIS AND MODELING OF DISTRIBUTED AMPLIFIERS
Dr. Evangelia A. Karagianni and Prof. Nikolaos K. Uzunoglu

Microwave and Fiber Optics Laboratory,

Electroscience Division, Electrical and Computer Engineering, NTUA
evka@esd.ece.ntua.gr

The analysis and modeling of Distributed Amplifiers operating up to 40 GHz, in MMIC technology is examined.
With a small-signal distributed model and traveling full-wave analysis based on T-parameters, an equivalent
matrix which is consisted with linear scaling rules, is formed.

Formula for modeling two-port networks

Four-port Network
Input Load Line Output Line
K-ld-^l
f# L
Artificial drain line OUTPUT

ZoD rC
Input Line Artificial gate line

[
INPUT
K-l*->l
Figure 1. A schematic representation of the distributed amplifier schematic

Every two-port network can be modeled with its T-parameter matrix. So we consider, as it is shown in
figure 1, the T matrix of the FET as well as the one of the artificial train line and the artificial gate line.
Every stage of the distributed amplifier is concerned to be consisted of two lines and the effective
device as we can see in figure 2.
The device we use is a H40 FET of GEC-Marconi
Foundry with a 0.2 um gate length. It operates up to 40
The two GHz. Taking into account the S-parameters for the range
artificial Effective of frequencies DC - 40 GHz, with step one we exctract T-
lines device parameters using the following equations
Tn=l/S21, Ti2=S22/S21,
T21—S11/S21, T22-(Sl2S21-SnS22)/S21
Figure 2. The four-port network as it is applied in figure 1.
We do the same for the artificial gate and drain lines as well as for the load lines.

95
 The Distributed amplifier as a two-port network
Using figure 3, which gives 12 equations between ai and bi for i = 1 to 8, we solve the system for
(aj,bi, a6,b6)=A(a3,b3,ag,b8) where A is a 4x4 matrix which contains the T-parameters of the two-port
networks. After all we form the N matrices for N cascaded networks and with a simple multiplication
we form the T matrix. Terminating the four-port network with appropriate load lines, we can exctract a
two-port network which is defined via T parameters. Changing these to S parameters we take a simple
two port network modeled with S parameters in the frequency range DC to 40 GHz. We now can form
the equivalent model for a 6 stages distributed amplifier and take the simulation of the two port
network with the help of CAD tools (HP-ADS).
►
ai w ao' aw 5 ai
Lo

N ♦ - c
Tu Ti2 Ti3 Ti4 Lo o Lo
K * 2N-^.
IZo
Tu Ti2 Ti3 TH

w
Tu Ti2 To TH ^
W
—►
A
Li B Tu T)2 Ti3 TH D V

*. 1 b2L1
^
^
ao aN ai
► <*— 4
b?°
UU1
< *> Zo

Figure 3. The T-matrix representing the four-port network

Comparison between mathematical analysis and simulation analysis

The results, as sown in figure 4a are almost the same that arised from the simulation with the real
components as it is shown in figure 4b. So, we find a new efficient tool in order to model linear FETs
and transmission lines in order to be used as a CAD tool for linear analysis. Based on electromagnetic
simulation and harmonic balance analysis, the proposed approach could be extended to nonlinear
MMICs.

□ S1«S)oa«-U OS) *5togs-tI

SIJl SIJ4
S~i "Staue SMStaoc
Stl.1] SI2,Z]

4-—~A

\
\ \ '

\
V V vy vf"N

^ 1/ :
15. 0 20.0 0.0 407o
Frequency 1.0 CHz/DIV Frequency 10.0 GHz/DIV

Figure 4. (a) Theoretical results (b) Simulation results

96
 SESSION VII
Optoelectronics II
Chair: Prof. Didier Lippens
Tuesday May 29, 2001

10.50 am Development of InGaN on SiC LED and lasers at OSRAM

Volker Härle
INVITED Osram Opto Semiconductors GmbH & Co. OHG

11.15am Design and characterization of InGaAs/lnP avalanche photodiode

F. Uherek, D. Hasko and O. Lengyel
Department of Microelectronics, Slovak University of Technology, llkovicova
3, Bratislava, Slovakia

11.30 am Optical Mode Transformers for Low Loss Coupling Between Fiber and
InP-Based Photonic Circuits
K. Blary, B. Bellini, Y. Hernandez, J.F Larchanche, J. Harari, J.P. Vilcot, F.
Mollot, D. Decoster
Institut d'Electronique et de Micro-electronique du Nord I.E.M.N., av.
Poincare, Villeneuve d'Ascq, France

11.45 am Heterostrucure Solder Bumps for Optoelectronic Integration

CG. Fonstad. Jr.,
Department of Electrical Engineering and Computer Science, Massachusetts
Institute of Technology, Cambridge, MA 02139, USA

12.00 am Performance optimization of GaAs-based terahertz photomixer

M. Mikulics(a'b\ J. Darmo{a'b\ D. Buca{a), A. Fox{a\ M. Marso{a\ A. Förster®
and P. Kordos®
(a) Inst. of Thin Films and Interfaces, Res. Centre Jülich, 52425 Jülich,
Germany
(b) Max-Planck-lnstitute for Radioastronomy, D-53121 Bonn, Germany

12.15 am Comparison of Traveling-wave and Lumped-element 1.55 urn

Photomixer for generation of THz radiation
M. N. Feiginov and V. Krozer
Tech. University of Chemnitz, Reichenheiner Str. 70, Chemnitz 09107,
Germany

97
98
 GaN - Semiconductor material for future Lighting

V. Härle, D. Eisert, H.-J. Lugauer, M. Fehrer, S. Bader, B. Hahn,

J. Baur, U. Strauss

OSRAM Opto Semiconductors, Wernerwerkstaße 2, D-93049 Regensburg, Germany

During the last years GalnAIN became a material of extreme interest for both, research and industry, leading into
various fields of applications in the UV-blue-green spectral region. As an example, blue LEDs are used in car
dashboards or in LCD displays for backlighting. Other markets are signal applications and signs as well as
communication. Due to long life times, low power consumption and low maintenance costs of such devices,
LEDs are also very interesting for traffic lights. Here the research efforts are focused on the development of
high brightness InGaN-LEDs with an emission wavelength of 505nm for the green signal light.
In order to address such markets, it is important to increase brightness of the single device. Therefor it is
important to grow InGaN quantum wells with high Indium content and high quantum efficiencies on one hand.
On the other hand the generated light needs to be extracted from the chip as well as from the LED-package.
Although the quantum efficiency of InGaN-LEDs is already comparably high, the dissipated heat in high power
applications is still a major problem, so that heat management will become a major focus of development.
High brightness blue and green LEDs are also needed for active color mixing together with red LEDs in large
area color displays. These displays can reproduce true color images with high quality even in a bright daylight
environment.
Though all these applications have been important for the development of the Gallium Nitride technology, the
real volume growth will start when the LED can enter the market of general lighting for illumination purposes.
Electrical conversion efficiencies in the range of 10% are already comparable to that of incandescent bulbs, and
in some time will match that of fluorescent lamps. Therefore LEDs have an important potential for energy
saving. In addition their lifetime is much longer compared to that of conventional light sources, and the small
dimensions of a LEDs allows completely new lamp designs.

Yet the requirements for illumination go far beyond the need of simply high optical power. First the main color
needed for illumination is white. It is known that white can be mixed by a color with its complementary color,
e.g. blue with yellow light. So blue LEDs are packaged together with a luminous converter that emits yellow
light under irradiation with blue light. Yet this simple approach has several limitations:
On one hand it is just possible to reach a very limited part of the color table.
Therefore the deficiencies of such an LED in color rendering are clearly perceptible. Though the light emitted of
such an LED looks white, human skin or plants illuminated with this LED-light look rather pale, because red and
green parts are missing in the spectrum of the LED.
On the other hand the mixed color shifts when the emission wavelength of the exciting InGaN-LED changes due
to variations in operating temperature and current.
These problems can be resolved by not using just one luminous converter, but two or better three. Then any color
in between these converters can be composed by varying the relative concentration including a white LED with
high color rendering index. Also the sensitivity to variations of ambient temperature or operating current are
minimized.
The radiation of the LED is then only necessary for pumping of the converters. Therefore it is advantageous to
use a short wavelength LED, because most converters can be excited efficiently by UV light.
When designing UV-LEDs, several requirements have to be taken into account:
The emission wavelength must be in a spectral range, where blue, green and red converters can be pumped
efficiently. At the same time quantum efficiency has to be as high as possible for maximum light output and
should not decrease significantly at increased operating temperatures, e.g. due to high driving currents.
Quantum efficiency decreases below 430 nm with shorter wavelengths due to the reduced density of localized
energy states in the quantum well. At the same time the conversion efficiency increases at shorter wavelenghts.
An optimum regime is reached at an emission wavelength of about 400 nm. However the limitation of light
output at high driving currents by thermal roll over still has to be overcome by improved heat management and
an optimized design of the active zone.

99
100
Design and characterization of InGaAs/lnP avalanche photodiode

F. Uherek, D. Hasko and O. Lengyel

Department of Microelectronics, Slovak University of Technology,

Ilkovicova 3, Bratislava, Slovakia
and
International Laser Center, Ilkovicova 3, Bratislava, Slovakia
e-mail: hasko@elf.stuba.sk, uherek@ilc.sk

InGaAs/lnP ÄPD with separate absorption, charge and multiplication layer structure (SACM) has
been designed, fabricated and characterised. In this design, the long-wavelength infrared light is
absorbed in a narrow bandgap material (In0A7 Gao.53 As), while the photogenerated carriers are
transported to and multiplied in a wider bandgap (InP) material capable of sustaining high electric
fields for avalanche gain without excessive dark currents from tunneling processes.
The base structure of designed InGaAs/lnP SACM APD was grown in one epitaxial step by
low-pressure MOCVD. A classical photolithography and wet chemical etching was used for mesa
device processing. Measured current-voltage, capacitance-voltage, spectral characteristics and speed
of response will be presented.

1. INTRODUCTION
APD's that operate at high bit rates and at the long wavelengths (1300 or 1500 nm) used in
lightwave systems are inherently complex and costly to manufacture. At present, APD's are therefore
used mainly in long-haul networks predominantly at 2.5 Gb/s. Hi-Lo structures such as floating guard
ring (FGR) APD [1], 8-doped APD, separated absorption, grading, charge and multiplication APD
have been proposed for the very high gain-bandwidth (GB) product [2]. Recent studies of InGaAs/lnP
APD have been focused on a very thin multiplication layer.
In this work we report the design and results obtained from characterisation of InGaAs/lnP
based APD structures.

2. DESIGN AND FABRICATION

For optimum performance of high-sensitive receiver for fiber-optic lightwave systems
operating at the 1300- and 1550-nm wavelength, the APD typically has a separate absorption and
multiplication (SAM) layer structure. The doping and thickness of the epitaxial layers, particularly of
the InP multiplication and charge layer, must be carefully controlled so that the electric field in the
InGaAs absorber layer (referred to as the heterojunction field) is neither too high nor too low.
Designed structure of APD, as shown in Fig.l, is MO 456
separate absorption, charge and multiplication (SACM)
device, but uses a novel design. A designed layer structure InP (p' ~ 10'8) 600 nm - contact
consists of a lOOnm-thick InP buffer layer (n~3
x 10n cm3), a 2 um-thick InGaAs absorption layer (n~ 1 InP(~ 10") 500 nm - multiplication
xl015cm"3), 150nm-thick InP charge layer (n~1.8 InP (n = 1,8x10") 150 nm - charge
xl017cm"3) and a 500 (300) nm-thick undoped InP
multiplication layer (n~ 1015 cm"3). P-type 600 nm-thick In Ga „As (~ 1015) 2000 nm - absorption
layer (p ~ 1 x 10 cm"3) on the top of the structure is used
053 0

as a contact layer. The entire InGaAs-InP APD structure is

grown in single step by MOCVD. In this way, the junction InP (n ~ 10") 100 nm - buffer
position and the doping and thickness of the critical gain
layer is precisely determined. Next, using wet chemical InP <S>
etching and standard photolithography, a shallow mesa is
formed to define the lateral extent and thereby limit the
capacitance and leakage current. The P and N contact
layers are prepared by evaporation of Au-Zn and Au-Sn. Fig.l The cross-section of the SACM APD

101
 3. DEVICE CHARACTERISATION
The current - voltage (I-V), capacitance - voltage (C-V), spectral characteristics and speed of
response as the function of the voltage were measured and analysed. Fig.2 shows dark and
photocurrent I-V curves of fabricated APD, with 0.023 mm2 active area, using a focused 1310 nm
laser-diode source. The breakdown voltage, Vb, was about 57 V and multiplication about 5. The
responsivity at 10 V without antireflection coating was better then 0,75AAV at 1310 nm. From the
C-V characteristic shown in the Fig.3 (including the capacitance of the package 0,9pF) one can see
that the capacity is relatively low (lower then 1,1 pF at operating voltage). The spectral characteristic at
bias voltages higher than 10 V corresponds to the conventional InGaAs/InP PIN photodiode.
NC456 M0456
7,0p

100n
6,0p
10|i

in S 5,0p-

2 lOOn
I ICh Q.
nj
4.0p
O
U In :.,r
3,0p
10Qp-
10p
2,0p

»P.0 5 10 15 20 25 30 35 40 45 50 55 60 5 10 15 20 25 30 35 40 45 50
Voltage [V] Voltage [V]

Fig.2 The I-V characteristics of M0456 Fig.3 The C-V characteristics of M0456

For the time response measuring of SACM APD's 3GHz pulse generator HP 8133A and the
high speed laser source BCP 51T/231 (1310 nm,
1.5Gbps) has been used to generate the optical
pulses. Laser source generates an optical signal
with optical power in the fiber lmW. The rise
and fall time has been measured using digital
oscilloscope LeCroy 9326. The high-frequency
response characteristics of photodiodes at the
various gains are shown in the Fig. 4. The fast
rise and fall component follows the relaxation
oscillation of the InGaAs laser pulse and
parasitic oscillation of photodiode header (it is
about 0.9pF). The slow fall transient strongly :H
depends on the bias voltage and is caused by
pile-up effect on the heterointerface between
absorption (InGaAs) and charge (InP) layer [x]. Horizontal SCaie is 5 waiv, vertical scaie 7omv/aiv
Fig.4 Time response of M0456 SACM APD at
different reverse bias voltages Vb

Acknowledgement
The work at the Microelectronics Department of Slovak University of Technology was
supported by the project No.1/7600/20 and at the International Laser Center by the project No.
1/7253/20 and Slov/Nem/MLC all from Slovak Grant Agency.

References
[1] S. R. Cho, S. K. Yang, J. S. Ma, S. D. Lee, J. S. Yu, A. G. Choo, T. I. Kim and J. Burn, IEEE Photon.
Technol. Lett., vol. 12, No. 5, (2000)
[2] C. Y. Park, J. B. Yoo, C. Park, K. S. Hyun, D. K. Oh, Y. H. Lee, C. Lee and H. M. Park, J. Vac. Sei.
Technol. B 13, 974 (1995)

102
 OPTICAL MODE TRANSFORMERS FOR LOW LOSS COUPLING
BETWEEN FIBER AND InP-BASED PHOTONIC CIRCUITS

K. Blaty, B. Bellini, Y. Hernandez, J.F Larchanche

J. Harari, J.P. Vilcot, F. Mollot, D. Decoster

Institut d'Electronique et de Microelectronique du Nord

I.E.M.N., av. Poincare, B.P. 69, Villeneuve d'Ascq, France

Introduction
Due to the increasing development of optical telecommunication systems, there is a strong need of low cost
monolithic or hybrid photonic integrated circuits. In both cases, optoelectronic functions are realised by InP-
based components. Yet the mode of an InP optical waveguide is significantly different from that of a standard
fibre, and losses due to this mismatch still account for a lot in the global power budget. Hence the need for an
optical mode transformer reproducible and easy to fabricate. The aim of this paper is to present the design,
fabrication and characterisation of two parallel concepts of optical interconnection between fibre and typical
InP/InGaAsP/InP optical waveguide of an integrated optics switching matrix. The first interconnection is a
monolithic convertor made of thin quaternary epilayers distributed within InP. The second one exploits
properties of preferentially etched silicon and of polymers.

1. Monolithic optical mode transformer

1.1. Principles andcksigri
The optical mode of the InP/GalnAsP/InP waveguide is about 9 /ton wide and 1.5 /mi high. For this reason, an
optical mode profile converters is necessary to improve the coupling efficiency with optical fibres and to
maximise the misalignment tolerance. In the horizontal direction, insertion losses are decreased by enlarging the
waveguide (cf. Fig. 1). In the vertical direction, the epitaxial structure of the converter, made of three thin
quaternary epilayers distributed in InP, and located above the waveguide structure, is thicker and is matched to
the circular mode of the fibre. The taper structure has been tested and optimised by using 2D and 3D-FD-BPM
and a genetic algorithm. As typical optical behaviour of this multimode epitaxial structure, the optical beam
propagates up and down periodically in the taper before being confined in the quaternary optical waveguide (cf.
Fig. 2).

»sal!

Figure 1. Photography of a monolithic taper Figure 2. Light Propagation in the vertical plan (2D-BPM)

1.2. Techmlogfandnmsumnznts
The epitaxial structure has been fabricated by MBE. The fabrication process is composed of three etching steps
using a conventional e-beam lithography. S1O2, deposited by PECVD, serves as a mask for the long etching of
the tapers. A CH4/CHF3 Reactive Ion Etching process is used to etch SiQ2 and a GVAr/rife RIE process is
used to etch the semiconductor materials. A thin AlInAs etch-stop layer introduced in the structure is used to
control the etching depth. The device has been characterised at 1.55 /*m wavelength with lensed and cleaved
103
monomode fibres. We first measured the near-field patterns from the output facets and performed then fibre-to-
fibre measurements. Our results show coupling improvement better than 6 dB.

2. Hybrid optical mode transformer based on preferential etching of substrate

2.1. Principles and design
Anisotropie etching of crystalline substrate can lead to reproducible profile with strong geometrical properties.
This is the case for InP (001) in a HBr aqueous solution and Si (100) in KOH aqueous solution. For instance,
anisotropic etching of (100)-oriented Si produces U-grooves and stops itself when V-shaped grooves are
tan(54.7°) =w^ . Homothetic V-groove
obtained for which depth dand width ^are linked according to : d =w
are thus obtained only by varying the width w, as shown on fig. 3. This is the base for a 3D taper: the optical
spot, which is inscribed in V-shape, is controlled in both width and height with great precision. A transition
between a fibre and an InP-based waveguide is designed as following. At the input, w = 15 /cm so that the
overlap integral between the fundamental triangular mode and the fibre mode is greater than 0.9. Afterwards wis
decreased down to 5 /cm within a length of 1 mm, and the overlap between this V-waveguide and a typical InP-
based ridge waveguide is 0.86. In this case, 3D Finite Difference Beam Propagation Method shows additional
loss due to transition of the order of 1 dB.

22. Fabrication cfthe taper and rneasitrernznts

V-grooves fabrication is a classical semiconductor process. The second step concerns the proper filling of
groove. We use BCB 3022-63 by Dow Chemicals, for its ability to planarise 15 /cm-deep grooves (residual
difference in height : t = 0.1 /cm for w = 5/cm). Polymer is then softly dry-etched (R.I.E. Cb/SFs, 60 W) to
substrate level. This step requires technological optimisation since the roughness of etched polymer surface will
induce diffusion losses. Photography of sawn waveguides is presented in Fig. 4 : it shows that a very smooth
surface of polymer can be achieved, here rugosity is less than 15 nm.

~W
Top view w
3L

Side view

Front view

Figure 3. Optical Mode Transformer based on preferential etching Figure 4 : Photography of input facet

We have performed fibre-to-fibre measurements. First, top-diffused light has very low intensity, indicating
smooth sides of waveguide. Insertion losses of a 20 to 5 /mi- large transition was about 5 dB, with a contribution
of about 3dB coupling losses. Such a transformer is an alternative to couple a cleaved fibre to a typical InP based
optical waveguide.
3. Conclusion
We have proposed two different types of mode transformer to be used in monolithic or hybrid photonic
integrated circuits. The first is made of three thin quaternary epilayers inserted in InP, the complete structure
being grown above the classical waveguide structure. The second is made of a U-groove filled with polymer. The
measurements demonstrate that these two technologies allow to improve the coupling efficiency between a
typical InP/GalnAsP/InP waveguide and a monomode cleaved fibre.

104
 Heterostructure Solder Bumps for Optoelectronic Integration
Clifton G. Fonstad, Jr., Department of Electrical Engineering and Computer Science,
Massachusetts Institute of Technology, Cambridge, MA 02139, USA

Abstract
This paper presents the Heterostructure Solder Bump (HSB) concept for
achieving wafer-level, batch assembly of pseudo-monolithic heterogeneous integrated
circuits, and describes how it is being used for optoelectronic integration. Two current
technologies exploiting this concept, Epitaxy-on-Electronics (EoE) and Aligned Pillar
Bonding (APB) will first be reviewed and examples of optoelectronic integrated circuits
produced using EoE and APB will be described. The bulk of the presentation will then
focus on the next generation HSB technology, Magnetically-Assisted Statistical
Assembly (MASA), which is currently under investigation. MASA offers great
flexibility and promises to be a universal heterogeneous integration technique.
Extended Summary
The challenge of integrating optoelectronic devices such as LEDs and laser
diodes with complex integrated electronic circuits is one that has defied solution,
beyond chip-by-chip hybrid assembly using flip-chip solder-bump technology dating
from the mid-1960's, supplemented by substrate thinning and/or removal. While this
approach is sufficient for prototype optoelectronic integrated circuits (OEICs) it is
clearly inadequate for economic large scale OEIC manufacturing.
This talk will present pseudo-monolithic integration techniques developed at
MIT suitable for wafer-scale batch processing of sophisticated OEICs. These
technologies have the common feature of beginning with commercially processed
integrated circuit wafers containing all of the necessary electronic circuitry. These
wafers also contain recesses to accomodate optoelectronic devices. These recesses,
which are typically 4 to 6 microns deep and a few tens of microns in extent, are etched
into the thick dielectric overcoat covering the wafers. Using one of several techniques
the recesses are then filled with III-V heterostructures for optoelectronic devices (i.e.,
with "heterostructure solder bumps"). After all the recesses on a wafer are filled,
processing of the wafer continues to convert the heterostructures into devices and to
monolithically connect them to the pre-existing electronics. The several techniques to
be descibed differ primarily in the method used to fill the recesses with
heterostructures; the subsequent processing is essentially identical.
The most mature of the techniques is Epitaxy-on-Electronics (EoE), in which
direct epitaxy is done on chips with recesses extending all the way to the substrate.
GaAs integrated circuits are used and a number of different OEIC chips have been
fabricated in this way [2]. In the second technique, Aligned Pillar Bonding (APB) the
heterostructures are located in the recesses by aligned metal-to-semiconductor bonding
[3]. This approach has the advantage that the heterostructures can be grown on their
optimal substrate under the optimum conditions, whereas with EoE the integrated
circuit substrate must be used and all epitaxial processing must be done at under 475"C.
The APB technique can also be used with silicon-on-sapphire circuits because the

105
thermal expansion coefficient of sapphire closely matches that of GaAs. It also can be
used with InP-based heterostructures, and with it three-dimensional integration is
possible, allowing increased packing densities.
The next stage in the evolution of these processes is magnetically-assisted
statistical assembly (MAS A). MAS A, which is in the early stages of its development,
removes all of the limitations EoE and APB place on the integrated circuit foundation.
Any integrated circuit wafer can be used, and any heterostructure (or several different
heterostructures) can be integrated on it because the latter are located in the recesses as
individual heterostructure nanopills (or solder bumps) 5 to 6 microns thick and 30 to 50
microns in diameter (depending on the device). The process, illustrated in Figure 1,
uses statistical assembly and relies upon having highly symmetrical nanopills and
recesses, on providing many more nanopills than recesses, and on using magnetism to
hold the nanopills in the recesses. Together these features insure that 100% of the
recesses will be filled. As in all of the HSB techniques, post-assembly processing of the
heterostructures insures accurate alignment of the integrated devices.
Mag netized co-Pt pattern , Recess Permalloy
IM II-, \ 30//m. ?L_

4yvm
ÄA-rf
electronics Etch release layer
a. IC wafer b.
GaAs or inP wafer

Permalloy VCSEL nanopills

Dielectric overcoat Emissio

C. d.
Electronics Electronics ;inteörateci

IC wafer IC wafer VCSEL

Figure 1 - The MASA process: (a) the processed IC wafer with the recesses
prepared, and (b) the heterostructure wafer with pillars etched in a close-packed
array; (c) statistical assembly of the freed nanopills in the recesses on the IC wafer;
and (d) after completing device processing and integration.
***********************
[1] Contact data: 77 Massachusetts Avenue, Room 13-3050, Cambridge, MA 02139; e-mail -
fonstad@mit.edu; telephone - (617) 253-4634; fax - (617) 258-6640
[2] (a) J. F. Ahadian, S. G. Patterson, Y. Royter, G. S. Petrich, L. A. Kolodziejski, C. G. Fonstad, P. T.
Vaidyanathan, S. Prasad, D. MuH, and W. D. Goodhue, "Practical OEICs Based on the Monolithic
Integration of GaAs/InGaP LEDs with Commercial GaAs VLSI Electronics," IEEE J. Quantum
Electronics 34 (1998) 1117-1123; (b) J. F. Ahadian and C. G. Fonstad, Jr., "Epitaxy-on-Electronics
Technology for Monolithic Optoelectronic Integration: Foundations, Development, and Status,"
Optical Engineering 3J7 (1998) 3161-3174.
[3] C. G. Fonstad, "Very large scale monolithic heterogeneous optoelectronic integration: the epitaxy-on-
electronics, silicon-on-gallium arsenide, and aligned pillar bonding techniques," Chapter 1 of
Heterogeneous Integration edited by E. Towe (Critical Reviews of Optical Engineering, Vol. CR76,
SPIE Optical Engineering Press, Bellingham, WA, 2000), pp 3-47.

106
 Performance optimization of GaAs-based terahertz photomixer

M.Mikulics,a'b) J.Darmo,a,b) D. Buca,a) A. Fox,a) M. Marso,a) and P. Kordosa)

^Institute of Thin Films and Interfaces, Research Centre Mich, D-52425 Mich, Germany
h)
Max-Planck-Institute for Radioastronomy, D-53121 Bonn, Germany

Various tasks related to the material structure and device design of GaAs-based photomixer are
addressed. Properties of the mixer for application in CHAMPS, i.e. as a 490 GHz radiation source, are
demonstrated. It is shown that the output power of the photomixer can be increased by optimizing the
finger contact configuration as well as by improving the heat dissipation conditions.

Introduction
Generation of terahertz radiation by photonic techniques like difference-frequency mixing in
low-temperature GaAs photodetectors (LT GaAs PDs) is studied extensively [1]. However, all
these efforts show that the output power needs to be increased to be useful in applications [2]. In
this contribution various tasks on the preparation and performance of LT GaAs photomixer in
order to increase its output power are discussed and the photomixer performance at 490 GHz is
presented.
Experimental
Two kind of LT GaAs devices were used: 50x50 urn2 PDs to study their basic properties in
the dark and under 'one-color' illumination and 5x8 um2 PDs coupled to the dipole antenna for
'two-colors' mixing experiments (A,=780 nm). Details about the material structure and device
preparation were published elsewhere [3].
Results
Short carrier lifetime and high carrier mobility are two basic requirements on the properties
of LT GaAs layer from the output power point of view. Both can be optimized by appropriate
growth conditions. The layers used exhibit carrier lifetime of 150 fs (Fig. 1), which is even lower
than found in LT GaAs PDs with 550 GHz bandwidth [3]. The carrier mobility was adjusted by
optimizing the band and hopping conductivity ratio of the layer [4]. MSM PDs with
interdigitated finger contacts were prepared using these LT GaAs layers. Responsivity
measurements (Fig. 2) show that quantum efficiency of r|=0.15 (no antireflection coating) can be
obtained before breakdown (Vbls50V). However, the rj will be lower at a mixing experiment
(Pin=30 mW) because of ~V2 dependence (full dots in Fig. 2) and lower Vbr. This indicates an
importance of higher as possible Vt,r.
The photomixers (Fig. 3) are designed in the first step for 490 GHz CHAMPS (Carbon
Heterodyne Array of MPIfR Systems) and perspective for GREAT systems (German Receiver
for Astronomy at THz) operating at 650 GHz in SOFIA (Stratospheric observatory for infrared
astronomy). From the mixing experiments (Fig. 4) it follows that the mixer bandwidth is higher
than 490 GHz (1/f-dependence) and resulting conversion efficiency is comparable to previously
published data [5,6]. However, the output power is still low for reasonable applications.
They are various possibilities in optimizing the photomixer performance, like by using
Bragg reflectors below the LT GaAs layer to improve absorption conditions [2] or by growing
thick AlAs interlayer for better thermal conductivity [6]. We concentrated at first in improving
the breakdown voltage of the structures. It can be done by optimizing the finger contact geometry
(Fig. 5.) Further, we developed novel structures with buried contacts which improve the electric
field distribution [2] and thus the responsivity R (Fig. 6). From these follows a significant
increase of the output power, as R~V2 and P0Ut~R2-

107
 1.0
LT GaAs MSM PDs
10"
50x50 pm2

10" 0.1

photomixer •
5x8 pm2
3 0.01
10-
0 2 4 6 8 5 10 50
time (ps) bias (V)

Fig. 1. Time-resolved reflectivity measurements Fig. 2. Responsivity vs bias and photocurrent at 20

for carrier lifetime evaluation. and 25 V at 490 GHz mixing experiment.
10"'
photomixing in LT GaAs

photomixer

lillili
490 GHz

| io-5 □ Jackson 1999, Ph= 100 m W

■ Matsuura 1998, 50 mW
• ISG FZ + MPIfR, 30 mW
calculated

0.3 1 3
frequency (THz)
Fig. 3. Photomixer chip with 5x8 urn detector,
a dipol antenna and contact pads. Fig. 4. Conversion efficiency vs frequency.

... ,, ,,.,., _^_ I , , , I , I

80

ID s/w = 4
§ 60
■ •' s/w = 2
• _
•
•
20 * * s/w = 1

•-" V
0 12 3 4 5 20 40
finger spacing+width s+w (pm) bias (V)
Fig. 5. Breakdown voltage for LT GaAs MSM Fig. 6. Responsivity vs bias for photomixers with
PDs with various contact geometry. surface- and buried-contacts configuration.

References
[1] S. Verghese et al., IEEE Trans. Microwave Theory Tech. 45, 1301 (1997).
[2] E. Brown, Appl. Phys. Lett. 75, 769 (1999).
[3] P. Kordos et al., Electron. Lett. 34, 119 (1998).
[4] J. Betko et al., J. Appl. Phys. 86, 6243 (1999).
[5] S. Matsuura et al., J. Molecular Spectroscopy 187, 97 (1998).
[6] A.W. Jackson et al, Phys. Mikrostrukt. Halbleiter, Vol. 10, pp. 19-26 (1999)

108
 Comparison of traveling-wave and lumped-element 1.55 jum photomixers
for generation of THz radiation
M. N. Feiginov and V. Krozer
Technical University of Chemnitz, Professur für Hochfrequenztechnik, Chemnitz, Germany.

Abstract. Performance of both travelling-wave and lumped-element p- i-n photomixers is compared in the THz
frequency range. Our simulation results show that conversion efficiency ( PWz I Popt) of the lumped-element
photomixer should be higher than that of the travelling-wave one up to the frequency of approximately 300GHz.

A promising technique for CW generation of the electromagnetic radiation in the THz frequency range
is photomixing based on low-temperature (LT) grown GaAs or p- i-n photodiodes. Lumped-element
photomixers are RC -time limited, that means that the generated THz power ( Pf™/ )decreases with
frequency with at least 6dB/octave, when coRC »1. To overcome this limitation the traveling-wave
(TW) photomixers were proposed and presently they are actively studied. It is generally believed that
TW photomixers should outperform lumped-element ones, since they are, generally speaking, not RC -
time limited. Nevertheless, one should meet a number of stringent requirements designing TW
photomixer: the waveguide impedance should be matched to that of the antenna or output circuit, the
propagation velocity of the THz wave and that of the optical wave should also be matched, attenuation
of the THz wave should be made sufficiently low. Because of these limitations the lumped-element
photomixers can outperform TW ones in a certain frequency range. The objective of the paper is to
determine what are the frequencies where the performance of much more complicated TW
photomixers is higher than that of the analogous lumped-element ones.

The THz output power of the lumped-element photomixer (P^p) is equal to:
D
plump _ _, _£^
eP
opt l
1
THz ~ Equant ~
hVoptj \ + (a)RC■'lump)
luJ

where e is the electron charge, Popt and hcoopt are the mean power and photon energy of the optical
wave, respectively; R it the impedance of emitting antenna or output circuit, Clump is the capacitance
of the photomixer and a , is the quantum efficiency of the photomixer that represent an effective
number of electrons generated in the contacts by one optical photon (in particular, the coefficient
includes effects of the finite photocarrier transit and life times).

The similar equation for THz power generated by the TW photomixer (PTHz) is:
( V
eP 1
P™
1
THz =a
Equant &coupl
KOoptJ <£C \^YW
here Cm is the capacitance of the THz waveguide per unity of length in the direction of wave
propagation, c is the effective propagation velocity of the optical wave, acoup, is the output coupling
efficiency of the THz wave due to impedance mismatch of the THz waveguide of photomixer and that
of antenna or output circuit. TW waveguide is supposed to be ideal in the sense that attenuation
constant of THz wave is negligibly small and the propagation velocities of the THz and optical waves
are matched.

109
Let us compare the THz output powers of the TW photomixer and the lumped-element one. The last
one is supposed to be just a short part of the TW photomixer, its length should be small as compared to
wavelength of the THz wave in the waveguide. The capacitance of such lumped-element photomixer is
Ciump = CTWlhmp, where llump is the length of the lumped-element photomixer. The ratio of the generated
THz powers is:
pTW
r
THz _
^ + (o)RCluJ
nlump a,coupl
"THz 2c RCTW
a t is exactly the same for both photomixers and it is canceled in the power ratio.

The THz waveguide characteristics and the power ratio ( P™z I P^p) of the TW and corresponding
lumped-element p-i-n photomixers have been calculated for a typical photomixer structure. The wave
impedance of the TW structure is of the order of 10Q, that corresponds to acoupl ~ 1/6, if the antanna
or output circuit impedance is 50Ü. The length of the lumped-element photomixer is supposed to be
equal to 50//m. The simulation results show (see Figure 1.) that the lumped-element photomixer
outperforms the TW one up to the frequency of 250GHz. The frequency should be even higher, if the
effects of the velocity mismatch and THz-wave attenuation are taken into account. If cccoupl ~1/1.2,
then P™z IP%£" > 1 at the frequencies higher than 100GHz . To realise the situation when P™ < Pjflump
THz
up to ITHz , OCcoupl should be less than 0.01

To conclude, we have shown that the lumped-element photomixers outperform the TW ones up to
comparatively high frequencies.

This work was supported by MPIfR, Bonn, Germany within ALMA Project, ESO (Agreement
No.59608/MAP^00/6750/RFI).

I*F 3
3

C
(0

IE 2
o

«5 1

100 200 300 400 500

Frequency, GHz
Figure 1. The ratio of the generated output THz powers of the TW and lumped-element photomixers

110
 SESSION VIII
Device and Material characterization
Chair: Prof. Arvydas Matulionis
Tuesday May 29, 2001
2.00 pm The low frequency noise in electronic devices: an engineering sight
M. Boraarino and F. Fantini
INVITED Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena e
Reggio Emilia, via Vignolese 905, 41100 Modena, Italy

2.25 pm Noise Behavior Of Advanced SiGe HBT

L Bary^a\ G. Cibiefa), J. Ibarra{a), O. Llopis{a), R. Plana(a). J. Graffeuifa\ G.
Niu{b\ J.D. Cressle^, Z. Jin(b), S. Zhang{b), A.J. Joseph™ and M. Borgarinow
(a)LAAS-CNRS and Universite Paul Sabatier, 7 av. du Col. Roche, 31077
Toulouse Cedex 4, FRANCE
(b) Department of Electrical and Computer Engineering, Alabama
Microelectronics Science and Technology Center, 2000 Brown Hall,
Auburn University, Auburn, AL 36849, USA
(c) IBM Microelectronics, Essex Junction, VT 05401, USA
(d) Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena
e Reggio Emilia, via Vignolese 905, 41100 Modena, Italy

2.40 pm IBIC Analysis of Gallium Arsenide Schottky Diodes

C. Manfredottfab). E. Vittone{ab),F. Fizzottfab), A. LoGiudice{ab\ F. Nava(c)
(a) Dip. Fisica Sperim., Universita di Torino, INFN-Sez. di Torino, via
P.Giuria 1,10125 Torino (I)
(b)INFM- Unitä di Torino Universita, via P.Giuria 1,10125 Torino (I)
(c) Dipartimento di Fisica, Universita di Modena, Via Campi 213/A, 41100
Modena, Italy

2.55 pm Electrical and optical properties of resonant tunneling structures with

interdigitated gates.
S.A.Vitusevich®. A.E.Belyae\/b), N.KIein{a\ W.Reetz(c), AForster1^,
S. V.Danylyu^ and D.I.Shekä (<*)
(a) Inst, für Schichten und Grenzflächen, Forschungszent. Julien, D-52425,
Germany
(b) Institute of Semiconductor Physics, NAS of Ukraine, 03028 Kiev, Ukraine
(c) Institut für Photovoltaik, Forschungszentrum Jülich, D-52425, Germany
(d) Radiophysics Faculty, National Taras Shevchenko University of Kiev,
03127 Kiev, Ukraine

3.10 pm Carrier Mobility in a Forward-Biased Junction

A.R. St.Denis, D.L Pulfrey and M. Vaidyanathan
Department of Electrical and Computer Engineering University of British
Columbia Vancouver, BC V6T1Z4, CANADA

3.25 pm Surface Acoustic Wave Investigation of the Near-Surface Layers Under

Light Irradiation
D.V.Lioubtchenko®. I.A. Marko\/b}, T.A. Briantseva(b), V.E. Lyubchenko<b>
(a) Radio Laboratory, Helsinki University of Technology, P.O. Box 3000, FIN-
02015 HUT, Finland. Tel: +358 9 451 2246, Fax: +358 9 451 2152, email:
dmitri@cc.hut.fi
(b) Institute of Radioengineering and Electronics, Russian Academy of
Sciences, 103907 Moscow, Russia.

111
112
 The low frequency noise in electron devices:
an engineering sight
M.Borgarino, F.Fantini
University of Modena and Reggio Emilia
Department of Engineering Science
Via Vignolese, 905,41100 Modena, Italy
E-mail: borgarino.mattia@unimo.it fausto.fantini@unimo.it

Introduction
The term "low frequency noise" is often associated to physics. Nevertheless the low frequency
noise is a powerful investigation tool for engineering. It can be useful applied by an engineer
working in the technological process field or involved in the design of microwave circuits as well as
operating in the reliability field.
Aim of the present work is to point out that the low frequency noise is a flexible engineering tool
spanning the whole production cycle (see Figure 1). The examples, that will be addresses in the
talk, are briefly itemized in the following.

Material Growth and Technological Process

The low frequency noise is a sensitive tool to investigate the effect of the gate film composition in
MOS field effect transistors [1]. The lowest noise magnitude is got by using thermal oxide while the
introduction of nitrogen in the film gate increases the noise magnitude of several times. This was
ascribed to the increase of interface state density [1].
The quality of the cleaning phase carried out before the emitter deposition in Si/SiGe
Heterojunction Bipolar Transistor (HBT) can be efficiently addressed by looking to the noise power
spectral density of the base current fluctuations [2]. The use of an HF instead of a standard cleaning
technique reduces the base current noise of about two order of magnitude. Transmission Electron
Microscopy microanalysis found this noise reduction correlated with an improvement in the quality
of the deposited emitter film [2].
The low frequency noise can be applied also in the world of the III-V compound semiconductor
HBT's [3]. GaAs-based HBT's featuring compositionally abrupt base-emitter junction exhibit a
noise magnitude lower up to about 20dB with respect to HBT's with a graded base-emitter junction.
A noise reduction of about 5dB was also observed as a consequence of the passivation of the HBT
extrinsic base region.

Microwave Design
The low frequency noise has to be carefully taken into account during the design of microwave
oscillator, because it is up converted near the carrier reducing the oscillator spectral purity, that is
increasing the phase noise [4-6].
Lorentzian components in the low frequency noise of a MOSFET degrades the phase noise of the
oscillator where it is employed [5]. The use of a MOSFET without lorentzian components allowed
to improve the phase noise of a Colpitts oscillator at 900MHz of about 10dBc/Hz at an offset of few
kilohertz's from the carrier.
With the goal of reducing the impact of the low frequency noise on the phase noise the active
device operating point can be optimised in the oscillator design [7]. In this way, a good phase noise
performances of -90dBc/Hz at an offset of 100kHz from the carrier were obtained in a X-band
GaAs HBT based, MMIC, fully integrated Voltage Controlled Oscillator [7].

Reliability
The low frequency noise has been frequently suggested as a useful investigation tool in the
reliability field for several active devices as GaAs-based HBT's (see for instance [8,9]), GaAs-

113
based High Electron Mobility Transistors (HEMT's, see for instance [10,11]), optoelectronic
devices (see for instance [12,13]), Si/SiGe HBT's [14,15], MOSFET's (see for instance [16,17]),
and BJT's (see for instance [17]).
Low frequency noise measurements revealed that hot holes and hot electrons life tests carried out
on Si/SiGe HBT's can not be considered equivalent [14].
The comparison of low frequency noise spectra allows to distinguish between low and high
reliability GaAs HBT's [8] even if, generally speaking, this procedure has to carefully applied,
because the noise magnitude depends not only on the concentration but also on the position of the
defects, as it is well pointed out in [17].
Even if the investigations have been frequently carried out in terms of noise power spectral density,
the use of correlated quantities allows to investigate more in depth the occurring degradation
mechanisms in AlGaAs/InAlGaAs HEMT's [11] and in Si/SiGe HBT's [15].
The low frequency noise found applications also in the investigation of the electromigration in the
metal lines of integrated circuits (see for instance [17,18]).

Conclusions
The previous selected examples collected in the recent literature shows that the low frequency noise
is a tool exhibiting a high degree of flexibility and interdisciplinary, offering a possible common
plane to improve the exchange of information between engineers oft working in specialised sectors
speaking different languages.

References
[I] P.Mourfuli et al, IEEE Electron Device Letters, 1996, pp. 395-397
[2] S.Jouan et al, IEEE Trans, on Electron Devices, 1999, pp. 1525-1531
[3] J-H.Shin et al, IEEE Trans, on Microwave Theory and Technique, 1998, pp. 1604-1613
[4] T.H.Lee, and A.Hajimiri, IEEEJourn. of Solid-State Circuits, vol. 35, no. 3,2000, pp. 326-336.
[5] Y-C.Tseng et al., IEEE Electron Device Letters, vol. 20, no. 1, 1999, pp. 54-56.
[6] M.Regis et al., Proc. WOCSDICE Workshop, 2000, pp. V5-V6.
[7] Z.Ouarch et al, accepted at the IEEE MTTSymposium 2001.
[8] S.Mohammadi et al, IEEE Trans. On Electron Devices, vol. 47, no. 4, 2000, pp. 677-686.
[9] M.Borgarino et al, Microelectronics Reliability, vol. 39, 1999, pp. 1823-1832.
[10] N.Labat et al, Microelectornics Reliability, vol. 37, no. 10/11, 1997, pp. 1675-1678.
[II] B.K.Jones et al, Microelectronics Reliability, vol. 41, 2001, pp. 87-97
[12] X.Y.Chen et al.Microelectronics Reliability, 41, 2001, pp. 105-110.
[13] J.Xu et al, Microelectronics Reliability, vol. 40, 2000, pp. 171-178.
[14] U.Gogineni et al, IEEE Trans. On Electron Devices, vol. 47, no. 7, 2000, pp. 1440-1448.
[15] M.Borgarino et al, Proc. IEEE EDMO 2000, pp. 8-13
[16] R.Brederlow et al, Proc. IEEE IRPS Symp., 1999, pp. 239-242.
[17] C.Ciofi and B.Neri, Journ. Appl. Phys. D, vol. 33,2000, pp. R199-R216.
[18] A.Scorzoni et al, Material Science Reports, Ed. North-Holland Amsterdam, vol. 7, no. 4&5, 1991.

Process

Reliability
Figure 1: the production cycle starts from the material growth and goes through the device
fabrication process, pursuing toward the design of the application and the following reliability
evaluation. In each phase the low frequency noise finds applications.

114
 Noise Behavior Of Advanced SiGe HBT

L. Bary1, G. Cibiel1, J. Ibarra1, O. Llopis1, R. Plana1, J. Graffeuil1, G. Niu2,

J.D. Cressler2, Z. Jin2, S. Zhang2, A.J. Joseph3 and M.Borgarino4
1 LAAS-CNRS and Universite Paul Sabatier, 7 av. du Col. Roche,
31077 Toulouse Cedex 4, FRANCE
2
Department of Electrical and Computer Engineering, Alabama Microelectronics Science and
Technology Center, 2000 Brown Hall, Auburn University, Auburn, AL 36849, USA
3
IBM Microelectronics, Essex Junction, VT 05401, USA
4
Universitä di Modena e Reggio Emilia Facoltä di Ingegneria Dipartimento di Scienze
dell'Ingegneria Via Vignolese, 905 1-41100 Modena Italy

I-INTRODUCTION
SiGe HBT technology has been approved for RF applications like mobile phone or Wireless local
area network with frequency up to 6 GHz. Today we are seeing a fantastic explosion of what is
called the "wireless society" and the associated frequency range will go to the millimeter wave
range. The previous requirements in term of noise linearity, power consumption, reliability and cost
are still valid and some time they are exacerbated specially concerning the noise aspects due to the
spectrum saturation, the increase bit rate and the increase of the potential users. All these new
changes are motivating researches in order to push SiGe technology to the millimeter wave range.
In the same time, the SiGe technology CMOS compatible has to be kept in order to still have the
opportunity to integrate on the same chip the analog and the digital modules. There is two possible
ways to get device featuring higher frequency performance. The first one consists to shrink the
device size. But it is known that usually, it turns to a degradation of the low frequency noise
magnitude and then a degradation of the spectral purity of the microwave source. Furthermore
shrinking the device size enhances the outdiffusion of the base dopant which is again a bad effect
concerning the noise behavior of the device. The outdiffusion effect can be overcome by including
some carbon as a co-doping in the base of the device. But so far, no demonstration has been done
concerning the low frequency noise and the phase noise behavior of SiGeC base HBT. The second
way we will discuss here deals with an increase of the Germanium rate which of course yields to an
improvement of the frequency performance. Nevertheless, it is known that increasing the Ge rate
increases the strain in the base layer due to the lattice mismatch between Silicon and Germanium.
The devices discussed in this paper come from IBM. They feature Ge rate ranging from 0% to 18%.
II- ELECTRICAL BEHAVIOR
We have performed an exhaustive characterization (including static, noise figure, S parameters, low
frequency noise and residual phase noise). The devices exhibit emitter width of 0.5 \im and emitter
length of 10 urn or 20 urn. Note that some device features two emitter fingers. We have shown that
increasing the Ge rate turns to an improvement of the maximum oscillation frequency from 52 GHz
to 67 GHz when the noise figure measured at 2 GHz comes from 0.66 dB to 0.2 dB. Similar results
have been observed concerning the DC behavior as we get an increase of the current of the device
when the Ge rate increases. The results are summarized intable 1. Fig.l and Fig.2 show the low
frequency noise measurements associated with the collector current and base current fluctuations
respectively. We can observe that the Ge rate has no effect on the noise behavior occurring at the
collector side which is relevant with the constant collector current value. Concerning the base
current fluctations, the results indicate that the low frequency noise magnitude decreases with the
Ge rate which is again relevant with the base current value. It is shown that there is no degradation
associated with the Ge rate meaning that the strain management in the structure has been optimized.
Residual phase noise measurements have been performed from a 3.5 GHz microwave source.
Results are reported in fig. 3 where we can observe that increasing the Ge rate results to an

115
improvement of the residual phase noise behavior which is consistent with the behavior we
observed on the low frequency noise measurements. This result is very attractive as it means that it
will be possible to realize microwave oscillator at higher frequency with a better phase noise
performance. One very important issue deals with the location of the low frequency noise sources
and residual phase noise measurements with appropriate termination are a very efficient way to
clarify this point. Fig.4 presents reisudal phase noise measurements with low frequency short circuit
termination. The results indicate that it results to an improvement of the noise magnitude (See table
2) confirming the physical location of noise sources at the input and at the ouput of the device. We
will present a low frequency noise model that will be embedded into a microwave software to
predict the phase noise of microwave oscillator.

peak Ge None 10% 14% 18%

in the base
ß (current gain) 67 114 350 261
atVBE=0.7V
BVCEO(V) 3.5 3.2 2.7 2.7
peak fT (GHz) 38 52 52 57
peak froax (GHz) 57 64 62 67
NFmin(dB) 0.66 0.43 0.21 0.20
@Jc=0.1
mA/(am2
1000
and f=2 GHz Frequency [Hz]
Table 1: Summary of electrical characteristics of the
Figure 3: Residual phase noise with three different Ge
devices.
profiles, 0%, 10% and 14% (Jc=4kA/cm2, VCE=1V,
10 * emitter area—lOfim2)
"P , c %Ge ■■-•■■-10% Ge- =ffi
T^
\ "
\
\ .-, 14% Ge \ 18% Ge
iu
\
i
5
< 10
20 V
Tjfc >. "?
-- S
■' '• '■;' i
iV
■Ml
.1 >/ i a
i
-tlBÖP
"I Tjfii
[ -,«•.<
1%
4 \

10
?.l fl ? !kpih:v.,j

1000
Frequency [Hz] Frequency [Hz]

Figure 1: Evolution of S/c versus different Ge content

(Jc=lkA/cm2, VCE=1V, emitter area-10fxm2) Figure 4: Residual phase noise with and without
capacitors at the input and the output of the transistor
10 •20 (0% Ge, Jc=4kA/cm2, VCE=1V, emitter
2
area=20fim )
NIL
%Ge Incj-e^se 31
1
io-21 " ^*-*•*
Residual phase noise Residual phase noise
-~-M
9 -^1 @ 1 kHz(dBc/Hz) @J0kHz(dBc/Hz)
22
^ io- ''Y,,
Without,
< ' re
rfesssel
& 10-23 -t ■ ' 'v-.:V'"-;^

fssm iff wM-: ■—

OioGei
10% Cn.
1_4%U
15*
-J57
L_^
_, :
¥?:
IM
I ~f'1
"tl ]
io-24 1 1 With capacitors
0% Ge -155 -162.3
5
102
103 IO4 io 10% Ge -157.8 -163.5
Frequency(Hz) 14% Ge -159.5 -165.4
Figure 2: Evolution of Sic versus different Ge content Table 2: Comparison of the residual phase noise
(Jc=lkA/cm2, VCE~1V, emitter area=10jum2) measured with and without capacitors at the input and
the output of the devices

116
 IBIC ANALYSIS OF GALLIUM ARSENIDE SCHOTTKY DIODES

C.Manfredotti1'2, E.Vittone^F.Fizzotti1,2, A.LoGiudice1'2, F.Nava3

'Dip. Fisica Sperim., Universitä di Torino, INFN-Sez. di Torino, via P.Giuria 1,10125 Torino (I)
2
INFM- Unita di Torino Universita, via P.Giuria 1, 10125 Torino (I)
3
Dipartimento di Fisica, Universitä di Modena, Via Campi 213/A, 41100 Modena, Italy

Semi insulating (SI) gallium arsenide (GaAs) devices operating as a reverse biased Schottky diode offer an
attractive choice as radiation detector at room temperature both in high energy physics experiments and as x-
ray image sensors. However, SI GaAs devices contain a high concentration of traps, which decreases the
charge collection efficiency (cce), and affects also the energy resolution of such detectors working as
nuclear spectrometers in cases of a partial depletion of the detector by the external bias. A factor which
greatly affects the energy resolution is given by a spatial nonuniformity of cce distribution in the electrode
area.
In this paper we present a detailed investigation of the spatial uniformity of the charge collection efficiency
carried out by analysing ion beam induced charge (IBIC) maps obtained by scanning a focused 2 MeV
proton microbeam on a SI n-GaAs Schottky diode. The microbeam irradiated both the front (Schottky) and
back (ohmic) contacts in order to evaluate the transport properties of both electrons and holes generated by
ionisation. Moreover, lateral IBICC measurements were performed in order to evaluate the electric field
profile.
The detectors studied in the present work were made on commercially available SI LEC undoped <100>
oriented GaAs substrates with n-type resistivity p~107 Dem. They were intentionally doped with C atoms in
order to compensate for the presence of EL2 traps. Sample L was given a concentration of 3x1014 cm"3,
while sample A had a higher concentration ( 8xl014 cm"3 ). The fabricated detectors were (100 ± 6) urn
thick with: i) circular Schottky contacts (2 mm in diameter) realised on the front side by Ti/Pt/Au
metallization and ii) uniform ohmic contacts realised on the whole back surface by e-beam deposited
Au/Ge/Ni metallization. A 2 mm hole on the sample holder was made in order to allow the back contact to
be irradiated.
The ion beam induced charge (IBIC) measurements were performed with the proton beam intensity
maintained as low as possible (less than 300 protons/s) in order to avoid saturation and pile-up of the
electronic chain and space charge creation. The dimensions of the 2 MeV proton microbeam spot was about
8 urn2 and the charge signal was recorded as a function of the beam position. The charge collection
efficiency measured for protons impinging on the front electrode is primarily due to the electron drift in the
detector, whereas for the back side exposure, the cce is primarily due to hole drift. The charge collection
efficiency was evaluated by normalising the pulse height to the response, obtained in the same experimental
conditions, of a Si surface barrier detector whose cce was assumed equal to 100%.
Detector A, front irradiated, showed a collection efficiency of about 80 %, with a saturation at about 100 V
bias voltage, with an almost flat behaviour of the energy resolution (1-1.5%) as a function of the bias
voltage in the interval 50 and 400 V. In back irradiation, cce was lower ( 80 % above 250 V ) while the
energy resolution was slightly better ( below 1 % ). Energy resolution showed a strong inhomogeneous
broadening, because in the homogeneous regions energy resolution was much lower than 1 %. An
inhomogeneous broadening was also observed at largest bias voltages, which was apparently related with
the small circular region close to the contact boundary and it was tentatively attributed to the start of an
almost full, electrical field induced, collection of charge carriers generated by protons impinging externally,
but very close to the electrode. As a matter of fact, due to the particular geometry adopted for the contacts,
the depletion region moves also externally, since the back electrode is much larger than the frontal one.
Detector L, front irradiated, displayed a collection efficiency of more than 90 %, but a worse energy
resolution, not better than 2 %, with a maximum of 4 % at lower bias voltages. In fact, several regions of
dimensions 200 - 300 mm were present in IBIC maps which were not connected with any possible presence (
powder, etc. ) or effect ( different thicknesses of the electrodes, etc. ) not to be attributed to the sample itself.
As a proof, regions of different starting cce ( at lower bias voltages ) were followed as a function of the bias
voltage itself: the ratio between the cce's varied below saturation, indicating regions with different values of
(mobility)x(lifetime) \XT products for charge carriers. This fact could be taken as a proof that carbon helps in
the homogeneisation of cce, but in conclusion lowers the cce itself.
Finally, lateral IBIC measurements were carried out on cleaved cross-sections of GaAs detectors in order to

117
investigate the behaviour of cce as a function of depth and of the bias voltage. Profiles of cce were almost
uniform in depth for cce values below 60 %, i. e. in cases in which a linear relationship is expected between
cce and collection length, which is represented by the product of (J,T and electrical field E. As a consequence,
E is uniform in the depletion region and Schottky barrier is in fact a Mott barrier, with a distribution of
space charge only at the border of the depletion region. Since in our case the penetration depth of protons is
more than 30 urn, this is a proof of a previous result obtained by surface techniques.. The behaviour of
depletion layer width vs. bias voltage was almost linear, with a power dependence with an exponent of about
0.95, in good agreement with previous results.

mwM 20.84
PID 17 flit 19.34
pmiH^d 17.B4
m& KM 16.34
-,-■-:,; 13.34 14.B4
«11.84 13.34
R8Ü 10.34 11.54
KS^a.840 10.34
HHt 7.34(1 8.840

■'"' 7.3«

Frontal IBIC map of represented sample L - Bias voltage 30

V - Charge collection efficiency is by a colour scale

200

30 40 50 60 70 80 90100 200

Bias Voltage (V)

Behaviour of depletion layer width as a function of bias voltage

Charge collection efficiency
1,0 |

0,8

1
183^ f*v 8p f~m-
35IV
t
""IMSICJS^^"
40 60 80 100 120 140 160 180 200 220 240 260
Depth ((im)

118
 Electrical and optical properties of resonant tunneling structures with
interdigitated gates.

S.A.Vitusevich1, A.E.Belyaev2, N.Klein1, W.Reetz3, A.Förster1, S.V.Danylyuk2 and

D.I.Sheka4

Institut für Schichten und Grenzflächen, Forschungszentrum Jülich, D-52425, Germany

institute of Semiconductor Physics, NAS of Ukraine, 03028 Kiev, Ukraine

3
Institut für Photovoltaik, Forschungszentrum Jülich, D-52425, Germany
4
Radiophysics Faculty, National Taras Shevchenko University ofKiev, 03127 Kiev, Ukraine

P-i-n structures as well as Schottky diodes are the most frequently used photodetectors
in the visible and mid-infrared range. An important advantage of such devices is the
possibility of an intentional change of the depletion region width to provide the optimum
quantum efficiency and time response. The main aim is to achieve a very low leakage current.
One way could be the use of current blocking barriers embedded inside the depletion region.
In that sense a double-barrier structure placed in an insulating layer of a p-i-n diode or in a
depletion region of an Schottky diode seems to be very promising in fabrication of high
performance photodetectors.
In this communication we present our recent results on electrical properties and
spectral photosensitivity of double-barrier resonant-tunneling diodes (DBRTD) embedded in
a depletion region of an Schottky contact at room temperature (Fig.l).

The structure design was as

follows: the upper electrodes were
placed on top of a heterostructure
surface in a form of interdigitated
fingergates. Each fingergate consists of
20 Ti stripes each 20 \im long and b
\im wide (b = 0.5, 0.7, lu/w). The
distance between the gates, a, is varied
from 0.5 to 1 \im. The electrodes
represent the Schottky contacts to the
DBRTD multilayer heterostructure with the
barrier height §o- The heterostructure
for the measurements was grown by
molecular-beam epitaxy (MBE) on a
(100) n+ -GaAs substrate: 200 nm n+-
GaAs (n = lxlO18 cm3) and 100 nm
undoped GaAs spacer layers followed
by a double barrier structure (2 nm
Fig. 1. Double-barrier resonant tunneling structure
AlAs barrier, 4 nm GaAs well and 2
with an interdigitated fingergates. nm AlAs barrier). An undoped GaAs
layer serves as a capping layer varied from 40 to 100 nm in different devices.

119
 The system of
1 1
1 1 ' 1 1 1 ' 1 ' interdigitated fingergates was used
i
38 to form a periodic potential profile
< . I 'i ' i ' i
- ■

36 \ £.36.8 in a multilayer heterostructure.

\ § 36.6
< 34
£ J Vg = -1V
Vg
\o36.4 /i' /, i , i i i . = -2V -
-
The electrostatic problem for the
spatial distribution of the potential
32 \ 0.988 -0.980 -0.972 - profile was solved and
c
<D 30 - 1 V substrate (V) experimentally examined
measurements of current-voltage
by

Ü 28 characteristics of the device.

26 Current-voltage characteristics
were measured operated in
1 . i,i. i,i,i
transistor mode (common-drain
-1.1 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 configuration) at room
V substrate (V) temperature. Figure 2 shows the
current-voltage curve of the device
Fig.2. Current-voltage curve of the device at negatively at a negatively biased substrate and
biased substrate and Vg = 0. Inset: I-V curve at different Vg = 0. The resonance occurs
Vg taken in the proximity of the resonance peak. when the Fermi level in the emitter
aligns with the lowest electron
level in the quantum well(QW). The position of the resonant peak voltage Vsr is sensitive to
the spatial potential distribution. In Figure 3 we present the results of the calculation of Vsr
performed for Schottky barrier height equal 0.75eV and a=b=0.53 urn. Experimental data
(circles in Fig.3) are in very good agreement with the theory, which proves the validity of our
Vsr(V) model. With appropriate
a=0.40 parameters of the heterostructure
1.002:
and gate design the effect could be
1.000: enhanced considerably.
Furthermore the formation of a
a=0.53 Xo.998: potential superlattice was
*"——-——-i__ demonstrated. At a certain gate
voltage a renormalization of the
a=0.66 effective confinement potential
0.994:
transform a two-dimensional QW
0.992: into a one-dimentional quantum
wire array.
: The photoresponse
0.990
characteristics of the device reveal
r " r-"-T-
»■■-«—i—i—i—i—i—i | ■ ■ -r—i—-I Vfl(V)
-3 -2 -1 a strong dependence on the spatial
potential distribution controlled by
the fingergates voltage. The device
Fig.3. Dependencies of resonance voltage versus Vg shows a very high photosensitivity.
calculated for different spacing between gates. Circles It could be interpreted with
represent experimental data. additional carrier acceleration in
the built-in field of an Schottky
contact.
We suppose that the Schottky diodes with the DBRTD embedded in the depletion
region could find application in a new kind of electronic and optoelectronic devices.

120
 CARRIER MOBILITY in a FORWARD-BIASED JUNCTION

A.R. St.Denis, D.L. Pulfrey and M. Vaidyanathan

Department of Electrical and Computer Engineering

University of British Columbia
Vancouver, BC V6T1Z4, CANADA

Contact: pulfrey@ece.ubc.ca

There is a long-standing issue over the nature of the carrier mobility in a forward-biased barrier,
i.e., a barrier in which the net flux moves electrons up a potential energy gradient. In a reverse-
biased barrier, however, it is well understood that the electron distribution is heated, and this
leads to a reduction in carrier mobility. In a forward-biased barrier, however, the electron
distribution is cooled, and it therefore seems reasonable that the carrier mobility should not be
reduced from its equilibrium value, and may even be enhanced.
Historically, this issue may not have had much practical importance in the analysis of bipolar
transistors, since their operation has been governed largely by transport through a low-field base
region and a reverse-biased base-collector junction. In modern III-V bipolar transistors, however,
device scaling and bandgap engineering have led to optimized devices in which transport through
the forward-biased emitter-base junction may be an important factor in limiting device
performance. Consequently, the issue of the nature of the carrier mobility in such regions has
become one of considerable importance.
In this presentation we examine the problem by solving the Boltzmann Transport Equation (BTE)
in a uniform field region, for fields which can be either retarding to electrons (as in a forward-
biased junction), or accelerating to electrons (as in a reverse-biased junction). The transport is
modeled via a kinetic approach, and the BTE is solved in an iterative fashion.
Results are presented for the case of isotropic, elastic scattering. They reveal that the mobility is
determined by the antisymmetrical part of the electron distribution, and that this part of the
distribution is the same, regardless of the direction of the electric field. In other words, for this
type of scattering, at least, the mobility depends only on the magnitude of the electric field, and
not on its direction.
In hindsight, the link between mobility and the antisymmetric distribution function appears quite
natural. It has guided us to derive the following insightful equation, which appears to hold true for
not only acoustic phonons, but also for scattering mechanisms particularly relevant to m-V
semiconducting materials, such as polar optical phonons and ionized impurities:

jkzfA(k)dk
9
V= m
j^jA(k)dk-\kz^fA(k')S(k',k)dk'}ik '
x(/r)

where S is the transition rate, x is the lifetime and scattering is between the states k' and k

121
122
 Surface Acoustic Wave Investigation of the Near-Surface Layers Under
Light Irradiation.
D.V. Lioubtchenko*, I.A. Markov**, T.A. Briantseva**, V.E. Lyubchenko**
"Radio Laboratory, Helsinki University of Technology, P.O. Box 3000, 02015 HUT, Finland, email: dmitri@cc.hut.fi
**Institute ofRadioengineering and Electronics, Russian Academy of Sciences, 103907 Moscow, Russia.

Testing of the surface and near-surface layers of A3B5 semiconductors with surface acoustic
waves (SAW) propagation is effective and gives a lot of new information in addition to
conventional methods of crystal morphology investigation [1]. In the previous works authors
demonstrated a study of semi insulating GaAs, in which SAW was exited with interdigital
transducers [2]. Unfortunately this method cannot be applied to the conductor samples because of
low efficiency of the transducers.
In this work we propose a method of surface acoustic wave (SAW) diagnostics, which the
investigated sample surface places at the LiNb03 plate, where SAW is exited and propagates.
LiNb03 crystals are transparent for the light, so the properties of the semiconductor can be studied
under white light illumination.
SAW propagation parameters (absorption and velocity as well as acceleration) give specific
time-domain responses for each studied material. Besides time dependences of these data discover
some different behaviors in dependence on the light and SAW intensity. Moreover it is pointing that
SAW absorption and velocity changing happened due to the light exposition on the whole are
caused by melting and/or mixing reaction velocities in the subsurface layers. The furrier analysis
used in this case allows the spectral response of the happened reactions to be built. Such
mathematical analysis may be carried out, particularly, for the second derivative magnitude time
dependence. Oscillations are experimentally observed in SAW velocity time domain responses,
which look like stepwise form. The spectral picture is found to be specific kind and inherent to each
substance of the investigated surface acceptable as to metal so to the semiconductor and dielectric.
It seems to be formed by the complex physical and chemical phenomena involved including the
effect of air ionization.
The OH", H+ ions besides CO3"2 and others as known may be formed in an air because white
light illumination. Besides the molecule dipole polarization is occurred under the ultra high
frequency electrical field. The SAW is accompanied with electrical field (108 Hz in our
experiments). The electrical part of the SAW propagated along the piezoelectric substrate has two
vectors E, one of them is normal to the LiNb03 surface and influences on air molecules took place
in the clearance between contacting surfaces and other is along propagating direction and influences
on the surface molecules. Dipole polarization with characteristically time x « 10~3- 10"9 s is the main
kind of polarization for water consisted substance which is really the room air. As known dipole

123
molecules have chaotic distribution at the electrical field absence and became ordering along force
line under ultra high frequency electrical field. Besides the separated micro-region may be moving
relatively to each other. The SAW absorbed energy spends on the molecule excitations so in the air
micro-layer took place near at the LiNbÜ3 surface or immediately in the dielectric surface. It needs
to wait for the temperature ionic polarization at the boundary with the LiNbCb surface (x«10'7-10"13
s) due to the SAW absorbed energy. All of these cause the molecular interaction increasing at the
boundary with LiNbC>3. The interaction reactions between an air and dielectric molecules result in a
new compound formation, for instance LiOH, LiH, Li203, etc. It is achieved with rather large local
energy extracting resulted in doped ion and electron arising so in the air layer near the dielectric
surface.
The electrical polarization connected with free charge carriers moving to the system
boundaries (te^lO^-lO2 s) is observed. It leads to the chemical interaction increasing also and
resulted in a new compound forming (such as Me-OH or Me-0 etc.) so at the LiNbC>3 as at the
investigation sample surfaces. It is known that when two plates became concerned and one of them
is heated in more degree it appears pushing off forces normally to their boundaries. At this surface
faced to the LiNbC>3 is under the superior pressure then the back one.
Thus the plastic deformation will arise in the investigated plate followed by particle motion
(they may be electrons, ions, Ga and As atoms, etc.). As a sequence of surface properties both
elastic (viscosity coefficient) and electrical (charge state so as dielectric permittivity) states are
changed in accordance to extent of probability for particles to be arrived to the plate surface. It leads
to high frequency electro-magnetic radiation emanated from the surface of the sample putted over
LiNbC>3. The cause of such emanation is the structure polarization of molecules free or low
connected with crystal lattice. The correlation between irradiation frequency and velocity of
molecules orientation relaxation (109-1013 s"1) occurs. Thus acoustic wave in the LiNbC>3 near-
surface layer realizes under influencing of high frequency field reflected from the plate putted over.
It is accompanied with direct and indirect excitation of the LiNb03 sublayer molecules resulted in
its viscosity and SAW propagation characteristic changing. Here we have the arrangement looked
like spectrum analyzer where charge particles source is the LiNbC^ surface and the investigation
sample surface is a target and ionization air is conductivity media above that LiNbÜ3 surface with
SAW propagation themselves being the perturbation detector.

References
1. T.A. Briantseva, TJ. Bullough, D.V. Lioubtchenko, I.A. Markov, E.M. Tolmachev, "SAW diagnostics of GaAs
surface structure", Physica B: Condensed Matter (263-264) 1 (1999) pp. 84-86
2. A. Markov, T.A. Briantseva and D.V. Lioubtchenko. "Modifications of GaAs surface under Au evaporating Flow".
Proceedings of International Conference of Mass and Charge Transport in Inorganic Materials (Italy) 2000 in press.

124
 SESSION IX
Advanced Devices and materials
Chair: Lester F. Eastman
Tuesday May 29, 2001
4.00 pm Premature Saturation in AIGaN/GaN HFET's.
R.J. Trew
INVITED EECS Department, Case Western Reserve University, Cleveland, OH.

4.25 pm Surface and nearsurface transformations in A3B5 semiconductors

under typical technology enforcements
D.V.Lioubchenko, T.A.Briantseva, V.E.Lvubchenko
Inst. of Radioengineering and Electronics, Russian Academy of Sciences,
Moscow

4.40 pm New Concept of Antireflective Films With Silicon Oxynitrid Graded

Refractive Index
L Zighecfa), M. Remram{b). A. Abuarafah{b)
(a) Departement d'Electronique, Faculte des sciences de I'ingenieur
Universite Mentouri, Constantine, 25000
(b) College of technology Makkah, Kingdom Saudi-Arabia.

4.55 pm Equivalent Circuit and High-Frequency Performance of the Resonant-

Tunneling diodes
M. N. Feiginov
Tech. University of Chemnitz, Reichenheiner Str. 70, Chemnitz 09107,
Germany

5.10 pm Optimisation Criteria for a Frequency Tripler with Anti-Serial Schottky

Diodes
M. Krach. J. Freyer, and M. Claassen
Walter Schottky Institut, Technische Universität München, Am Coulombwall,
D-85748 Garching, Germany
5.25 pm Hexagonal Binary Decision Diagram Quantum Circuits on lll-V
Nanowire Networks - a Novel Approach toward Quantum LSIs-
H. Haseaawa and S. Kasai
Research Center for Integrated Quantum Electronics and Graduate School
of Electronics and Information Engineering, Hokkaido University, N-13, W-8,
Kita-ku, Sapporo 060-8628, Japan

5.40 pm Surface-Related Kink Effects in AIGaAs/GaAs Power HFET's

E. Tediosfa). G. Verzollest, C. Canalfa), G. Sozzfb), R. Menozzfb), C.
Lanzierfc)
(a) Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena
e Reggio Emilia, via Vignolese 905, 41100 Modena, Italy
(b) Dipart. di Ingegneria dell'lnformazione, Universita' di Parma, 43100
Parma, Italy
(c) Alenia Marconi Systems, via Tiburtina, km 12, 00131 Roma, Italy

125
126
 Premature Saturation in AlGaN/GaN HFET's
R.J. Trew
ECE Department
Virginia Tech University
Blacksburg, VA
r.trew@ieee.org

Field-Effect Transistors based upon the AlGaN/GaN heterostructure are predicted to be

capable of producing RF output power on the order of 10-12 W/mm of gate periphery. This is
almost an order of magnitude greater than possible from GaAs-based devices. Spot experimental
results indicate performance in agreement with the theoretical predictions, and approximately 10
W/mm has been obtained in C-band and X-band. Power-added efficiency, with good gain, also
approaches the theoretical expectations, at least through C-band. However, the RF performance
of these devices often demonstrate premature saturation and the gain experiences compression at
relatively low RF drive. It is observed that the drain current decreases with RF input drive, which
is not in agreement with the normal operation of these devices. Highly non-linear performance
results, which limits or precludes the application of these devices as power amplifiers in many
communications and radar applications.
As shown in Fig. 1 there are several locations within the HFET where nonlinear charge
behavior could produce premature saturation.

Surface Traps

Space-Charge
Substrate (SiC, Sapphire)
Effect Charge Dipole
's. Domain

Interface Effects
Fig. 1 HFET Sources of Nonlinear Performance

Current slump and premature saturation can be caused by a high density of surface charging
states that deplete the conducting channel, thereby producing a reduction in current as the states
become increasingly charged. Although surface state charging significantly affects HFET
performance, these effects alone cannot explain the experimental data. Current slump and
premature saturation can also occur due to space-charge suppression of the electric field in the
source region. Space-charge effects occur due to the high current density at which these devices
are operated (e.g., Jds~106 A/cm), and the lack of background impurity doping that would resist
space-charge effects. In the absence of surface state effects, space-charge suppression in the

127
source region would still produce current slump and premature saturation of the RF gain. This
effect is consistent with experimental data.
It can be shown that the electric field at the source contact can be written as

kT dbn(x)
^(0)-?fi„
9 ) dx
q\i„{n0+dn(0J)

where E0is the electric field, 8n(x) is the excess injected charge and J(0) is the dc channel
current at the source contact. The suppression of the electric field and the corresponding
reduction in channel current for an AlGaN/GaN HFET is shown in Fig. 2.
10
... .. .-._.. - ..-— ■ ' .. .

•i<

at 0.1 E
■<h .... \
S
I ft

0.1 0.01
10 10"

Injected Charge Density, Sn(0) (cm-3)

Fig. 2 Electric Field and Channel Current Suppression as a

Function of Injected Charge Density for an AlGaN/GaN
HFET

The reduction in channel current causes a reduction in RF output power, power-added efficiency,
and gain, as shown in Fig. 3.

101'
3
N +dn(0)(cm )

Fig. 3 RF Performance as a Function of Injected Charge

for an AlGaN/GaN HFET Showing Premature Saturation

It is demonstrated that source region space-charge suppression of the electric field occurs
under high-injection conditions and that this effect can cause premature saturation. Realization of
linear high power amplifiers fabricated from these devices will require that the HFET be
designed so that this effect is minimized.

128
 Surface and Near-Surface Transformations in A3B5 Semiconductors Under
Typical Technology Enforcements
D.V.Lioubchenko, T.A.Briantseva, V.E.Lyubchenko

Institute ofRadioengineering and Electronics, Russian Academy of Sciences

11 Mokhovaia Str., 103907Moscow, Russia

The fabrication of semiconductor devices requires processes such as thermal treatment,

lithography, contact deposition etc., which affect the near-surface structure and composition of the
semiconductor materials. The process-induced changes can in turn affect device performance. It has
been noted [1] that all structure and composition changes to the surface are accompanied by
thermomechanical strains leading to point defect motion, dislocation generation etc. In the case of
crystalline semiconductors, investigations of surface composition should allow the effects of such
parameters as crystal tensile strain and the dynamics of the mechanical stresses in the subsurface layers
to be investigated.
Lattice transformations in the near-surface layers of GaAs, InP, GaN were studied as been
induced with nonthermal enforcements of the light, microwave or electron beam irradiation,
mechanical compression and current flow during such actions as optical or electron beam lithography,
wire bonding, vacuum deposition of thin films, which are widely used in the semiconductor device
technologies. The discussed effects were indicated by chemical analysis, Auger spectroscopy,
conductivity measurements and surface acoustic wave diagnostics and analyzed as a result of the
plastic deformations and chemical reactions.
The observations presented in this study indicate an overall decrease in "free" Ga and As
presence at the surface or otherwise crystalline GaAs after processing by ultrasonic
thermocompression, current flow, electron beam irradiation, mm-wave irradiation or laser irradiation
and annealing, compared with that presented prior to irradiation [2,3]. In general the "free" Ga and/or
As increases gradually only after a rapid initial decrease as the process time or temperature is
increased. It is well-known that "free" Ga and As atoms can be generated on the surface of crystalline
GaAs by chemical reactions, such as oxidation [4], during surface treatments or during epitaxial
growth due to the excess flux of one of the components in the growth chamber [1], or during thermal
processing as Ga and As interstitials are generated in the bulk and diffuse to the surface, such as during
laser annealing or laser assistant growth of Al film on the semiconductor surface which results in Al-
Ga-N compound formation at the GaAs surface. As well as these simple thermal processes, more

129
complex changes can occur with dissolution of surface oxide layers or interactions e.g. with thin metal
films covering the semiconductor surface. Thermal processing can also cause recovery and
recrystallization, and can lead to an improvement in the crystalline quality of the near-surface region.
Free Ga and As can also be generated by surface mechanical stresses; for instance the
mechanical deformation of GaAs crystals can result in diffusion of interstitial atoms towards tensile
strained regions, with vacancies moving towards compressive strained regions. The force experienced
by the interstitial atoms and vacancies is proportional to the pressure gradient, and the distribution of
point defects will re-adjust at unloading. Stress relaxation takes place during mechanical loading, as
well as when the sample deformation is held constant, and during sample heating. The relaxation
processes are driven by internal stresses, generated during the preliminary deformation. In diffusion-
controlled processes, the point defects may start and finish not just on the external sample surface, but
also at grain boundaries, stacking-faults and dislocations.
Diffusion creep can also take place as a consequence of a variety of irradiation processes as well
as thermal activation, with the point defects created by the irradiation adding to the equilibrium point-
defect concentration at the irradiation temperature, promoting the rearrangement of the point defects
into configurations nearer to equilibrium. For instance, vacancies will move to regions under tensile
strain, and interstitial atoms to compressed regions during heating.
The irradiation procedures described above can clearly produce composition changes on the
surface and near-surface layers of semiconductor devices that could result in device degradation. The
experimental data shows that such changes take place by diffusion mechanisms associated with plastic
deformation prior to creeping, even at the relatively low irradiation energy, which was used in this
work.

References
[1] H.F. Matare. Defect Electronics in Semiconductors, Wiley-Interscience, New York, 1971.
[2] T.A. Briantseva, Z.M. Lebedeva, I.A. Markov, T.J. Bullough, D.V. Lioubtchenko. App. Surf. Sei.
143 (1999) 223-228.
[3] D.V. Lioubtchenko, T.A. Briantseva, Z.M. Lebedeva, A.V. Räisänen. Defect and Diffusion Forum
vol. 194-199(2001)
[4] T.A. Briantseva, V.Yu. Vinichenko, G.G. Dvoriankina, E.B. Sokolova, E.O.Iunevich, Neorg. Mat.
(Russia) 25 (1989) 1422.

130
 NEW CONCEPT OF ANTIREFLECTIVE FILMS WITH
SILICON OXYNITRID GRADED REFRACTIVE INDEX.
L. Zighed, M. Remram, A. Abuarafah*
Departement d'Electronique, Faculte des sciences de VIngenieur
Universite Mentouri, Constantine, 25000
*College of technology Makkah, Kingdom Saudii-Arabia.
Fax:0096625220116 E-Mail: moh_remram@yahoo.fr

Abstract: the objective of our study was to develop a new concept of antireflective films based
on the use of a layer in which the refractive index vary continuously with thickness. The silicon
oxynitride properties had made it better candidate for obtaining a graded refractive index for a
silicon solar cells. In the absence of a general method permitting a direct calculation of the
variation function of the index, which lead to the desirable optical response, we have use the
optical theory of stratify medium, which permit to determine the parameters of the optimum
graded antireflection coating.

Introduction:
The disadvantages established, in the case of use of classical antireflection coatings which had a
constant index, have lead to the research of a new type of coating: a graded refractive index antireflection
coating, that's mean, an inhomogeneous layer in which the index change continuously in accordance with
thickness. Potentially, this system should permit to get zero reflection in a large range of wavelength and
for different angle of incidence 1,2]
So, we have fixed the following objectives: show that the graded index layers minimise the reflection
under the conditions of oblique incidence on the one hand, and the research of the parameters of the
optimal layer on the other hand.

Results :
To carry the graded index our choice is bring on silicon oxynitride, because of their properties
which are intermediate between those of silica and silicon nitride.
In our study, the variations of the volume fraction of Si02 in accordance with thickness e: fs;o2(e) are used
to describe the variations of the refractive index in the layers.
Experimentally, we can realised layers in which the volume fraction of silica vary between 0.25 and 0.95.
In calculations, we have considered that the coatings studied are composed of 100 sublayers, this
permit to minimise the step of the index leap . This coatings have, linear, parabolic or third polynomial
degree profiles. It can be increasing or decreasing. The variation low of the volume fractions in the
different profiles are shown in table 1.

Table 1: Variation lows of the volume fraction of silica in graded index layers

profile fsi02<x)
linear -0.0071X + 0.95
parabolic 0.0000714 x2 - 0.0141414 x +0.95
polynomial -0.0000007X3 + 0.000214 x2 - 0.021212 x + 0.95

Where x is the number of the sub layer, it vary between 1-100.

First, we have optimise the thickness. The optimal layer is the one which minimise reflection in
the spectral region of maximum energy. We have find that it's of 100 nm in all cases (see figure 1, case of

131
increasing linear gradient). Next, we have proceed to the research of the optimal coating under oblique
incidence conditions. In this stage, to valid our work, we have compare the reflection factors obtained by
the use of graded index layers with those obtained when the antireflective coating is a double layer of Si02
/Ti02 centred on 600 nm.
So, we have obtained the curves shown in the figures 2, 3 and 4 that present factors of reflections
of the different coatings under normal incidence, 45° and 80°, respectively.
Conclusion:
From the different results, we can say that the graded index layers minimise the reflection under
oblique incidence, and that the optimal layer is the one which have a third polynomial degree increasing
profile, of 100 nm thickness, in which the index vary between 1.4832 and 1.8714 at 600 nm.

l ' r
400 600 800 1000 600 800 1000
wavelength(nm) wavelength(nm)
Fig.l : Optimisation of the thickness of an Fig.2 : Reflectance of the different graded index
increasing linear graded index coating. coatings of 100 nm thick under normal incidence.

600 800 1000 600 , 800 N

wavelength(nm) wavelength(nm)
Fig.3 : Reflectance of the different graded index Fig.4 : Reflectance of the different graded
coatings of 100 nm thick under oblique index coatings of 100 nm thick under oblique
incidence (0= 45°). incidence (9= 80°).
[1] P. L. Swart, P. V. Bulkin, B. M. Lacquet, Opt. Eng., Vol. 36, N° 4, (1997), p 1214.
[2] S. Callard, A. Gagnaire, J. Joseph, J. Vac. Sei. technol. A, Vol. 15, N° 4, (1997), p 2088.

132
 Equivalent circuit and high-frequency performance of the resonant-
tunneling diodes
M. N. Feiginov
Technical University of Chemnitz, Professur für Hochfrequenztechnik, Chemnitz, Germany.

Abstract We have shown that, first, the response time ( Tresp) of the resonant-tunneling diodes (RTDs) can
be much smaller as well as much larger than the quasibound-state lifetime in the quantum well ( Tdwell). Second,
the real part of the RTD conductance can be negative and large at frequencies higher than the reciprocal T^
in the RTDs with heavily doped collector. A simple analytical expression for the impedance of RTD has been
derived, it is in fairly good agreement with experimental data. An equivalent circuit is proposed.

Introduction

2D electrons accumulate in the quantum well (QW) of the resonant-tunneling (RT) diodes (RTD)
based on the double-barrier heterostructures. It has been shown recently that the Coulomb interaction
of the 2D electrons with that in emitter and collector can lead to the I-V curve of Z-type in the static
case. Thus far no consideration has been given to the effect of the Coulomb interaction on the response
time C T ) of the RTD. So far it was believed that r can not be less than the electron dwell times in
the QW due to the tunneling to emitter ( re) and collector ( tc). In the present work we show that it is
not true and that rresp
m can be much smaller than t,<- and rct-. The Coulomb interaction should lead to the
same effect in other RT structures, e.g., the quantum cascade laser, also it should be essential for the
domain speed in the superlattices.

The problem of the equivalent circuit of the RTD is closely related to that of the response time. Many
equivalent circuits have been proposed in the literature. Among them the simplest RC-circuit, RLC-
circuit, two RC circuits connected in series are in most common use. Nevertheless, there are no a
simple and yet comprehensive way to describe the impedance of the RTD. Problem is solved in the
present work. The problem was dealt with in a number of papers, but the results are so cumbersome
that it seems to be possible to use them just for numerical calculations.

Results

In the present work it has been shown that:

• The response time of RTD is smaller and much smaller than the electron dwell time in the quantum
well in the positive differential conductance region. In the high-quality structures with 2D -» 2D
tunneling Tresp can be by the orders of magnitude less than Tdwe!l, here 1 / tdwdl =\lTe+\lzc.
• The response time of RTD is principally large in the negative differential conductance (NDC)
region, i.e. r,.esp > tdwell and T,,sp -> <*> when NDC -> -°°.

A simple analytical expression has been derived that relates rresp to the static differential conductance.

A quite general and simple analytical equation for the RTD conductance has been derived and also an
equivalent circuit has been proposed (see Fig. 1), it fairly well describes the published experimental

133
 data (see Fig. 2). It was shown that in the low-frequency and high-frequency limits the RTD
conductance can be approximated by the RC-circuits. The low-frequency limit describes the
experimentally observed features in the low-frequency capacitance. It was shown that the high-
frequency conductance essentially depends on the variation of the tunnel transparency of the collector
barrier with bias and that can lead to the positive value of differential conductance at high frequencies.
To make the high-frequency conductance negative and large in the NDC region the collector should be
heavily doped and it should not contain spacer layers. That gives possibility to use RTDs as an active
element in the high-frequency generators, with the frequencies can be higher than reciprocal rdweU. The
value of the high-frequency conductance in this case is substantiated by the RTD geometry and dwell ' 1

it does not depend on the static differential conductance.

The work was supported by Programs FTNS (99-1124) and PAS (3.1.99); INT AS (97-11475) and
RFBR (99-02-17592)
c ec
Figure 1. The equivalent circuit of RTD, here
L =T /(G — G°°) is an inductance, G is
L
G°-G°° q the static differentia] conductance, G°° is a high
frequency conductance.
poo

-WAV

Figure 2. Comparison of the experimental data

(from J.P.Mattia, et al., J. Appl. Phys. 84, (1998)
1140) and simulation with the help of the
equivalent circuit in Fig. 1.

Frequency (GHz)

134
 Optimisation Criteria for a Frequency Tripler with Anti-Serial
Schottky Diodes
M. Krach, J. Freyer, and M. Claassen

Walter Schottky Institut, Technische Universität München,

Am Coulombwall, D-85748 Garching, Germany
Phone: ++49 (0)89 289-12787, Fax: ++49 (0)89 3206620,
Email: markus.krach@wsi.tu-muenchen.de

This paper describes a new type of frequency-multiplier for mm-waves [1] which combines
the advantages of a varactor with symmetrical capacitance-voltage characteristic and the
relatively low leakage current of Schottky diodes. The varactor structure consists of two
inhomogeneously doped Schottky diodes in anti-serial connection which are quasi-
monolithically integrated into a microstrip circuit on quartz. A theoretical description of the
Schottky diode tripler, resulting design and optimisation criteria, as well as first experimental
results are presented.
The symmetric varactor is realized by an anti-series connection of two Schottky diodes with
common Schottky contact. Since Schottky barriers sustain higher electric fields as compared
to hetero-barriers used in SBVs (single-barrier varactors) [2], higher power capability and
thus smaller device diameters are possible. This allows higher varactor impedance and thus
less defoliation due to circuit losses.
The dynamic CV-characteristic of two anti-series diodes can be calculated from the static CV-
behaviour of a single device. The latter is computed by solving Poisson's equation self-
consistently. The steplike doping profile of the devices according to Fig. 1 results in an
elastance-charge characteristic S(Q) with two different slopes. Due to opposite self-biasing,
Sj(Q) and S2(Q) of the individual devices are shifted by a charge displacement AQ, the size of
which corresponds to the amplitude of the applied signal. In Fig. 2, the shifted functions of
the anti-serial diodes (Si(Q+AQ), S2(Q-AQ)) under operating conditions are shown for a
given charge modulation Q(t). The total elastance Stot of the two diodes is equal to the sum of
the elastances of the single devices. For a high varactor efficiency, Stot should feature a large
elastance change AS (see Fig. 2) demanding a V-shaped total elastance with a high gradient.
However, the steepness is limited by the maximum drift velocity of the electrons in the non
depleted zone since the charge modulation is determined by the drift velocity. This leads to
the following optimisation criteria for the single devices:
(i) The S(Q)-characteristic has to be designed such that the kink of the elastance curve is
reached at the self-bias charge AQ which corresponds approximately to the amplitude of Q(t),
(ii) for lower charge, the elastance should change as little as possible which can be achieved
with high doping in the first zone or a doping spike, and
(iii) the slope of the elastance curve should be very steep beyond the bias charge demanding
low doping in the second zone limited only by the condition that the maximum current
through the device must be carried by conduction with reasonable mobility.
Taking these conditions into consideration, AS is not significantly higher than that of typical
SBVs, however, as compared to these devices the doping concentration of the active region of
the proposed anti-serial Schottky varactor can be about twice. Thus also the maximum current
can be twice leading to four times higher power capability per area. Additionally, the
unavoidable series resistance which lowers the cut-off frequency and efficiency of the
varactor can be reduced since in the case of anti-serial Schottky diodes, large area contacts at
the n+-side can be used. Theoretical estimations show that an efficiency of more than 20%
should be achievable.
First experimental results are realised with two anti-serial Schottky diodes according to the
structure given in Fig. 1 on quartz substrate. Tripler performance was tested in a split full

135
 height waveguide mount [2,3] (see Fig. 3) at a fundamental frequency of 70 GHz. The
experimental results of this structure design show an rf-output power of 2 mW at 210 GHz
with a flange to flange conversion efficiency of over 3 %. Though to this date these values are
lower as compared to SBVs, significantly higher efficiency and output power are expected for
a tripler with optimised anti-serial Schottky diodes, e.g. with delta-doped structures.

[1] M. Krach, J. Freyer, and M. Claassen, 'Schottky diode tripler for 210 GHz', Electron.
Lett. 36, pp. 858-859, 2000
[2] R. Meola, J. Freyer, and M. Claassen, 'Improved frequency tripler with integrated single-
barrier varactor', Electronics Letters 36, pp. 803-804,2000
[3] A. V. Räisänen, D. Choudhury, R. J. Dengler, J. E. Oswald, and P. Siegel, 'A novel split-
waveguide mount design for millimeter- and submillimeter-wave frequency multipliers
and harmonic mixers', IEEE Microwave and Guided Wave Letters, 3 (10), pp. 369-371,
1993

Schottky contact
AlossGarusAs d=10nm
18
Np = 4x10 d=20nm
ND = 2*10 17 d=200nm
contact layer
quartz substrate

Fig. 1: Schematic layer sequence

of the Schottky diodes

« AQ *-* AQ ►

Fig. 2: Schematic elastance-charge functions

for the anti-serial Schottky diodes under
charge modulation condition
Fig. 3: Schematical view of the waveguide
mount and quartz chip

136
 Hexagonal Binary Decision Diagram Quantum Circuits
on III-V Nanowire Networks
- a Novel Approach toward Quantum LSIs -
Hideki Hasegav/a and Seiya Kasai

Research Center for Integrated Quantum Electronics and Graduate School ofElectronics and Information
Engineering, Hokkaido University, N-13, W-8, Kita-ku, Sapporo 060-8628, Japan
Tel:+81-11-757-1163, Fax:+81-11-757-1165, E-mail: hasegawa@rciqe.hokudai.ac.jp

A novel hexagonal binary decision diagram (BDD) quantum circuit approach for large scale
integration of quantum devices is presented, and its feasibility is discussed

Introduction
Research on quantum devices such as quantum wire transistors (QWRTrs), electron-wave
transistors, single electron transistors (SETs) etc has been intensively carried out over 20-25
years. However, no realistic approach seems to exist, at present, for construction of quantum (Q-)
LSIs. The major reason is the difficulty to use such "weak and environment-sensitive" devices in
the conventional Boolean logic gate architecture with AND/OR gates etc which requires very
"robust and uniform" devices such as Si CMOS Trs. In fact, we demonstrated recently the world
first III-V quantum logic inverter with a transfer gain of 1.3 using a single electron switch[l].
However, the gain was not large enough, the drivability was small, and input-output voltage
matching was difficult.
The purpose of this paper is to propose a novel approach for III-V Q-LSIs and to report on
the results of our experimental investigation concerning its feasibility. In our approach, GaAs and
InGaAs hexagonal nanowire networks are systematically controlled by nano-scale Schottky gates
in order to implement circuits based on the binary-decision-diagram (BDD) logic architecture.

Hexagonal Quantum Circuit Approach

Quantum BDD circuits[2] consist of arrays of BDD node devices and can realize any logic
function. As shown in Fig.l(a), each BDD node device sends a single or few electrons coming
into the entry branch into either 0- or 1-branch, depending on gate input. In contrast to the logic
gate architecture, no direct output-to-input connection is necessary, thereby requiring no large
voltage gain, no precise input-output voltage matching, no large fan-in and fan-out numbers and
no large current drivability. It is a good architecture for quantum devices operating near the
quantum limit of delay-power product. For hardware implementation, we pay attention to the
basic three-fold branch symmetry of the node device, and propose to use ITI-V hexagonal
nanowire networks controlled by our Schottky wrap gate structure (WPG)[3] shown in Fig.l(b).
The present Q-LSI structure is obviously applicable, in future, to molecular nanowire networks.

BDD Node Devices

Recently, we have already demonstrated correct path switching and realization of simple
BDD logic functions, using a 3-WPG GaAs single electron Y-switch as the BDD node device[2],
shown in Fig.2(a). In this paper, we use new BDD node devices having a 1-WPG QWRTr or a 2-
WPG SET on each of the exit branches which works complementarity, as shown in Fig.2(b) and
(c). For GaAs devices, several-100 nm-wide nanowires were made by EB lithography and wet
etching. For InGaAs devices, several-10-nm-wide nanowires embedded in InAlAs barriers were

137
grown on patterned InP substrates by selective MBE. Each branch of the fabricated node devices
exhibited clear conductance quantization and oscillation. With these, clear path switching was
obtained.

Device Integration
A GaAs hexagonal integrated two-bit quantum adder without nanowire crossover was
designed and fabricated, as shown in Fig.3(a) and (b). It showed a correct operation from 1.5 K
up to at least 120 K by bias adjustments. This is because, with temperature increase, the circuits
show gradual transitions from the real quantum regime with a minimum delay-power product to a
few electron quantum regime, and finally to the many electron classical regime. Thus, wire size
reduction should lead to room temperature operation in the quantum regime. To realize this, we
have succeeded in growing submicron-pitch sub- lOnm-wide InGaAs hexagonal nanowire
networks by selective MBE, as shown in Fig.4. Future prospects using such hexagonal nanowire
networks will be discussed.

References
[1] S. Kasai and H. Hasegawa, Conf. Dig. of 58th DRC (2000) 155.
[2] S. Kasai, Y. Amemiya and H. Hasegawa, Tech. Dig. of IEEE IEDM 2000 (2000) 585.
[3] S. Kasai, K. Jinushi, H. Tomozawa and H. Hasegawa, Jpn. J. Appl. Phys. 36 (1997)1678.
|"sT1 fsö]«- root
itfo^i J-WPG
a single «, GaAs or InGaAs
electron ^ nanowire WPG I ml u1 |augend: a1,a0
I entry-branch '^ff^TJf^ "I sum: s1, s0
gate ^\ ■ 1 S cany:d
input —*(XJ)
W 0 I 1 1 I 0
O-branch/N. 1 -branch
""electrons K i o 11
(a) (b)
Fig.l (a) BDD node device (b) wrap gate structure. nanowire (jQ— terminal (a)

tunnel barrier

quantum dot
1-branch
Fig.3 Two bit BDD quantum adder (a)
QWRTr quantum hexagonal layout and (b) fabricated adder.
dot

O-branch 1-branch 0-branch 1-branch

(b) (c)
Fig.2 Various BDD node devices, (a) single electron Y
switch type, (b) quantum wire branch switch type and
(c) single electron branch switch type. Fig.4 A hexagonal InGaAs nanowire network
P!
by selective MBE.

138
 Surface-Related Kink Effect in AlGaAs/GaAs Power HFETs
E. Tediosi (1), G. Verzellesi (1), C. Canali (1), G. Sozzi (2),
R. Menozzi (2), C. Lanzieri (3)

(1) Dipartimento di Scienze dell'Ingegneria and INFM, Universita' di Modena e Reggio Emilia, via Vignolese 905,
41100 Modena, Italy
(2) Dipartimento di Ingegneria deU'Informazione and INFM, UniversuV di Parma,
43100 Parma, Italy
(3) Alenia Marconi Systems, via Tiburtina, km 12, 00131 Roma, Italy

An anomalous increase in the drain current at relatively- degradation of the semiconductor/passivation interface
low drain-source voltages is often observed in the output over the gate-drain access region, which gets negatively
characteristics of III-V compound semiconductor FETs. charged due to electron trapping by surface states
This phenomenon, which is usually referred to as the kink generated during the stress. In addition to that,
effect results in output-conductance increase, enhancement of the kink was observed in increasingly
transconductance compression, and dispersion between stressed devices. Figure 2 shows typical experimental
DC and RF characteristics. Although a lot of effort and output characteristics before and after stress,
several papers have been dedicated to the kink, the demonstrating both IDss reduction and kink enhancement.
physical origin of this effect is still an issue of contention An exhaustive description of accelerated-stress results
[1-3]. In this paper, the kink effect is investigated in as- can be found in [4-6].
fabricated and hot-carrier stressed AlGaAs/GaAs power
HFETs both through measurements and two-dimensional 300 Measurements
device simulations. Before stress
"£■250 Afterstress(17H)
The cross section of the HFETs is sketched in Fig. 1,
E
showing the following bottom-up structure: GaAs SI
^ 200
substrate; AlGaAs/GaAs multilayer buffer; 75 nm thick n-
GaAs channel, Si-doped at 4xl017cm"3; Al0.2sGa 0.75AS
barrier layer, Si-doped at 2xl017cm~3, 30 nm thick under
the gate; n+-GaAs cap for low-resistance ohmic contacts.
Gate width and length are 200 um and 0.25 urn,
respectively. Additional details can be found in [4],
(orn ^
0,8 nm 0 12 3 4 5
: r^25jim
Drain-Source Voltage [V]
/ :;\

2x10" cm"'
^iKJ

s I
4 \5um

n+ GaAs \
n AIGaAs ::
/

I
I Al
*
i

a
t -^
,
/• U D
o.3 j.m |
n+ GaAs .OO.^m. .1
pig 2. Experimental output characteristics before and
after stress.

4x10" cm' n+ GaAs Channel T dp7^m| Two-dimensional numerical device simulations were
AlGaAs/GaAs Buffer performed with the program DESSIS [7], allowing both
S.I. GaAs drift-diffusion and hydrodynamic transport models to be
adopted. To account for surface damage, acceptor-like
2.5 + 3 um ,'
3+ 3.5 um
traps were placed at the ungated gate-source and gate-
drain surfaces. Relying on current-mode DLTS
Fig6 1. Schematic cross section of the power HFET. measurements performed on stressed devices [5], surface
traps were energetically located at 0.36 eV above the top
_ .
Devices ,
underwent .
room temperature rv-, accelerated
DC „„_i„mfoj of the
Ul Ulfc valence
va
""" band
,7 \ (EVv-"
), and the capture
v cross sections
2
stress experiments under several different bias conditions. were set to 2x10 cm. .
„,
The mam . degradation
j j x- modesJU
observedA were„„a ™J ,„*;„.,
reduction Figure
* *&U1C 3J shows
« « hydrodynamic
y i simulations or the Hrbl
of the drain saturation current (IDSS) and of the °*P* characteristics in tteTollowing two ^ (*) ™*
transconductance. Both effects turned out to be strongly the trap density set to NTS=NTO=1X10 cm at berth gate-
correlated with an increase in the drain access resistance ™ <$»> and gate-dram (Njn) surfaces; (b)widr
(measured by an end-resistance method). These NTS=lxl0' cm2 and N^lxlO cm . In the former
observations indicate a well known mechanism of «f > simulations describe the pre-stress cond tions, the
relatively-low trap-density value adopted at both sides or

139
 the gate recess being representative of process-induced negative surface charge. By increasing VDS beyond Vkink,
damage. In the latter, stress-induced surface damage is the conductive-channel width is only marginally affected
accounted for by raising NTD with respect to NTS. In both under the gate and in the source access region, whereas it
cases, impact ionization is not activated in the simulator. widens in the drain access region as the gate-drain surface
As can be seen in Fig. 3, these simulations predict the IDSs charge gets partially compensated by impact-ionization-
reduction but are unable to reproduce the kink. induced holes, resulting in drain-current increase and
kink.
300
Simulations In conclusion, we have shown that, differently from what
generally accepted for GaAs- and InP-based HEMTs,
250 NTS=1x10,2cm'2, NTD=1x1014 cm"2 where the kink is attributed to accumulation of impact-
200
ionization-induced holes in the source access region
[1,2], the kink arises in AlGaAs/GaAs HFETs from the
150 combined effect of impact ionization and traps located at
the gate-drain recess surface. Kink enhancement after
100 hot-electron stress is a consequence of trap-density
increase at this surface.
50

1 .
4.E+17
— VDS= 2V
0 12 3 4 5 6 7
VDS= 4V
Drain-Source Voltage [V]
«f 3.E+17
Fig 3. Simulated output characteristics with surface traps E
o /Source
but without impact ionization. / access Drain
1 region access
§ 2.E+17
Figure 4 shows output characteristics obtained from T3 region
C
hydrodynamic simulations for different NTD values (and g
fixed NTS) and with the impact-ionization model ts
activated. In this case, simulated output characteristics UJ 1.E+17 /
feature a kink. The latter becomes smaller and smaller as / — VDS = 2V / /
NTD is reduced, finally disappearing when NTD is made 1 VDS=4V

lower than 2x1012 cm"2. This result is consistent with 0.E+OO

measurements (see Fig. 2) demonstrating kink 0 0.05 0.10 0.05 0.10 0.05 0.1
enhancement in increasingly stressed devices. Depth [^m] Depth [^m] Depth [^m]
250
Simulations
VGS=-0.5V NTS=1x10
Fig 5. Simulated electron density as a function of depth
under the gate and in the source and drain access region
at VDs values preceding and following the kink voltage
(Vkink* 3V), VGS= -0.5V, NTS= 1 xlO12 cm"2, NTD= 4.5
xl012cm"2

References

[1] T. Suemitsu et al., IEEE Trans. Electr. Dev., vol. 45,

1998, pp. 2390-2399.
[2] M. H. Somerville et al, IEEE Trans. Electr. Dev., vol.
12 3 4 5 6 7
47, 2000, pp. 922-930.
Drain-Source Voltage [V]
[3] K. Horio and A. Wakabayashi, IEEE Trans. Electr.
Dev., vol. 47,. 2000, pp. 2270-2276.
Fig 4. Simulated output characteristics with both surface [4] D. Dieci et al., Proc. Int. Rel. Phys. Symp. 2000, San
traps and impact ionization. Jose, CA (USA), pp. 258-263.
[5] D. Dieci et al, IEEE Trans. Electr. Dev., vol. 47,
The physical mechanism originating the kink is 2000, pp. 261-268.
elucidated by Fig. 5, showing the electron density along a [6] R. Menozzi et al., Proc. GaAs Rel. Workshop, Seattle,
vertical cut under the gate and the source and drain WA (USA), 2000, pp. 101-116.
ungated regions at two VDS values (preceding and [7] ISE Integrated Systems Engineering AG, DESSIS6.0
following the kink). As can be seen, at VDS =2 V (< Reference Manual, 1999.
Vkink), the conductive channel is narrower in the drain
access region than in the source one, due to the higher

140
 SESSION X
GaN-based devices
Chair: Prof. Joachim Wuerfl
Wednesday May 30, 2001

8.30 am GaN on Silicon for High Power and High Frequency Electronics
Dr Eddie Piner
INVITED Nitronex Corporation, 628 Hutton Street, Suite 103 Raleigh, NC 27606.

8.55 am High Frequency Noise Studies in AlGaN/GaN MODFETs

S. S.H. Hsu{a). D. Pavlidis{a) J. S. Moon(b\ M. Micovic{b\ C. Nguyen(b), and D.
GriderJeongT
(a) Department of Electrical Engineering and Computer Science, The
University of Michigan, Ann Arbor, MI 48109-2122, USA
(b) HRL Laboratories, 3011 Malibu Cyn. Rd., Malibu, CA 90265

9.10 am Optimization of AlGaN/GaN HEMT structures using the RoundHEMT

technology
M. Marscr'. P. Javorka®, A. Alam{b), M. Wolter1**, H. Hardtdegen{a), A. Fo)da),
M. Heuken(a), P. Kordo$a\ and H. Lüth{a)
(a) Institute of Thin Films and Interfaces, Research Centre Juelich, D-52425
Juelich, Germany
(b) AIXTRON AG, Kackertstr. 15-17, D-52072 Aachen, Germany

9.25 am Characterization of Temperature Dependence of AlGaN/GaN HEMTs

T. Mizutani. M. Akita and S. Kishimoto
Department of Quantum Engineering, Nagoya University, Furo-cho,
Chikusa-ku, Nagoya, 464-8603, Japan

9.40 am Influence of Barrier Thickness on the High Power Performance of

AlGaN/GaN HEMTs
V.Tilak. B.Green, J.Smart, J.R.Shealy, L.F.Eastman
Electrical and Computer Engineering, Nanofabrication facility, Cornell
University, Ithaca NY, 14853-5401

9.55 am An investigation into the charge distribution and pinch off behavior of
AlGaN/GaN double heterostructure DH-FETs under Schottky and ohmic
contacts.
M.Zervos. A.Kostopoulos, G.Constantinidis, M.Kayambaki, S.Mikroulis and
A.Georgakilas.
Foundation of Research and Technology Hellas (FORTH), Institute of
Electronic Structure and Laser (IESL), Microelectronics Research Group
(MRG), Vassilika Vouton, Heraklion 711 10,Crete,Greece.

141
142
 GaN on Silicon for High Power and High Frequency Electronics
Edwin Piner, Warren Weeks, Thomas Gehrke, Kevin Linthicum,
Lee McCarthy, and Ricardo Borges
NITRONEX Corporation, 628 Hutton Street, Suite 103
Raleigh, NC 27606, USA, http://www.nitronex.com

Introduction
*

The family of materials known as wide-bandgap semiconductors offers a powerful set of

electronic properties. Among these, gallium nitride has emerged as a top candidate for high
frequency and high power devices. The excitement surrounding GaN stems from its unique
material and electronic properties summarized in Table 1. While silicon and GaAs come up
short on simultaneously handling high frequencies and high power, GaN is perfectly suited to
achieve optimum performance for these applications. GaN devices can support internal electric
fields much higher than can silicon or GaAs. This property is useful for handling high power
and for obtaining higher efficiencies through the use of higher supply voltages. Other equally
key properties of GaN include its high electron saturation velocity and its high electron mobility,
both of which contribute to its strength at high frequencies. Furthermore, there have been
breakthroughs recently in producing high quality GaN on convenient substrates, such as silicon.
Despite its beneficial properties, GaN high frequency high power devices have yet to
appear on the market. The most important reason is that until recently, GaN material
development for high power and high frequency electronics has concentrated on sapphire and
SiC as the conventional substrates of choice, both of which have significant disadvantages for
potential commercial applications. GaN on sapphire offers a relatively medium cost substrate
choice, compared to silicon and SiC, and has a longer history of GaN material development.
However, sapphire is a poor thermal conductor that results in thermally limited devices and can
only be obtained in up to four-inch diameters in limited quantities. SiC substrates, on the other
hand, are excellent thermal conductors, offer a closer lattice match to GaN, and can achieve as
good material quality compared to sapphire. The limiting factors for manufacturing GaN devices
on SiC are the excessive substrate cost associated with semi-insulating SiC, the limitation of
wafer diameter size availability, and a high density of substrate related defects reducing device
yields.
From prior art investigations; GaN epitaxially grown on silicon is generally of lower
quality than GaN grown on sapphire or SiC. This has been due to the large lattice and thermal
mismatch between the Si substrate and the GaN film. Other issues include the nitridization of
silicon, Si autodoping into the GaN at high growth temperatures, and the subsequent cracking
associated with the aforementioned lattice and thermal mismatch. However, the fundamental
advantages of silicon over SiC and sapphire have driven a recently renewed interest in this
material for, primarily, optoelectronic but also transistor applications. These advantages include
very low cost substrates, large area wafers, and the highest quality substrate from the point of
view of defects and surface quality.

* SIGANTIC™ is a trademark of Nitronex Corporation

143
 Table 1. Electronic Material Properties

Property Si .;'. GaAs SiC . GUN'. ;■'

Energy Gap (eV) 1.11 1.43 3.2 3.4

Breakdown Field (V/era) 6 x10s 6.5 x 105 3.5x10" 5x 10ö

Electron Saturation Velocity 1 x 107 2xl07 2x 107 2.5xlO?
(cm/sec)
Electron Mobility (cm2/V-see) 1500 6000 800 1600*
* AlGaN/GaN heterostructure mobility.

GaN on Silicon Material Breakthroughs

GaN epitaxial growth directly on silicon is hindered due to the large lattice and thermal
mismatch between GaN and silicon. A number of different techniques have been employed to
counteract these problems.1"6 All techniques rely on a buffer layer that is situated between the
silicon substrate and GaN film. It is interesting to note that a similarly functioning layer is also
necessary to be able to obtain high quality GaN on sapphire or SiC. Silicon, however, has turned
out to be much more of a challenge.
The primary problem associated with epitaxial GaN on silicon is the propensity of the
GaN film to crack due to thermal and lattice mismatch between GaN and silicon. In the past, the
typical critical thickness for the onset of cracking was ~0.4um. This thickness of GaN could be
used to grow device structures, however, GaN on Si is very much like GaN on sapphire and SiC
in the sense that the dislocation defect density is influenced by the GaN film thickness. For very
thin films, the dislocation density is very high. As the GaN film thickness increases, the
dislocations have a tendency to form loops and annihilate one another thereby reducing the
overall defect density at the surface. For 0.4um GaN on Si, the dislocation density is very high
and device performance is hindered accordingly.
At Nitronex Corporation we have developed a breakthrough transition layer that
alleviates the problem with cracking and allows for the growth of much thicker GaN epitaxial
films. The effect of this transition layer is illustrated in Figure 1 where GaN epitaxial films
grown with and without the transition layer is shown. Clearly, the crack density has been
substantially reduced for a film with a thickness on the order of 2um. This growth technique,
known as the SIGANTIC process, involves an engineered process that accommodates the
differences in lattice and thermal coefficient of expansion mismatch between epitaxial nitride
layers and the silicon substrate. Thick (>2um), crack-free epilayers can be obtained with very
smooth interfaces by this technique.

144
 (b)
i'jsiä'jiijf
.".'lr'i:r>W

SlSiliiil

ffl^^pS^feiliiiilill

H
feil'liflC" ■•?■ -■: '■" '■''''' i"'' ''' '''< ■'?' ¥■'■ ■!':■.(' :"i
1

'''lii mitriß'1 iriHI iÄr"^'ir^' '-.-1:' ,'i„', ■. v:'''V'iilvi.' V ■'." H=--,5C

HE
till
111
ifii
ft[j|ili§|

Figure 1. GaN on Si without (a) and with (b) the SIGANTIC growth technique.

AlGaN/GaN on Silicon HEMT Structures

AlGaN/GaN high electron mobility transistor structures have been grown on silicon using
the SIGANTIC growth process. High electron mobilities are necessary for high frequency
performance to minimize internal device delays. High electron velocities can be obtained by
using modulation doped heterostructures. Among the wide-bandgap semiconductors, the III-
nitride material system is the only one to offer a heterostructure system as shown in Table 2.
This means that GaN-based devices are uniquely able to exploit the power handling capabilities
of wide-bandgap semiconductors as well as the high frequency potential of modulation doped
structures.

Table 2. Key Material Issues for High Frequency, High Power Transistors

for High Power Medium Low High 1 High

;-.'..
Sui for Low High Medium High
Frequencies !»»«
WsS
M Structures No* Yes No i-.Yes
..... *"-*™Ä|»^a|

Low Cost Substrates Yes NO :] Yes

*May change with ongoing Si/SiGe heterosystem research.

145
 The HEMT structures that have been grown include both undoped and Si-doped
AlGaN/GaN heterostructures. The AlGaN layer is pseudomorphically strained and gives rise to
a piezoelectric polarization induced charge at the AlGaN/GaN heterointerface. This, coupled
with the spontaneous polarization of the heterojunction, gives rise to very high two-dimensional
electron gas (2DEG) carrier densities in tandem with high electron mobilities, as shown in Table
1. The simplest structure is the undoped AlGaN/GaN structure. It is also common to incorporate
a Si-doped AlGaN layer into the heterostructure to increase the charge density of the 2DEG. In
that case, an undoped AlGaN spacer layer is inserted to minimize the effect of ionization
impurity scatter in the 2DEG.
Through the utilization of the SIGANTIC growth technique to obtain thick, high quality
GaN buffer layers and the employment of the HEMT structure to the GaN on silicon process, we
have obtained electron mobilities greater than 1600cm2/V-sec at a sheet electron charge greater
than 1 .OxlOI3cm"2. These numbers represent the highest ever reported for GaN on silicon and are
comparable to the current state-of-the-art transistor structures grown on sapphire and SiC. From
these epiwafers, AlGaN/GaN HEMT devices have been fabricated and tested and will be
discussed in more detail.

Conclusions
GaN on silicon offers a low cost, highly manufacturable platform for high power, high
frequency devices. The fundamental electronic aspects of the Ill-nitride material system makes
it ideal for use in these types of applications while the low cost of silicon makes it the best choice
for the manufacturing of such devices. A new growth technique has been developed that allows
thick GaN films to be deposited on silicon without the common side effect of cracking.
Coupling this growth process with AlGaN/GaN HEMT structures has resulted in state-of-the-art
performance for GaN on Si. These breakthroughs in GaN growth on silicon are expected to
bring GaN electronic devices to market in the near future.

References
[1] A. Watanabe, T. Takeuchi, K. Hirosawa, H. Amano, K. Hiramatsu, and I. Akasaki, J. Cryst. Growth 128, 391
(1993).
[2] A. Ohtani, K.S. Stevens, and R. Beresford, AppLPhys. Lett. 65, 61 (1994).
[3] Z. Yang, F. Guarin, I.W. Tao, W.I. Wang, and S.S. Iyer, J. Vac. Sei. Technol. B 13, 789 (1995).
[4] J.W. Yang, C.J. Sun, Q. Chen, M.Z. Anwar, M. Asif Khan, S.A. Nikishin, G.A. Seryogin, A.V. Osinsky, L.
Chernyak, H. Temkin, C. Hu, and S. Mahajan, Appl. Phys. Lett. 69, 3566 (1996).
[5] N.P. Kobayashi, J.T. Kobayashi, P.D. Dapkus, W.J. Choi, A.E. Bond, X. Zhang, and D.H. Rich, Appl. Phys.
Lett. 71, 3569 (1997).
[6] A. Strittmatter, A. Krost, J. Biasing, and D. Bimberg, Phys. Status Solidi A 176, 611 (1999).
[7] E.L. Piner, T.W. Weeks, P. Rajagopal, T. Gehrke, and K.J. Linthicum, to be published.

146
 High Frequency Noise Studies in AlGaN/GaN MODFETs

S. S.H. Hsu, D. Pavlidis,

Department of Electrical Engineering and Computer Science,
The University of Michigan, Ann Arbor, MI 48109-2122, USA

J. S. Moon, M. Micovic, C. Nguyen, and D. Grider

HRL Laboratories, 3011 Malibu Canyon Road, Malibu, CA 90265, USA

Impressive microwave and high-power performance have been demonstrated from AlGaN/GaN
MODFETs[l]. DC, microwave small-signal and large-signal characteristics of these devices have been
reported by various researchers. However, only little work addressed the noise characteristics of GaN-
based FETs[2]. In this study, AlGaN/GaN MODFETs grown using RF-assisted MBE on sapphire substrate
were characterized and device noise performance was evaluated.
The measured devices in this study had a gate length of 0.25 urn, a gate finger width of 200 |jm. The
device structures consist starting from the substrate of an undoped GaN buffer, an NTD Alo.22Gao.7sN
spacer, n-Alo.22Gao.78N donor layer and an NID Alo.28Gao.78N cap layer. The fabricated devices exhibited
excellent DC and microwave characteristics. A maximum drain current density of ~ 1.35 A/mm and a peak
transconductance of ~ 320 mS/mm were obtained. Fig. 1 shows the device's maximum oscillation
frequency (fmax) and cut-off frequency (fT) under various bias conditions. As can be seen, these devices
show a maximum/»,« ~ 81 GHz (FGS=-3.4 V, VDs=15 V), and/r~ 57 GHz (VC!r -2.6 V, VDS= 15 V).
The minimum noise figure (Fmi„) was characterized at 10GHz under VDg= 10 V as a function of drain
current and the results are shown in Fig, 2. A minimum noise figure of 1.9 dB with 16.2 dB associated gain
was obtained at a quiescent point of Ids= 30 mA for the device used in this study. Noise figures of 0.7dB
were measured for 0.15um long gate devices using the same technology. The variation of Fmi„ was found
to be relatively small in the measured current range. In addition, Fmin was also found to be relatively
independent of drain bias voltages within the measured range of 5-15 V. Results indicate that AlGaN/GaN
MODFETs can maintain a small value ofFmi„ over a wide bias range, which is a good feature for relaxed
circuit design. Fmin as a function of frequency was also evaluated and shown in Fig. 3. Within the
measured frequency range, Fmin varied from 1.47 to 2.92 dB. The associated gain (Ga) values were found
to decrease monotonically from 16.5 to 12.0dB. As a result of this change, the input-referred noise was
increased. Fig.4 shows the extracted noise resistance (R„) vs. drain current; R„ is a measure of the
sensibility ofFmi„ to the changes of the input admittance with respect to its optimum value. Results show
these devices exhibit a value of ~ 20-30 Q, which is compatible with values reported for InP-based Hemts
[3]-
The noise characteristics of the AlGaN/GaN Hemts were analyzed in an attempt to provide an
explanation for their good noise figure values. Special attention was paid to the impact of the reduced gate
leakage current compared with the traditional III-Vs due to the wide bandgap materials used in GaN-based
devices. A simple analytical equation can be used to explain the noise characteristics of FET-type devices
[4]:
Fmin=l + 2-£Vaß(l-C2)
Je

where/is the operating frequency,/ is the intrinsic cut-off frequency and a, ß and C are fitting coefficients
corresponding to drain noise current, gate noise current and gate-drain noise correlation. One can see the
gate noise current also contributes to the value of Fmi„. The gate noise current is dominated by the gate
leakage current (GLC). GLC effects introduces not only a parasitic conductance at the device input, but
also adds shot noise. It has been shown that the noise performance of MESFETs and MODFETs are
strongly dependent on the gate leakage current value [5]. The AlGaN/GaN devices measured in this study
exhibit a gate current density (J0) ~ 2xl04 A/m2 to 8xl04 A/m2 as VDS varies from 0-15 V (Fig. 4), which is
small compared to the theoretically expected value for the onset of gate-leakage current having an effect on
Fmin for the pseudomorphic MODFETs [5]. In addition, values of the shot noise current contributed from
gate current were also calculated using the 2-q-Ic expression. As can be seen in Fig. 4, the noise currents
are extremely small over a wide bias range. This is a possible reason for the observed relatively bias
independent Fmin characteristics.

147
 In summary, the high-frequency noise of AlGaN/GaN MODFETs was characterized under various bias
conditions and frequencies. Fmi„ was found to be relatively constant over a wide range of drain bias
currents and voltages. The reduced gate leakage current due to the use of GaN wide bandgap materials is
contributes in the excellent noise performance of GaN-based MODFETs.

[References]
[1] S.T. Sheppard, K. Doverspike, W.L. Pribble, S.T. Allen, J.W. Palmour, L.T. Kehias, and T.J. Jenkins, "High power
microwave GaN/AlGaN HEMTs on semi-insulating silicon carbide substrates," IEEE Trans. Electron Dev. Lett,
vol. 20, pp. 161-163,1999.
[2] N.X. Nguyen, M. Micovic, W.-S. Wong, P. Hashimoto, P. Janke, D. Harvey, and C. Nguyen, "Robust low
microwave noise GaN MODFETs with 0.6 dB noise figure at 10 GHz," Electronics Lett, vol. 36, no.5, Mar. 2000
[3] Y. Ando, A. Cappy, K. Maruhashi, K. Onda, H. Miyamoto, and M. Kuzuhara, "Noise parameter modeling for InP-
based pseudomorphic HEMTs," IEEE Trans. Electron Devices, vol. 44, pp. 1367-1374, Sept. 1997.
[4] G. Dambrine, J. Raskin, F. Danneville, D. Vanhoenacker, J. Colinge, and A. Cappy, "High-frequency four noise
parameters of silicon-on-insulator-based technology MOSFET for the design of low-noise RF integrated circuits,"
IEEE Trans. Electron Devices, vol. 46, pp. 1733-1741, Aug. 1999.
[5] F. Danneville, G. Dambrine, H. Happy, and A. Cappy, "Influence of the gate leakage current on the noise
performance of MESFETs and MODFETs," IEEE MTT-S Digest, pp. 373-376,1993

9U
20 35
80
•.fir%=*1
^70
N
1

2.
60
VGS=-3.4V^ X *■ ""max
k VGS=-2.6V
CD
15

«f
IS
^*~£r
m
■ 30

25 £*

y^
"^50 •Vos=-2.6\^
o re
§ 40
>FT
o 10 o,
3
g"30 4 ' 20 of
VGS=-3.4V ' Nl R
n yL
^20
Fmin - 15
10 ♦- * • —♦— m «
n
10
8 11 14 17 20
10 20 30 40 50 70
VDS(V)
Ids (mA)
Fig. 1 AlGaN/GaN MODFETs/max and/r under various Fig. 2 Fmin, Ga and R„ as a function of drain current
bias conditions
2.E+05 1E-23
• : N
X
^
2.E+05
■"•==t=ral
VGS=-5V c
1E-24
£
■4V * ====
^^*^^ 3
U
-3V «-""""""* VGS= -5V a
(0
'5c
*~T\ m-~~~~~J**^~~~+ -4V
: 1E-25
o
5.E+04
x^X- "♦"""" 1®^~-~'~ m
"3V
■ £
CO

£
m-"\) ■

O)
0.E+00 1E-26
8 10 12 14 16 -5 0 5 10 15 20
Frequency (GHz) VDS (V)
Fig. 3 Fmin and Ga as a function of frequency Fig. 4 Gate leakage current density and corresponding
shot noise current as a function of VDS and Vcs

Acknowledgement: Work supported by ONR (contract no.N00014-00-l-0879) and HRL Laboratories

148
 Optimization of AIGaN/GaN HEMT structures using the RoundHEMT
technology
M. Marso, P. Javorka, A. Alam*, M. Wolter, H. Hardtdegen, A. Fox, M. Heuken*.
P. Kordos, and H. Lüth
Institute of Thin Films and Interfaces, Research Centre Juelich, D-52425 Juelich, Germany
*AIXTRONAG, Kackertstr. 15-17, D-52072 Aachen, Germany

The electrical characterization of epitaxially grown HEMT layer structures for device
fabrication is commonly performed by Hall measurements. However, the ultimate
characterization of a HEMT layer system is the transistor device itself. The
RoundHEMT concept [1] meets the need for a device technology with only a few
fabrication steps that allows a fast feedback to epitaxy while allowing evaluation of
important electrical and also processing data (Ohmic and Schottky contact, d.c. and
pulsed output characteristics, optoelectronic properties, etc.). This device concept
uses a gate formed as a closed ring, with the drain contact placed inside the gate
ring. The source metallization encloses the gate completely, eliminating the need of
mesa etching (Fig. 1). Because of its very simple and fast technology the
RoundHEMT concept presents itself as an additional standard characterization tool
for HEMT layer systems.
In this work we investigated the influence of the AIGaN barrier layer thickness and
doping distribution on the electrical properties of modulation doped AIGaN/GaN
HEMTs. To this end the AIGaN cap layer and doping layer thickness were varied as
well as the latters doping height as shown in table 1, whereas the Al content and the
separation layer thickness were kept constant at 18% and 5 nm, respectively. The
structures were deposited on a 2.5 um thick GaN buffer layer by MOVPE (AIXTRON)
using conventional source materials and 2 inch c-plane sapphire substrates. Hall
effect studies show a comparable conductivity for all the samples nearly independent
of the sample structure. This suggests that the device characteristics could also be
similar for all the samples. Using the RoundHEMT concept, however, the difference
in electrical characteristics becomes unambiguously visible (Fig. 2). Here clearly
sample B has superior characteristics to the other samples. This structure was then
processed in conventional r.f. compatible HEMT technology. The HEMT showed
state of the art high frequency data, i.e. loss = 700 mA/mm, fT = 35 GHz, fmax = 70
GHz for 1_G = 200 nm (Figs. 3, 4). These results demonstrate the questionability of
Hall effect investigations for evaluation of HEMT structures and the suitability of the
RoundHEMT concept for structural optimization.
[1]: M. Marso, K. Schimpf, A. Fox, A. v.d.Hart, H. Hardtdegen, M. Hollfelder, P. Kordos, and
H. Lüth, Novel HEMT layout: The RoundHEMT, Electronics Letters 31, 589 (1995)

149
Table 1: Important parameters of the investigated layer systems

Sample A B C D
layer structure
cap layer thickness [nm] 6 12 12 12
carrier supply layer thickness [rim] 10 10 10 15
carrier supply layer doping [cm"3] 5E18 5E18 2E18 2E18
Hall effect results
Hall sheet concentration [cm2] @ 4.7E12 5.75E12 5.46E12 5.78E12
300K
Hall sheet concentration [cm"2] @ 5.66E12 5.97E12 5.46E12 5.85E12
77K
Hall mobility [cmWs] @ 300K 1335 1091 1119 1207
Hall mobility [cmWs] @ 77K 5894 3218 3247 5811
RoundHEMT (LG = 700 nm)
lDsnv)/[mA/mm] 130 354 210 290
gm,max [mS/mm] 79 132 104 119

400
B
300 /
-ß—
| 200- //———-£__
<
-D 100 -IS A
JMS!!
SB is!' y V
GS=
1
v
Biifi'hinn M'l 'i in iiiHiMii'imii ii i P^iMfiTntrrw i m 'ii'ii i mm hi'tfnin wrtftr-n:i• ^"^lävy 0 i t

4 6 10

Fig. 1: Viewgraph of a RoundHEMT Fig. 2: Output characteristics of Round-

channel width = 100 urn HEMTs fabricated with the
S-D = 4 um, LG = 700 nm investigated layer systems
(S-D = 4 urn, LG = 700 nm)

1000
wK=100um, LG=200nm
30- 2 DS v6S= -2.5V
VGS=1,0,..,-3V \^
m 20
E
E GU
5 O 10 - \f
Vmax
=70GHz

fT=35GHz __
v
^
1G 10G 100G
Frequency [Hz]

Fig. 3: Output characteristics of an r.f. Fig. 4: r.f. behaviour of optimized

optimized HEMT (sample B) HEMT(sample B)
(S-D = 2 urn, I_G = 200 nm) (S-D = 2 urn, LG = 200 nm)

150
 Characterization of Temperature Dependence of
AlGaN/GaN HEMTs
Takashi Mizutani, Mitsutoshi Akita and Shigeru Kishimoto
Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya, 464-8603, Japan
Tel: +81-52-789-5230, e-mail: tmizu@nuee.nagoya-u.ac.jp

GaN-based devices have received much attention for their ability to operate at high-power level and in
high-temperature environment. In order to folly develop the potential of the device at high temperature, it is
very important to evaluate the high temperature performance of the device not only at DC but also at high
frequency. However, there are few reports which studied the high-frequency performance at high temperature
[1][2]. In this report, we investigated the high-frequency performance of AlGaN/GaN HEMTs at temperatures
up to 187 °C. The effective electron velocity in the channel was also evaluated.

Fig.l shows schematic cross-section of the AlGaN/GaN HEMT fabricated on an epitaxial layer grown by
MOCVD. The ohmic contacts were formed by evaporating Ti/Al (25/250 nm) and alloying at 650 °C for 30 s.
1.3-um Schottky gate was formed by Ni/Au (12/250 nm) evaporation and the subsequent lift-off process.
The measurements were performed at temperatures between 23 and 187 °C in an air atmosphere. The I-V
characteristics of the fabricated device at 23 and 187 °C are shown in Fig.2 by solid and open circles,
respectively. The transconductance gm and the drain current ID were 110 mS/mm and 480 mA/mm at 23 C,
and 72 mS/mm and 320 mA/mm at 187 °C, respectively. They decreased gradually with increasing
temperature. The decrease at high temperatures is probably due to the decrease in 2DEG mobility and electron
velocity. Stable operation was confirmed even at 187 °C, suggesting the stability of the present ohmic and gate
contacts
Fig.3 shows the cutoff frequency fT as a function of VDS at VGS = -1.5V evaluated at various
temperatures. The fT increased as the VDS increased, showed a peak at VDS about 10 V, then gradually
decreased. The increase at small VDS is due to the increase of the electric field in the channel, and the decrease
at large VDS is due to the extension of gate depletion region toward the drain electrode. The fT was decreased
with increasing temperature. Fig.4 shows the fT as a function of VGs at VDs = 10 V. At 23 °C, the highest fT of
14 GHz was obtained at VGS = -1.5 V, and the fT x gate-length product of 18 GHz-um was among the highest
achieved for GaN-channel FETs. Similar VGS dependence was obtained for different temperatures as shown in
Fig.4.
Fig.5 shows the fT at VDS of 10 V and the VGS of-1.5 V as a function of temperature. The decrease in fT
by increasing temperature from 23 to 187 °C was 35%. The fT decrease reflects the decrease of effective
electron velocity in the channel.
In order to evaluate the effective electron velocity in the channel, the total delay time (T = l/27tfT) was
plotted as a function of the inverse of ID at VDS = 10 V as shown in Fig.6 at various temperatures. The delay
time decreased linearly with decreasing the inverse of ID at small ID regime. The extrapolated intersect at 1/ID
= 0 corresponds to the transit time under the gate (Wveff), if the parasitic delay time was sufficiently small [3].
The effective electron velocities obtained here from the transit time are 1.2, 1.1, and 0.8X10 cm/s at 23, 103,
and 187 °C, respectively. The temperature dependence of veff was shown by open circles in Fig.5. The
temperature dependence of the velocity is quite similar to that of fT. This suggests that the temperature
dependence of fT is dominated by that of veff.

1. M.S. Shur, A. Khan, B. Gelmont, R.J. Trew, and M.W. Shin, "GaN/AlGaN field effect transistors for high
temperature applications," Inst. Phys. Conf. Ser. no. 141, pp.419-424, 1995.
2. M. Asif Khan, Michael S. Shur, John N. Kuznia, Q. Chen, Jin Burm, and William Schaff, "Temperature
activated conductance in GaN/AlGaN heterostructure field effect transistors operating at temperatures up
to 300 °C," Appl. Phys. Lett., vol.66, no.27, pp.1083-1085, 1995.
3. M. Akita, S. Kishimoto, K. Maezawa and T. Mizutani, "Evaluation of effective electron velocity in
AlGaN/GaN HEMTs," Electron. Lett., vol.36, no.20, pp. 1736-1737, 2000.

151
 Source Gate Drain 50
23°C "—«A.
< 187°C L/
AI03Gan7N 5 nm E
n-AI03Ga07N 10 nm t* O0OöO
00000
°OöOOOOOO

c »*.' yrö J
25
CD zo •• o0oo0opooooooooo°0ooooodo
AI03Ga07N 5 nm
i_

GaN 3000 nm o A »%0°

c ^^j°o0OOOOODOODOOOOOOOOOQOOOOODOOOOOC

AIN 40 nm Q
uiM»«>i«»mmmmnm IIHIMMMMM»
^OOOOOOOOOOOÖOOÖÖOOÖOÖÖOOÖOOOOOÖOOpopci

Sapphire substrate 0
0 5 10
Fig. 1 Schematic cross-section of the Drain Voltage, VDS (V)
fabricated AnGaN/GaN HEMTs. Fig.2 I-V characteristics at 23 and 187 °C;
:
'GS +1 ~ -4V. Gate width is lOOum.

N lv>
N 15
I • • • • • I
O •
A A
• o • "'-•..
A * A 4A4i
A ^AAA
10 A
■
■ ■ ■ ■ - 10 A
■ >>
o ■ O ....... B-
c c
CD A CD
■ u ■
O"
CO 5 CD 5 *
• • 23°C • 23°C
it * - 103°C It * 103°C
O
■+-> ■ 187°C o
4—' - 187°C
n ■ I i . i
O 0 5 10 15 20 o -4
1

-3
. i

-2 -1 0
Drain Voltage, VDS (V ) Gate Voltage, VGS (V)
Fig.3 Cutoff frequency as a function Fig.4 Cutoff frequency as a function
ofVDSatVos = -1.5V. of VGSatVDS 10 V.

150 200 O 10 20
Temperature (°C) Inverse of Drain Current, 1 / lD (mm-A'1)
LLI
Fig.5 Temperature dependences of the cutoff Fig.6 Delay time as a function of the
frequency and effective electron velocity; inverse of ID; VDS = 10 V.
V,DS 10V,Vrq = -1.5V.

152
 Influence of Barrier Thickness on the High Power
Performance of AlGaN/GaN HEMTs
Vinayak Tilak, Bruce Green, Joseph Smart, James Shealy and Lester Eastman,
Department of Electrical and Computer Engineering; Cornell University, Ithaca,
NY, 14853

HIGH power, high efficiency microwave transistors, amplifiers and switching devices are in demand
for both commercial and defence applications. The inherent advantages of group III nitrides, like
large band gap (3.4 eV), break down fields (> 2 MV/cm) and high electron velocities (1.8 x 107 cm/s)
make the material system ideally poised to cater to this demand. Record output powers of 9.8 W/mm
at 8 GHz have been reported [1] on transistors fabricated on group III nitrides shows the potential of
these material systems. A ft of 101 GHz has been measured for AlGaN/GaN HEMTs with 0.1 /mi
which opens up applications at mm wave frequencies also [2].
Many groups have shown that there exists a current slump or dispersion at RF frequencies in the
AlGaN/GaN material system due to which the current available at RF is less than at DC [3]. This effect
translates into the output power at microwave frequencies being less than what can be expected from
the DC characteristics. Efforts have been underway to understand the effect in several laboratories
[4], [5]. The current slump is attributed to acceptor like states arising from threading dislocations and
surface states near the gate [4]. These states trap electrons which are field emitted from the gate and
cause the depletion of the two dimensional electron gas (2DEG). These electrons cannot contribute to
the RF swing as they have lifetimes in the millisecond range [6] This reduces the current at RF and
is detrimental to the large signal performance of the device. In this paper we show that the effect is
increased if the barrier thickness is decreased. Figure 1 shows the RF load lines plotted against the
IV curves on 2 x 125 x 0.3/jm AlGaN/GaN HEMT made on SiC substrates with AlGaN thicknesses of
lOnm and 20nm. The HEMT made on a lOnm barrier gave a saturated output power of 1.2 W/mm
at 8 GHz whereas the 20nm barrier gave a saturated output power of 2.65 W/mm at 8 GHz. Both
the devices were biased at VD = 25V and class A operation. Note that the DC operation of the 2
devices were very similar and cannot explain the discrepancy in the large signal performance. The
RF full channel current measured for the lOnm barrier device is half that of the 20nm barrier device
and the RF knee voltage measured for the lOnm barrier device is 19V as against the DC knee voltage
of 5V and for the 20nm barrier device the RF knee voltage is 14V as against the DC knee voltage of
5V. These factors limit the performance of the lOnm barrier device as compared to the 20nm barrier
device. This discrepancy can be explained by the increase in electric fields in the barrier which enhance
the tunneling of electrons from the gate thereby increasing both the trapped charge and the depletion
of the 2DEG. This effect can be mitigated if we apply a layer of silicon nitride on the device. The
layer of silicon nitride prevents the trapping of electrons on the surface and so increases the PAE and
the output power of these devices [8]. When a layer of silicon nitride was applied on devcies with a
20nm AlGaN barrier the performance improved dramatically. A 2 x 100 x 0.3/mi transistor gave a
saturated output power of 8.8 W/mm (40% power added efficiency) at 10 GHz. This represents the
state of the art performance of FETs for this periphery and frequency.Thermal dissipation becomes
important once passivation is performed as heating of the devices significantly degrades the mobility
[7]. This is especially true when operating at high drain biases for high power operation.
e-mail: tilak@ee.comell.edu

153
Fig. 1. Loadlines measured on 2 x 125 x 0.3/wn devices without passivation. Thin barrier device biased at VD = 25V and
VQ - -IV and the 20 nm barrier device biased at VD — 25V and VG = -2.5V. Note the RF knee voltage is significantly
different from the DC knee voltage and the RF full channel current of the lOnm barrier is half that of the 20nm barrier
device.

ACKNOWLEDGMENTS

This work was supported by the Office of Naval Research MURI under Contract N00014-96-1-1223,
monitored by Dr. John Zolper.

REFERENCES
[1] Yi-Feng Wu, Kapolnek D., Ibbetson J.P., Parikh P., Keller B.P., Mishra U.K. Kehias, Very-high power density AlGaN/GaN
HEMTs IEEE Trans. Electron Devices, 2001, pp. 586-590.
[2] Wu Lu, Jinwei Yang, Khan M.A., Adesida I. Algan/gan HEMTs on SiC with over 100 GHz ft and low microwave noise IEEE
Trans. Electron Devices, 2001, pp. 581-585.
[3] E. Kohn, I. Daumiller, P. Schmid, N.X. Nguyen, C. N. Nguyen Large signal dispersion of AlGaN/GaN heterostrcuture field
effect transistors Electron. Lett, vlo. 353, pp. 1022-1024, Dec 1999
[4] Vetury R., Zhang N. Q., Keller S., Mishra U.K. The impact of surface states on the DC and RF characteristics of AlGaN/GaN
HFETs IEEE Trans. Electron Devices, 2001, pp. 560-566.
[5] S.C. Binari, W. Kruppa, H.B. Dietrich, G. Keiner, A.E. Wickenden, and J.A.Freitas. Fabrication and characterization of gan
fets. Solid State Electronics, 1997.
[6] Koley G.,Tilak V., Spencer M., Eastman L., Millisecond scale transients in AlGaN/GaN HEMTs Submitted to Device Research
Conference, 2001.
[7] Prunty T., Shealy J.R., Fabrication and Characterization of AlGaN/GaN HEMTs Presented at the MURI workshop on
Gallium Nitride , May 2001.
[8] Green B.M., Chu K.K., Chumbes E.M., Smart J.A., Shealy J.R., Eastman L.F. The effect of surface passivation on the
microwave characteristics of undoped AlGaN/GaN HEMTs IEEE Electron. Device Lett., 2000, pp. 268-270.

154
An investigation into the charge distribution and pinch off
behavior of AlGaN/GaN double heterostructure DH-FETs
under Schottky and ohmic contacts.

M.Zervos1}, A.Kostopoulos, G.Constantinidis, M.Kayambaki, S.Mikroulis

and A.Georgakilas.

Foundation of Research and Technology Hellas (FORTH), Institute of Electronic

Structure and Laser (IESL), Microelectronics Research Group (MRG), Vassilika
Vouton, Heraklion 71110,Crete,Greece.

We have fabricated AlGaN/GaN single heterojunction SH-FETs and AlxGai_

xN/GaN/AlyGai-yN/GaN double heterojunction DH-FETs and found that the DH-FETs
can tolerate a higher gate bias before significant leakage occurs. Therefore we
investigated the DH-FETs in a systematic way to understand the best compromise in
current driving capability and control. A high 2DEG density in the GaN quantum well
(QW) under an ohmic contact with low barrier height i.e. (pb <0.5eV and a depleted GaN
QW for a schottky contact with (pb >leV was aimed for. Heterostructures consisting of a
50Ä Alo.3Gao.7N/5OA GaN/AlyGai.yN were grown by radio frequency (RF)-molecular
beam epitaxy (MBE) on n+ GaN buffer layers on AI2O3. The AlGaN lower barrier width
was varied between 100Ä-1000Ä and the composition from y=0.15 to y=0.3. Ni/Au
schottky and Ti/Al ohmic contacts were deposited on different parts of the surface after
making a circular mesa. No annealing was performed. The DHs were investigated by
capacitance-voltage (CV) profiling in conjunction with self consistent Poisson-
Schrödinger (SCPS) calculations of (i) the conduction band (CB) profile, two
dimensional electron gas (2DEG) distribution and (ii) the variation of capacitance with
applied gate bias Vg.
For the Schottky contacts we find one major peak in the concentration Ncv vs depth curve
in all DHs, located beyond the QW, based on the 'classical' analysis for a uniform layer
under depletion. This is due to the gradual depletion of the single sub-band that exists
below the fermi-level (FL) in the quasi-triangular potential well beyond the GaN QW. Its
density drops linearly with applied gate bias Vg giving a capacitance dQ/dV that is
initially constant . The GaN QW has a negligible 2DEG density so it has no effect on
dQ/dV during the depletion process. For the DH with tLB=200 Ä and y=0.2 there is a
single sub-band below the FL at the AlGaN/GaN heterojunction, with a density of
7.8x1012cm"2 at equilibrium and gives a calculated dQ/dV=17pF in good agreement with
the measured value of 18pF. At the onset of pinch off, once the ground sub-band is over
the FL, dQ/dV drops until there are no more confined states, after which the depletion
edge starts moving into the GaN buffer. We find a strong dependence of pinch-off
voltage Vp on the lower barrier width e.g for tLB^OO Ä , Vp =3V increasing to 5V for
400 Ä and 16V at 1000 Ä in good agreement with theoretical values. In contrast to the

'* e-mail: zervos@physics.uoc.gr

155
rectifying IV curves obtained with Ni/Au schottky contacts we found linear IV behavior
for the Ti/Al contacts as deposited i.e. with no annealing. This is attributed to resonant
tunneling through the double barriers as shown by calculations of the transmission
coefficient by the transfer matrix method employing airy functions2).

SnmAIGaN/SranGaN/10nmAIGaN/GaN DH
T-300 K.N*=1E 1fl(cm-3).Nb=5E 1l5(cm-9)
26+25

■ 1.5B+25

10H-25

500
Position (Angstroms)

Fig 1. Conduction band profile of a 5nmAlGaN/5nmGaN/10nmAlGaN DH-FET showing the

2DEG distribution which has a sheet density of 5.5xl012 cm"2.

10 "l
Peak@23nm

i
o
c
]
■B 10" - \ GMBE132
1-
c
\\
0)
Ü
\
\ N =4.9X10 "(cm)
o
Ü
\

0.02 0.04 0.06 0.08 0.10

Depletion width (um)

Figure 2. Capacitance-voltage profile of the same DH-FET in Fig 1. The integrated, sheet density
is 4.9xl012 cm"2 in good agreement with the theoretical value.

We acknowledge support from the GSRTPENED 99ED 320 and bilateral cooperation projects.

156
 SESSION XI
SiC- and GaN-based devices
Chair: Prof. Fausto Fantini
Wednesday May 30, 2001

10.40 am Wide Bandgap Semiconductors Technologies for Microwave Power

Amplifiers
INVITED C. Brylinski
THALES LCR (formerly Thomson-CSF/LCR) Domaine de Corbeville, F-
91404 OrsayCedex

11.05 am Optimisation of Structure and Gate Leakage Effects in MOVPE

AIGaN/GaN Heterostructure Field Effect Transistors
W S Tania), P A Houston™, P J Parbrook™, D A Woocfa\ G Hilfa\ C R
Whitehouseia) R WMartin{b)
(a) Department of Electronic and Electrical Engineering, University of
Sheffield, Mappin Street, Sheffield S1 3JD, UK.
(b) Department of Physics, University of Strathclyde, Glasgow, UK.

11.20 am ECR-Silicon nitride passivation of lll-V transistor

S.Shaoovafa). V.Gurtovofa), A.Kovalchuk™, and C.Gaquiere{b)
(a) Institute of Microelectronics Technology, Russian Academy of Sciences,
142432 Chernogolovka, Moscow district, Russia.
(b) Institut d'Electronique et de Microelectronique du Nord, 9929 Dep.
Hyperf. et Semic. Avenue Poincare B.P. 69 59652 Villeneuve D'ascq
Cedex - FRANCE

11.35 am The Optoelectronic Response of Extended Defects in 4H-SiC

Chi-Hsin Chii/a>, P J M Parmite^, K Hilton(b}, M J Uren<b> and J G
Swanson(a>
(a) Department of Electronic Engineering, King's College London, Strand,
London, WC2R 2LS, United Kingdom
(b) DERA MALVERN, St Andrews Rd, Malvern, Worcs, WR14 3PS, United
Kingdom

11.50 am 4H-SiC p+-n-n+ Zener and IMPATT diodes

K. Vassilevskfab), K. Zekentes(a'b\ M. Lagadas(a), N. Papanicolaou{0), A.
Zorenko™, Leonid Romano™
(a) Foundation for Research and Technology-Hellas, P.O. Box 1527,
Vassilika Vouton, 711 10 Heraklion, Greece
(b) loffe Institute, St.Petersburg, 194021 .Russian Federation
(c) Naval Research Laboratory, 4555 Overlook Ave., Washington D.C.
20375, USA
(d) State Scientific & Research Institute "Orion", Kyiv, 252057, Ukraine
(e) "Svetlana-Electronpribor" Co., St. Petersburg, 194021, Russian
/federation

12.05 am Trap-Related Effects in 6H-SiC Buried-Gate JFET's

G. Meneghessoia), A. Chinfa), E. Zanonfa), G. Verzellesfb\ E. Tediosfb),
C. Canair, A. Cavallinfc), A. Castaldinfc)
(a) Dipartimento di Elettronica e Informatica and INFM, Universita' di
Padova, via Gradenigo 6/A, 35131 Padova, Italy
(b) Dipartimento di Scienze dell'lngegneria and INFM, Universita' di Modena
e Reggio Emilia, via Vignolese 905, 41100 Modena, Italy
(c) Dipartimento di Fisica and INFM, Universita' di Bologna, via. B. Pichat,
40100 Bologna, Italy

157
158
WIDE BANDGAP SEMICONDUCTORS TECHNOLOGIES
FOR MICROWAVE POWER AMPLIFIERS

DR. Christian Brylinski

THOMSON-CSF
LABORATOIRE CENTRAL DE RECHERCHES ( LCR)
Domaine de Corbeville 91404 ORSAY Cedex - France

159
160
 Optimisation of Structure and Gate Leakage Effects in MOVPE
AlGaN/GaN Heterostructure Field Effect Transistors

W S Tan, P A Houston, P J Parbrook, D A Wood, G Hill, C R Whitehouse

Department of Electronic and Electrical Engineering, University of Sheffield, Mappin Street,
Sheffield SI 3JD, UK.
R W Martin
Department ofPhysics, University of Strathclyde, Glasgow, UK.

The transport characteristics of the two-dimensional electron gas in AlGaN/GaN HFET

structures have been measured as a function of AlGaN barrier thickness and composition
using Shubnikov de Haas and Hall. The devices were fabricated on wafers grown by MOVPE
with an AlGaN barrier of different thickness and Al composition. All layers were nominally
undoped and gate lengths between 1-2 urn were used. For and 15nm barrier thickness
(30%A1), Hall measurements at 300K and 4.2K indicate an ns value of l.lxlO13 cm"2 and
7.1xl012 cm"2, and |i of 1720 cmVs"1 and 13500 cmW1 respectively (Fig. 1). To date,
this is one of the highest 2DEG mobilities for this sheet concentration ever achieved on
AlGaN/GaN structures grown on sapphire substrates. However, exceeding the critical
thickness drastically reduces both the 2DEG density and mobility as expected. The difference
in ns values at the two temperatures is due to carrier freeze-out of conduction paths parallel to
the 2DEG. Maximum transconductances of 180 mS/mm for a 0.9 \xm gate were achieved.

Below pinch-off, gate leakage currents are due to electron tunnelling through the barrier,
which rises exponentially with gate voltage and drain voltage (at constant gate voltage) and
can be simply explained by the reduction in barrier thickness with gate reverse bias. Above
pinch-off, the gate leakage current rises much less rapidly with both gate and drain voltage,
signifying the onset of the lateral expansion of the gate depletion region. These effects can be
clearly seen from Fig.2. For devices with poor channel isolation (high buffer leakage) the
gate leakage current is increased due to the higher vertical component of the field possible
because of the lack of pinch-off. The gate leakage current, beyond pinch-off, increases with
gate-source reverse bias due to the lateral spread of the field to fill the whole region under
the gate.
Investigations of the gate leakage current with temperature show that the vertical leakage
(gate at or below pinch-off) increases with temperature at a faster rate than the lateral leakage
(Fig. 3). The reasons for this are unclear. However, the gate-drain breakdown voltage (-80 V
at 20°C) reduces with increasing temperature, indicating that a breakdown mechanism other
than impact ionisation may be responsible.

161
 1.0E-03

o
5 1.0E-04
c
g
Ü
CO
I, 1.0E-05

1.0E-06
2.0 4.0 6.0 8.0 10.0 0.0 2.0 4.0 6.0 8.0 10.0
Magnetic field, T drain to source voltage, V

Fig. 1. Magnetoresistance (Rxx) and quantum Hall Fig. 2. Three-terminal gate leakage current vs drain-
resistance (Rxy) for the 15nm barrier and 30% Al source voltage as a function of gate voltage. The gate
mol fraction structure at 4.2K, which yielded a pinch-off voltage is -4V. The transition from vertical to
record mobility of 13500 ctrrV's"1. lateral leakage is evident for negative gate voltages less
than 4V.

'JS/j 20°C
^*^J7 60°C
-5.0E-05 ~^- // 100°C
:< -" : //
: C 130°C i
£ -1.0&04
; O 160°C !

'; |
CO
-1.5E-04
200° C i
s
: 8 -2.0E-04

-2.5E-04
»5 -20 -15 -10 -5 ()
gate to drain voltage, V

Fig. 3. Two-terminal gate-drain leakage current as a

function of temperature.

162
 ECR-silicon nitride passivation of III-V transistors
S.Shapoval, V.Gurtovoi, A.Kovalchuk, and C.Gaquiere*
Institute ofMicroelectronics Technology, Russian Academy ofSciences, 142432 Chernogolovka,
Moscow district, Russia, E-mail: ShapovalCcvipmt-hym.ac.ru
* Institut d'Electronique et de Microelectronique du Nord, U.M.R. - C.N.R.S. 9929, Deportment
Hyperfrequences et Semiconducteurs, Avenue Poincare B.P. 69, 59652 VILLENEUVE D'ASCQ CEDEX-
FRANCE

Abstract. We have studied the hydrogen incorporation in ECR silicon nitride films and their
passivation effects for GaAs and GaN transistors. Silicon nitride films were deposited by varying
substrate temperature (20-300°C), SiK/lNfe flow ratio (0.75-1.2), pressure (1-6 mTorr), and microwave
power (200-500 W). Optical properties and H-content of the films were characterized by ellipsometry
and Fourier transform infrared (FTIR) spectroscopy, respectively. Composition homogeneity of the
films was determined by secondary ion mass spectroscopy and Auger electron spectroscopy. After
passivation by hydrogen content optimized silicon nitride films, there were observed improvement in
breakdown voltage for GaAs MESFETs and increase in saturation current for GaN HFETs.

Plasma-enhanced chemical vapor deposition (PECVD) of Si3N4 is widely used technique for
device passivation and encapsulation in HI/V technology. Due to advantages of electron cyclotron
resonance (ECR) plasma methods with high plasma density (1012 cm"3) and low ion energy (~ 20 eV),
they became very efficient tools for deposition and etching. Moreover, ECR Si3N4 gives high quality
films with improved step coverage [1,2]. But contrary to PECVD, ECR CVD of Si3N4 is not so
extensively studied. It has been reported that the trap densities increases with hydrogen concentration
in silicon nitrides [3]. FET performance is also subjected to influence of hydrogen content in Si3N4
films [4].
In this work we have studied the hydrogen incorporation as a function of deposition parameters.
The amount of hydrogen bonds in Si3N4 films influences both physical and electrical properties.
Depending on bonding configuration (Si-H or N-H), hydrogen can increase the wet etching rate,
change electrical properties, increase the residual stress, decrease the thermal stability. N-H bonds are
responsible for the compressive stress of the Si3N4 film [5]. As for interface state density of Si3N4 on n-
GaN, this system has been studied recently for PECVD Si3N4 [6].
Silicon nitride films (100-200 nm) were deposited from monosilane (SiH4) and nitrogen diluted in
argon (1:3) using an ECR plasma reactor. Silicon nitride films were deposited by varying substrate
temperature (20-300°C), SiH/N^ flow ratio (0.75-1.2), pressure (1-6 mTorr), and microwave power
(200-500 W). To investigate Si3N4 film properties, the films were deposited on Si (100) wafers (p-
type, 10 Qcm). Silicon nitride refractive index in the range 1.96-2.03 was measured by varying the
SiH4/N2 flow rate ratio (0.9-1.1). Figure 1 shows the normalized FTIR spectrum of a typical silicon
nitride film. The amount of hydrogen incorporation and bonding configuration was determined from
the absorbance of the Si-H and N-H stretch modes at 2180 and 3340 cm"1, respectively. Hydrogen
content in Si3N4 films as a function of S1H4/N2 flow rate ratio is shown in Fig. 2. For both Si-H and N-
H bond content, sharp changes were observed with small deviations of SÜVN2 around 1. The total
hydrogen incorporation remained nearly constant.
Figure 3 shows Auger depth profiles of a Si3N4 film on Si. One can see that, the film is
homogeneous and has oxygen free interface. The oxygen content is lower than 0.5 %, which is
determined by detection limit of Auger spectrometer.
From high frequency C-V measurements, interface-trap density level was determined to be rather
low (0.5-2)xl0n cm"2eV"', showing high quality of Si3N4/Si interface without comprehensive cleaning
procedures prior to deposition.
For passivation experiments, GaAs MESFETs were used with average breakdown voltage of 10
V. Si3N4 passivation of these transistors resulted in increase of breakdown voltage up to 19 V, with the

163
 average breakdown voltage of around 15 V, the saturation current and transconductance being
practically unchanged. Annealing in dry nitrogen at 250°C for 30 minutes resulted in slight increase of
the breakdown voltage.
A significant current reduction or frequency-dependent slum deteriorates the RF power
performance of AlGaN/GaN HEMTs. This effect is caused by trapping states at the surface of
semiconductor between the gate and drain. Therefore, the usage of Si3N4 passivation layer could
eliminate the surface effects limiting the RF current. Figure 4 shows an after passivation improvement
of DC I-V characteristics for a GaN/AlGaN transistor with a gate of 2x50x0.3 urn2.
References.
1 F. Ren, D.N. Buckley, D.N. Lee, S.J. Pearton, R.A. Bartynski, C. Constantine, W.S. Hobson, R.A.
Hamm, and P.C. Chao, Solid State Electron., 38, 2011 (1995).
S.Y.Shapoval, V.T.Petrashov, O.A.Popov, M.D.Yoder, P.D.Maciel, C.K.C.Lok,,
J.Vac.Sci.TechnoL, A (6), 3071 (1991).
S. Fujita, T. Ohishi, T. Toyoshima, A. Sasaki, J. Appl. Phys., 57, 426 (1985).
C.S. Wu, G.L. Lan, C.K. Puo, S. Bar, and M. Hu, Mater. Res. Soc. Symp. Proc, 300, 41 (1993).
C.W. Pearce, R.F. Fetcho, M.D. Gross, R.F. Koefer, and R.A. Pudliner, J. Appl. Phys. 71, 1838
(1992).
S. Arulkumaran, T. Egava, H. Ishikava, T. Jimbo, and M. Umeno, Appl. Phys. Lett. 73, 809
(1998).

'" '' Si-Ki " ' 30 -•

i

1.U Fouriertransfer Infrared spectrum

(received on PERKIN-EIMER 1720-X ÜB
N-H + S -H
• ;
and normalized to trim) 26
0,8 24
of an ECR plasma deposited Si,N, film
Thickness * 100 nm
I 22
A—_ :
en ECR Fewer* 450 W -
Xi 0,6 20 N-H
.2. Flow rate ratio of SiH4/Na = 1 c 18
Bc
NS :
Total pressure = 2.5 mTorr
a>
u 0,4 Temperature = 100°C
' 16
T=200°C
c 14
8
CO
XI 0,2
N-H Si-H / I A "
12
10
^s
Si-H
8 -m~^^
■
./\_ J**N.
XI 0,0 " ~~
< , , . ., 6 [

4000 3600 3200 2800 2400 2000 1600 1200 800 400 0,70 0,75 0,80 0,85 0,90 0,95 1,00 1,05 1,10 1,15
-1
Wavenumber (cm ) SiH4/N2 Flow Rate Ratio

Fig. 1. FTIR spectrum of a Si3N4 film. Fig. 2. Hydrogen content in Si3N4 films as
a function of SiH4/N2 flow rate ratio.

100
90
80
r
70
60
N
5 50
ou I
a 4nf
40
30 Si
20
10
O \».*»
0
0 5 10 15 20 25 30 35
Sputter Time (Min.)

Fig. 3. Auger depth profile of an Fig. 4. DC I-V characteristics of

ECR plasma Si3N4 film deposited on GaN/AlGaN transistor (before and after
Si passivation) with a gate of
2x50x0.3 um2. Maximum Vg =+4 V, step
IV.

164
 The Optoelectronic Response of Extended Defects in 4H-SiC

CHI-HSIN CHIU, P J M PARMITER*, K HILTON*, M J UREN* and J G SWANSON

Department of Electronic Engineering, King's College London
Strand, London, WC2R 2LS, United Kingdom
*DERA MALVERN, St Andrews Rd, Malvern, Worcs, WR14 3PS,
United Kingdom

Optoelectronic Modulation Spectroscopy(OEMS) senses the effect of light of definite photon

energy on an electrical parameter associated with a semiconductor device structure. In this
modulation spectroscopy the photon energy is periodically modulated and it is the
modulation of the electrical parameter that is measured. The magnitude is then displayed as
a spectrum as the mean photon energy is scanned. If the response is not in phase with the
variation of photon energy the phase as well as magnitude can be plotted to form a pair of
related spectra.

In this study OEMS was applied to a 4H-SiC MESFET in which channel conduction was
determined by the thickness of the gate and backplane depletion regions, and by the carrier
concentration and their average carrier mobility. If any of these parameters were affected by
the incident light a change in channel current would be seen[1]. In this work sub band-gap
photons were used to permit penetration into the semiconductor in order to excite charges in
deep defect states. The table summarises the responses that were seen

The spectral feature at 1.2eV is of particular interest because it comprises two peaks
separated by a phase change of 180°. It was the largest of the responses. Others were
single peaked with a phase that indicated whether the response related to an electron or a
hole trap. A model which takes into account the spread of the trap wavefunctions in k-space
suggests that in this case the state was an electron trap, delocalised in real space with an
extension of about 17nm, corresponding to a spatially extended crystal defect. The same
model suggests that the other single peaked OEMS responses were from states that were
spatially well localised, possibly from point defects. It is known that threading dislocations
have high densities in SiC epitaxial materials, this suggests that these may be related to this
peculiar OEMS feature.

The table includes published optical admittance spectroscopy[2,3] and DLOS[4]

observations. The form of the 1.2eV DLOS signature is consistent and another DLOS
feature at 0.96eV has a similar form but was not seen using OEMS.

165
 PREVIOUS WORK
Trap type Comments Optical DLOS[4]
admittance
[2,3]
Energy (eV) Energy(eV) Energy(eV)
(293K) (40K)
0.72 E/H superimposed 0.72
similar
responses
0.80 E
0.82 E
0.88 E 0.87
0.92 E 0.96
1.01 H (peak)
1.12 E 1.10(SI)
1.20(150K) E delocalised 1.18 1.25(peak)
1.60 E 1.60(SI)
1.76 E 1.73 1.5-2.0(broad
threshold)
2.00 H
2.20 H
2.3-2.9 H unresolved

This result is of particular interest because of its possible relevance to GaN epitaxial
materials which often contain dislocation densities as high as 10ecm"2. There is strong
evidence that dislocations limit the carrier mobility in GaN and they are often represented in
conduction models as extended lines of charge. Their role in optical processes is less clear.
OEMS might provide a means for distinguishing their behaviour and the method is currently
being applied to see if similar "delocalised" signatures exist in these materials.

References
1 Chi-Hsin Chiu and J G Swanson, Journal of Electronic Materials, 29, 5, pp. 591-597,
2000
2 O Evwaraye, S R Smith and W C Mitchel, J. Appl. Phys., 79, (10), pp. 7726-30, (1996)
3 W C Mitchel, R Perrin, J Goldstein, A Saxler, M Roth, S R Smith, J S Solomon and A O
Evwaraye, J. Appl. Phys., 86, (9), pp. 5040-4, (1999)
4 V Lauer, G Bremond, A Souifi, G Guillot, K Chourou, M Anikin, R Madar, B Clerjaud and
C Naud, Materials Science and Engineering B61-62, pp. 248-52, (1999)

Acknowledgement
Technology Groups 7 and 9 of the UK MoD Corporate Research Programme provided partial
support and C-H C was supported by King's College London Taiwan Scholarship.

166
 4H-SiC p+-n-n+ Zener and IMPATT diodes
Konstantin Vassilevski1,2, Konstantinos Zekentes1, Michaiis Lagadas1, Nicolas Papanicolaou3,
Alexander Zorenko4, Leonid Romanov5

'Foundation for Research and Technology-Hellas, P.O. Box 1527, Vassilika Vouton, 711 WHeraklion, Greece
2
Ioffe Institute, St.Petersburg, 194021,Russian Federation
3
Naval Research Laboratory, 4555 Overlook Ave., Washington D.C. 20375, USA
4
State Scientific & Research Institute "Orion", Kyiv, 252057, Ukraine
5
"Svetlana-Electronpribor" Co., St. Petersburg, 194021, Russian /federation

The advantage of silicon carbide (SiC) as a semiconductor for use in ultra high frequency (UHF) diodes is
based on its fundamental properties: high breakdown field, excellent thermal conductivity, capability to operate
at elevated temperature. Nevertheless, fabrication of UHF SiC diodes was not extensively addressed up to now,
although outstanding results were obtained in the development of high power/low frequency rectifying diodes.
This fact may be attributed to the lack of diodes combining a low series resistance and a low capacitance in the
same structure necessary for a UHF diode operation. Last
year, we have reported [1] the fabrication of 4/7-SiC p+-n-n+
0.06 diodes with record differential resistivity (5xl0"5n.cm2 at
A) DC forward current density j>25 kA/cm2) and low
0.04 capacitance value (down to 0.7pF for 40um diameter). This
paper reports on the use and characterization of these diodes
as Zener and IMPATT diodes.
0.02 The diodes revealed stable operation at continuos
avalanche current. Fig. 1 shows the I-V characteristics of
AH-SiC diodes having breakdown voltage about 290 V at
maximum continuos current. Maximum continuos current of
60 mA was measured on the diodes with D=200 um
(V) corresponding to the dissipated power of 18 W. The current
Fig 1. I-V characteristics of the 4HSiCp+-n diode was increased exponentially with applied voltage in the
at maximum continuos avalanche current and at initial part of I-V characteristics until the diode self heating
test current (shown in the insert) for various mesa led to increasing of dynamic (or Zener) impedance Zz. It is
structure diameters. 1 - diameter of mesa structure clearly seen in the inset in Fig. 1. Parameters of the diodes
is 200 um; 2 - 80 um; 3 - 60 um; 4 - 40 um. depending on mesa structure diameter are given in the
Table 1. The test current IZT, at which the Zener voltage (Vz)
and Zz were measured, was chosen at minimum Zz value. The scattering of Vz value through the wafer did not
exceed 3%. All the diodes revealed the positive temperature coefficient (ß) of Vz of about S-IO^K"1 measured as
at continuos current [2] as well as at high pulsed current conditions
To prove the advantage of SiC over silicon for fabrication of high voltage Zener diodes we have compared
our diodes with commercial [3] Si Zener diodes with the same breakdown voltage. The SiC diodes with 200um
Mesa Capacita- Nominal Test Dynamic Maximum Leakage Typical
diameter or nce at Zener voltage current impedance continuous current at temperature
diode type zero bias dXlzT Zz(fi) current KÄ=230V coefficient
D[uml Co [pF] VZ[V] IZT [mA] at 1mA atlzr IZM [mA] MnA] ß [%/°C]
40 0.7 295 - 304 3 1000 800 12 20 0.03
60 1.6 294 - 296 5 950 500 20 25 0.03
80 2.8 291 - 295 5 900 400 35 40 0.03
200 17 286-293 10 450 170 60 60 0.03
1N4993 300 5 2100 800 15.6 2000 0.120
1N5110 300 3 1900 10 1000 0.105
Table 1. Parameters of 4/f-SiC diodes with different mesa structure diameters and of commercial silicon Zener diodes[3].

167
mesa diameter were capable to operate at continuos current up to 60 mA corresponding to the power of 18 W.
These diodes had dynamic resistance of 170 Q at test current 10 mA, which is appreciably lower than that of Si
diodes. At the same time they had lower leakage currents (about two orders of magnitude) and lower
temperature coefficient of breakdown voltage.
The same diodes have produced ultra high frequency oscillations and thus the first 4H-SiC IMPATT diode
has been demonstrated [4]. According to the theory of IMP ATT oscillators, the fundamental frequency of free
running MPATT oscillator is lower than the transit time frequency, ff=vsl2wm and higher than the avalanche
resonance frequency (fA) of the diode. The value of/f=19 GHz for fabricated 4H-SiC diodes may be easily
calculated with use of vs=7.5-106cm/s, measured in [2]. To estimate the value of fA, the noise power spectral
density (NPSD) of fabricated diodes was measured [1]. Sharp decreasing of NPSD was observed at a frequency
of about 6 GHz and this recession was moving to higher frequencies with increasing of/,, and it was concluded
that the value of fA must be higher than 6 GHz at operating current densities. The operating frequency of
fabricated diodes was expected to be far fromfT and close tofA due to the relatively high values of diode series
resistivity (Rs). Taking into account that fA~^fA, the frequency range from 8.2 to 12.4GHz (X-band) was
chosen for microwave characterization of the diodes.
The maximum dc current density of 950A/cm2 was passed through the diodes with mesa structure diameter
of 40um. This value of jA is much lower than anticipated operating current densities of SiC IMP ATT diodes,
therefore the pulsed mode of operation was chosen for microwave characterization. The diodes were biased with
dc avalanche current of about lOOnA to charge the capacitance of the p-n junction. Then, the current pulses
having a width from 20 to 100ns were applied to the diode by a pulsed current source. The frequency of
oscillations was measured by a cavity-resonator wavemeter, the average output power was measured by a
thermistor microwave power meter. The microwave oscillations were detected by a microwave pulse detector
connected through a directional coupler. The shape of input current pulse and the envelope of microwave pulse
were measured by a two channel broad-band oscilloscope.
The microwave oscillations appeared at a threshold input pulse current of 0.3 A. The frequency of
oscillations, of about 10 GHz, was located between the
estimated values of fA and fT. Fig. 2 shows a typical input
current pulse (top trace) and a corresponding microwave video
pulse (bottom trace) for one of the diodes. The transient
thermal heating of the p-n junction led to the change of a diode
impedance and, hence, of load matching conditions. This
caused a chirp of the frequency through the pulse duration and
a broad spectral distribution of the oscillations. This spectral
broadening appeared as a noise on the top of the microwave
video pulse, which is clearly seen in Fig. 2. Simultaneously,
the frequency of oscillations measured at different moments
during the pulse was varied from 9.9 to 11 GHz. A microwave
pulsed power of about 300 mW was measured at the pulse
Fig. 2. A typical input current pulse of 0.35 cmTent of Q 35 A and duration of 40 ns. The duty factor was
A, 40 ns (top trace) and the corresponding 1;m Thß conversion efficiency was of about 0.3%.

SCSATT orator
6
' ™ s
^^ sma11 efficienC Can be ex lained
y P * ^^
of the diodes at frequencies very close tof . It should be noted
A
that further increasing of the output power was available, but this optimization was not performed. All the
measurements were made near the threshold current to avoid the risk of a diode burnout.
This work was supported partially by INTAS - CNES 97-1386 grant. FORTH also acknowledges the support
through NATO SfP 971879 grant.
[1] K. Vassilevski, K. Zekentes, E. Bogdanova, A. Zorenko, Proc. of WOCSDICE 2000, VIII-19
[2] K. Vassilevski, K. Zekentes, A. Zorenko, L. Romanov, IEEE El. Dev. Lett. Vol. 21(10), (2000), pp. 485-487
[3] Microsemi Corporation Products Catalogue, http://www.microsemi.com
[4] K. Vassilevski, A. Zorenko, K. Zekentes, IEE Electronics Lett. Vol. 37, no 7, (2001), pp. 467-467

168
I
 Trap-Related Effects in 6H-S1C Buried-Gate JFETs
G. Meneghesso (1), A. Chini (1), E. Zanoni (1), G. Verzellesi (2), E. Tediosi (2),
C. Canali (2), A. Cavallini (3), A. Castaldini (3)
(1) DEI and INFM, University of Padova, Italy
(2) DSI and INFM, University of Modena and Reggio E., Italy
(3) Department of Physics and INFM, University of Bologna, Italy
In this paper, deep levels are characterized in 6H-SiC, buried gate, n-channel JFETs by means of capacitance-
mode (C-) and current-mode (I-) Deep Level Transient Spectroscopy (DLTS) and transconductance (gm) frequency
dispersion measurements. Moreover, the drain-current {ID) transients following a gate-to-source voltage (VGs)
step are analyzed both experimentally and through two-dimensional device simulations allowing the different deep
levels to be localized both energetically and spatially.
JFETs were fabricated by vacuum sublimation epitaxy on high-quality n-type, 6H-SiC platelets grown by an
unmodified Lely process [1]. Figure 1 shows a schematic cross section of the JFET. The p-type, buried-gate layer
is 5-^m thick and doped with Al to the concentration of 3xl018 cm-3. The n-type layer is doped with N to 3xl017
cm-3 and has a thickness h - 1.5 //m, which is selectively reduced to t2 = 0.2 ßm to form the active channel region.
The channel length and width are 8 /*m and 760 fim, respectively. Typical electrical characteristics measured in
these devices are [2]: threshold voltage, Vp = -12V, maximum saturated drain current, lDSSmax(VGS = 07) =
30 mA, maximum drain to source voltage, Vosmax = 100 V.
C- and I-DLTS measurements revealed four distinct traps, having the following activation energies and apparent
capture cross sections: £j = 0.18 eV, <n = 1.3 x lO"16 cm2; E2 = 0.19 eV, a2 = 1.0 x 10~18 cm2; E3 = 0.27 eV,
<73 = 1.5 x 10~18 cm2; E4 = 0.59 eV, <r4 = 1.2 x 10-14 cm2. Figure 2 shows the C-DLTS (left) and I-DLTS (right)
spectra.
Figure 3 shows the normalized gm(f)/gm(0.1Ez) curve up to / = 1 MHz for temperatures ranging from -70
to +50 °C. Four slope changes can clearly be distinguished from Fig. 3; see arrows marked Ei, E2, E3 and E4
for T = -70 °C. Slope changes occur in correspondence of characteristic frequencies which can be evaluated as
the points at which the dgm/df derivative peaks, fM- From the temperature dependence of the characteristic
frequencies, activation energies were extracted as the slopes of the Arrhenius plots shown in Fig. 4, which closely
correlate to those provided by DLTS measurements.
Figure 5 shows the ID transients following a reverse-bias VGS step at different temperatures. At increasing
temperature, the ID transient behavior is governed by increasingly deeper levels. Moreover, the different sign
of the I-DLTS peaks shown in Fig. 2 (right) arises from the different dynamic behavior of the associated deep
levels. Consistently, a "low-pass"-like response is observed at T = 123 K, which is in the temperature range where
the negative I-DLTS peak associated with Ex is located (see Fig. 2, right), while a "high-pass"-like response is
obtained for T = 223 K, i.e. in correspondence of the positive I-DLTS peak related to E3 (see Fig. 2, right).
Finally, £4 is most likely responsible for the "low-pass"-like behavior observed at T = 323 K, the latter falling in
the temperature range of the associated C-DLTS peak (see Fig. 2, left). These results are also consistent with
gm(f) measurements, in that traps Ex and E4 induce a downward (i.e. "low-pass"-like) dispersion, whereas E3 is
associated with an upward (i.e. "high-pass"-like) dispersion.
With the aim of correlating the JFET switching behavior to energetic and spatial location of traps, the following
simulated experiments were carried out, using the drift-diffusion code DESSIS [3]. The ID response to a reverse-
bias VGS step was simulated by assuming only one deep level among E\ -1- £4 to be present within the device at
a time. Each level was placed at its own activation energy either from the bottom of conduction band (Ec) or
the top of valence band (Ev)- In the first case, deep levels behave as electron traps, while, in the latter, they
behave as hole traps. Moreover, each level was assumed to be either uniformly distributed in the n-channel or
in the p-gate region. Temperature was set in all simulations to 300 K. Figure 6 shows normalized ID waveforms
obtained when E3 was considered. Similar ID curves (not shown) were also obtained for Ei, E2, and E4. As can
be seen, dynamic effects are only observed when electron traps are put into the n-channel (see curve 1), or, dually,
when hole traps are assumed to be present in the p-gate region (see curve 2). In the first case, a "high-pass"-like
response is observed. In the latter, a "low-pass"-like response is instead obtained. Comparison of these results
with measurements shown in Fig. 5 allows us to locate traps as follows: E3 is an electron trap distributed in the
n-channel region; E\, E2, and E4 are hole traps located in the p-gate region.
[1] J.A. Powell et al., Int. Phys. Conf. Ser. No. 137, p. 161-164, 1994.
[2] G. Meneghesso et al., IEEE IEDM Tech.Digest, San Francisco, CA (USA), pp. 695-698, 1998.
[3] DESSIS 6.0 Reference Manual, ISE Integrated Systems Engineering AG, 1999.

169
 Source o p Drain
Gate ]_ I Gate
^i
L SiC - n-type
31017cm-3
t« 1
SiCp-type31018cnr3
SiC - Substrate i i i i—i—i
100 200 300 100 200 300
t, = 1.5 u.m; t2 = 0.2 urn Temperature (K) Temperature (K)

Figure 1: Schematic cross section of the buried-gate, Figure 2: (a) Capacitance- (left) and current-mode
n-channel JFETs (right) deep level transient spectroscopy spectra.

Bias:VDS=+3V,VGS = -5V ;Signal:v amp)=100mV

-rnwni 1 IMIUII 1 IIIIIH 1 1 1 1—
E,= 0.16eV
1 1 (a) -

N
X 0.9
1 E4/;
" |^3
^p^ »ftSfc), .

o ■ T =+50'C
-*-

t
. T =+20'C
-£r-
0.8 T=-10*C _Ei_
E
. -o- T =-30'C
T =-50"C
0./ " -O- T =-70"C ^^
1
i miii< I il- I iimri i ninil i iimrt •••••"> i mm
10"1 10° 101 102 103 104 105 106
Frequency(Hz)

Figure 3: Normalized gm(f)/gm(0.1Ez) curves up to Figure 4: Arrhenius plot indicating the activation ener-
/ = 1 MHz for temperatures ranging from -70 to +50 gies of the traps responsible for the gm(f) dispersion.
°C.

1 1 1 r
1.3 15.1 1 1 —i—,—r 25. ! , ,
i i -i—i—n i
VDS=3V T=300K
T-123K T=223K T*323K

1.1 15 24
R
ß
» * 5 ^
a
8
0.4 3 2.9
o
Is ' ■#"

I
0.2 - 2.8 - ^—*-—■ 7.
VV—■
V J _i_
i t i i 1 1.1 1 1 \ \ 1
0.4 0.6 0.8 80 100
■20 0 20 40 60 -10 12 3 -10 0 10 20 30
time(ms) time (ms) time (MS) time (ms)

Figure 5: Experimental ID transients following a Figure 6: Simulated ID transients following a reverse-

reverse-bias VGS step (from 0 to -6 V) at three different bias VGS step (from 0 to -1 V). Curve 1: E3 at Ec -
temperatures. The device was biased in the common- 0.27 eV and distributed in the n-channel. Curve 2: E3
source configuration with an external resistance Rr> — 1 at Ev + 0.27 eV and distributed in the p-gate. Curve
kfi connecting the drain to the power supply. The latter 3: E3 at Ec - 0.27 eV and distributed in the p-gate.
was adjusted to have VDS = 3 V at VGS — _6 V. Curve 4: E3 at Ey + 0.27 eV and distributed in the
n-channel. Curve 5: no traps. A/o(*) is defined as
&ID(t) = ID(oo) - ID(t).

170
 SUPPORTED BY

{CDMUN't Cl DAG L IAH IJ

Azienda Autonoma di Soggiorno e Turismo

$®^$1
i Ente Provinciate per il Turismo

Ente Sardo Industrie Turistiche

Comune di Quartu - Settore Attivitä Produttive - Ufficio Turismo