Typ3 osa

ICL700
System description

Edition

103
Typ3 osa

ICL700
System description
1070 073 737-103 (98.12) GB

Reg. no. 16149-03

E 1998

by Robert Bosch GmbH, Erbach / Germany

All rights reserved, including applications for protective rights.
Reproduction or handing over to third parties are subject to our written permission.

Discretionary charge 20.00 DM

 Contents V

Contents

Page

Safety instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . VII

1 General performance data . . . . . . . . . . . . . . . . 1–1

2 System performance
2.1 Program structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
2.1.1 Module types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
2.2 Program execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
2.3 Module start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
2.4 Start-up via OM5 and OM7 . . . . . . . . . . . . . . . . . . . . . . . . . 2–12
2.5 Definitions in OM2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–13
2.6 Program execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–20
2.6.1 Cyclic program execution . . . . . . . . . . . . . . . . . . . . . . . . . . 2–23
2.6.2 Peripheral interrupt controlled program execution . . . . . . 2–24
2.6.3 Time-controlled program execution . . . . . . . . . . . . . . . . . . 2–27

3 Operation list
3.1 Structure of control statements . . . . . . . . . . . . . . . . . . . . . 3–1
3.2 Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
3.3 Data formats and register structure . . . . . . . . . . . . . . . . . . 3–4
3.4 Types of addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6
3.5 Address ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–12
3.6 Representation of word constants . . . . . . . . . . . . . . . . . . . 3–13
3.7 Time format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–13
3.8 Key to the special markers . . . . . . . . . . . . . . . . . . . . . . . . . 3–14
3.9 Key to the system range . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16
3.10 Addition, subtraction, multiplication and division formats 3–17
3.11 Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–19
3.12 Command execution times . . . . . . . . . . . . . . . . . . . . . . . . . 3–65

1070 073 737-103 (98.12) GB

VI Contents

1070 073 737-103 (98.12) GB

 Safety instructions VII

Safety instructions

Please read this manual before commissioning the ICL700. Store this
manual in a place to which all users have access at any time.

Proper use

This manual contains all information required for the proper use of the con-
trol unit. For reasons of clarity, however, it cannot contain each and every
detail about each and all combinations of functions. Likewise, as the control
unit is usually part of a larger installation or system, it is impossible to con-
sider each and any aspect of integration or operation.

The Typ3 osa is used to

D activate feed drives, spindles and auxiliary axes of a machine tool via
SERCOS interface for the purpose of guiding a processing tool along a
programmed path to process a workpiece (CNC). Furthermore, a PLC is
required with appropriate I/O components which – in communication with
the actual CNC – controls the machine processing cycles holistically and
acts as a technical safety monitor.
D program contours and the processing technology (path feedrate, spindle
speed, tool change) of a workpiece.

Any other application is deemed improper use!

The products described

D have been developed, manufactured, tested and documented in com-
pliance with the safety standards. These products pose no danger to per-
sons or property if they are used in accordance with the handling
stipulations and safety notes prescribed for their configuration, mount-
ing, and proper operation.
D comply with the requirements of
D the EMC Directives (89/336/EEC, 93/68/EEC and 93/44/EEC)
D the Low-Voltage Directive (73/23/EEC)
D the harmonized standards EN 50081-2 and EN 50082-2
D are designed for operation in industrial environments. For operation in
residential environments, in trade and commercial applications and small
enterprises, an individual permit of the national authority or test institution
is required; in Germany, please contact the Bundesanstalt für Post und
Telekommunikation or its local branch offices.

The faultless, safe functioning of the product requires proper transport, stor-
age, erection and installation as well as careful operation.

1070 073 737-103 (98.12) GB

VIII Safety instructions

Qualified personnel

The requirements as to qualified personnel depend on the qualification pro-

files described by ZVEI (central association of the electrical industry) and
VDMA (association of German machine and plant builders) in:
Weiterbildung in der Automatisierungstechnik
edited by: ZVEI and VDMA
MaschinenbauVerlag
Postfach 71 08 64
D-60498 Frankfurt

The present manual is designed for NC project engineers and PLC pro-
grammers. They need special knowledge on performance data, system be-
havior and available PLC instructions.

Programming, start and operation as well as the modification of program

parameters is reserved to properly trained personnel! This personnel must
be able to judge potential hazards arising from programming, program
changes and in general from the mechanical, electrical, or electronic equip-
ment.

Interventions in the hardware and software of our products, unless de-

scribed otherwise in this manual, are reserved to our specialized personnel.

Tampering with the hardware or software, ignoring warning signs attached to

the components, or non-compliance with the warning notes given in this
manual can result in serious bodily injury or property damage.

Only electrotechnicians as recognized under VDE 1000-10 who are familiar

with the contents of this manual may install and service the products de-
scribed. Furthermore, all existing accident prevention regulations (in
Germany: UVV VBG4, VDE 100, VDE 105) and installation instructions
(EN 60204-Part 1, EN 50178) must be observed.

Such personnel are

D those who, being well trained and experienced in their field and familiar
with the relevant norms, are able to analyze the jobs being carried out
and recognize any hazards which may have arisen.
D those who have acquired the same amount of expert knowledge through
years of experience that would normally be acquired through formal tech-
nical training.

Please note our comprehensive range of training courses.

Our training center will be pleased to provide you with further information,
telephone: ++49 (0) 6062 78-258.

1070 073 737-103 (98.12) GB

 Safety instructions IX

Safety markings on products

Warning of dangerous electrical voltage!

Warning of danger caused by batteries!

Components sensitive to electrostatic discharge!

Disconnect from mains before opening!

Pin for connecting PE conductor only!

Connection of shield conductor only

1070 073 737-103 (98.12) GB

 X Safety instructions

Safety instructions in this manual

DANGEROUS ELECTRICAL VOLTAGE

This symbol is used to warn of a dangerous electrical voltage. The fail-
ure to observe the instructions in this manual in whole or in part may result
in personal injuries.

DANGER
This symbol will be used if the failure to observe the instructions in this
manual in whole or in part may result in personal injuries.

CAUTION
This symbol will be used if the failure to observe the instructions in this
manual in whole or in part may result in damages to equipment or data
files.

. This symbol will be used to draw the user’s attention to special circums-
tances.

L This asterisk symbol refers to an activity to be performed by the user.

Key operation

Special keys or combinations of keys are represented by pointed brackets

D Special keys: e.g. <enter>, <pgup> , <del>
D Key combinations
(pressed simultaneously): e.g. <ctrl>+<pgup>

Changes
Modifications in the present operating instructions as compared to issue 102
are marked by black vertical bars on the margin.

1070 073 737-103 (98.12) GB

 Safety instructions XI

Safety instructions

DANGER
Danger for persons and equipment!
First every new program should be thoroughly tested without axis
movement! In the ”Automatic” group operating mode, the control of-
fers the opportunity to inhibit axis movements and/or the output of
auxiliary functions by pressing certain softkeys.

DANGER
Danger of life through inadequate EMERGENCY-STOP devices!
EMERGENCY-STOP devices must be active and within reach in all
system modes. Releasing an EMERGENCY-STOP device must not
result in an uncontrolled restart of the system! First check the EMER-
GENCY-STOP circuit, then switch the system on!

DANGER
Retrofits or modifications may adversely affect the safety of the
products described!
The consequences may include severe injuries, damage to equip-
ment, or environmental hazards. Possible retrofits or modifications
to the system using third-party equipment therefore have to be ap-
proved by Bosch.

1070 073 737-103 (98.12) GB

XII Safety instructions

DANGER
Movements of tools or axes may cause serious or fatal injuries!

Feed and spindle motors generate very powerful mechanical forces

and can accelerate very quickly due to their high dynamics. You
should therefore always stay outside the danger area of the machine
when it is running!

Do not ever – not even briefly – deactivate the safety-relevant func-

tions of the unit!

Report any malfunction of the unit to your servicing and repairs de-
partment immediately.

Inappropriate working clothes may cause serious or fatal injuries!

During careless handling of machines with rotating parts, clothes or
long hair may get caught in the mechanics, pulling operators into the
machine! Therefore:
D Wear a hair net!
D Wear a protective suit!
D Take off protective gloves before working near moving parts!
D Take off any jewelry and wristwatches!

Remember that chippings, borings, etc. may be cast out during op-
eration of the machine! They can cause eye injuries and burns.
Therefore:
D Wear protective goggles!
D Wear a protective suit !

There is also a risk of injury from sharp edges on the workpieces and
tools! Therefore:
D Wear protective gloves!

DANGEROUS ELECTRICAL VOLTAGE

Unless described otherwise, maintenance works must be performed
on inactive systems! The system must be protected against unau-
thorized or accidental reclosing.

For measuring or test activities on the live system, the existing safety
and accident prevention regulations must be observed in any case.
Use suitable insulated tools for all types of work!

CAUTION
Repair/maintenance work is reserved to the Bosch service or repair/
maintenance units authorized by Bosch!
Only replacement/spare parts approved by Bosch may be used!

1070 073 737-103 (98.12) GB

 Safety instructions XIII

ACHTUNG
Beim Umgang mit Baugruppen und Bauelementen alle Vorkehrun-
gen zum ESD-Schutz einhalten! Elektrostatische Entladungen ver-
meiden!

The following protective measures must be observed for modules and com-
ponents sensitive to electrostatic discharge (ESD)!
D The personnel resposible for storage, transport, and handling must have
been trained for ESD protection.
D ESD-sensitive components must be stored and transported in their pre-
scribed protective packaging.
D ESD-sensitive components may only be handled at special ESD-work-
places.
D Personnel, working surfaces, as well as all equipment and tools which
get in contact with ESD-sensitive components must have the same po-
tential (e.g., by grounding).
D Wear an approved grounding bracelet. The grounding bracelet must be
connected with the working surface through a cable with an integrated
resistor of 1 MW.
D ESD-sensitive components must by no means get in contact with charge-
able objects, including most plastic materials.
D When ESD-sensitive components are installed in or removed from equip-
ment, the equipment must be de-energized.

1070 073 737-103 (98.12) GB

XIV Documentation and Software

Documentation and Software

The present manual provides information on the general performance data,

the system behavior and the instruction set of the ICL700.
The following comprehensive documentation is available for this series of
controls:

Typ3
yp osa documentation Part no.
German English
Interface conditions 1070 073 704 1070 073 736
for project engineering and maintenance
Operating instructions – Standard ope-
1070 073 726 1070 073 739
rator interface
Operating instructions – Diagnostics 1070 073 779 1070 073 780
DIN programming instructions 1070 073 725 1070 073 738
for programming to DIN 66025
CPL programming instructions 1070 073 727 1070 073 740
ICL700 system description, program 1070 073 706 1070 073 737
structure of the integrated PLC
ICL700 project engineering manual, 1070 073 728 1070 073 741
software interfaces and CNC interface
signals of the integrated PLC
MACODA 1070 073 705 1070 073 742
operation and configuration of the
machine parameters

All trademarks for software installed on Bosch products upon delivery are
the property of the respective manufacturers.

Upon delivery, all installed software is copyright-protected. The software

may only be reproduced with the approval of Bosch or in accordance with the
license agreement of the respective manufacturer.

. The current release number of the individual software modules can be

viewed by selecting the ”Control-Diagnostics” softkey in the
”Diagnostics” group operating mode.

. The software version of Windows95 or WindowsNT is displayed by

selecting the ”My Computer” icon on the Start screen or in the HELP
menu, item ”About Windows95” or ”About WindowsNT”.

1070 073 737-103 (98.12) GB

 General performance data 1–1

1 General performance data

Processors
D 80386 DX processor for word processing and high-level language
D bit logic processor for fast bit processing 0.24 ... 0.5 ms/k instruction
D 80186 processor for interface processing

Application memory
D 512 kbyte

Program execution
D cyclic
D interrupt controlled
D time-controlled

Programming
D instruction list
D Ladder diagram
D Sequential function chart
D High-level language C
– universal symbol definition
– universal module concept

Operands
D 2k inputs
D 2k outputs
D 48k markers
D 256 timers
D 256 counters
D 512 byte data buffer, also bit-addressable
D 32k byte data field, also bit-addressable
D 512 data modules, also bit-addressable, 2 of which simultaneously active
D 1k byte user stack, 256 DW
D 128k byte communication memory

Communication
D with NC
– via communication memory (DPR)
D with peripherals
– via interface to I/O card rack
– via CAN bus (decentralised I/Os, potentiometers)
– via serial interface to PG

Monitor
D dynamic monitor function (on line)
D static monitor function (single step)
D debug function for C program modules

1070 073 737-103 (98.12) GB

1–2 General performance data

High-level language
D Language C
D use of standard compilers,
e.g. Metaware C version 3.x, GNU
D full integration in PLC programming interface
D operation of C modules in established module design
D library modules for PLC-specific functions
D high-level language monitor similar to well-known high-level language
debuggers, e.g. Codeview
D flexibly adjustable real-time performance in monitor operation

1070 073 737-103 (98.12) GB

 ICL700 system overview
1070 073 737-103 (98.12) GB

System bus

System bus interface Peripheral

Central (communication memory)
processor processor
i 80186
i 80386

Bit logic
processor
Processor interface
Program BLP 33 (dual port RAM)
memory

CAN bus Peripheral bus Serial

Interface Interface interface

General performance data

decentralised I/O’s, potentiometers I/O card rack programming unit

1–3
 1–4 General performance data

Your notes:

1070 073 737-103 (98.12) GB

 System performance 2–1

2 System performance

2.1 Program structure

The modular design of control unit ICL700 enables the user to divide pro-
grams into functionally related blocks, i.e. to organise programs in a struc-
tured manner. Various types of modules are available for this purpose.

2.1.1 Module types

ICL700 has the following module types:

D organisation modules
D program modules (parameterisable)
D data modules

Organisation modules (OM)

Organisation modules establish the connection between the system pro-

gram and the user program. Organisation modules are programmed like
program modules but may be called only by the system program.

Modules can be called depending on certain conditions. They may be called

only when they need to be processed.

The user also has access to organisation modules in which he may specify
the response to particular events, such as interrupts, operating time or
start-up performance.

Organisation modules are not parameterisable.

The following organisation modules are available:

D OM for initialisation table (OM2)

D OM for cyclic program execution (OM1)
D OMs for cold start and restart (OM5, OM7)
D OMs for time-controlled program execution (OM18-21)
D OMs for peripheral interrupt-controlled program execution (OM10-13)
D 16 OMs for library modules (OM48-63)
D 1 OM for error management (OM9)

1070 073 737-103 (98.12) GB

2–2 System performance

Program modules (PM)

Program modules contain technologically or functionally related program

parts, e.g. program modules for tool changers, feeding device, etc. Program
modules are called by organisation modules or other program modules.

Program modules are parameterisable. Up to 63 current parameters can be

transferred together with a module call.
Program modules can be realised in IL, sequential function chart, ladder dia-
gram or in programming language “C”.

PM1
DM1
Control on
A -STEIN
AN -STAUS
S -XSTEIN
CM DM1

CM PM10
PM10
Control off
A -STAUS
O -NOTAUS
R -XSTEIN
EM EM

Examples of module calls in PM1

The following parameters are possible:

D Input parameters: I, O, M, SM, II, EI, T, C, K, S

various formats, D, DX, DB, DF, PM,
DM (in absolute and symbolic addressing)
D Output parameters: O, M, IO, EO, IO, DF, DB, S, D, DX, T, C

A total of 1024 program modules are available.

For program modules, a nesting depth of 64 with organisation module OM1

is permitted.

Program modules are usually concluded with EM (end of module). If EP (end

of program) is selected, the program is aborted and an input/output cycle is
initiated.

1070 073 737-103 (98.12) GB

 System performance 2–3

PM1 PM12
CM PM12.5 A B P0
A B P1
P0= B I3.0 A B P2
P1= B I3.1 O B P3
P2= B I3.2 = P4
P3= B I3.3 EM
P4= B O1.6
NOP0
CM PM12.5
PB12
P0= B I2.0
.. .. A B P0
.. .. A B P1
. . A B P2
P4= B O1.7 O B P3
= P4
EM EM

Example of program module programming

Data modules (DM)

All fixed and variable data can be stored in the data modules by the user.

Using the initialisation table (OM2), the user can copy any desired data mod-
ule from the user program memory into a data buffer area DB. Data modules
can be written to and read by the PLC program.

Data field (DF)

The data field is stored in a buffered RAM area and is also available as a vari-
able data field.

The data field is made up of 32 Kbytes.

512 data modules are available, two of which may be simultaneously

active.

Example: 1st DM Call: CM DM1

Access: L W D0,A
2nd DM Call: CX DM2
Access: L W DX0,A

1070 073 737-103 (98.12) GB

2–4 System performance

DM 1 Name:AST2DB1 Comment: DB1F.ABLST3 MAIN BRANCH RAM/EPROM: R

No. Symbol Type Sign Data field F

D 24 SCHR6HP Word N 6 H
D 26 Word N B
D 28 Word N 0000000000000000 B
D 30 Word N 0000000000000000 B
D 32 Word N 0000000000000000 B
D 34 Word N 01010101010000 B
D 36 Word N 0000000000000000 D
D 38 Word N 12345 D
D 40 DBNRHP Word N 0001 H
D 42 SCHANZHP Word N 0600 H
D 44 SCHVBIHP Word N 0000000000000000 H
D 46 SANZHP Word N 0 H
D 48 SANZ1HP Word N 0 H
D 50 BAMLDGHP Word N 0 B

Example of data module programming

Data buffer

The data buffer is in a buffered RAM area and is also available as a variable
data buffer.

The data buffer is made up of 512 bytes.

Summary of module types

OM PM DM

Number of modules 64 1024 512

Parameterisable – up to 63 –
parameters

Nesting depth 64 modules incl. OM1

1070 073 737-103 (98.12) GB

 System performance 2–5

Example of structured relationship of module types

Updating
of I/O
maps

PM2
CM CALL
OM1 PM1 DM1

CM CALL CM CALL
CM CALL EM

CM CALL PM3
CM CALL
CM CALL
EP EM
EM

DM2

Example of structured relationship of module types

Program interruption points where a time-controlled processing can be in-

serted are identified with ”F”.

” ” indicates program interruption points where an interrupt can be inserted.

1070 073 737-103 (98.12) GB

 2–6 System performance

2.2 Program execution

Power on

Startup performance

Operation of
cyclic User program expansion and
control system modules
PM/DM and programming
time OM unit
control OM1

Interrupt Calls
control .. Updating of
.
EP
Error I/O output
recognition
maps

STOP

ICL700 flow diagram

1070 073 737-103 (98.12) GB

 System performance 2–7

2.3 Module start-up

The ICL 700 module is booted after power “on” or by module stop if Typ 3
is in the relevant operating condition. The position of the rotary switch on the
SMNC determines the operating condition and consequently whether or not
the ICL 700 is booted.
Please ensure that booting the ICL 700 does not correspond to the start-up
performance.
There are two program parts: 1. System program
2. User program
The system program is always loaded to the ICL and started by the SMNC.
The user program can be loaded to the ICL and started either by the pro-
gramming unit or by the SMNC. An automatic start-up without reloading the
user program is also possible.

The rotary switch on the SMNC determines the booting behaviour of the
ICL 700:

Switch Mode Explanation

setting
0 Normal operation System firmware is loaded by the
RUN SMNC, user program of ICL 700 is
started
1 Normal operation System firmware is loaded by the
STOP SMNC, user program of ICL 700 is not
started
6 Boot-strap System firmware is loaded by the
SMNC, user program is loaded and
started from the SMNC (if present) or
must be loaded via the programming
unit or the user interface computer
...C System security System firmware can be saved by the
programming unit to the SMNC

If the ICL 700 is in stop mode, it will start up only if

D the cause of the stop has been removed and it is switched to run mode
D or it is switched to run mode by means of the software.

The following diagram shows the cold start and restart of the ICL 700
D without retention of memory and
D with partial retention of memory.

1070 073 737-103 (98.12) GB

 2–8 System performance

Power ON Start-up error

Error OM9
Run / stop

Cold start = active

Initialisation of hardware
system log on
check buffer battery and
delete the DF in case of buffer error

N
Error

Y
Y Cold start
active
RUN Stop / run
status N
Start-up stop

STOP
Module stop

Error N
removed

Y Error N
removed

Stop / run N
switchover Stop / run N
switchover

Y
Y

Module start-up – sheet 1

1070 073 737-103 (98.12) GB

 System performance 2–9

Start-up

Initialisation table
– load and partly
copy

Create actual
assignment list
of peripherals

Error in actual Y
assignment list Error
in OM9

Y Retention N
not
active?

start-up
without reten-
tion of memory

start-up
with partial reten-
tion of memory

2 3

Module start-up – sheet 2

1070 073 737-103 (98.12) GB

2–10 System performance

start-up without
retention of memory

retentive areas
T,C,M,DM +
delete interrupts

N
Cold start

Delete fixing

Reset user stack,

delete non-retentive
areas
enable outputs
fixing is activated
Read I

Y Cold start N
= active

OM 5 OM 7

Vary system range Vary system range

module initialisation module initialisation
Copy DM to DB Copy DM to DB

I/O state I/O state

incl. fixing incl. fixing

Cold start =
not active

OM 1 OM 1

Module start-up – sheet 3

1070 073 737-103 (98.12) GB

 System performance 2–11

start-up
with partial reten-
tion of memory

Reset user stack,

delete non-retentive
areas and
interrupts

Enable outputs
Fixing is activated
Read I

Y Cold start N
= active

OM 5 OM 7

Vary system range, Vary system range

module initialisation module initialisation

Delete defined Delete defined

areas: T,C,M,DB areas: T,C,M,DB
Copy DM to DB Copy DM to DB

I /O statuses I /O statuses
incl. superimposed fixing incl. superimposed fixing

Cold start =
not active

OM 1 OM 1

Module start-up – sheet 4

1070 073 737-103 (98.12) GB

2–12 System performance

2.4 Start-up via OM5 and OM7

OM5 is executed after power on, insofar as it is integrated in the program.

OM7 is executed when the mains power supply is permanently switched on,
if there is a software switch from stop to run and OM7 is integrated in the
program.

The data declared as retentive are retained or deleted according to the

retention setting in OM2.

D Setting non-retentive
D All marker, counter, timer and data buffer inputs are deleted before
start-up.
D Setting partially retentive
D Data declared as non-retentive is deleted after start-up. Data de-
clared as retentive is retained.

. No non-retentive operands can be preset in partially retentive oper-

ation in the OM start-up.

1070 073 737-103 (98.12) GB

 System performance 2–13

2.5 Definitions in OM2

OM2 contains the initialisation table in which the values of the ICL700 firm-
ware can be varied. It is edited by the user using the program editor.

OM2 must be integrated in every ICL700 user program which uses non-
standard settings and then stored in the user memory. If there is no OM2
entry in the symbol file, the standard settings are used.

Parts of OM2 are copied to the system range and can be manipulated by the
user. The final module initialisation is performed with the values from OM2
and the system range before program execution is begun.

The assignment of the system range is portrayed in the ICL700 operation

list.

. Any amendment of data words in prohibited address ranges can result

in undefined system performance of the ICL 700.

The declarations made in OM2 are copied to the system range during
start-up. Manipulations can be performed here by the PLC program,
e.g. the time reference for time-controlled OMs can be changed by an
appropriate entry. The complete assignment of the system range is
portrayed in the “Operation list” chapter.

Data areas in OM2

Data word 1
reserved

DEFW K0000000000000000B

Data word 2
Data word 2 is intended for the initialisation flags.

Entry 0 = Do not check or perform function

Entry 1 = Check or perform function

DEFW K0000000000000000B

The bits of data word 2 are divided as follows:

Bit 0: Check assignment list

This determines whether the actual assignment list is to be compared with

the created desired assignment list. If an error is detected during compari-
son, a branch to error module OM9 takes place (if present) or the module
returns to STOP status.

Bit 1: Check cycle time

The cycle time is monitored by the ICL 700 for a permanently set maximum
value of 1.6 s (set by hardware). Below this value, a further cycle time limit
can be specified in OM2. If the cycle time is exceeded, the special marker bit
SM29.7 is set and OM9 is called, where the user can program the response
to cycle time monitoring. When OM9 has been processed, or if it has not
been programmed, the ICL 700 goes into STOP status and all outputs are
reset.

1070 073 737-103 (98.12) GB

 2–14 System performance

Bit 2: start-up with partial retention of memory

Bits 3 to 6 are not assigned

Bit 7: outputs are output during start-up with partial retention

of memory

Here it is determined that during start-up at the interruption position the out-
puts are to be output immediately and not in the next I/O state

Bit 8: copy data module to data buffer

Here the user can specify whether he wishes a particular data module to be
copied from the user program to the data buffer during ICL700 start-up.

Bits 9 to 15 are not assigned.

Data word 4 (currently unused)

Data word 4 is intended for the response to errors.
Here it is determined whether an error should result in Typ 3 system stop or
only in module stop of the ICL.

Entry 0 = Do not perform system stop in case of error

Entry 1 = Perform system stop in case of error

DEFW K0000000000000000B

Bits 0 to 7 are not assigned

Bit 8: partial retention of memory during start-up desired,

but forbidden

Bit 9: conflict in assignment list

Bit 10: direct access takes too long

Bit 11: program error

Bit 12: HOLD command

Bit 13: stop request from PG or from system manager

Bit 14: stop switch

Bit 15: not assigned

Data word 5
Data word 5 is intended for cycle time monitoring (time value x time refer-
ence 10 ms).

Entries from K1D to K200D (10 to 2000 ms) with regard to cycle time moni-
toring are possible.

The function is performed if bit 1 = 1 in data word 2.

DEFW K200D = max. cycle time

1070 073 737-103 (98.12) GB

 System performance 2–15

Data word 6
The number of the data module to be copied to the data buffer is entered in
data word 6.

Possible entries 0 to 512.

The function is performed if bit 8 = 1 in data word 2.

DEFW K0D = copy DM0 to data buffer

Data word 7
Data word 7 is intended for the first retentive timer. Entries from K0D to
K256D possible (K64D = retention for the timer loops T64 to T255)

K256D = no retention

DEFW K64D = first retentive timer T64

Data word 8
Data word 8 is intended for the first retentive counter. Entries from K0D to
K256D possible (K64D = retention for the counters C64 to C255)

K256D = no retention

DEFW K64D = first retentive counter C64

Data word 9
Data word 9 is intended for the first retentive marker. Entries from K0D to
K6144D possible (K128D = retention from marker byte M128/marker bit
M128.0. The retention limit is defined via byte addresses)

K6144D = no retention

DEFW K128D = first retentive marker byte 128 = M128.0

Data word 10
Data word 10 is intended for the first retentive address in the data buffer.
Entries from K0D to K512D possible (K256D = retention from data buffer
byte DB256)

K512D = no retention

DEFW K256D = first retentive address in data buffer DB256

Data words 11 to 14
Data words 11 to 14 are intended for the definition of time (time value x time
reference 10 ms) in the OMs 18, 19, 20, 21 for time-controlled processing.
Entries from K1D to K65535D are possible.

K0D = no time-controlled processing.

K1D = 1 x 10 ms = 10 ms time interval for time-controlled processing

Data word 11 for OM18

DEFW K0D

Data word 12 for OM19

DEFW K0D

1070 073 737-103 (98.12) GB

2–16 System performance

Data word 13 for OM20

DEFW K0D

Data word 14 for OM21

DEFW K0D

Data words 15 to 18
Data words 15 to 18 are intended for the system memory. The system mem-
ory may not be changed by the user.

Data word 15 (standard value K0000H)

DEFW K0000H

Data word 16 (standard value K0000H)

DEFW K0000H

Data word 17 (standard value K0000H)

DEFW K0000H

Data word 18 (standard value K0000H)

DEFW K0000H

Data words 19 to 23
reserved

Data words 24 to 32
reserved

Data words 33 to 48
Data words 33 to 48 are intended for the definition of peripheral input assign-
ment lists.

Every input byte assigned in the control unit is identified by a “1” in the data
word.

A “0” indicates that the input byte has not been assigned. 16 input bytes per
data word are identified as assigned or not assigned.

Data word 33 for assignment list of the input byte 15 ... 0

DEFW K0000000000000000B

Example: K0000000000000001B = I byte 0/I0.0 to I0.7 present

Data word 34 for assignment list of the input byte 31 ... 16

DEFW K0000000000000000B

Example: see data word 33

Data word 35 for assignment list of the input byte 47 ... 32

DEFW K0000000000000000B

1070 073 737-103 (98.12) GB

 System performance 2–17

Example: see data word 33

Data word 36 for assignment list of the input byte 63 ... 48

DEFW K0000000000000000B

Example: see data word 33

.
.

Data word 48 for assignment list of the input byte 255 ... 240

DEFW K0000000000000000B

Example: see data word 33

Data words 49 to 64
Data words 49 to 64 are intended for the definition of peripheral output as-
signment lists.

Every output byte assigned in the control unit is identified by a “1” in the data
word.

A “0” indicates that the output byte has not been assigned. 16 output bytes
per data word are identified as assigned or not assigned.

Data word 49 for assignment list of the output byte 15 ... 0

DEFW K0000000000000000B

Example: K0000000000000001B = O byte 0/O0.0 to O0.7 present

Data word 50 for assignment list of the output byte 31 ... 16

DEFW K0000000000000000B

Example: see data word 49

Data word 51 for assignment list of the output byte 47 ... 32

DEFW K0000000000000000B

Example: see data word 49

Data word 52 for assignment list of the output byte 63 ... 48

DEFW K0000000000000000B

Example: see data word 49

.
.
.

Data word 64 for assignment list of the output byte 255 ... 240

DEFW K0000000000000000B

Example: see data word 49

1070 073 737-103 (98.12) GB

2–18 System performance

Data words 65 to 80
Data words 65 to 80 are intended for the definition of peripheral extended
input assignment lists.

Every extended input byte assigned in the control unit is identified by a “1” in
the data word.

A “0” indicates that the extended input byte has not been assigned. 16 ex-
tended input bytes per data word are identified as assigned or not assigned.

Data word 65 for assignment list of the extended

input byte 15 ... 0

DEFW K0000000000000000B

Example: K0000000000000001B = EI byte 0/EI0.0 to EI0.7 present

Data word 66 for assignment list of the extended

input byte 31 ... 16

DEFW K0000000000000000B

Example: see data word 65

Data word 67 for assignment list of the extended

input byte 47 ... 32

DEFW K0000000000000000B

Example: see data word 65

Data word 68 for assignment list of the extended

input byte 63 ... 48

DEFW K0000000000000000B

Example: see data word 65

.
.
.

Data word 80 for assignment list of the extended

input byte 255 ... 240

DEFW K0000000000000000B

Example: see data word 65

1070 073 737-103 (98.12) GB

 System performance 2–19

Data words 81 to 96
Data words 81 to 96 are intended for the definition of peripheral extended
output assignment lists.

Every extended output byte assigned in the control unit is identified by a “1”
in the data word.

A “0” indicates that the extended output byte has not been assigned. 16 ex-
tended output bytes per data word are identified as assigned or not as-
signed.

Data word 81 for assignment list of

the extended output byte 15 ... 0

DEFW K0000000000000000B

Example: K0000000000000001B = EO byte 0/EO0.0 to EO0.7

present

Data word 82 for assignment list of

the extended output byte 31 ... 16

DEFW K0000000000000000B

Example: see data word 81

Data word 83 for assignment list of

the extended output byte 47 ... 32

DEFW K0000000000000000B

Example: see data word 81

Data word 84 for assignment list of

the extended output byte 63 ... 48

DEFW K0000000000000000B

Example: see data word 81

.
.
.

Data word 96 for assignment list of

the extended output byte 255 ... 240

DEFW K0000000000000000B

Example: see data word 81

from data word 96

The contents of data words from 96 onward are NC-specific and are de-
scribed in detail in the ICL project planning manual (1070 073 741).

1070 073 737-103 (98.12) GB

2–20 System performance

2.6 Program execution

Within the available organisation modules, the user can determine the
start-up performance and modify other functions.

Criteria such as error recognition, interrupt inputs and timing periods during
program execution result in an automatic call of the corresponding organisa-
tion module.

Program execution may be:

D cyclic
D peripheral interrupt controlled
D time-controlled

The following overview shows the criteria which determine the organisation
modules for the respective type of program execution.

1070 073 737-103 (98.12) GB

 System performance 2–21

No of OM’s (29) OM number Explanation

1 OM1 1 cyclic execution

1 OM2 2 initialisation table

2 OM5 5 cold start with partial / without retention of memory

OM7 7 restart with partial / without retention of memory

1 OM9 9 error recognition e.g.

– cycle time exceeded
– module nesting depth > 64
– invalid address
– call of non-existent module
etc.

Peripheral interrupt con- interrupt Priority

trolled execution inputs
4 OM10 10 EI1.0 highest
OM11 11 EI1.1
OM12 12 EI1.2
OM13 13 EI1.3 lowest

time-controlled execution time value Priority

4 18 4 values can be preset in OM2 time value 1 highest

OM18
and modified during program
OM19 19 time value 2
execution.
OM20 20 time value 3
OM21 21 time value 4 lowest

library modules Usable in conjunction with

high-level language
16 OM48 48
OM49 49

OM62 62
OM63 63

Specifications in the organisation modules

1070 073 737-103 (98.12) GB

 2–22 System performance

Priorities of the interrupt groups and specified timers

The following order of priority applies to interrupt groups and fixed timers:
D peripheral interrupts
D time-controlled execution

No time-controlled execution is permitted during the execution of the periph-

eral interrupt OM.

Peripheral interrupt controlled OMs can be executed while time-controlled

OMs are being executed.

Priorities within an interrupt group

In the case of simultaneous interrupts within an interrupt group, the one with
the lowest OM number has the highest priority.

1070 073 737-103 (98.12) GB

 System performance 2–23

2.6.1 Cyclic program execution

The modules of the user program are executed according to the sequence
specified in the organisation module OM1. OM1 is automatically called after
the start-up phase.

Updating
I/O

OM1 PM1
PM3
CM PM1 EM
CM PM3 EM
CM PM8 PM8
PM4
EM
CM PM4 EM
CM PM5 PM5
..
EP EM

Example of cyclic program execution

1070 073 737-103 (98.12) GB

2–24 System performance

2.6.2 Peripheral interrupt controlled program execution

General
In the event of an interrupt, cyclic execution is interrupted after execution of
the command currently being processed and an organisation module as-
signed to the interrupt input is started. The user can program the desired re-
action to the interrupt in this OM. Then cyclic program execution is restarted
at the point of interruption.

Only the program status (flags) is recovered in the case of an interrupt.

If register contents are changed in the interrupt OM, these must be re-
covered by the user himself.

All interrupts are stored in an interrupt register. There is a register for each
interrupt group. One bit corresponds to one interrupt in these registers.
When the OM is started the corresponding interrupt is automatically reset.

The commands LAI and RAI can be used to read and reset the stored
interrupts.

Interrupts of a group can generally be enabled or disabled with the com-

mands EAI (Enable Interrupts) and DAI (Disable Interrupt).

If an interrupt OM is to be executed only once, although there is continual

change at the interrupt input, the user must disable the interrupt in the inter-
rupt OM using the interrupt mask.

. In the event of an interrupt, the register and scratch flag contents must
be recovered by the user if required.

Interrupt mask
There is one interrupt mask for each interrupt group.

Every bit in the mask is allocated to one specific interrupt. The individual in-
terrupts within a group can be enabled or disabled by setting the correspon-
ding bit in the relevant mask to “1” or “0”. The user can read or write this
mask with the commands “TIM” and “LIM”.

If a bit is set in this mask, the corresponding interrupt is enabled.

The suppression of interrupts has no effect on their storage. When an inter-

rupt arises, the OM will only be called if the interrupt has been enabled and
has not been suppressed. If the OM has not been programmed, OM9 will be
called for error treatment, and the module may be stopped.

All existing interrupts are deleted during start-up or the transition from stop
to run. The interrupts are all disabled and suppressed and the user must en-
able them specifically.

All peripheral interrupts are deleted during a start with retention of memory.
The mask and the enable/disable status return to the status before the inter-
rupt.

All interrupts are disabled during the execution of a start-up OM. Enabled
interrupts are also recognised and processed in the I/O state.

1070 073 737-103 (98.12) GB

 System performance 2–25

Peripheral interrupts
A peripheral interrupt is triggered by a positive edge on one of the interrupt
inputs EI1.0-EI1.3 of the interrupt module.

. For as long as inputs or outputs (II, IO, EI, EO) are directly accessed, all
peripheral interrupts must be disabled!

Disabled interrupts have no temporal effect on program execution.

Updating
I/O

OM1 PM1
.. PM3 OM10
.. ..
. .
F
CM PM1 EM .. ...
CM PM3 EM .
...
PM8 ..
CM PM8 .. .
. ...
EM PM4 ..
.. ..
CM PM4 .. .
PM6 .. ..
CM PM6 ..
.. . .. ..
EP EM EM EM

F Time at which an interrupt input becomes high.

EI 1.0 0 ! 1
Example of peripheral interrupt controlled execution

. Interrupts may not be nested, i.e. interrupt processing must not be in-
terrupted by a further interrupt!
Interrupt modules must be concluded with “EM”!

1070 073 737-103 (98.12) GB

2–26 System performance

Example
EAI PI ; Enable peripheral interrupts
L K1,A
TM A,PI ; Enable the peripheral interrupt with the highest value
; in the interrupt mask register

The above sequence of commands may be carried out only once, e.g. in
start-up OM or in OM1.

A response to this interrupt of the input card (II 24) can be programmed in the
interrupt OM10.

OM10:

L M10,A
INC A,1
T A, M10
BE ; The module must be terminated with EM.

1070 073 737-103 (98.12) GB

 System performance 2–27

2.6.3 Time-controlled program execution

This function is initiated by internal timers, if these were defined through user
commands in time values. Time values may be preset in OM2 or by means of
the program by a description in system range S. Time values are activated
after the next I/O cycle. To initiate time-controlled program execution, cyclic
program execution is interrupted during operation of the corresponding
timer and restarted at the point of interruption after execution (but only in the
case of a module change).

Using PLC commands, time-controlled execution can be disabled, enabled,

reset or suppressed for all timer modules or individually.

The timer module with the lowest number has priority over the timer module
with the highest number.

Selectable timers: 10 ms x (1 - 65536)

. The call of a timer OM does not disable other time-controlled pro-

cesses.
The time value must be preset with “0” for timer OMs which are not
present.
e.g. 100 ms

Updating
I/O

OM1 PM1
Preset
grid

PM3
CM PM1 EM

CM PM3 EM

CM PM8 PM8 OM18

Preset
grid

PM4
EM EM

CM PM4 EM

CM PM9 PM9 OM18

..
EP EM EM

Example of time-controlled program execution

1070 073 737-103 (98.12) GB

 2–28 System performance

Your notes:

1070 073 737-103 (98.12) GB

 Operation list 3–1

3 Operation list

3.1 Structure of control statements

Control statements are executed in accordance with DIN 19239. They com-
prise an operation part and an operand part. However, the control statement
may also consist of the operation part only, e.g. left bracket “(”, end of pro-
gram “PE”.

Operation part
The operation part contains a maximum of 4 characters as a mnemonic
short-hand command. It is divided into operator (OPR) and attribute. The at-
tribute deSignates the data format.

Operand part
The operand part contains the data necessary for the execution of an in-
struction. The format of operands can be symbolic or absolute.

In the case of absolute format, the operand part (depending on the Operation
part) comprises one or two operands and one operand attribute (OPA). The
operand attribute specifies the data format.

Each of these operands consists of an operand identifier (OID) and a param-

eter. The parameter (PAR) may be a bit, byte or word address.

In the case of symbolic format, the operand is marked by a preceding hyphen

“–” and may comprise up to eight characters (letters and/or digits).

1070 073 737-103 (98.12) GB

3–2 Operation list

INSTRUCTION

Operation Attribute Operand part

part Source operand Target operand

OPR OPA OID PAR PAA OID PAR

,
PAA Parameter attribute
PAR Parameter
OID Operand identifier
OPA Operand attribute
OPR Operator

Examples
I S Z
L W I 28
, B

L BY –HANS
, B

Structure of control statements

1070 073 737-103 (98.12) GB

 Operation list 3–3

3.2 Operands

The following operands are available:

I – Input
O – Output
M – Marker
T – Timer
C – Counter
SM – Special marker
II – Interface input
EI – Extended input
IO – Interface output
EO – Extended output
DB – Data buffer
S – System range
P – Parameter
DF – Data field
K – Constant
D – Data word value
DX – Extended data word value
PM – Program module
DM – Data module
Pn – Number as parameter (n = 0 to 62)
TI – Time interrupt
PI – Peripheral interrupt
R – Register
[R] – Index register
I[R] – Input (indirect register)
O[R] – Output (indirect register)
M[R] – Marker (indirect register)
T[R] – Timer (indirect register)
C[R] – Counter (indirect register)
SM[R]– Special marker (indirect register)
II[R] – Interface input (indirect register)
EI[R] – Extended input (indirect register)
IO[R] – Interface output (indirect register)
EO[R] – Extended output (indirect register)
DB[R] – Data buffer (indirect register)
S[R] – System range (indirect register)
DF[R] – Data field (indirect register)
D[R] – Data module value (indirect register)
DX[R] – Extended data module value (indirect register)
PM[R]– Program module (indirect register)
DM[R]– Data module (indirect register)

In the above list, “R” is replaced with the register identifier “A”, “B”, “C”, “D”!

1070 073 737-103 (98.12) GB

 3–4 Operation list

3.3 Data formats and register structure

Data formats
15 8 7 Bit 0
BIT = B

15 8 7 0
BYTE = BY

15 0
WORD = W

31 16
Double word = DW

15 0

31 16
Floating point in double
word format
(in preparation)
15 0
The bits of the double word are divided into:

Mantissa = bit 0-22

Exponent = bit 23-30
Sign = bit 31
63 48
Floating point in four word
format according to IEEE
standard P 754
(in preparation)
47 32
31 16

15 0
The bits are divided into:

Mantissa = bit 0-51

Exponent = bit 52-62
Sign = bit 63

Data formats

1070 073 737-103 (98.12) GB

 Operation list 3–5

Register structure

The control unit has four working registers which can be operated by
bit, byte, word and double word; with bytes, the right byte is operated
and with words, the right word is operated.

Working register A Double word

Working register B Double word
Working register C Double word
Working register D Double word

For operations which exceed the 32 bit format, fixed register pairs
are formed from the individual registers.

Example

Double word
A
Register pair + +
B
Double word

C Double word
Register pair + +
D Double word

Status bit N O C Z

zero
carry
overflow
negative

Register structure

1070 073 737-103 (98.12) GB

3–6 Operation list

3.4 Types of addressing

The following types of addressing are possible:

Direct addressing of all operands suitable for absolute addressing

t = timer and counter status

a = timer and counter actual value

Operand group

Bit addressable I, O, M, SM, T/C, D, DX,

DB, DF, S,
I[A], O[A], M[A] etc.

Byte/word/double word readable I, O, M, SM, T/C, DB,

DF, D, DX, S, II, EI,
I[A], O[A] etc.

Byte/word/double word writeable O, M, DB, DF, D, DX, S, IO,

EO, T/C (with specific commands only)

e.g. L BY I15,B

Register A
Register B Peripheral address
Register C
Register D

The contents of a peripheral address are loaded into a register, or the

contents of a register are transferred to a peripheral address.

Register addressing

e.g. L W A,B

Register A The contents of a register are

Register B loaded into another register.
Register C
Register D

1070 073 737-103 (98.12) GB

 Operation list 3–7

Direct addressing

e.g. L W K1234H,B

Register A
Register B Constant
Register C
Register D

A constant specified in the command is loaded into a register.

Parameter addressing – 2 cases

e.g. L W P0,A ;case 1 (parameter 0 = constant K5)

Register A e.g. parameter 0 = K5

Register B
Register C
Register D

Parameter 0 is loaded into register A.

e.g. L W P0,A ;case 2 (parameter 0 = address M12)

Register A M12 Parameter P0

Register B
Register C
Register D

Register A is loaded with the marker contents whose address was

allocated to P0.

Register-indirect addressing
e.g. L W M [C] ,A

Register A
Register B
[peripheral address]
Register C
Register D

Register A is loaded with the marker contents whose address is in

register C.

1070 073 737-103 (98.12) GB

3–8 Operation list

Absolute address allocation with register-indirect addressing

Each of the four working registers can be used as an index register. Depend-
ing on the command, all operands which are permissible as a direct address
can be operated. The number of the corresponding actual value must be en-
tered in the index register for timer/counter start and timer/counter com-
mands. In the case of illegal command and operand combinations,
programs are aborted with an address error message.
With indirect addressing the operand range is identified by the operand pre-
fix. The index register contains the operand number and address.

Module call command:

structure of index register Module number

31 0

Index register in hex:

from – 0000H According to DM0 – DM512
to 01FFH
from – 0000H According to PM0 – PM1023
to 03FFH
Bit commands:
structure of index register Byte address Bit
addr.
31 3 2 1 0

Index register in hex

from – 0000H Counter statuses C0 – C256

to 00FFH
from – 0000H Timer statuses T0 – T256
to 00FFH

from – 0000H Special markers SM0.0 –SM31.7/SM0D – SM255D

to 00FFH

from – 0000H Inputs I0.0 – I255.7 / I0D – I2047D

to 07FFH
from – 0000H Outputs O0.0 – O255.7 / O0D – O2047D
to 07FFH
from – 0000H Markers M0.0 – M6143.7 / M0D – M49151D
to BFFFH
from – 0000H Data buffers DB0.0 – DB511.7 / DB0D – DB4095D
to 0FFFH
from – 0000H System range S0.0 – S511.7 / S0D – S4095D
to 0FFFH
from – 0000H Data word D0.0 – D511.7 / D0D – D4095D
to 0FFFH
from – 0000H extended data word DX0.0 – DX511.7 /
to 0FFFH DX0D – DX4095D

from – 0000H Data field DF0.0 – DF32767.7 / DF0D – DF262143D

to 3FFFFH

1070 073 737-103 (98.12) GB

 Operation list 3–9

Byte, word and double word commands

Structure of index register Byte addresss or timer/counter number

31 0

Index register in hex

from – 0000H Special markers SM0.0–SM31.0
to 001FH
from – 0000H Inputs I0.0–E255.7
to 00FFH
from – 0000H Outputs O0.0–A255.7
to 00FFH
from – 0000H Markers M0.0–M6143.7
to 17FFH
from – 0000H Data buffers DB0 – DB511
to 01FFH
from – 0000H System range S0–S511
to 01FFH
from – 0000H Counter actual value C0–C255
to 00FFH
from – 0000H Timer actual value T0–T255
to 00FFH
from – 0000H Data word D0–D511
to 01FFH

from – 0000H extended data word DX0 – DX511

to 01FFH

from – 0000H Interface inputs II0–II255

to 00FFH
from – 0000H Interface outputs IO0–IO255
to 00FFH
from – 0000H Extended inputs EI0–EI255
to 00FFH
from – 0000H Extended outputs EO0–EO255
to 00FFH
from – 0000H Data field DF0–DF32767
to 7FFFH

1070 073 737-103 (98.12) GB

3–10 Operation list

Some examples of indirect addressing of bit addresses

Counter status “0” or “1”

L DW K0001H,A ;Load index address A with address

;of counter C1
A B Z[A]
= M100.0

Timer status “0” or “1”

L DW K000AH,A ;Load index address A with address

;of timer T10
A B T[A]
= M100.2

Query I0.0 to I3.7 for 1

L DW K0000H,A ;Load index register A with address

;I0.0
L DW K32D,B ;Number of inputs 32

– start ;Loop start

A B I[A] ;indirect binary query

JPCI –false ;abort at “0”
INC A,1 ;Increment index register

DEC B,1 ;Number 1

JPN – start ;32 queries made?

–false
.
.
.

Set indirect bit

A SM31.1 ;logic 1
L DW K0040H,A ;Load index register A with address
;O8.0
S B O[A]

1070 073 737-103 (98.12) GB

 Operation list 3–11

Some examples of indirect addressing of word addresses

Load counter actual values

Index addresses are counter numbers

L K3,B

A I0.0
SC B,C8

A I0.1
CD C8

L DW K0000H,A
L W C[A],B ;Load counter actual value C0

L DW K0001H,C
L W C[C],A ;Load counter actual value C1

Query timer status “0” or “1”

Index registers are timer numbers

L K100.3,D

A I0.3
SPE D,T0

L DW K0010,A ;Timer status T10

A T[A]

L DW K0011H,C ;Timer status T11

A T[C]

Counter actual values, contents in word format

L DW K2H,A ;Load counter actual value C2

L C[A],C ;to C

L DW K8H,A ;Counter actual value C8

L C[A],B

Timer actual values, contents in word format

L DW K0000H,A
L T[A],A ;Timer actual value T0

L DW K000AH,A ;Timer actual value T10

L T[A],A

1070 073 737-103 (98.12) GB

3–12 Operation list

Indirect module call:

Program module:

L DW K0001H,D ;Index address program module PM1

CM PM[D]

1st data module:

L DW K0002H,C ;Index address data module DM2

CM DM[C]
L D10,A

2nd data module:

L DW K0003H,C ;Index address data module DM3

CX DM[C]
L DX10,A

Indirect addressing for timer/counter start or timer/counter commands

L DW K2H,A ;Index address counter 2

L K6,B ;Counter value 6

A I0.5
SC B,C[A]

A I0.6
CD C[A]

L DW K3H,A ;Index address timer circuit 3

L K100.1,B ;Time value 10 s

A I0.5
SPE B,T[A]

EP

3.5 Address ranges

Operand Byte address No. Bit address

I/O 0– 255 0.0– 255.7
II/IO 0– 255 0.0– 255.7
EI/EO 0– 255 0.0– 255.7
M 0–6143 0.0–6143.7
D 0– 511 0.0–511.7
T 0–255D
C 0–255D
SM 0– 31 0.0– 31.7
DB 0– 511 0.0–511.7
DF 0–32767 0.0–32676.7
P 0– 62D
S 0– 511 0.0–511.7

The numbers of timers, counters and parameters may be used for bit com-
mands, word commands and timer/counter commands.

1070 073 737-103 (98.12) GB

 Operation list 3–13

3.6 Representation of word constants

Basically, all representations apply also to data widths of 8 and 32 bits.

K0000000000000000B – K1111111111111111B (Binary value)

K000000 O – K177777 O (Octal value)
K00000D – K65535D (Decimal value)
K0000H – KFFFFH (Hexadecimal word)
K00000000H – KFFFFFFFFH (Hexadecimal DW)
K0/0,A – K255/255,255/255,A (4 bytes at a time)
K’ABCD’ (up to 4 ASCII charac-
ters owing to double
word)
K0.R – K1023.R (timer value)

. Timer values are not entered directly, but with the multiplier “R” (grid);
see below.

3.7 Time format

11 10 Bit 0 – 9

0 0 0 0 X X X X X X X X X X X X

0 0 = 10 ms Grid 0
0 1 = 100 ms Grid 1
1 0 = 1 s Grid 2
1 1 = 10 s Grid 3
Bits 0 to 9 = value entry
Bits 10 and 11 = grid

A constant entered in this format is loaded into the register.

1070 073 737-103 (98.12) GB

3–14 Operation list

3.8 Key to the special markers

SM14.0 – SM15.7 = Extended error code (see SM29.6)

SM16.0 – SM17.7 = reserved
SM18.0 – SM19.7 = reserved

SM20.0 = Initialising pulse

SM20.1 = reserved
SM20.2 = Flashing marker (2 Hz)
SM20.3 = Lock output states
SM20.4 = Fixing marker
SM20.5 = reserved
SM20.6 = reserved
SM20.7 = Reload initialising pulse after power on or
program reload

SM21.0 – SM21.7 = reserved

SM22.0 – 23.7 = Actual cycle time counter with factor 1 ms.

The SM is refreshed cyclically every 40 ms
(in preparation) or in the I/O, or the event
of an error.

SM24.0 – 25.7 = Max. cycle time with factor 1 ms.

The cycle time is defined between OM1 start and
the next OM1 start. Refresh before OM1 start.
Reset with stop after run change-over.

SM26.0 – SM27.7 = Min. cycle time with factor 1 ms.

Refresh before OM1 start.
Reset with stop after run change-over.

SM28.0 – SM29.7 = Error word

SM28.0 = reserved
SM28.1 = Parameter error
SM28.2 = Call of inexistent module
SM28.3 = Module stack error
SM28.4 = Application stack underflow
SM28.5 = Application stack overflow
SM28.6 = reserved
SM28.7 = Direct access blocked

SM29.0 = Write access prohibited

SM29.1 = Opcode error
SM29.2 = reserved
SM29.3 = reserved
SM29.4 = reserved
SM29.5 = reserved
SM29.6 = Identifier for error word 14
SM29.7 = Cycle time error

SM30.0 – SM30.7 = Internally used and not accessible to user

SM30.3 – fixed “0”

1070 073 737-103 (98.12) GB

 Operation list 3–15

SM31.0 = reserved
SM31.1 = fixed ”1”
SM31.2 = reserved
SM31.3 = Carry *
SM31.4 = reserved
SM31.5 = Overflow *
SM31.6 = Negative **
SM31.7 = Zero **

* These special markers are generally not affected by carry and overflow
flags.
** The corresponding flags are mapped to this special marker only with the
command “CPL accumulator, accumulator”.

Error codes special marker SM14:

011H Cycle time exceeded in I/O cycle
012H Cycle time exceeded in program
016H Block stack overflow: occurs if the module nesting depth is greater
than 63
01aH Opcode error
01bH Parameter error: during access to a parameter to be read, either
no parameter line was found or the parameter found could not be
asSigned to the command (e.g. bit address in the case of a word
command, image address in the case of a module call, etc.).
01cH Address error: access to an invalid address.
Possible causes:
– transfer to a constant
– parameter line read in as a command line
– transfer to a timer/counter actual value
01dH Area exceeded: access to a user memory which does not exist.
01eH Module does not exist: during a module call command a module
was called which is not in the reference list.
01fH HOLD command
020H Division by 0
021H Control unit in STOP status
022H Battery warning
023H NC fault
024H Internal system error
025H Hardware error
026H User error message from “C”
027H User warning from “C”
028H Reentrant module call
029H Reference list error
02aH CAN error
02bH Internal communication error
02cH APS error message
02dH APS warning
020H No PLC program

1070 073 737-103 (98.12) GB

3–16 Operation list

3.9 Key to the system range

The following initialisation values are strored in the system range

S1/S0 initialisation flags such as DW2 in OM2

S3/S2 reserved

S5/S4 error flags such as DW4 in OM2

S7/S6 maximum cycle time

S9/S8 number of the data module to be copied into the data buffer

S11/S10 number of the first retentive timer

S13/S12 number of the first retentive counter

S15/S14 number of the first retentive marker

S17/S16 first retentive address in data area

S19/S18 time value of timer module OM18

S21/S20 time value of timer module OM19

S23/S22 time value of timer module OM20

S25/S24 time value of timer module OM21

S27/S26 reserved

S29/S28 reserved

S31/S30 reserved

S33/S32 reserved

S121/S122 module number of the ICL 700

S123 to S511 reserved

1070 073 737-103 (98.12) GB

 Operation list 3–17

3.10 Addition, subtraction, multiplication and division formats

ADC BY B,A Addition of byte or word

ADC W B,A 7 or 15 0
Summand Sign Reg.A

7 or 15
+ 0
Summand Sign Reg. B

+ Cy
7 or 15 = 0
Total Sign Reg. A

ADC DW B,A Addition of double word

31 0
Summand Sign Reg. A

31 + 0
Summand Sign Reg. B

+ Cy

31
= 0
Total Sign Reg. A

SBB BY B,A Subtraction of byte or word 7 or 15 0

SBB W B,A
Minuend Sign Reg.A

7 or 15
– 0
Subtrahend Sign Reg. B

– Cy
7 or 15 = 0
Difference OV Sign Reg. A

SBB DW B,A Subtraction of double word

31 0
Minuend Sign Reg. A

31
– 0
Subtrahend Sign Reg. B

– Cy

31 = 0
Difference Sign Reg. A

Addition and subtraction formats

1070 073 737-103 (98.12) GB

 3–18 Operation list

MUL BY B,A Multiplication of byte or word

MUL W B,A 7 or 15 Z 0
Multiplicand Sign Reg.A

7 or 15 Q 0
Multiplier Sign Reg. B

15 or 31 Z 0
Product Sign Reg. A

MUL DW B,A Multiplication of double word

31 Z 0
Multiplicand Sign Reg. A

31 Q 0
Multiplier Sign Reg. B

31 Z +1 0 31 Z 0
Sign Reg. B HIGH WORD Reg. A LOW WORD

Product Double word

Sign
DIV BY B,A Division of byte or word 15 or 31 Z 0
DIV W B,A
Dividend Sign Reg. A
Sign

7 or 15 Q 0
Divisor Sign Reg. B

15 or 31 8 or 16 7 or 15 Z 0
Quotient, remainder Sign remainder Reg. A Sign Quotient

Note: Pay attention to the Sign with division!

DIV DW C,A Division of double word

31 Z +1 0 31 Z 0
Sign HIGH WORD Reg. B LOW WORD Reg. A
Dividend Double word
31 Q 0
Divisor Sign Reg. C

31 Z +1 0 31 Z 0
Sign Rest Reg. B Sign Quotient Reg. A
Double word

Note: Pay attention to the Sign with division!

Multiplication and division formats

1070 073 737-103 (98.12) GB

 Operation list 3–19

3.11 Instruction set

The following tables contain information on ICL700 commands.

The following abbreviations are used in the table in addition to the operands
already known:

S – Source operand
Z – Destination operand / Zero
RES – Result
O – Overflow
C – Carry
N – Negative status of MSB
B – Bit
BY – Byte
W – Word
OPT – Operation
OPR – Operator
OPA – Operand attribute
R – Register (A, B, C or D)
[R] – Indirect register (A, B, C or D)
SY – symbolic *

* The symbols indicate places where symbols are permitted.

The execution time corresponds to the operand to which the symbol
was allocated.

Note on the flags:

N flag corresponds to the “MSB”! This results in differences to the previous
control units with regard to flag behaviour:

CL500: ICL700:
L BY K77H,A A=127 A=127
INC BY A,1 O A=128 O,N A=128
SPP –LABEL1 fulfilled fulfilled
.
.
–LABEL1
INC BY A,1 N A=129 N A=129
SPP –LABEL2 N not fulfilled

1070 073 737-103 (98.12) GB

 3–20
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status

Conclusion
I S Z SOURCE Comment

Absolute

Operation list
Reg.Ind.
Param.
(TARGET WITH S, R,=)

Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Bit commands

A B I0.0 D D I, O, M, T, C, SM, SY D D AND operation, query for

D, DX, DB, DF, S signal status 1

AN B I0.0 D I, O, M, T, C, SM, SY D D AND operation, query for

D
D, DX, DB, DF, S signal status 0

O B I0.0 D I, O, M, T, C, SM, SY D D OR operation, query for

D, DX, DB, DF, S signal status 1

ON B I0.0 D I, O, M, T, C, SM, SY D D OR operation, query for

D, DX, DB, DF, S signal status 0

S B O0.0 D 1 D O, M, SY, SM D RES = 0

Set bit conditionally
D, DX, DB, DF, S RES = 1
RES = 0
R B O0.0 D 1 D O, M, SY, SM D Reset bit conditionally
D, DX, DB, DF, S RES = 1

O, M, SY, SM Status unchanged

= B O0.0 D 1 D D Result allocation
D, DX, DB, DF, S Status changes
D D Parameter D D D D AND operation, query for
A B P0
A B I.0 D D Register bit D D D D signal status 1. Register:
A B I[A] D D Prefix as direct operand D D D D register bit from 0–31
AN B P0 D D Parameter D D D D AND operation, query for
D D Register bit D D D D signal status 0. Register:
1070 073 737-103 (98.12) GB

D D Prefix as direct operand D D D D register bit from 0–31

D D Parameter D D D D OR operation, query for
O B P0
D D Register bit D D D D signal status 1. Register:
D D Prefix as direct operand D D D D register bit from 0–31
D D Parameter D D D D OR operation, query for
ON B P0
D D Register bit D D D D signal status 0. Register:
D D Prefix as direct operand D D D D register bit from 0–31
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
(TARGET WITH S, R,=)

Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Bit commands
Parameter RES = 0
S B P0 D 1 D Register bit D D D Set bit conditionally
S B I.0 Prefix as direct operand RES = 1
Parameter RES = 0
R B P0 D 1 D Register bit D D D Reset bit conditionally
Prefix as direct operand REs = 1

= B P0 D 1 D Parameter
Register bit D D D Result allocation
Prefix as direct operand

RES = 0
S B M [A] D 1 D [R] D D D Set bit conditionally
RES = 1
RES = 0
R B M [A] D 1 D [R] D D D Reset bit conditionally
RES = 1

= B M [A] D 1 D [R] D D D Result allocation

Operation list
Check the register, bit n
P B A.n R D D (n = 0–31) for status 1
(fulfilled: C = 1)
Check the register, bit n
TSTZ B A.n R D D (n = 0–31) for status 0

3–21
(fulfilled: C = 1)
 3–22
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Byte and word commands
DW
A K0,A R D 0 0 D D AND operation between source and
W K
BY target. Result in target.

A DW P0,A P R D 0 0 D D AND operation between source and

W target. Result in target.
BY
A DW I0,A I, O, M, T, C, SM R D 0 0 D D AND operation between source and
W target. Result in target.
BY DB, S (SY), DF
A DW D0,A D, DX R D 0 0 D D AND operation between source and
W target. Result in target.
BY
A DW II0,A II, EI R D 0 0 D D AND operation between source and
W target. Result in target.
BY
A DW B,A R R D 0 0 D D AND operation between source and
W target. Result in target.
BY
A DW [R] only with prefix R D 0 0 D D AND operation between source and
W M [B],A target. Result in target.
BY Prefix as direct operand
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Byte and word commands

AN DW K0,A K R D 0 0 D D AND NOT operation between source

W and target. Result in target.
BY
AN DW P0,A P R D 0 0 D D AND NOT operation between source
W
and target. Result in target.
BY
AN DW I0,A I, O, M, T, C, SM R D 0 0 D D AND NOT operation between source
W DB, S (SY), DF and target. Result in target.
BY
AN DW D0,A D, DX R D 0 0 D D AND NOT operation between source
W and target. Result in target.
BY
AN DW II0,A II, EI R D 0 0 D D AND NOT operation between source
W and target. Result in target.
BY

AN DW B,A R R D 0 0 D D AND NOT operation between source

W and target. Result in target.
BY

AN DW M [B],A R D 0 0 D D AND NOT operation between source

W [R] only with prefix
Prefix as direct operand and target. Result in target.

Operation list
BY

3–23
 3–24
RES dependent
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

First instructio

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

O
C

N
Z
Byte and word commands

O DW K0,A K R D 0 0 D D OR operation between source

W
and target. Result in target.
BY
O DW P0,A P R D 0 0 D D OR operation between source
W
BY and target. Result in target.

O DW I0,A I, O, M, T, C, SM R D 0 0 D D OR operation between source

W
DB, S (SY), DF and target. Result in target.
BY
O DW D0,A D, DX R D 0 0 D D OR operation between source
W
BY and target. Result in target.
DW II, EI OR operation between source
O W II0,A R D 0 0 D D
BY and target. Result in target.
DW OR operation between source
O W B,A R R D 0 0 D D
BY and target. Result in target.
DW
O W [B],A [R] only with prefix R D 0 0 D D OR operation between source
BY Prefix as direct operand and target. Result in target.
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Byte and word commands

ON DW K0,A K R D 0 0 D D OR NOT operation between source

W and target. Result in target.
BY
ON DW P0,A P R D 0 0 D D OR NOT operation between source
W
and target. Result in target.
BY
ON DW I0,A I, O, M, T, C, SM R D 0 0 D D OR NOT operation between source
W DB, S (SY), DF and target. Result in target.
BY
ON DW D0,A D, DX R D 0 0 D D OR NOT operation between source
W and target. Result in target.
BY
ON DW II0,A II, EI R D 0 0 D D OR NOT operation between source
W and target. Result in target.
BY
ON DW B,A R R D 0 0 D D OR NOT operation between source
W
and target. Result in target.
BY

ON DW [B],A R D 0 0 D D OR NOT operation between source

W [R] only with prefix
and target. Result in target.

Operation list
BY Prefix as direct operand

3–25
 3–26
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Qeury
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Byte and word commands

XO DW K0,A K R D 0 0 D D EXCL OR operation between source

W
BY and target. Result in target.

XO DW P0,A P R D 0 0 D D EXCL OR operation between source

W
and target. Result in target.
BY
XO DW I0,A I, O, M, T, C, SM R D 0 0 D D EXCL OR operation between source
W
DB, S (SY), DF and target. Result in target.
BY
DW
XO W D0,A D, DX R D 0 0 D D EXCL OR operation between source
and target. Result in target.
BY
DW II0,A II, EI
XO W R D 0 0 D D EXCL OR operation between source
BY and target. Result in target.
DW
XO W B,A R R D 0 0 D D EXCL OR operation between source
BY and target. Result in target.
DW
XO W [B],A [R] only with prefix R D 0 0 D D EXCL OR operation between source
BY Prefix as direct operand and target. Result in target.
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Byte and word commands

XON DW K0,A K R D 0 0 D D EXCL OR NOT operation between

W source and target.
BY Result in target.
XON DW P0,A P R D 0 0 D D EXCL OR NOT operation between
W source and target.
BY Result in target.
XON DW I0,A I, O, M, T, C, SM R D 0 0 D D EXCL OR NOT operation between
W source and target.
DB, S (SY), DF
Result in target.
BY
XON DW D0,A D, DX R D 0 0 D D EXCL OR NOT operation between
W source and target.
BY Result in target.

XON DW II0,A II, EI R D 0 0 D D EXCL OR NOT operation between

W source and target.
BY Result in target.

XON DW B,A R R D 0 0 D D EXCL OR NOT operation between

W source and target.
BY Result in target.

XON DW [B],A R D 0 0 D D EXCL OR NOT operation between

[R] only with prefix

Operation list
W source and target.
Prefix as direct operand
BY Result in target.

3–27
 3–28
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.
OPA

PAR
OID
Timer commands

Start timer as impulse

1
T RES
SP A,T0 D R D
SY Output
0 Reset t
Timer RT
Start timer as impulse
1
RES
SP A,P0 D R P D
Output
0 t
RT

1 Start timer as impulse

RES
SP A,T[B] D R [R] D
Output
0 t
RT
Start timer as extended impulse
1
T RES
SPE A,T0 D R D
Output
SY t t t
0 RT

1 Start timer as extended impulse

D D RES
1070 073 737-103 (98.12) GB

A,P0 R P
SPE
Output
0 t t t
RT

1 Start timer as extended impulse

RES
SPE A,T[B] D R [R] D
Output
0 t t t
RT
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.
OPA

PAR
OID
Timer commands

Start timer as power-up delay

1
T RES
SR A,T0 D R D
SY Output
0 t
RT

Start timer as power-up delay

1
RES
SR A,P0 D R P D
Output
0 t
RT
Start timer as power-up delay
1
RES
SR A,T[B] D R [R] D
Output
0 RT
t

Start timer as power-off delay

1
T RES
SF A,T0 D R D
SY Output
0 t t
RT

1 Start timer as power-off delay

RES
SF A,P0 D R P D

Operation list
Output
0 t t
RT

1 Start timer as power-off delay

RES
SF A,T[B] D R [R] D
Output

3–29
0 RT t t
 3–30
First instructuion
RES dependent
OPT 1.OPD. 2.OPD ADDR TYPE

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.
OPA

PAR
OID
Timer commands

Start timer as storable power-up delay

1
T RES
SRE A,T0 D R D
SY Output
0 t t t
RT

1 Start timer as storable power-up delay

SRE A,P0 D R P D RES

Output
0 t t t
RT

1 Start timer as storable power-up delay

RES
SRE A,T[B] D R [R] D
Output
0 t t t
RT

Example: L K100.0,A ; Load register A with (100 x 10 ms) 1000 ms

A I0.0 ; Rising edge for timer start
SPE A,T0 ; Start timer circuit T0 with 1000 ms
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
0
Timer commands

with RES = 0 not executed

RT T0 D 1 T, SY D Reset timer
with RES =1 executed

with RES = 0 not executed

TH T0 D 1 T, SY D Stop timer
with RES =1 executed
with RES = 0 not executed
RT P0 D 1 P D Reset timer
with RES =1 executed
with RES = 0 not executed
TH P0 D 1 P D Stop timer
with RES =1 executed

with RES = 0 not executed

RT D 1 [R] D
T [A] Reset timer
with RES =1 executed

with RES = 0 not executed

TH T [A] D 1 [R] D Stop timer
with RES =1 executed

Operation list
3–31
 3–32
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.
OPA

PAR
OID
Counter commands

SC A,C0 D 1 D R Z D Load the counter with

SY the value in the register.

0
1

SC A,P0 D D R P D Load the counter addressed

by the parameter with
0 the value in the register.
1

SC A. C[B] D D R [R] D Load the indirectly addressed

counter with the value
0 in the register.
1

CV C0 D D C, SY D Count up
0
1

Count up
CV P0 D D P D
0
1
1070 073 737-103 (98.12) GB

CV C[A] Count up
D D [R] D
0
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.
OPA

PAR
OID
Counter commands
1

CD C0 D D C, SY D Count down

0
1
Count down
CD P0 D D P D

0
1
CD C[A] D D [R] D Count down

RC C0 D 1 D C, SY D Reset counter

RC P0 D 1 D P D Reset counter

RC C[A] D 1 D [R] D Reset counter

Operation list
3–33
 3–34
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Compare commands

DW Compare the contents of A and B

CPL W A, A R R D D D The contents are dealt with as
BY an integer and not as a two’s
complement.
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Compare commends
DW
I, O, M, T, C, SM General comparison of the
CPLA W I0,A R D D D D D contents of A and I0
DB, S (SY), DF
BY
DW
CPLA W D0,A General comparison of the
D, DX R D D D D D contents of A and D0
BY
DW
CPLA W II0,A II, EI R D D D D D General comparison of the
contents of A and II0
BY
DW
CPLA W B,A R R D D D D D General comparison of the
BY contents of A and B
DW
[R] only with prefix D D D D D General comparison of the
CPLA W [B],A R
BY Prefix as direct operand contents of A and [B]

DW
General comparison of the
CPLA W K0,A K, R D D D D D
contents of A and K0
BY
DW
CPLA W P0,A P R D D D D D General comparison of the
BY contents of A and P0

Operation list
Note:
The comparison can be evaluated arithmetically and logically.
Arithmetic: The value is considered as a positive or negative two’s complement number.
Logic: The value is considered as a positive integer.

3–35
 3–36 Operation list

Further information on comparison commands CPL and CPLA

General note on numerical representation

Positive number: 0H to 7FH (byte)

0D to 127D (byte)

0H to 7FFFH (word)
0D to 32767D (word)

Negative number: 80H to FFH (byte)

–128D to –1D (byte)

8000H to FFFFH (word)

–32768D to –1D (word)

Arithmetic: positive and negative numerical value representation

Numerical values from 0D to 127D (byte)

and from –128D to –1D (byte)
or
from 0D to 32767D (word)
and from –32768D to –1D (word)

Logic: positive numerical value representation only

Numerical values from 0D to 255D (byte)

or
from 0D to 65535D (word)

Formation of C, N, O, Z, AGR (arithmetically greater) and LGR (logically greater)

ADD B, A
A + B = Ext. C O N Z AGR LGR

+ + – (+) 0 1 0 0 1 1
+ + + 0 0 0 0 1 1

– + + 1 0 0 0 1 0
– + 0 1 0 0 1 0 0
– + – 0 0 1 0 0 1

+ – + 1 0 0 0 1 0
+ – 0 1 0 0 1 0 0
+ – – 0 0 1 0 0 1

– – + (–) 1 1 1 0 0 0
– – 0 (–) 1 1 1 1 0 0
– – – 1 0 1 0 0 0

The Sign in brackets indicates the actual result.

1070 073 737-103 (98.12) GB

 Operation list 3–37

SUB B, A; CPLA B, A
A – B = Ext. Log. Arith. C O N Z AGR LGR
CPL CPL
A B A B

+ + – < < 1 0 1 0 0 0
+ + 0 = = 0 0 0 1 0 0
+ + + > > 0 0 0 0 1 1

– + + (–) > < 0 1 1 0 0 1

– + – > < 0 0 1 0 0 1

+ – + < > 1 0 0 0 1 0
+ – – (+) < > 1 1 0 0 1 0

– – + > > 0 0 0 0 1 1
– – 0 = = 0 0 0 1 0 0
– – – < < 1 0 1 0 0 0

The Sign in brackets indicates the actual result.

Logic comparison evaluation

The flags C, Z, LGR are available for the logic comparison evaluation.

They are evaluated according to the following table:

A B: C Z LGR

< +1 0 0
<,= * * +0

> 0 0 +1
>,= +0 * *

= 0 +1 0
# * +0 *

+: This flag gives clear information on the comparison.

* : This flag can have either value (0, 1).

1070 073 737-103 (98.12) GB

 3–38 Operation list

Arithmetic comparison evaluation

The flags N, Z, AGR are available for the arithmetic comparison evaluation.

They are evaluated according to the following table:

A B: N Z AGR

< +1 0 0
<,= * * +0

> 0 0 +1
>,= +0 * *

= 0 +1 0
# * +0 *

+: This flag gives clear information on the comparison.

* : This flag can have either value (0, 1).

Formation of C, N, O, Z, AGR (arithmetical greater) and LGR (logically greater)

CPL B, A:
A – B = Ext. Log. Arith. C O N Z AGR LGR
CPL CPL
A B A B

+ + – < < * * 1 0 0 *
+ + 0 = = * * 0 1 0 0
+ + + > > * * 0 0 1 *

– + + > < * * 0 0 1 *
– + – > < * * 0 0 1 *

+ – + < > * * 1 0 0 *
+ – – < > * * 1 0 0 *

– – + > > * * 0 0 1 *
– – 0 = = * * 0 1 0 0
– – – < < * * 1 0 0 *

The Sign in brackets indicates the actual result.

* : The old value is retained

1070 073 737-103 (98.12) GB

 Operation list 3–39

AGR and LGR with the CPL command

AGR and LGR cannot be evaluated with the CPL command. Only a logic evalu-
ation as follows via N and Z flags is possible with this comparison.

A B: N Z

> 0 0
= 0 +1
< +1 0

>,= +0 *
# * +0

+: This flag gives clear information on the comparison.

* : This flag can have either value (0, 1).

Programming the individual comparison results with the special

marker when using the CPL commands:

CPL W B.A

Less than
A SM31.6 ;A<B

Less than-equal to
A SM31.6 ;A<=B
O SM31.7

Equal
A SM31.7 ; A=B

Not equal
AN SM31.7 ; A#B

Greater than-equal to
AN SM31.6 ; A>=B

Greater than
AN SM31.6 ; A>B
AN SM31.7

1070 073 737-103 (98.12) GB

 3–40
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Operation list
Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Code changes
DW Change binary to decimal (BCD)
BID W A R D D 0 0 D With overflow, the overflow bit
BY is set.
DW Change decimal to binary
DEB W A R D D 0 0 D
Wrong BCD coding sets
BY
the overflow bit.

Replace commands

SWAP W A R D Interchange the high byte and

DW A the low byte in the register.
Also high word and low word.
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Stack commands
Write register to user stack and
PUSH DW A R D decrement the user stack address.

Increment the user stack aAD-

POP DW A R D DRess and read from the user
stack.

Note: The stack area comprises 256 words

With underflow of the user stack, special marker SM28.4 is set.
With overflow of the user stack, special marker SM28.5 is set.

The user stack is deleted in the I/O state.

Operation list
3–41
 3–42
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

O
C

N
Z
Arithmetic commands
DW Fixed-point addition of integers
ADD W I0,A I, O, M, T, C, SM R D D D D D with sign
BY DB, S (SY), DF
A+P Result is in A
DW Fixed-point addition of integers
ADD W D0,A D, DX R D D D D D with sign
BY A+D Result is in A

DW Fixed-point addition of integers

ADD W II0,A II, EI R D D D D D with sign
BY A + II Result is in A

DW Fixed-point addition of integers

ADD W B,A R R D D D D D with sign
BY A+B Result is in A

DW Fixed-point addition of integers

ADD W [B],A [R] only with prefix R D D D D D with sign
BY Prefix as direct operand A + [B] Result is in A

DW Fixed-point addition of integers

ADD W K0,A K R D D D D D with sign
BY A+K Result is in A

DW Fixed-point addition of integers

1070 073 737-103 (98.12) GB

ADD W P0,A P R D D D D D with sign

BY A+P Result is in A
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

O
C

N
Z
Arithmetic commands

DW I, O, M, T, C, SM Fixed-point subtraction of integers

SUB W I0,A R D D D D D with sign
DB, S (SY), DF
BY A–E Result is in A

DW Fixed-point subtraction of integers

SUB W D0,A D, DX R D D D D D with sign
BY A–D Result is in A

DW Fixed-point subtraction of integers

SUB W II0,A II, EI R D D D D D with sign
BY A – II Result is in A

DW Fixed-point subtraction of integers

SUB W B,A R R D D D D D with sign
BY A–B Result is in A

DW [R] only with prefix Fixed-point subtraction of integers

SUB W [B],A Prefix as direct operand R D D D D D with sign
BY
A – [B] Result is in A

Fixed-point subtraction of integers

SUB DW K0,A K R D D D D D
W with sign
A–K Result is in A

Operation list
BY

Fixed-point subtraction of integers

DW
with sign
SUB P0,A P R D D D D D
W A–P Result is in A
BY

3–43
 3–44
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Operation list
Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Arithmetic commands

DW I, O, M, T, C, SM
ADC W I0,A R D D D D D
DB, S (SY), DF
BY

DW
ADC W D0,A D, DX R D D D D D
BY

DW
ADC R D D D D D
W II0,A II, EI
BY
Fixed-point addition allowing for
DW the carry, e.g. multiword
ADC B,A R R D D D D D addition allowing for the carry
W from the low word addition.
BY

DW [R] only with prefix

ADC [B],A R D D D D D
W Prefix as direct operand
BY

ADC DW K0,A K R D D D D D
W
BY
1070 073 737-103 (98.12) GB

DW
ADC P0,A P R D D D D D
W
BY
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Arithmetic commands

DW
SBB W I0,A I, O, M, T, C, SM R D D D D D
BY DB, S (SY), DF

DW
SBB W D0,A D, DX R D D D D D
BY

DW
SBB W II0,A II, EI R D D D D D
BY

DW Fixed-point subtraction allowing

SBB W B,A R R D D D D D for the negative carry, e.g.
multiword subtraction allowing
BY for the loan bit from the low
word addition.
DW
[R] only with prefix
SBB W [B],A R D D D D D
BY Prefix as direct operand

DW
SBB W K0,A K R D D D D D
BY

Operation list
DW
SBB W P0,A P R D D D D D
BY

3–45
 3–46
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Operation list
Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Arithmetic commands

DW Fixed-point multiplication of
MUL W A,B R R D 0 0 D D integers with sign
BY B* A Result is in A_B
for DW
Fixed-point multiplication of
DW
MUL W K10,A K R D 0 0 D D integers with sign
BY B* A Result is in A_B
for DW
Fixed-point division of
DW integers with sign
DIV W A,B R R D D 0 D D C_B : A Result is in
BY C_B (R/Q) for DW
B:A Result is in B

Note:
0 = 1 with
– Division by 0
– Division overflow
Fixed-point division of
integers with sign
DW B_A : K Result is in
1070 073 737-103 (98.12) GB

DIV W K10,A K R D D 0 D D B_A (R/Q) for DW

BY
A:K Result is in A

Note:
0 = 1 with:
– Division by 0
– Division overflow
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Arithmetic commands

DW
W Increase the contents of the source
INC A,n R R D D D D D operand by “n”
BY n = 0 – 127

DW Increase the contents of the source

W operand by “n” n= 0 – 127
INC A,[C] R R D D D D D With n= 0 – repeat factor
BY
in register C
DW
W Decrease the contents of the source
DEC A,n R R D D D D D operand by “n”. n = 0 – 127
BY

DW Decrease the contents of the source

W operand by “n” n= 0 – 127
DEC A,[C] R R D D D D D With n= 0 – repeat factor
BY in register C

DW
D D D D D Complement the contents of the
TC W A R
source operand (two’s complement)
BY
DW
Negate the contents of the
N W A R D 0 0 D D

Operation list
BY source operand (one’s complement)

Note:
The time is independent of “n”

3–47
 3–48
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGENT
RES status
I S SOURCE

Conclusion
Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
Load commands

DW I, O, M, T, C, SM Load the source operand

L W I0,A R D
BY DB, S (SY), DF into the target register.

DW
L D0,A D, DX R D Load the source operand
W into the target register.
BY
DW
L II0,A II, EI R D Load the source operand
W into the target register.
BY
DW Load the source operand
L B,A R R D
W into the target register.
BY
DW [R] only with prefix Load the indirectly addressed
L [B],A R D source operand into the target
W Prefix as direct operand
BY register.

DW Load the source operand

L K0,A K R D
W into the target register.
BY
DW Load the source operand which
L P0,A P R D is transfered with the parameter
W
1070 073 737-103 (98.12) GB

BY into the target register.

1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

SOURCE
RES status
TARGET

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
O

Z
Transfer commands

DW O, M, DB, S (SY), DF Transfer from source register

T W A,O0 R D
into the target operand
BY

DW
T A,D2 D, DX R D Transfer from source register
W into the target operand
BY
DW
T A,IO IO, EO R D Transfer from source register
W
into the target operand
BY
DW
T D Transfer from source register
W B,A R R
into the target operand
BY
DW
Transfer from source register
T W A,[B] [R] only with prefix R D
Prefix as direct operand into the indirectly addressed
BY target operand
DW
T A,P0 P R D Transfer from source register
W
into the target operand
BY

Operation list
3–49
 3–50
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
(all flags are
Shift commands influenced)
Logic SHIFT to right
DW 31
DW W 15 0
SLR W A,n R R D D D D D BY 7 0
BY 0 C

DW Logic SHIFT to right

As above:
SLR W A,[C]* R R D D D D D
The number of shift positions
BY is in register C

Logic SHIFT to left

DW W 16 0
SLL W A,n R R D D D D D BY 7 0
C
BY

Logic SHIFT to left

DW
D As above:
SLL W A,[C]* R R D D D D
The number of shift positions
BY is in register C

Rotate right through CARRY

DW W 16 0

RCR W A,n R R D D D D D BY 7 0

C
BY
1070 073 737-103 (98.12) GB

DW Rotate right through CARRY

RCR W A,[C]* R R D D D D D As above:

BY The number of shift positions
is in register C

Note: The time is independent of “n”. n = 0 – 15:

31 With n = 0 the number of shift positions is in register C
* Only C register possible.
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
(all flags are
Shift commands influenced)
Arithmetic SHIFT to right
W 15 0
DW BY 7 0
SAR W A,n R R D D D D D
C
BY
All liberated bits are filled
with the sign

Arithmetic SHIFT to right

DW As above:
SAR W A,[C] R R D D D D D The number of shift positions
is in the address pointer of [C]
BY

Rotate to right
DW W 15 0
ROR W A,n R R D D D D D BY 7 0

BY C

DW Rotate to right

ROR W A,[C] R R D D D D D As above:

BY The number of shift positions
is in the address pointer of [C]

Rotate to left
W 15 0
DW
ROL A,n R R D D D D D BY 7 0

W C

Operation list
BY

Rotate to left
DW
ROL W A,[C] R R D D D D D As above:
BY The number of shift positions

3–51
is in the address pointer of [C]
 3–52
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

N
Z
(all flags are
Shift commands influenced)
DW Rotate to right through CARRY
W W 15 0
RCL A,n R R D D D D D BY 7 0
BY C

DW Rotate to right through CARRY

W
RCL A,[C] R R D D D D D As above:
BY The number of shift positions
is in the address pointer of [C]
1070 073 737-103 (98.12) GB
1070 073 737-103 (98.12) GB

RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

O
C
N
Z
Interrupt commands

LIM TI,C TI, PI R D Load interrupt mask (TI, PI)

LAI TI,C TI, PI R D Load the interrupt register of the

interrupt group (TI, PI)

Operation list
Note: LAI: – Incoming interrupts remain in interrupt register until execution; for example, when TI: – Time-controlled processing
an interrupt is disabled it is possible to detect arriving interrupts. If interrupts are
not reset, the stored interrupts will come after the “EAI” command. PI: – Peripheral interrupt-
controlled processing

3–53
 3–54
RES dependent
First instruction
OPT 1.OPD. 2.OPD ADDR TYPE STATUS

TARGET
RES status
SOURCE

Conclusion
I S Z Comment

Operation list
Absolute

Reg.Ind.
Param.
Direct
Query
OPR

Reg.

RES
OPA

PAR
OID

O
C
N
Z
Interrupt commands

TI Transfer the contents of the

register into the corresponding
TIM A,TI R PI D interrupt mask (TI, PI) to disable
or enable the interrupts.

TI Reset the interrupts in the

RAI A,TI R PI D interrupt register of the
selected interrupt group
SI (TI, PI)

Enable interrupt group

EAI PI TI, PI D
(TI, PI,)

Disable interrupt group

DAI PI TI, PI D
(TI, PI)

Parameter commands and other commands

DW I, O, M, T, C, SM, II Parameter determined at

Pi W I0.0 EI, IO, EO, DB, S, SY, D param. module call
BY i = 0 – 62
B DF, K, D, DX, PM, DM

Set help marker to examine

* n program execution
1070 073 737-103 (98.12) GB

n = 0 – 63*

DEFW W K0 K Instruction for system variables

only in OM2
Note: n = 0 – 63* – Multiple setting of the same marker is possible. Any sequence is possible.
1070 073 737-103 (98.12) GB

Commands without operands

Command Function Comment

NOP NO OPERATION see note

EP PROGRAM END Initiates the I/O data replacement and begins a new cycle

HLT HALT Processing is halted and the outputs are set to 0

( LEFT BRACKET coreesponds to the “AND LEFT BRACKET” function [*(]

) RIGHT BRACKET

O( EMPTY OR LEFT BRACKET Double instruction. Corresponds to the “OR LEFT BRACKET” function [*(]

SC SET CARRY The CARRY is set to 1 (not dependent on RES)

RC RESET CARRY The CARRY is set to 0 (not dependent on RES)

Operation list
)N RIGHT BRACKET, NEGATION Negation of the bracket contents

Note: The NOP command has no effect on the program seguence. Both commands are used to reserve
memory space during program start-up in order to carry out changes in the program with

3–55
the “Replace” ONLINE command in monitor operation.
 3–56
OPT 1.OPD. 2.OPD ADDR TYPE STATUS
I S Z POSSIBLE Comment

Operation list
Absolute

Reg.Ind.
OPERANDS

Param.
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Jump commands
Jump by the number of Opcode bytes
JP [R] D indicated in the register

JP SY D Unconditional jump

JPC SY D 1 Conditional jump with RES = 1

JPCI SY D 0 Inverted jump with RES = 0

JPZ SY D 1 Jump zero with Z = 1 (equality)

JPP SY D 0 Jump plus with N = 0 (arithmetic >=)

JPN SY D 0 Jump not zero with Z = 0 (inequality)

JPM SY D 1 Jump minus with N = 1 (arithmetic <)
JPO SY D 1 Jump overflow with O = 1

JPCY SY D 1 Jump carry with C = 1 (logic <)

JPLG SY D 1 Jump logic greater with LG = 1)

JPAG SY D 1 Jump arithmetic greater with AG = 1

JPCN SY D 0 Jump carry with C = 0 (logic >=)

D
1070 073 737-103 (98.12) GB

JPCZ SY 0 Jump with carry or Z = 1 (logic <=)

JPON SY D 0 Jump overflow not with O = 0

JPMZ SY D 0 Jump with negative (minus) or Z =1,

i.e. arithmetic <=
1070 073 737-103 (98.12) GB

OPT 1.OPD. 2.OPD ADDR TYPE STATUS

I S Z POSSIBLE Comment

Absolute

Reg.Ind.
OPERANDS

Param.
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands
CM PM SY, PM D Unconditional module call

CMC PM SY, PM D 1 1/0 0/1 Conditional module call with RES = 1

after succesful call N = 1 else Z = 1
CMCI PM SY, PM D 0 0/1 1/0 Inverted module call with RES = 0
after succesful call Z = 1, else N = 1
CMZ PM SY, PM D 1 Module call zero with Z = 1 (equality)
CMP PM SY, PM D 0 Module call plus with N = 0 (arithmetic >=)
Module call not zero with Z = 0
CMN PM SY, PM D 0
(inequality)

CMM PM SY, PM D 1 Module call minus with N = 1 (arithmetic <)

CMO PM SY, PM D 1 Module call overflow with O = 1

CMCY PM SY, PM D 1 Module call carry with C = 1 (logic <)

CMLG PM SY, PM D 1 Module call logic greater with LG = 1)

CMAG PM SY, PM D 1 Module call arithmetic greater with AG = 1

CMCN PM SY, PM Module call with C = 0 (logic > =)

D 0

CMCZ PM SY, PM D 0 Module call with Carry or Z = 1

(logic <=)

Operation list
D 0 Module call overflow Not
CMON PM SY, PM with O = 0
CMMZ PM SY, PM Module call with negative (minus) or Z = 1,
D 0 i.e. arithmetic <=

3–57
 3–58
OPT 1.OPD. 2.OPD ADDR TYPE STATUS
I S Z POSSIBLE Comment

Absolute

Reg.Ind.
OPERANDS

Param.

Operation list
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands

CM DM SY, DM D Unconditional module call

CMC DM SY, DM D 1 Conditional module call with RES = 1

CMCI DM SY, DM D 0 Inverted module call with RES = 0

CMZ DM SY, DM D 1 Module call zero with Z = 1 (equality)

CMP DM SY, DM D 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN DM SY, DM D 0 (inequality)

D 1 Module call minus with N = 1 (arithmetic <)

CMM DM SY, DM

CMO DM SY, DM D 1 Module call overflow with O = 1

CMCY DM SY, DM D 1 Module call carry with C = 1 (logic <)

CMLG DM SY, DM D 1 Module call logic greater with LG = 1)

D 1 Module call arithmetic greater with AG = 1

CMAG DM SY, DM

Module call with C = 0 (logic > =)

CMCN DM SY, DM D 0

CMCZ DM SY, DM Module call with Carry or Z = 1

D 0 (logic < =)
1070 073 737-103 (98.12) GB

CMON DM SY, DM D 0 Module call overflow Not

with O = 0
CMMZ DM SY, DM D 0 Module call with negative (minus) or Z = 1,
i.e. arithmetic <=
CX Call 2nd data module direct
CXC DM SY, DM D
CXCI
1070 073 737-103 (98.12) GB

OPT 1.OPD. 2.OPD ADDR TYPE STATUS

I S Z POSSIBLE Comment

Absolute

Reg.Ind.
OPERANDS

Param.
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands
CM PM SY, PM D Unconditional module call (n = 0-62)

CMC PM SY, PM D 1 Conditional module call with RES = 1

CMCI PM SY, PM D 0 Inverted module call with RES = 0

CMZ PM SY, PM D 1 Module call zero with Z = 1 (equality)

CMP PM SY, PM D 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN PM SY, PM D 0 (inequality)

CMM PM SY, PM D 1 Module call minus with N = 1 (arithmetic <)

CMO PM SY, PM D 1 Module call overflow with O = 1

CMCY PM SY, PM D 1 Module call carry with C = 1 (logic <)

CMLG PM SY, PM D 1 Module call logic greater with LG = 1)

D 1 Module call arithmetic greater with AG = 1

CMAG PM SY, PM

CMCN PM SY, PM D 0 Module call with C = 0 (logic > =)

CMCZ PM SY, PM Module call with Carry or Z = 1

D 0 (logic < =)

Operation list
CMON PM SY, PM D 0 Module call overflow not
with O = 0
CMMZ PM SY, PM Module call with negative (minus) or Z = 1,
D 0 i.e. arithmetic <=

3–59
 3–60
OPT 1.OPD. 2.OPD ADDR TYPE STATUS
I S Z POSSIBLE Commend

Absolute

Reg.Ind.
OPERANDS

Param.

Operation list
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands

CM P P Unconditional module call

CMC P P 1 Conditional module call with RES = 1

CMCI P P 0 Inverted module call with RES = 0

CMZ P P 1 Module call zero with Z = 1 (equality)

CMP P P 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN P P 0 (inequality)

CMM P P 1 Module call minus with N = 1 (arithmetic <)

CMO P P 1 Module call overflow with O = 1

CMCY P P 1 Module call carry with C = 1 (logic <)

CMLG P P 1 Module call logic greater with LG = 1)

CMAG P P 1 Module call arithmetic greater with AG = 1

Module call with C = 0 (logic > =)

CMCN P P 0

CMCZ Module call with Carry or Z = 1

P P 0 (logic < =)
1070 073 737-103 (98.12) GB

CMON P P 0 Module call overflow Not

with O = 0
CMMZ P P 0 Module call with negative (minus) or Z = 1,
i.e. arithmetic <=
CX Module call for 2nd data module
CXC for P=DM for P=DM
CXCI
1070 073 737-103 (98.12) GB

OPT 1.OPD. 2.OPD ADDR TYPE STATUS

I S Z POSSIBLE Comment

Absolute

Reg.Ind.
Param.
OPERANDS

Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands
CM P,n P D Unconditional module call (n = 0-62)

CMC P,n P D 1 Conditional module call with RES = 1

CMCI P,n P D 0 Inverted module call with RES = 0

CMZ P,n P D 1 Module call zero with Z = 1 (equality)
CMP P,n P D 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN P,n P D 0
(inequality)

CMM P,n P D 1 Module call minus with N = 1 (arithmetic <)

CMO P,n P D 1 Module call overflow with O = 1

CMYC P,n P D 1 Module call carry with C = 1 (logic <)

CMLG P,n P D 1 Module call logic greater with LG = 1)

CMAG P,n P D 1 Module call arithmetic greater with AG = 1

CMCN P,n P D 0 Module call with C = 0 (logic > =)

CMCZ Module call with Carry or Z = 1

,,n
P P D 0

Operation list
(logic < =)
CMON P,n P D 0 Module call overflow not
with O = 0
CMMZ Module call with negative (minus) or Z = 1,
P,n P D 0
i.e. arithmetic <=

3–61
 3–62
OPT 1.OPD. 2.OPD ADDR TYPE STATUS
I S Z POSSIBLE Comment

Absolute

Reg.Ind.
OPERANDS

Param.

Operation list
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module call commands
CM [A] [R] D Unconditional module call

CMC [A] [R] D 1 Conditional module call with RES = 1

CMCI [A] [R] D 0 Inverted module call with RES = 0

CMZ [A] [R] D 1 Module call zero with Z = 1 (equality)

CMP [A] [R] D 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN [A] [R] D 0 (inequality)

CMM [A] [R] D 1 Module call minus with N = 1 (arithmetic <)

[A] [R] D 1 Module call overflow with O = 1
CMO

CMCY D 1 Module call carry with C = 1 (logic <)

[A] [R]
CMLG [A] [R] D 1 Module call logic greater with LG = 1)

Module call arithmetic greater with AG = 1

CMAG [A] [R] D 1

Module call with C = 0 (logic > =)

CMCN [A] [R] D 0
CMCZ Module call with Carry or Z = 1
[A] [R] D 0 (logic < =)
1070 073 737-103 (98.12) GB

CMON [A] [R] D 0 Module call overflow Not

with O = 0
CMMZ Module call with negative (minus) or Z = 1,
[A] [R] D 0 i.e. arithmetic <=

Note: [R] only possible with the PM and DM operands as a prefix.

1070 073 737-103 (98.12) GB

OPT 1.OPD. 2.OPD ADDR TYPE STATUS

I S Z POSSIBLE Comment

Absolute

Reg.Ind.
OPERANDS

Param.
Direct
OPR

OKN

Reg.

RES
OPA

PAR

AG
LG
O

N
Z
Module call commands

CM [A], n [R] D Unconditional module call

CMC [A], n [R] D 1 Conditional module call with RES = 1

CMCI [A], n [R] D 0 Inverted module call with RES = 0

CMZ [A], n [R] D 1 Module call zero with Z = 1 (equality)

CMP [A], n [R] D 0 Module call plus with N = 0 (arithmetic >=)

Module call not zero with Z = 0

CMN [A], n [R] D 0 (inequality)

CMM [A], n [R] D 1 Module call minus with N = 1 (arithmetic <)

CMO [A], n [R] D 1 Module call overflow with O = 1

CMCY [A], n [R] D 1 Module call carry with C = 1 (logic <)

CMLG [A], n [R] D 1 Module call logic greater with LG = 1)

CMAG [A], n [R] D 1 Module call arithmetic greater with AG = 1

Module call with C = 0 (logic > =)

CMCN [A], n [R] D 0

CMCZ Module call with Carry or Z = 1

[A], n [R] D 0 (logic < =)

Operation list
CMON [A], n [R] D 0 Module call overflow Not
with O = 0
CMMZ [A], n [R] D 0 Module call with negative (minus) or Z = 1,
i.e. arithmetic <=

Note: [R] only possible with the PM operand as a prefix.

3–63
 3–64
OPT 1.OPD. 2.OPD ADDR TYPE STATUS
I S Z POSSIBLE Comment

Absolute

Reg.Ind.
Param.
OPERANDS

Operation list
Direct
OPR

Reg.

RES
OPA

PAR
OID

AG
LG
O

N
Z
Module end commands
EM Unconditional module end

EMC 1 Conditional module end

EMZ 1 Module end zero

EMP 0 Module end plus

EMN 0 Module end not zero

EMM 1 Module end minus

EMO 1 Module end overflow

EMCY 1 Module end carry

EMLG 1 Module end logic greater

EMAG 1 Module end arithmetic

greater

0 Module end with C = 0 (logic > =)

EMCN

Module end with carry or Z =1

EMCZ 0 (logic <=)

EMON 0 Module end overflow not

1070 073 737-103 (98.12) GB

0 Module call with negative (minus) or Z = 1,

EMMZ i.e. arithmetic <=

EMCI 0 Module end with RES = 0

 Operation list 3–65

Text Operation
list
3.12 Command execution times

Bit commands (time in ms) Byte, word and DW commands

A B I0.0 0.23 (time in ms)
AN B I0.0 0.23 A W K0,A 0.365
A W P0,A
O B I0.0 0.23 P0=I0 5.2
ON B I0.0 0.23 P0=D0 6.5
P0=K0 5.8
A B I[A] 0.9 P0=T0 5.95
A B D[A] 1 P0=II0 43.5
A W I0,A 0.4
S B O0.0 0.30 A W D0,A 0.8
S B D[A] 1.15 A W D[A],A 0.95
A BY II0,A 31.5
R B O0.0 0.30 A W II0,A 37
A DW II0,A 50
= B O0.0 0.30 A W B,A 0.4
A W M[B],A 0.73
A B P0 O, XO, as A
P0=I0.0 5.8 AN W K0,A 0.7
P0=D0.0 6.7 AN W P0,A
P0=I0 5.4
AN, O, ON as A P0=D0 6.7
P0=K0 6.0
S B P0 P0=T0 6.1
P0=O0.0 6.1 P0=II0 43.5
P0=D0.0 6.5 AN W I0,A 0.75
AN W D0,A 0.9
S B M[A] 0.9 AN W D[A],A 1.3
AN BY II0,A 32
R = as S AN W II0,A 37
AN DW II0,A 50
TST B A,n 0.295 AN W B,A 0.76
TSTZ B A,n 0.295 AN W M[B],A 1.44
ON, XON as AN

1070 073 737-103 (98.12) GB

3–66 Operation list

Timer commands (time in ms) Counter commands (time in ms)

SP A,T0 CU C0
RES falling 4.7 RES falling 3.5
RES rising 5.4 RES rising 3.7
RES stable 2.7 RES stable 2.5

SP A,P0 CU P0
P0=T0 P0=C0
RES falling 6.5 RES falling 6.5
RES rising 7.2 RES rising 6.8
RES stable 4.5 RES stable 5.8

SP A,T[B] CU C[A]
RES falling 4.6 RES falling 2.6
RES rising 5.5 RES rising 2.7
RES stable 2.7 RES stable 2.3

SPE, SR, SF, SRE as SP CD as CU

RT T0 SC A,C0
RES=0 1.75 RES falling 3.6
RES=1 3.5 RES rising 4.4
RES stable 2.4
RT P0
P0=T0 SC A,P0
RES=0 3.5 P0=T0
RES=1 4.5 RES falling 7.2
RES rising 8.5
RT T[A] RES stable 6.5
RES=0 1.8
RES=1 3.8 SC A,C[B]
RES falling 4
RES rising 5.4
RES stable 3.7

RC as SC

1070 073 737-103 (98.12) GB

 Operation list 3–67

Comparison commands (time in ms) Arithmetic commands (time in ms)

CPL W A,B 2.7 ADD W I0,A 0.42
CPLA W I0,A 0.32 ADD W D0,A 0.75
CPLA W D0,A 0.4 ADD W D[A] 0.92
CPLA W D[A] 0.8 ADD BY II0,A 31.5
CPLA BY II0,A 31.5 ADD W II0,A 37
CPLA W II0,A 37 ADD W II0,A 50
CPLA DW II0,A 50 ADD W B,A 0.45
CPLA W B,A 0.3 ADD W M[B],A 0.9
CPLA W M[B],A 0.6 ADD W K0,A 0.38
CPLA W K0,A 0.26 ADD W P0,A
CPLA W P0,A P0=I0 5.3
P0=I0 5 P0=D0 6.6
P0=D0 6.4 P0=K0 5.9
P0=K0 5.7 P0=T0 5.6
P0=T0 5.5 P0=II0 43.5
P0=II0 43.5
SUB, ADC, SBB as ADD
Code conversions (time in ms)
BID BY A 3.95 MUL BY A,B 1.95
BID W A 6.2 MUL W A,B 2.35
BID DW A 13 MUL DW A,B 3.7
DEB BY A 4.6 MUL BY K10,A 1.95
DEB W A 10.5 MUL W K10,A 2.35
DEB DW A 24 MUL DW K10,A 3.55
DIV BY A,B 2.2
Exchange command (time in ms) DIV W A,B 3.3
SWAP W A 0.95 DIV DW A,B 4.5
DIV BY K10,A 2.1
Stack commands (time in ms) DIV W K10,A 3.2
PUSH DW A 2.25 DIV DW K10,A 4.3
POP DW A 2.25 INC W A,n 0.36
INC W A,[C] 0.43

DEC as INC

TC W A 0.23
N W A 0.3

1070 073 737-103 (98.12) GB

3–68 Operation list

Load commands (time in ms) Commands without operands

L W I0,A 0.3 (time in ms)
L W D0,A 0.7 NOP 0.1
L W D[A],A 0.8 ( 0.23
L BY II0,A 31.5 ) 0.23
L W II0,A 37 SCY 0.1
L DW IIO,A 50 RCY 0.1
L W B,A 0.31 * N 2.9
L W M[B],A 0.9
L W K0,A 0.29 Branch instructions (time in ms)
L W P0,A JP -label 0.32
P0=I0 5
P0=D0 6.3 JPC -label
P0=K0 5.6 not performed 0.38
P0=T0 5.4 performed 0.58
P0=II0 43.5
other branch instructions
Transfer commands (time in ms) as JP
T W A,O0 0.36
T W A,D0 0.5 Module call commands (time in ms)
T W A,D[A] 0.95 CMC PM0
T BY A,IO0 30 not performed 0.6
T W A,IO0 35 performed 12.5
T DW A,IO0 46
T W B,A 0.32 CMC DM0
T W A,M[B] 0.5 not performed 0.6
T W A,P0 performed 3
P0=O0 5.3
P0=D0 6 CMC PM0,n
not performed 0.65
Shift commands (time in ms) performed 13.5
SLR W A,n 0.28
SLR W A,[C] 0.42 EM 8.5

SLL, RCR, SAR, ROR, ROL EMC

as SLR not performed 0.7
performed 9.5

1070 073 737-103 (98.12) GB

Bosch-Automationstechnik

Robert Bosch GmbH Robert Bosch GmbH

Geschäftsbereich Geschäftsbereich
Automationstechnik Automationstechnik
Industriehydraulik Montagetechnik
Postfach 30 02 40 Postfach 30 02 07
D-70442 Stuttgart D-70442 Stuttgart
Telefax (07 11) 8 11-18 57 Telefax (07 11) 8 11-77 77

Robert Bosch GmbH Robert Bosch GmbH

Geschäftsbereich Geschäftsbereich
Automationstechnik Automationstechnik
Fahrzeughydraulik Antriebs- und Steuerungstechnik
Postfach 30 02 40 Postfach 11 62
D-70442 Stuttgart D-64701 Erbach
Telefax (07 11) 8 11-17 98 Telefax (0 60 62) 78-4 28

Robert Bosch GmbH Robert Bosch GmbH

Geschäftsbereich Geschäftsbereich
Automationstechnik Automationstechnik
Pneumatik Schraub- und Einpreßsysteme
Postfach 30 02 40 Postfach 11 61
D-70442 Stuttgart D-71534 Murrhardt
Telefax (07 11) 8 11-89 17 Telefax (0 71 92) 22-1 81

Robert Bosch GmbH

Geschäftsbereich
Automationstechnik
Entgrattechnik
Postfach 30 02 07
D-70442 Stuttgart
Telefax (07 11) 8 11-34 75

Technische Änderungen vorbehalten

Ihr Ansprechpartner

Robert Bosch GmbH

Geschäftsbereich
Automationstechnik
Antriebs- und Steuerungstechnik
Postfach 11 62
D-64701 Erbach
Telefax (0 60 62) 78-4 28
1070 073 737-103 (98.12) GB · HB NC· AT/VMS1 · Printed in Germany