0% found this document useful (0 votes)
295 views15 pages

Unit 5 - Ppi 8255

The document discusses the programmable peripheral interface (PPI) 8255 chip. It provides: 1. An overview of the PPI 8255 chip, describing its 3 8-bit ports (A, B, C), its two basic modes of operation (bit set/reset and I/O mode), and how the I/O mode has 3 submodes. 2. A block diagram showing its main components including data bus buffer, control logic, and port/register selects. 3. Descriptions of the I/O submodes including simple I/O, input/output with handshake, and bidirectional transfer. 4. Details on the control word formats for bit set/reset

Uploaded by

tariku fkadu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
295 views15 pages

Unit 5 - Ppi 8255

The document discusses the programmable peripheral interface (PPI) 8255 chip. It provides: 1. An overview of the PPI 8255 chip, describing its 3 8-bit ports (A, B, C), its two basic modes of operation (bit set/reset and I/O mode), and how the I/O mode has 3 submodes. 2. A block diagram showing its main components including data bus buffer, control logic, and port/register selects. 3. Descriptions of the I/O submodes including simple I/O, input/output with handshake, and bidirectional transfer. 4. Details on the control word formats for bit set/reset

Uploaded by

tariku fkadu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

BY

Ramesh H R
Asst.Prof.
Dept of TE
TOPICS
 8255 Programmable peripheral interface(PPI)
 Keyboard Interfacing
 Stepper motor Interfacing
 Alphanumeric display Interfacing
SESSION 1
Programmable peripheral Interface

TOPICS:
1. Introduction
2. Block diagram
3. Modes of operation
 Control word format
 I/O mode
 BSR mode
PPI – Programmable Peripheral Interface

1. It is an I/O port chip used for interfacing I/O devices with microprocessor
2. Very commonly used peripheral chip.
3. It has 24 I/O pins which can be grouped in three 8-bit parallel ports: Port A, Port B and Port
C(two 4 bits port Port Cupper and Port C lower. )
4. The 8255 ,primarily can be programmed in two basics modes:
1. Bit set/reset (BSR) mode.
2. I/O mode.
The I/O mode is divided into three modes:
mode 0: simple Input/output
mode 1: Input /Output with handshake
mode2: Bi-directional I/O transfer.
The BSR mode is used to set or reset the bits in Port C
Block diagram
 Data bus buffer:
 This tri state bi-directional buffer is used to interface the internal bus of 8255 to the
system data bus.
 Input or output instructions executed by the CPU either read data from or write data into
the buffer.
 Output data from the CPU to the ports or control register and input data to the CPU from
the ports or status register are all passed through the buffer.
Control logic
• The control logic block accepts control bus signals as well as inputs from the address bus
and issues commands to the individual group control blocks(Group A and Group B
control).
• It issues appropriate enabling signals to access the required data/control words or status
word.
Port and register select summary
I/O modes
 Mode 0: Simple Input or Output

 In this mode, ports A, B are used as two simple 8-bit I/O ports
 port C as two 4-bit ports.
 Each port can be programmed to function as simply an input port or an
output port. The input/output features in Mode 0 are as follows.

1. Outputs are latched.

2. Inputs are not latched.

3. Ports don’t have handshake or interrupt capability.


 Mode 1: Input or Output with Handshake

In this mode, handshake signals are exchanged between


the MPU and peripherals prior to data transfer.
The features of the mode include the following:

1. Two ports (A and B) function as 8-bit I/O ports.


They can be configured as either as input or output ports.
2. Each port uses three lines from ort C as handshake signals.
The remaining two lines of Port C can be used for simple I/O operations.
3. Input and Output data are latched.
4. Interrupt logic is supported.
 Mode 2: Bidirectional Data Transfer

This mode is used primarily in applications such as data transfer


 between two computers.

 In this mode, Port A can be configured as the bidirectional port


Port B either in Mode 0 or Mode 1.

 Port A uses five signals from Port C


as handshake signals for data transfer.

 The remaining three signals from port C can be used either


as simple I/O or as handshake for port B.
Control word formats
 Bit Set/Reset mode:

E.g:- Program to blink port C bit 0


 Flow chart: *Program:
mov dx,ctrl
back:mov al,01h
out dx,al
call delay
mov al,00h
out dx,al
jmp back
Control word format for I/O mode
 Examples:
 1. write a program to initialize 8255 in the
configuration given below.
 Port A:simple input
 Port B : simple output
 Port CL : output
 Port C U: input
 Assume address of the control word register of
8255 is 83 h.

 MOV AL,98H
 OUT 83H,AL
 Ex. 1: Configure Port A as i/p in Mode 0, Port B as
o/p in mode 0, Port C (Lower) as o/p and Port C
(Upper) as i/p ports.
Port A can work in Mode 0, Mode 1, or Mode 2
Port B can work in Mode 0, or Mode 1
Port C can work in Mode 0 only, if at all

Port A, Port B and Port C can work in Mode 0


Port A and Port B can work in Mode 1
Only Port A can work in Mode 2

You might also like