19 Introduction to Microprocessors 19.1, INTRODUCTION Ge control and arithmetic logic units of a computer are together known as central processing Wnt (CPU By the use of integrated circuits CPU can be fabricated on a single semiconductor chia mown as microprocessor. Thus, microprocessor (commonly known as LP) is a CPU on a chip, A microcomputer is a computer which uses a microprocessor as its CPU. A typical microcomputer has three types of chips : microprocessor (one chip), memory (several chips) and input- Intl Corporation (USA) inroduced microprocessor 8080 in 1979. was followed by 8088 which Some ofper 8 bit miroprocessors ae 280 manufactured by 2166, Len ars eesee ee sA). Intel 8086 and Intel 8088 are 16 bit microprocessors. 68020 (manufactured by Motorola USA), $2082 and 32523 (oth manufactured by Nakeos Serrano ae OF icroprecessore Th recent versions of porsonl commu eee ns ee 19.2, MICRO-COMPUTER ico-computer. The meaning of aiteret bose oe urger fAritimetic Logie Unit (ALU) + Al tho, computing ami ce ogc operations AND, ON, XGH ce are dave in aL sess The results of these operations are stored in registers or 1. al emory. rae] Register-Array : This part of the microprocessor fontains the registers. These registers store data and partial Fig. 19.1. Microcomputer system fesuls temporary during the execution of the program. Some of these registers can be examined by he user through proper instructions. Control Unit : The necessary timing and control units are provided by this unit It also controls fhe flow of data between the micro-computer, memory and peripherals Memory : This unit stores the program, data and results before and after the execution of the fogram. Two classes of memory are used, ., ROM and RAM. lead only memory (ROM) is permanently stored and the computer can read from ths information and when required. in general this information cannot be altered. Random access memory (RAM) s iso known as read-write memory. The data in this memory can be read by computer ag and when quired. Moreover, the contents of this memory can be altered by the user. These have boon iscussed in Chapter 15. Input-Ouput: The input-output devices are for communication with the user. The data, program pd other information is fed to the computer through the input whichis always a Keyboard, The results UG GENS Te Rr a pathi Digital Electronics are obtained through output. Various arabia Output devices are video monitor, printer, D/A converter, X-Y System Bus : The communication channel b share the same bus but the microprocessor communicates with only one peripheral at one time as per the timing Provided by the control unit. Bus is just a group of wires. A system may also have many 19.3, TYPES OF BUSES IN 8085 MICRO-COMPUTER tare S MicrorcomPuter is also known as microprocessing unit (MPU). Some ofthe tasks performed by itare: Reads data (and instructions) from memory. Writes data (and instructions) into memory. Accepts data (and instructions) from input devices. ‘Sends data’and results to output devices. Thus, microprocessor has to constantly communicate with memory and peripheral devices. For this communication the following steps are necessary 7 1. Identification of peripheral or the memory location (along with its address). 2. Transfer of data. 3. Provision of timing and synchronisation signals. ‘8085 has three sets of communication lines for the above purpose. These are known as address bus, data bus and contro! bus. 19.3.1. Address Bus {tis a group of 16 lines denoted as Ao to Ats. This bus is uniairectional, i.e. bits flow in only one direction from MPU to memory and peripherals. The address bus is for identification of memory locations and peripherals. Each memory location or peripheral is identified by a binary number (called address). The 8085 has 16 address lines and can address 2'® = 65536 (commonly known as 64 K) memory locations. 19.3.2. Data Bus {8085 data bus is a group of & lines (denoted as ADp to AD7). This bus is bidirectional, ie., data can flow in both directions between MPU and memoryiperipherals. The transfer of data is done by the data bus. The 8 lines enable MPU to manipulate 8 bit data. This 8 bit data can range from 00000000 to 41111111 (e., a total of 2® or 256 numbers). On the other hand 16 bit MPU (e.g., Intel 8086, Motorola 68000) have 16 data lines and 32 bit MPU (e.g, Intel 60386/486) have 32 data lines. 19.3.3. Control Bus ‘The control lines which carry synchronisation and timing signals are known as control bus. It is important to note that address and data bus are group of wires but control bus consists of individual lines which provide a pulse to indicate the MPU operation. Popo To understand the operation let it be required to read an instruction from a certain memory location. Microprocessor places the 16 bit address on the address bus. The address on the address bus is decoded by an external logic circuit and the memory location is identified. Microprocessor sends ‘pulse called MEM (memory read) as the contol signal through the control bus, This pulse activates the memory chip and the contents of that particular memory location (8 bit data) are placed on the data ‘bus and transferred to microprocessor. This is shown in Fig. 19.2. 19.4. MICROPROCESSOR 8085 ARCHITECTURE ‘The internal structure of a microprocessor is known as ‘Architecture’. I is based on logic design which depends on the required operation. Fig. 19.3 shows the architecture of 8085. The details of different blocks are as under.processors 423 wey Ag} _____ mos al ADDRESS BUS 1o,|4— | — Dp ] 7 Memeny chp rary BeGode DATA BUS Fig. 19.2. Reading from memory 1, Accumulator itis an 8 bit register which stores intermediate answers during a computer operation. It is also register A. The bidirectional arrow between the data bus and the accumulator means that the imulator can send or receive data. The two state output of the accumulator drives the ALU. .2. Temporary Register ‘The 8 bit temporary register stores the operands of the arithmetic logic operations, e.g., during an tion ADD B, the contents of B register are copied in the temporary register during one state and id during another T state, 3. ALU and Flags ‘Al the arithmetic and logic operations are done by ALU. The input to ALU are the contents of the Imulator and the temporary register. After the operations, the results are stored in the accumulator. 5 jlags (flip flops) are set or reset according to the result of the operation. The flags indicate data ions in the accumulator. The five flags are S, Z, AC, Pand CY. {@) $Sign Flag : The sign flag is set when the contents of accumulator become negative during iecution of an instruction, This means that after an arithmetic or logic operation if bit Oy of the is 1, the sign flag Is set, /-e., the number willbe viewed as a negative number. If bit Dr-is 0, the cr will be viewed as positive. In chapter 2, we have discussed that to represent negative numbers jay systems, the most significant bit is the sign it followed by magnitude bits. In 8 bit ay ation the bits are Do to D7 and the most significant bit is Oy. Thus the contents of Dy indicate sign (0 for positive and 1 for negative). (b) ZZero Flag : If an ALU operation results in 0, is reset the zero flag is set, If the result is not 0, the y intemally for BCD* operations. When a carry (¢) AC-Auxiliary Carry Flag : This flag is used on) fenerated by digit Ds and passed on to Ds, this flagis set eae sca suring tne execution of some istuctions (20, ADD), the eau of ALU is 1 Par ee en oven muroer of 1, the Pla is ei and an oa numbar ft eo arty. te a ry rm 00000011 has even pail and rest would cause og fagirost eg tn bingy Hane umber 0000007" denotes 3n decimal olan andar pat ar sotaton ie party is even because thas Wo 1'sin io ovary Flag : When an arithmetic operation results in Cary 0 a eaee Fred ag also serves as a borow fag for svwacton the carryiag is set lands for bay Coded decimal be meaning of eary in binary notation see chapter 2Digital Electronics $808 NAW J we.beP yoog EL By MIBS3H roy, i Ano 13834 t Ano 90 L eee fad renveg pur Baur na e—% 38 Roy | 8 hans nos 190 Bou o tra weg FUE 1 G [ino on es eave era10 Microprocessors 425 The flag register is also known as F register. It ha gs. The bit positions reserved for these flags in Frregist 6 8 bits but only § are or are as ey § 88 used forthe above 5 or 0 Om Om Do s Zz AC P cy | the contents of F register are 01010001, It means that 0,Z=1,AC= 4.4, Instruction Register and Decoder When an instruction is called from + P=Oand CY. ferent instruction cycles with alter: omplete program is executed. The time required to accomplish a specific task is known as machine cycle, The fetch cycle has pe machine cycle but the execute cycle may have one or more machine cycles depending on the Ith of instruction. Fig. 19.4 shows two chine cycles. Each machine cycle LILALIPLA T Rh 8 & & sists of several clock cycles J. Te. Ta etc. These clock cycles are are wave pulses. In Fig. 19.4 the fetch Hele has 3 clock cycles Tr, Te, Ts and J Fron ——}e— eveouto bt "Soe? ——He— "Sg? —o] f—_— rsucton gy Cyeie Fig. 19.4. Machine and instruction cycles Ge seconds or Bx area Microprocessor 8085 has six rogisters B,C; D, E,H, Land two addtional temporary resistors Al treoe ave 8 bi rites. mado’ as sak porto," progam. count. beonortdorementar aos lth, 1 Dit capa each Each of he egies 2 Loa fe8 on data, Howover,B-C, D-E 1 may bo combined to fom rghler part ol 16 bi fen so combined thay are Known as oxtondod registers, To load the ragitr par, ter Xis ada instustion,@., L.X1B, 90 FFH fans that register B and C are loaded with the upper and lower bytes to get B=90H C=FFH Thus we can write BC= 90 FFH P The pairing is always, 8-C, O-Eand H-L. esons. Te traci tt oe : peed, 0.9, SP=20FFHnter ca program counter. sia ae ee and Address-Data Buffer @ are buffer registers each 8 bit contents of the stack point counter an be ie ster stores a digital ter or program counter can be loaded in butler and the : loaded into the address buff 4 address- data buffer. The outputs trom {hese buter registers then, drive the extemal adcrosa tug ang q internal data bus is also connected to the buffe q bi-directional connection, Thu: i receive dts om the oh Cedlrectional com , these buffer registers can send data to or receive data from the 8 bit 19.4.7. Serial 1/0 Control __, Sometimes input-output devices work with serial data and not parallel data. In such cases the Serial input data has to be converted to 8 bit parallel data before the micro-computer can use it Moreover, the 8 bit output has to be converted to serial form before a serial output device can use it The serial data enters at SID (serial in iput data) and serial output leaves at SOD (serial output data) ‘Two instructions RIM and SIM are used in this regard. Each time a new bit reaches SID. we can execute RIM instruction to convert a serial input data stream into 8 bit parallel word. Similarly. for ‘output we use SIM instruction to convert the data received from computer into serial output. 19.4.8, Interrupt Control ‘Suppose that some one is reading a book when the phone rings. He interrupts reading, answers the phone call and then resumes reading. Interrupt control is analogous to this situation, The inpuvoutput device may send an. interrupt signal to the interrupt control unit to indicate that data is ready. The computer will temporarily stop what it is doing, receive the data and resume what it was doing. When interrupt occurs, microprocessor completes the instruction itis currently executing. Then it branches to a subroutine which services the peripheral device. Upon completion of service subroutine it retums to the main program it was executing. INTR, RST 5.5, RST 6.5, RST 7.5 and TRAP are inputs for the interrupt signal. INTA is an output which means interrupt acknowledge. If more than one interrupt is active at the same time, MPU 8085 takes them in order of following priorities. Signal Priority j TRAP 1 RST 7.5 2 RST 65 3 RST 5.5 i INTR 5 ‘AP has the highest priority, followed by RST 7.6 and so on. The signals TRAP, AST 7.5, RST OG, ROT Save hardvare restarts, MPU 6088 hao 8 software restarts AST Oto RST 7 (These | are known as software restarts because these are instructions). When any ofthe hardware restart pins is active, the intemal circuit of 8085 produces a hardware CALL to a predetermined vector location The vector locations for hardware restarts are exactly half way between the software restart loc In view of this the hardware restarts are numbered 5.5, 6.5 and 7.5. |. Timing and Control Unit 14 unt gpnortse ie cone sgnls ard sncvorzes alle operons wth sock. 6085 uses an osclator to generate two phase clock signals CLK and CLK which synchronise all riser, ‘The controller-sequencer also produces control signals which are needed for internal aiS and 1 are output status signals, The: 88 two signals and 10/4 signal incleate whether fetch, eration is being cari out 1 write, memory read or some other op. Nhenever data is fed into or taken out of microprocessor, accumulator is involved, The IN Arto ee accumulator to receive input data. The OUT instruction tanciog etna. the ‘stor fo output device. In both the cases going through accumulator sone downers operations. When DMA controller dy to take over the control, it @ high HOLD signal to MPU then floats its address, data and | buses. MPU also sends a high (hold acknowledge) signal to controller. The DMA controller rs data at high speed and then DMA Controller ACL BUSES 5 control back to MPU by sending = a low HOLD signal. This is Fig. 19.5. Direct memory access ted in Fig. 19.5, 3ESETIN signal may come from the user reset button or some other source. When RESET IN is PU will reset the program counter, instruction register and other circuits. The CPU remains in iil RESET IN signal goes high. Then the processing of data begins. 3ESET OUT signal when high, indicates that CPU is being reset (Le., program counter, stion register etc. are being reset to zero). This RESET OUT signal goes to peripheral chips RESET OUT goes low, processing begins. 10. Multiplexing Address /Data Buses tis seen from Fig. 19.3 that signal lines ADy — ADp ate bidirectioal. These lines are multiplexed, ley are used for address bits during some T states and for data bits during other T states. ‘fe, these lines are designated as Address/Data bus. The reason for multiplexing is that when yas deyeloped, the number of pins was to be limited to'40. Therefore, part of address bus was exed with data bus. PIN DIAGRAM OF MICROPROCESSOR 8085 ig. 19.6 shows the pin diagram of 8085 A (generally known as 8085). The functions of these ‘as under >ins 1 and 2: A microprocessor needs an oscilator to generate signals which synchronise all ions. 8085 has an on-chip oscilator except for crystal (or RC of LC network). The crystal (or RC etwork) is connected to pins 1 and 2 For frequency stability a crystal is preferred. Thezz mmcroprocessor at 9 MHz, the frequency ofthe rjal tes ri Pin 3: The RESET OUT signal from gin 3 goost the peripheral chips. When high, this signal indicate thea program counter, instruction register ete. are beine rect to zero. When the system is started, itis reset Wnt RESET OUT goes low, the processing starts. en Pin 4 : SOD. The serial output 4 . a pin as dscussedin section 18.47. os a8 Pin 5 : SID. The serial in ; put data i as discussed in section 19.4.7, aries ota Pi, Pins 6-11 : These pins are for in int ct discussed in section 19.4.8, oo. Pins 12 to 19 : These pins car , ins carry the lower 8 address bits or 8 data bits. These lines are muliplexed, ie., they are used for address bits during some T states and for data bits during other T states. Because of tis reason AD7— ADo ate labelled address-data bus in Fig 193. Pin 20 : Ground connection. Pin 21-28 : These are the rest of address bus. in 29 : So. It takes out status signal Pin 30 : ALE or address latch enablo as discussed in section 19.4.9 “pins 31, 92, 94 : These three pins are labelled as WR, RD andiO/At and work together. They stand for vite, vead. inpu-outputimemory respectively. They are te ead i memory and input-output chips. flow 1O/M sone memory operation and a high !0/M indicates inc inatucton fe being caried ou, 6, ow 10/4 that ney chips and high 107M enables +O chips. Wie and AD signals are active low eperaven. Thus, we have the folowing combination Memory rea Memory wit : 10/H ow, WF tw, Input ad: 1O/¥ high WR high, FO low Output write: 10/74 Pin 33 : Status signal S 1d : 10M low, fal devices are rathé 2085 addresses a peripheral device low READY signal to 8085. The MP\ sends high READY signal to MPU s0 Pin 36 : RESET IN. When RESET! counter bie and also send RESET OUT signal 10 pin (goes high. Then data transfer besins. Pin 37 : CLK signal comes out of this their working. Pins 38 and 39 : These are for direc pin and frequency is intemally divided by 2 (because there are two clock (0 clock sign: ‘Thus low WA means Jn, WA low, FD high -pdentes stats (lon wth $107 stow and cannot Keep 2 i "The perpher et sow and canot ei aes epee Faevi for receiving or sending dat or renovate a numberof wal 1 abu can complete deta ar TIN is low, the CPI ccan be fed to peripheral devices t + memory address as discus Digital Electronics ls CLK and CLR) Pol signals CLK and GIR). To operate a ~h whe we 29 row reser our[ 38 Fintan soo] « a FJax oon sip T] 5 36 RST tae] 6 as] reaoy sst7sE]? aw Foon rstesC]s whl rstssC]> se fam wre] 10 x Sma wacfs 2 Fae rocfe = ws wile — @ Pas wat |e 7 Line vos a [Aa wifes ETae rote Elan route 2 Lae v0; 0 2s veto ln Fig. 19.6. Pin diagram of 8085 write operation and low ID means read iF high, AD tow 10/Mf low, WA low, FD high ) as discussed in section 19.4.9. .ce with 8085. The fa If the device ie not ready it sends @ ‘states, When device is ready. it ster. the instruction register, program ‘PU 2 t till RESET IN signal ‘CPU remains in reset fo synchronise sssed in section 19.4.9— 429 Fin 40 : This pin is for connection of +5 V su “ihe power dissipation is about 1.5 W. 6, OSCILLATOR “The frequency limits specified for 8085 A are 500 wen clock frequency is within these limits, (Hz $15 9.125 MHz, Thus, i operates propery The onstal (or LC or RC circuit) is connected to ted to pins 1 and 2. The p wich produces two clock signals CLK and CLK. These clock signal diss fae rn ves a fp al also comes out of pin 37 for connection to peripheral devices ees i ply. The tolerance on the supply voltage is + Since the oscillator is producing 2 Ex signals, the oscillator frequency id be double the frequency of clock, fer 3 MHz clock, tho oscllator = Lf ey should be 6 MHz. A crystal is il best choice because it gives good cm Lf stability. Fig. 19.7 shows the al connections. Schmit's trigger 2 fices a perfectly rectangular output” fis used in 8085. 7. MICROPROCESSOR 8086 ‘An important feature of a microprocessor is the speed of operation. It is expressed in. milion gucions per second (MIPS). In case of microprocessors which provide instructions for floating point nts, the speed |= expressed in milon fosing port epaaions paremed per second ). In bit microprocessor speed of operations, directly addressable memory, data handling capacity are vely linted, The 16 Bit microprocessor have higher speed of operation, recy addressable ary, data handling capacity, etc. BO86 is a 16 Bit 40 pin microprocessor, 7.1. Memory Organisation 1, Memory Organivhich data and address are multiplexed as shown in Fig. 19.8. The lines DP eaen ees neta the 16 least significant bits of address, The remaining 4 most signiiant Bits A ae ee chat Ata. The lines ADb ~ ADs ae also used for 16 bit data word. The tines pS over the ey ionat significant byte ofthe data word while nes ADe = ADis ae used fr the A ate vee of th data word. only one byte of data is tansterred ether nes ADs —ADy or et signicant byte of nang on whether the byte corresponds to even or odd memory adress 20 a ae nave 20 address lines, the largest address can be 2° 1 or 1048575, Any two Mey Stee torn aeerees ‘The address of the least significant byte is the adress ofthe Bou form one 16 Bsocutve bytes form oe. TN word at adress 04 has Mo bytes located at Of and 08. The Fig. 19.7. Crystal driven Schmit’ trigger for 8085 ncaa Sie Meron 0 of ra oa os| ot ce > 109 A018 ol erprctstr a TS Fig. 19.8. Memory adaresing 5! ignals in 8086 Fig, 19.9. Two words in 8086 memory0. contents of this word are OB40E\¢. The c . The least si OE are at lower address, i.e, “Od whe te ees cant € bit viz,, OBS are at address 05. A word can aloo C= > . Iso vi signifi begin at odd address, e.g, in Fig. 19. n , 2.g,, in Fig. 19.9 th consists of two bytes located at addtess OY and 06: The e Digital Electronics contents of this word are OA5OF 16 (OF at address 07 and OAS at address 08). Most instructions of microprocessor 8086 can operate both on bytes (8 bits) and words (16 bits), e.g., we can move Ds, } MINAIR (Low) INTR—— |—> FD, NTR —>| }—> FD cK ——>| k— Howo cuK——> FOOT XO—H secrprcessr [—? MOA no Roar, high iroprocessor Wa Aveo Microprocessor | —> To ec ‘8086 ad Mio ee ‘8086 HL | Reaty — |_, ova Ready —H [=> Bes RESET |_—+ ben RESET [<> & a |—+ ae pir ox esr | Test (a) (b) Fig. 19.13. Pins/signals in wP 6086 (a) minimum mode (b) maximum mode depending on the complexity of the system. The ‘maximum mode is used to utilize the full power of sebe. For medium complexity systems minimum mode is used. 19.7.4. Bus Interface and Execution Units “4. Bus tecture of 8086 can be divided into two distinct parts, viz, Bus Interface Unit (BIU) and Execution Unit (EU). These two units interact with each other to ‘accomplish the various tasks. BIU exec instructions and data bytes between the processor and mernory ef VO devices. The EU does thas job of decoding and execution. BIU contains the 4 segment register, i.e., code segment (CS), data ‘Segment (DS), stack segment (SS) and extra segment (ES). Each of these registers is 16 bit. These egisters are loaded with the most significant 16 bits of the stating ‘addresses of the memory segments rete a aprocessor ts handling at any pariuar time. BIU inserts zero Tor the lowest four bits of We renting address for a segment. BIU fetches successive instruction Dy'e from the memory and 2 oS roee ato 2 6 byte instruction queue. EU removes these instructions (7 this queue, decodes ase es eactinam, this queue acts as a Fitst in First out (FIFO) queue for the EU, BIU fetches a exion bytes independent of EU. Whenever the bus is idle and there is space for at least 2 bytes in ta iieietion queue, BIU fetches the 2 bytes pointed at by the IP trom fe ‘current code segment During execution of instruction, whenever, EU requires the next instruct byt, its gets it directly 10 Tra terion queue. Thus the process of instruction fetch and exsearst are overlapped. THis overlapping saves execution ie Process rlap architectural feature of 6086 is alloc instruction Pip ining. 19.8. MICROPROCESSOR 8088 esa resect microprocessor with 6 bit data bus. Thus it needs 0 multiplex onh ‘with the 8 least significant bits of the address Dus. ‘The register set of 8088 is identical to that of 8086. Z panks of 8086, “The memory of 8088 is in the sequence of bytes, The concen of two memory banks ft esses not arizabie'n iis cage, Evidently al addresses sent out by 8098 270 the form of byte \y 8 data bitsess iar 4 Gass «word, two consecutive memory read or write cycles, = ges one byte. . are performed and each cycle Fig. 19.14 [(a) and (0)] show the pins/signals in 80% 19g has an 8 bit dala bus, only 8 data bits ave multipiocea Minimum ard Maximum moses 8088 sees only one memory bank, the signal BHE is not required in ee significant address bits. 86) is replaced by SSO pin in 8088. This SSO pin along with 0 086. Therefore, BHE pn mine the current bus cycle. Itis seen that M/IO line of 8086 is replaced by IO Te are used to line in 8088. This Jmilar to that in 8085 because 8085 has also |O/M ory address bits. 70 IO/M line for distinguishing between memory and /O ono — k#K— vee Ah + As AOA <>} => Aiea SoSe Nal [—+ sso inte le wns ux — |_, #0 Meroprocessor ["__, epe eee | > LDA [—> Wa [—+ 10m |—+ oni |» den |» we [+ a0 [> inte [> a |. Test — Test fe— ready — Ready (—— RESET J reser (@) 0) Fig, 19.14. Pinlsignals inj? 8088 (2) minimum modo (2) maximum mode Example 19.1. Explain the term ‘interfacing’ as used in computers. Solution 1 The computer has to get imformation from the input eystem.Ithas to food he results tne output system. The term ‘interfacing’ means synchronisation of digitatimformation transmission feen computer and input-output devices. ‘Example 19.2. Name the basic operations which occur most repeatedly in a computer. Solution : Fetch and Execute. Example 19.3. Whats the diffrence between a microprocessor and a microcomputer? “The CPU {central processing uni) of a microcomputer is called a microprocesser 0 fin WOPU, a microcomputer has memory, input-output devices, systom bus ete. ‘Example 19.4. What i the advantage of a computer having higher bit word size ? Solution : A computer with higher Bit word size executes programs ata faster te Example 19.5. (a) Name the three buses in a computer. (o) What are tne funetions ? (c) Which sis unidirectional 7 (d) Which bus includes clock signals. ‘Solution : (a) Data bus, Address bus, Control bus. «. Address bus carries addres? {p) Data bus catries data betwen CPU, memory and NG Set us caries Oo eIBU to memory and VO divices. Control bus carries ting “and synchronization si (c) Address bus. (a) Control bus.A Digital Electronics 19.9. APPLICATIONS OF MICROPROCESSORS ‘A microprocessor is a very suitable device for control circuits. Some examples are automatic ‘on-off of mains power supply, automatic start/stop of drive, speed control, temperature control, timing control, current control, switching on of protection and trip circuits, fault finding and diagnostic circuits etc. Microprocessor control has the advantages of flexibility, accuracy, reliability and economy. Since the control strategy is implemented through software, changes can be made very easily to cope with new requirements. Speed regulation and time regulation are far better as compared to other methods. Human errors in measurements and control are eliminated. 19.9.1. Microprocessor Based Temperature Controller Fig. 19.15 shows a block diagram of a microprocessor based temperature controller. The temperature of the equipment (say water bath) is measured by a temperature transducer. The output of the transducer is in Digital eror analog form. A/D converter changes the a temperature signal into a digital signal and Peleronce feeds it to microprocessor. Many reference Tne | I Logic Circuit 2 Phase temperature signals have already been fed to Be? le —{Fiing Circuit the microprocessor memory. As per the ot sottware, one of these reference temperatures is selected and the actual temperature signal is roma Compared with this selected reference. An Temperate error signal (positive or negative) is generated Equipment and converted int 10 analog form by DIA Fig, 19,15, Microprocessor based temperature controller converter. If necessary this error signal is amplified and fed to the logic circuit. The logic circuit chy ‘anges the firing angle of the ac voltage aapator as per the error signal. Ifthe error signal is postive (ie. reference temperature is higher than ‘actual), the firing angle is advanced and if the error signal is negative (ie., reference temperature is lower than actual), the firing angle is delayed. 19.9.2. Microprocessor Based Speed Control of Separately Excited DC Motor Fig. 19.16 shows a simple block diagram illustrating the prin le of Error signal »[ om }->[ Lovie Cicut microprocessor based speed control Aeference system of separately excited de notor. Speed >| [uu +} 3 Phase mains ‘The speed equation of a separately excited de motor is ‘AD j ' [3 Phase No convener [* where Va= Voltage applied to armature, V Ta Armature current, A Fax Armature resistance, ohm Speed, RPM fiat] = Field flux, Wb nas Kew Voltage constant a Since the volage drop la Aa is very malt speed a drecy proportional to Vs < “The armature an Feld winding of the 2 rete ate Fig. 19.16. Microprocessor based speed control of $¢? ‘excited DC motorfears y ’ . J 435 ‘re supplied from 3 phase ac mains through separate aharsis ted © the armature-and field circuits. P ac-de converters. The output of > » tachogenerator, senses the speed and produces a coverter changes the output voltage of tachogenerator i . A reference speed signal is also fed iriroprocessing unit. Iso fed to MPU. The error signal (ie., ref ec-acival speed) 1s converted to analog form by D/A converter and fed to lose Sinoat The logic uit sends a signal to firing circuit to adjust the fring angle of AC-DC converter feeding the armatoos wus the voltage applied to oueae is adjusted to control the speed precisely. A current transformer measures the ac line current. A/D converts this current signal to digital form and feeds it current monitoring and control. 7 mee Be 9.9.3, Microprocessor Based Speed Control of 3 Phase Induction Motor The speed of a 3 phase induction motor can be controlled by stator voltage control, rot contol and stator voltage and frequency control an g , rotor voltage voltage proportional to actual ° speed. A/D T to digital form and feeds it to MPU The stator voltage control and rotor voltage control methods give only a limited range of speed ntrol. However, the stator voltage and frequency control method gives a very wide range of speed tol. The stator is fed by a variable frequency supply. Since the synchronous speed is directly ortional to frequency, the speed can be controlled as per the requirement. As the frequency is hanged, it is necessary to vary the stator voltage also to keep the Vif ratio constant. This ensures that motor is operated at constant flux. Fig. 19.17 shows a simple block diagram for microprocessor based speed control of 3 phase induction motor. The 3 phase ac supply is converted to'de by phase controlled rectifier. If necessary is dc voltage is filtered to remove the harmonics. The inverter converts the de voltage into variable quency ac voltage which is fed to the induction motor. A tachogenerator senses the speed and reduces a voltage proportional to speed. A/D converter changes this voltage to digital form and feeds to MPU. A reference speed signal is also fed to MPU. The error signal is converted to analog form by YA converter and fed to logic cirouit. The logic circuit sends a proper signal to the firing circuit of the eter, Thus, the output voltage and frequency of the inverter are adjusted as per the speed fequirements. “A current transformer measures the line current. A/D converter changes this current to igital form and feeds it to MPU for current monitoring and control. DIA Logie Oveuk 2 Phase mains Error signal Phase controled rectior ]Je—fFirng Creu Variable + trequercy or aiphase AC 4 Pras Inguston Motor ‘AD Tachogenaraior .se induction motor Fig. 19.17. Microprocessor based speed control of 3 phase ind.MICRO COMPUTER Computers have been in general use since 1950s. Formerly, digital computers were large, expensive machines used by government and businesses. ‘The size and shape of digital computers have changes in the past few years owing to a new device called micro-processor. Micro- processor is an IC that contains much of the processing capabilities of a large computer. It is small but extremely complex LSI device which is programmable, Microcomputer Organization Microcomputer system is a digital computer. It is classed as micro because it is small in size and low cost. The microprocessor generally forms the CPU setting of a micro computer system. The microcomputer contains 5 basic sections: The input unit: Allows data to pass from the outside world to the microcomputer, The user can enter instruction (ie. program) and data in memory through input devices such as keyboard, or simple switches, CRT, disk devices, tape or card readers. Computers are also used to measure and control physical quantities like temperature, pressure, speed etc. For these purposes, transducers are used to convert physical quantity into proportional electrical signals. A/D computers are used to convert electrical signals into digital signals which are sent to the computer. 2. The control unit: Regulates and integrates the operations of the computer, It selects and retrieves instructions from the main memory in proper sequence and interprets them so as to activate the other functional elements of the system at the appropriate moment. 3, Arithmetic and logic unit (ALU): This section performs computing functions on data. These functions are arithmetic operations such as additions subtraction and logical operation such as AND, OR rotate etc. Result are stored cither in registers or in memory or sent to output devices. 4, The memory unit: A microcomputer would be incapable of performing even the simplest task if it did not contain some ype of memory. A microcomputer uses memory to store the programs that control its operation, to store data waiting for processing, and to store the results of operations performed by the CPU. 5. Output unit: For the user to view the results of the microcomputers work, data must be sent from the microcomputer to an output device. Typical output devicesare video monitors, printers, plotters, and secondary storage devices that can hold the data for future viewing. The output device found on nearly all microcomputers is the video monitor or just monitor. For the the video monitor to operate, a video display adapter card must be installed in the computer. NB: Number 2 and 3 are contained within the microprocessor. The microprocessor controls all the units of the system using control lines. The address bus (i.e. parallel conductors) selects a certain memory location, input port or output port, The data bus (8 parallel conductors) is a two array path for transferring data in an out of the microprocessor unit. It is important to note that microprocessor unit can save data or receive data from the memory using the data bus. If the program is stored permanently, it is placed in ROM and temporary data is stored in RAM. NB: For clarity purposes, power supply, clock and some feedback are usually omitted on block diagram of microprocessor unit.Microcomputer Operation Example 1. Press the A-key on the keyboard 2. store the letter A in the memory 3. print the letter A on the screen The sequence of events happening within the micro-computers in the input-store-output example abbreviation is outlined in fig. 1A Trom keyboard Poit | — | MPU + ‘(arson ie ‘Microprocessor ——— ee pr |e 100, INPUT data atone (LO ere wept |G iar stone a const ines F@— bie ere es one 99 > Ties ourrar as L fos [ erent 06 F] Program menory Aasres [ on * —O— > x ze an . [am Das enor? —= ‘Ouipat Post 0 > Ao CRT monitor Figure 1 Step 1 The up sends out address 100 on the address bus. The control line enables (turns on) the READ input on the program IC Step 2The program needs out the first instruction (input data) on the data bus and the HP accepts this coded message. The instruction is placed in a special memory location called instructio: e n register. The microprocessor decodes (interprets) the instruction and determi . ines that need: to the input data. = me Step 3 The microprocessor sends out address 101 on the address but. The control line enables the READ input of the program memory, Step 4 The program memory places the operand (from part 1) onto the data but the operand was located at address 101 in program memory. This coded message is accepted off the data but and into the instruction register. The microprocessor now decodes the entire instruction (INPUT DATA FROM PORT 1) Step 5 The microprocessor forces port 1 to open using the address but and control lines to the input unit. The coded form of A is transferred to and stored in the accumulator of the microprocessor. Step 6 ‘The up addresses location 102 on the address but the up enables the READ input on the program memory using the control line. Step 7 The code for the stored data instruction is read into the data bus and accepted by the up in‘the instruction register. Step 8 The up decodes the stored data instruction and determines that it needs the operand. The up addresses the next memory location (103) and enables the program READ input. Step 9 ‘The code for 200 is placed on the data but in memory location by the program memory. The up accepts their operand and stores it in the instruction register. The entire instruction (store data in memory location 200) has been fetched from memory and decoded. Step 10The execute process now starts. The up sends out address 200 on the address but and enables the WRITE input of the data memory. Step 11 The microprocessor put the information stored in the accumulator on the data bus (decoded form of A). Then A is written into location 200 in the data memory. The 2" instruction has been executed. NB This store process does not destroy the contents of the accumulator. The accumulator still contains the coded form of A. Step 12 The up must fetch the next instruction. It addresses location 104 and enables the READ input of the program memory. Step 13 The output data instruction code is placed on the data but. The up decodes the instruction and determines that needs an operand. Step 14 The up places address 105 on the address bus and enables the read input of the program memory. Step 15 The program memory puts the code for the operand to part 10 on the data but. The up accepts this code on the instruction register. Step 16 The up decode the entire instruction (output data to part 10) The up activates part 10 using the address but & control lines to the output unit. ‘The up places the code for the A on the data bus. The A is transmitted out of port 10 to the screen. NB It is important to note that HP unit always follows a FETCH-DECODE- EXECUTE sequence.The Microprocessor It is programmable device which is capable of performing functions and processes at the micro-level. It is an IC made of several logic acts in build in one chip. Depending on its capabilities either, the LSI or VLSI is used for manufacturing of up. Itis one of the most exciting technological developments among the semi-conductors in recent time. It has had tremendous impact on industrial control and instrumentation due to its high reliability and flexibility at the design and implementation stages. The decrease in cost of iP with increase facilities in them acts as a catalyst in this respect. Initially its application was limited to electronic controllers and computers but it has now entered into other fields eg. domestic appliances, measuring instruments, musical instruments, defense, railways, post and telegraphs, lighting publications, medical appliances etc. INTEL corporation of USA are the pioneers in the field of P technology. They produced the first j1P chip named INTEL 4004 in 1971 Serial [Name Bits Manufacturer No. Capacity 1 INTEL 4004 [4 INTEL Corporation USA 2 INTEL 4040 4 INTEL Corporation USA 3 PPS 4 4 Rockwell International USA 4 T3472, 4 Toshiba, (Japan) 5 INTEL 8008 8 INTEL Corporation USA 6 INTEL 8080 8 INTEL Corporation USA {7 INTEL 8085 8 _ [INTEL Corporation USA 8 F8 8 Fair Child (USA) 9 Z80 8 Zilog (USA) 10 M 106800 8 Motorolla (USA) 1 6809 8 Hitachi (Japan) (az INTEL 8086 16 [INTEL Corporation USA 13 INTEL 8088 16 | INTEL Corporation USA_ (4 IAPX 32. 32 [INTEL Corporation USA 15 HP 32 32 Hewlet Packard (USA) | 16 68020 32 Motorolla (USA) 17 32032, 32 ‘National ‘Semi-conductor (USA) 18 32523 32 ‘National Semi-conductor (USA) aTerminologies Bit - A microprocessor works on a binary digits 0’s and 1’s , these digits are known as bits, An 8 bit pP for example can handle data of combination of 8-bts formed by 0’s and 1’s. The number or combinations depend on the number of bits and is given by 2" where n= number of bits e.g. 28 = 256 Byte — This is a group formed by 8-bits Nibble — This is a group formed by 4-bits Word — This a group of bits which the 1P can handle at a time Time — The length of a word is measured in terms of the number of bits it processes. ‘PU - An electronic act which can interpret and execute instructions and control 1/P and 0/PArchitecture of INTEL 8085 uP NTA RST 6S. Trap INEK | Rss eer SID =sop ab td eS 2 Tatemipt Contr tear Conta zy = febiioemasiawet <> ora Traction Makpiewe] + Register (8)| register | ee rs = Register) a mer 1 ae ae Fins Hop "Nene | Sue? | | oe on Asihmetic oe Rene] Feat | 8 Machine [7] rene oo | ‘rit ‘Grate Tepe cay LI} | | esccing Sr ots 7] Wate |} ywer supply aN Power spoly > SSN ‘Timing and control unit L [Adress boiler) [Damn Address] ajax a ne Rese ® ue) Terria ys San Bebe Ux OUT! “RD WRALS So\S; 10/3 HUA! Reve oot Adiestbar < AdaGs De Ready HOLD Reith Date Figure 2 The intemal structure of uP is known as its architecture. Architecture of a uP is based on the logic design which is dependent on the various types of operation the uP is required to perform. Devices such as memory, input, output ete which are interfaced with the P for the manipulation and communication of data are called its peripherals.Arithmetic Logie Unit (ALU) This part of the processor is Tes; arithmetic such Main Storage L | Store Register ¥ Comparator r= ‘Accumulator Figure 3 The data which is entered into the accumulator is returned to the memory through the storage register. The data present either n the storage register or accumulator may be transferred to the address for required operation. After an operation has been performed the result is stored back in the accumulator. This can be transferred to the memory or any other register by using appropriate instruction. The logical comparison such as equals to, less than, greater than ete are performed by the comparator. IC 74181 is a chip which can be used as an ALU separately. Registers* General purpose registers, * Accumulator . Flag registers Program counter Stack pointer General Purpose Registers They are 6 namely; B, C, D, E, Hand L. Each of them is an 8-bit register and can store 8-bit data. These registers may be combined to form register pairs in order to handle 16-bit data. Their high order byte is Stored in the first register and the low order byte is stored in the second register. They are also known as programmable registers because they may be programmed by the user with the help of appropriate instruction, Accumulator Itis an 8-bit register and generally referred to as register A. It is used for storing 8-it data and also for performing arithmetic and logic operations The result of an operation is automaticall ly stored in this register. NB Accumulator is part of ALU Flag Registers This is another part of ALU. It has S-flip flops called the flags. These are zero (Z), the carry (CY), sigh (S) parity (P) Auxiliary carry (AC). Out of the 8-bit positions in the registers 5 of the positions are occupied by the flags (5). The positions of these flags can be either set or resets which are directly linked to the status of the data, either in the accumulator or in the other registers. These conditions (the setreset conditions) depend on the result of the operation. If the ALU operation results into zero, the Z-flag is set and if the result is not zero, it is reset. In an arithmetic operation, if a carry is generated by the bit Ps and passed on to the bit D,, the AC flag is set. After an arithmetic or logic operation, if the result consist of an even number or I’s then the P flag is set and incase of an add number of I’s the P flag is reset. If the result of an arithmetic operation generates a carry the CY flag is set if there is no carry generated then the CY flag is reset. Program Counter7 a ' ie register which deals with the sequencing of execution of erlan ra Gear any operation. This acts like a pointer which ‘nt memory location. After i ion is executed, the PC gets incre: 5 indicate the next memory ee gi mented by 1 to indicate the next memory Stack Pointer (SP) - Itis a 16-bit register - Stack is a set of memory locations. - Stack pointer is the indicator to this memory locations - These memory locations are used by the HP for storing data temporarily during the execution of a program. - A 16-bit memory address is loaded in the SP for defining the beginning of the stack - It is a first in — last out type of register. Interrupt Control ‘Sometimes it is necessary to interrupt the execution of the main program to answer a request form I/O device, for instance an I/O device may send an interrupt signal to the interrupt control unit to indicate that data is ready for input. The computer temporarily stops what it is doing, inputs the data, then retums to what it was doing. The interrupt concept is analogues to your reading a book (main program) hearing the phone (interrupt), then returning to your to your reading (main program) Timing and Control This section includes an oscillator and controller sequencer. The seillator generates the 2-phase clock signals (CLK and CKL) that cynchronies all registers. The controller sequencer also produces the control signals needed for internal and external control. The controller Sequencer is micro programmed. Tt has a ROM that stores all the micro routines needed for executing instruction. After each __— instruction —_is_‘fetched and stored in. as | js decoded to get the starting address of i Jesued micro routine. As each micro instructions is read out of the ine trol ROM, control signals are sent to the internal. and external data fuses, The effect is to remove data between registers, 10 perform arithmetic logic operation to input or output data etc. For executing a program a uP has to follow two main steps sequentially. i) Fetching of the next instruction 2ii) Execution of the instruction The time taken by the pP in the execute cycle (EC), ae it i : Operation is called the fetch cycle eC). naiad Performing the fetch Thus IC=FC+EC The fetch eye is ofa fixed duration whereas the instruction eycle is of Variable duration depending on the length of instruction to b Different IC with alternate fetch and icin continuation Applications of Microprocessors 1. Used in microcomputers. 2. Used in measuring instruments e.g. oscilloscope Domestic appliances e.g. car bells, washing machines, televisions, micro wave ovens etc. Defense equipment e.g. in radars, missiles, fighter planes, tankers 5. Medical equipment e.g. 6. Modern monitory system, blood pressure monitors, blood analyzers, scanning. 7, Musical instrument such as synthesizers, 8. Microprocessor based process controllers such as temperature monitoring systems, automobile controllers, motor controllers, voltage controllers, pulse width controllers, illumination controllers etc. 9. Microprocessor based sophisticated systems for measuring electrical and non-electrical quantities.Examples (@)Microprocessor based Temperature controller Analog error signal 1 DA |}-———fampitie] 3 Phase mains Digital error ‘signal Reternce I Temperature =. f [8 888 |. _ting creun AD regulator \Temperature} Transducer [* | Equipment Fig 1 Figure 1 shows a block diagram of a microprocessor based temperature controller. The temperature of the equipment (say water bath) is measured by a temperature transducer. The output of the transducer is in analogue form. A/D converter changes the temperature signal into a digital signal and feeds it to microprocessor. Many reference temperature signals have already been fed to microprocessor memory. As per the software, one of these reference temperatures is selected and the actual temperature signal is compared with this selected reference. An error signal (positive or negative) is generated and converted into analogue form by D/A converter. If necessary this error signal is amplified and fed to the logic circuit. The logic circuit changes the firing angle of the ac voltage regulator as per the error signal. If the error signal is positive ( i.e reference temperature is higher than actual), the firing angle is advanced and if the error signal is negative (ie the reference temperature is lower than the actual), the firing angle is delayed.Ke OVA Logic Gircui 3 Phase mains 3 Phase Ac-Do f¢—FFi converter rains read ‘Tachogenerator [ OOOO Fld wieing 3 Phase ACO convener 3 Rhgse mains Figure 2 Figure 2 shows a simple block diagram of microprocessor based speed control system of a separately-excited D.C motor. The speed equation of a separately-excited D.C motor is given by: ie 7 Ko Where: V, = Voltage applied to the armature in volts 1, = Armature current in amps Ry = Armature resistance in ohms © = Field flux in webers Kg = Voltage constant Since the voltage drop LAR, is very small, speed is directly proportional to V,. The armature and field winding of the d.c motor are supplied from a 3-phase a.c mains through separate A/D converters. The output of the converters is fed to the armature and field circuits. A tachogenerator senses the speed and produces a voltage proportional to actual speed. A/D converter changes the output voltage of tachogenerator to digital form and feeds it to microprocessing unit (MPU). A reference speed signal is also fed to MPU. The error signal (ie Reference speed - Actual speed) is converted to analogue form by DIA converter and fed to the logic circuit which then sends a signal to firing circuit to adjust the firing angle of A/D converter feeding the ryarmature. Therefore the voltage applied to the armature is adjusted to control the speed precisely. A current transformer measures the a.c line current. A/D converts this current to digital form and feeds it to MPU for current monitoring and control. (©) Microprocessor based speed control of a 3-phase induction motor DIA Logie Circuit 3 Phase mains y & i » Error signal Phase controlled e rectifier t pc Reference MPD Inverter |*——fFiring Circuit] pee once a Variable NOGT es frequency cT 3 phase AC p+ ‘3 Phase’ AD Induction Motor Load ne AR ia lt Figure 3 “phase induction motor can be controlled by: Stator vollage 4 oF A otor voltage control; Stator voltage and Frequency Control, The stator voltage control and rotor voltage control metho is, Rowever, give only a limited range of speed control, The stator voltage and frequency control method, on the other hand, gives @ very wide ange of speed control. In this method, the stator is fed by a variable Tesveney, supply and since the synchronous speed is directly =120f d can be controlled proportional to frequency (i N=", )» the spec an per the requirement, As the frequency is changed tf necessary fo asvary the stator voltage also to keep the c ratio constant. This ensures that the motor is operated at constant flux. Figure 3 shows a simple block diagram for a microprocessor based speed control of a 3-phase induction motor. The 3-phase a.c supply is converted to d.c by phase controlled rectifier. If necessary, this dc voltage is filtered to remove the harmonics. The inverter converts the “he voltage into variable frequency a.c voltage which is fed to the induction motor. A tachogenerator senses the speed ‘and produces a voltage proportional to speed. A/D converter changes this voltage to digital form and feeds it to MPU. A reference speed signal is also fed to the MPU. The error signal is converted to analogue form by D/A converter and fed to logic circuit which sends @ propet signal to the firing circuit of the inverter. Thus, the output voltage and frequency of the inverter are adjusted as per the speed requirements. A current transformer measures the line current. A/D converter changes this ‘current to digital form and feeds it to MPU for current monitoring and control.DIGITAL CONTRO CONTROL L SYSTEM OF D.C MOTOR SPEED Step-down Line] Tr synchronising b* seg Taser famrent® o}—{ +}—fer Forward — Reverse oD ' Thyristor ‘ Changeover converter aired signal Speed. Reference StarvStop ‘Command Figure 4 Figure 4 shows a digital control system for speed control of D.C drive using a microcomputer. Its operation is as follows: + Thyristor converter: A phase controlled rectifier supplies a D.C motor, The main control to be handled is to tum on and off SC! Thyristor power converter in this case is a dual converter ~ one for forward and other for reverse direction. Gate pulse generator and amplifier: PC is used for firing angle control of dual converter. It can be programmed using suitable Software to perform the function of firing range selection, firing pulse generation, etc. The firing pulses so obtained are amplified so Pe to turn on SCR reliably. Changeover signal decides whether to Switeh on forward or reverse group of SCRs. The gate pulse generator is shown as receiving a firing signal from PC. «Speed Encoder and input module: The speed information ean be fete PC through speed input module. The speed measurement is P 39AC. supply ———_—__done digitally by means of speed encoder. It consists of a dise with definite number of holes drilled on it. This dise is fixed on to the shaft. Using a light source and a phototransistor, a series of pulses is obtained as the shaft rotates. This pulse train is processed and shaped. These optically coded pulses are counted to get actual speed of motor. A/D converter and transducer: The motor current drawn from supply is stepped down with the help of current transformer. Iti Converted to D.C voltage output with the help of current transducer. As PC can’t process analog signals, this analog current signal is fed to A/D converter to obtain digital signal which is fed to PC. « Line synchronizing circuit: This is required so that PC can synchronize the generation of firing pulse data, with supply line frequency. ; © W/O cards: Input/output cards are required to interface PC with the outside world.