5 4 3 2 1

SYSTEM PAGE REF.

01. Block Diagram
02. System Setting
Voyager VGST/VGSTG with Shark Bay ULT
04. CPU(2)_MISC,JTAG,DDI.EDP
05. CPU(3)_DDR3L
06. CPU(4)_HSW POWER
08. CPU(6)_GND
09. CPU(7)_RESERVED
16. DDR3(1)_SO-DIMM0
D 17. DDR3(2)_SO-DIMM1 D
18. DDR3(3)_CA/DQ Voltage
20. PCH(1)_SATA,IHDA,RTC
21. PCH(2)_CLK,SMB,LPC
BLOCK DIAGRAM
22. PCH(3)_SYS PWR
eDP(option)
23. PCH(4)_DP,PCI,CRT
24. PCH(5)_PCIE,NVRAM,USB Panel(eDP/LVDS) LVDS(option)
25. PCH(6)_CPU,GPIO,MISC RTD2132R-CG DDR3L SO-DIMM x2
Page 45
26. PCH(7)_POWER,GND Page 16~18
28. PCH(9)_SPI,SMB DDR3 1600MHz
30. EC_IT8587E/AX
HDMI
HDMI Shark-Bay ULT
31. TP / Keyboard eDP
32. RST_Reset Circuit Page 48 0 USB 3.0
33. LAN-QCA8171/72 USB3.0 Port
34. LAN_RJ45 VGA DP
VGA DP2VGA/IT6511 Page 52
36. AUDIO_92HD99
37. AUDIO_HP/ MIC JACK Page 46 6 USB 3.0
40_CB(1)_AU6465
44. BUG_Debug
CPU USB3.0 Port / S&C
45. LVDS_output Haswell
46. DP to CRT IT6511FN Page 52
48. TV(1)_HDMI-4K2K
50. THERMAL / FAN
DGPU/Nvidia N14X PCIEx4 (port 5) + 1
51. SATA HDD/ ODD
Optimus USB2.0 Port
C 52. USB JACK Page 70~77 PCH USB 3.0 Page 54 C

53. MINICARD_WLAN Lynx Point 7

56. LED_Indicator USB 2.0
57. Discharge USB2.0 Port
58. G-sensor
Page 40
60. DC_DC/BAT CONN
65. ME_CONN,Skew Hole Debug Conn.
5
Power
Camera

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66. PWR BRD/ IO BRD Page 44
+VCORE
70.VGA-PCIE
71_VGA-N14P-FRAME BUFFER
Page 45 +VGFX_CORE
LPC Page 80
72.VGA_RGB,XTAL
73.VGA_LVDS_HDMI Keyboard / Touch Pad EC IT8587 4
74.VGA_GPIO,STRAP Touch penal System (5V & 3.3V)
75.VGA_Power,GND Page 31 Page 30 Page 3~9
Page 20~28 Page 81
76_VGA_FBA_HYNIX DDR3 [31:0] 3
77_VGA_FBA_HYNIX DDR3 [63:32] SPI ROM Card Reader/AU6465R
80_POWER_VCORE SMB DDR & VCCP
G sensor Page 28
81_POWER_SYSTEM Page 40 Page 82
82_POWER_ +1.05VS

SATA

PCIE
83_POWER_DDR & VTT
84_POWER_1.8VS VCCSA & VTT
2 HMC(option)
86_POWER_1.5VS Page 83
87_POWER_VGA_VCORE_2PHASE AUDIO Jack Codec HDA 3 WLAN + BT3.0
88_POWER_CHARGER +1.8VS
Page 37 Page 36
B 89_POWER_**** Page 53
B

90_POWER_DETECT Page 84
91_POWER_LOAD SWITCH
92_POWER_PROTECT +VGA_VCORE
93_POWER_SIGNAL
95. POWER_ HISTORY Page 87

BATTERY CHARGER
Page 88

DETECT
2 4 Page 90
ODD LAN RJ45
Page 51 AR8172/AR8171 Page 34 LOAD SWITCH
0 Page 33 Page 91
HDD
Page 51 Power Protect
Page 92

A A

Discharge Circuit DC & BATT. Conn.

Page 57 Page 60

Reset Circuit Skew Holes Title : Block Diagram

Page 32 Page 65 BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 1 of 104
5 4 3 2 1
 5 4 3 2 1

Internal & EC GPIO Use As Signal Name EC Name Use As Signal Name
PCH LP PCH_CPT
Use As Signal Name External Power
EC GPA0 PWR_WHITE_LED# KSI7 KSI7 PCH LP PCIE 1 N/A
GPIO
GPIO Pull-up/down IT8587 GPA1 BAT_ORG_LED# KSO0 KSO0 Ports Allocation
PCIE 2 N/A
GPIO 00 KB_LED_ID KB_LED_ID EXT PU +3VS PCIE 3 Minicard WLAN
GPA2 KEYBOARD_LED# KSO1 KSO1
GPIO 01 ID Pre/Main
PCB_ID4 EXT PU REV PD +3VS PCIE 4 LAN
GPA3 DC_IN_LED# KSO2 KSO2
GPIO 02 ID 1*USB3/2*USB3
PCB_ID5 EXT PU REV PD +3VS PCIE 5 nVidia
ID w/ HDMI/ GPA4 WLAN_RST# KSO3 KSO3
GPIO 03 w/o HDMI PCB_ID6 EXT PU REV PD +3VS PCIE 6 TBT
GPA5 CHGCB2# KSO4 KSO4
GPIO 04 Unused I2C0_SDA EXT PU +3VS
GPA6 THERM_ALERT#_EC KSO5 KSO5 SATA0 SATA HDD
GPIO 05 Unused I2C0_SCL EXT PU +3VS
GPA7 PCH_FLASH_DESCRIPTOR KSO6 KSO6 SATA1 SATA ODD
GPIO 06 Unused
I2C1_SDA EXT PU +3VS
GPB0 NUM_LED# KSO7 KSO7 SATA2 N/A
GPIO 07 Unused
I2C1_SCL EXT PU +3VS
GPB1 CAP_LED# KSO8 KSO8 SATA3 N/A
D
GPIO 08 Unused
GPIO8 EXT PU +3VSUS_ORG D
GPB2 THRO_CPU KSO9 KSO9
GPIO 09 Unused GPIO9 EXT PU +3VSUS_ORG USB3 1 USB3.0 Port (1)
GPB3 SMB0_CLK KSO10 KSO10
GPIO 10 support INTEL RTD3 SMC_RUNTIME_SCI# EXT PU +3VSUS_ORG USB3 2 USB3.0 Port (2)
GPB4 SMB0_DAT KSO11 KSO11
GPIO 11 Unused
GPIO11 EXT PU +3VSUS_ORG USB3 3 N/A
GPB5 A20GATE KSO12 KSO12
GPIO 12 Unused
PM_LANPHY_EN EXT PU +3VSUS_ORG USB3 4 N/A
GPB6 RCIN# KSO13 KSO13
GPIO 13 Unused
RTD3_USB3_P0_PWREN EXT PU +3VSUS_ORG
GPB7 PM_RSMRST# KSO14 KSO14 USB 0 USB3.0 Port (1)
GPIO 14 Unused GPIO14 EXT PU +3VSUS_ORG
GPC0 CRX0 KSO15 KSO15 USB 1 USB2.0 Port (1)
GPIO 15 Strap HOST_ALERT1#_R REV PU INT. PD +3VSUS_ORG
GPC1 SMB1_CLK USB 2 Bluetooth
GPIO 16 Clear PWD
GPIO16 EXT PU +3VS
GPC2 SMB1_DAT USB 3 Card Reader
GPIO 17 nVIDIA Optimus
DGPU_PWROK EXT PU +3VS
GPC3 KSO16 USB 4 Touch Panel
GPIO 18 GPU Clock REQ
CLKREQ_PEG# EXT PU REV PD +3VS
GPC4 AC_IN_OC USB 5 Camera
GPIO 19 Unused CLK_REQ1# REV PD +3VS
GPC5 KSO17 USB 6 USB3.0 Port (2)
GPIO 20 WLAN Clock REQ CLK_WLAN_REQ# EXT PU REV PD +3VS
GPC6 BAT1_IN_OC# USB 7 USB2.0 Port (3)
GPIO 21 Unused
CLK_REQ3# EXT PD +3VS
GPC7 ME_AC_PRESENT
GPIO 22 LAN Clock REQ
CLK_REQ_LAN# EXT PD REV PU +3VS
GPD0 PM_SUSB#
GPIO 23 Unused
CLK_REQ5# EXT PU +3VS
GPD1 PM_SUSC#
GPIO 24 WLAN ON WLAN_ON +3VSUS_ORG
GPD2 BUF_PLT_RST#
GPIO 25 Unused RTD3_USB3_CAM_PWR# REV PU +VCCDSW
GPD3 EXT_SCI#
GPIO 26 BT ON
BT_ON/OFF# +3VSUS_ORG
GPD4 EXT_SMI#
GPIO 27 Unused
SMC_WAKE_SCI# EXT PU +VCCDSW
GPD5 PM_PWROK
GPIO 28 Unused
NFC_RESET EXT PU +3VSUS_ORG
GPD6 FAN0_TACH
GPIO 29 Test Point SLP_WLAN# +VCCDSW
GPD7 USBP01_EN
GPIO 30 SUS_PWR_ACK_R EXT PU +3VSUS_ORG
GPE0 VSUS_ON
GPIO 31 ME_AC_PRESENT
AC_PRESENT_R EXT PU +VCCDSW
GPE1 SUSC_EC#
GPIO 32 PM_CLKRUN#
PM_CLKRUN# EXT PU +3VS
GPE2 SUSB_EC#
C
GPIO 33 Unused
DEVSLP0 EXT PU +3VS C
GPE3 CPU_VRON
GPIO 34 EXT_SMI# EXT_SMI# EXT PU +3VS
Device Attention
GPE4 PWR_SW#_M
GPIO 35 (Zero Power ODD) SATA_ODD_DA# EXT PU +3VS
Device Present
GPE5 USB_OC01#_EC
GPIO 36 (Zero Power ODD) SATA_ODD_PRSNT# EXT PU +3VS
GPE6 LID_SW#
GPIO 37 ID PCB
PCB_ID0 REV PD EXT PU +3VS
GPE7 USB_OC2#_EC
GPIO 38 DEVSLP1 REV PU +3VS
GPF0 BAT_LEARN
GPIO 39 DEVSLP2 REV PU +3VS
GPF1 ME_SUSPWRDNACK
GPIO 40 Unused OC0#/GPIO40 EXT PU +3VSUS_ORG
GPF2 PM_PWRBTN#
GPIO 41 Unused
OC1#/GPIO41 EXT PU +3VSUS_ORG
ONKYO Speaker GPF3 SUSACK#
GPIO 42 Detection ONKYO_DET1 EXT PU +3VSUS_ORG
GPF4 TP_CLK
GPIO 43 detect HARMAN
HARMAN_DET2 EXT PU +3VSUS_ORG
GPF5 TP_DAT
GPIO 44 ECSCI# EXT_SCI# EXT PU +3VSUS_ORG
GPF6 H_PECI_EC
GPIO 45 Unused GPIO45 EXT PU +3VSUS_ORG
GPF7 LCD_BACKOFF#

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GPIO 46 Unused
RTD3_SNSR_HUB_PWREN EXT PU +3VSUS_ORG
GPG0 HDMI_HPD_M
GPIO 47 Unused
GPIO47 EXT PU +3VSUS_ORG
GPG1 NC
GPIO 48 ID eDP/LVDS
PCB_ID12 EXT PU REV PD +3VS
GPG2 FB_CLAMP_TGL_REQ#
GPIO 49 ID PCB PCB_ID2 REV PU EXT PD +3VS
GPG6 HDPINT#
GPIO 50 nVIDIA Optimus DGPU_HOLD_RST# EXT PU +3VS
GPH0 PM_CLKRUN#
GPIO 51 ID PCB
PCB_ID1 REV PU EXT PD +3VS
GPH1 CHGCB0#
GPIO 52 Unused
TPANEL_RST# REV PU +3VS
GPH2 CHGCB1#
GPIO 53 WLAN LED
WLAN_LED REV PU +3VS
GPH3 KB_ID
GPIO 54 nVIDIA Optimus VGA_PWRON REV PU +3VS
ODD POWER On/Off
GPH4 JACK_IN#
GPIO 55 (Zero Power ODD) SATA_ODD_PWRGT +3VS
GPH5 HDPLOC
GPIO 56 Unused
GPIO56 EXT PU +3VSUS_ORG
GPH6 HDPACT
GPIO 57 Unused
GPIO57 EXT PU +3VSUS_ORG
GPI0 AD_IINP
B
GPIO 58 Unused
GPIO58 EXT PU +3VSUS_ORG B
GPI1 SUS_PWRGD
GPIO 59 Unused GPIO59 EXT PU +3VSUS_ORG
GPI2 ALL_SYSTEM_PWRGD
GPIO 60 Unused GPIO60 EXT PU +3VSUS_ORG
GPI3 VRM_PWRGD
GPIO 61 Test Point
SUS_STAT# TEST POINT +3VSUS_ORG
PLL ON DIE VR GPI4 ADAPT_AD
GPIO 62 ENABLE SUS_CLK REV PD +3VSUS_ORG
GPI5 BACK_EN_C
GPIO 63 Test Point
SLP_S5# TEST POINT +VCCDSW
GPI6 WLAN_ON_EC
GPIO
GPIO
GPIO
64
65
66
Unused

Unused
Disabled A16 Swap
SDIO_CLK
SDIO_CMD
SDIO_DATA0
EXT PU
EXT PU
REV PU REV PD
+3VS
+3VS
+3VS
GPI7
GPJ0
IMON
SLP_MUSIC_EN
Vinafix.com
Override
GPJ1 BAT_OFF#
GPIO 67 Unused
SDIO_DATA1 EXT PU +3VS
GPJ2 OP_SD#
GPIO 68 Unused
SDIO_DATA2 EXT PU +3VS
GPJ3 USBSLP_EN
GPIO 69 Unused SDIO_DATA3 EXT PD +3VS
GPJ4 GPU_FB_CLAMP
GPIO 70 Unused GPIO70 EXT PU +3VS
GPJ5 CTL_FAN
GPIO 71 HSIO_PWR_CNTL
HSIO_PWR_CNTL EXT PU +3VS
GPJ6 SW_RTCRST
GPIO 72 Unused
BATLOW# EXT PU +3VS
GPJ7 LAN_PWR_EN#
GPIO 73 NFC alert
SML1_ALERT# REV PU +3VSUS_ORG
GPM0 LPC_AD0
GPIO 74 SML1_DAT SML1_DAT EXT PU +3VSUS_ORG
GPM1 LPC_AD1
GPIO 75 SML1_CLK SML1_CLK EXT PU +3VSUS_ORG
RTD3
GPM2 LPC_AD2
GPIO 76 (RTD3_AUD_PWR) RTD3_AUD_PWR EXT PU +3VS
GPM3 LPC_AD3
GPIO 77 Unused
INT_PIRQA# EXT PU +3VS
GPM4 CLK_KBCPCI_PCH
GPIO 78 Unused
INT_PIRQB# EXT PU +3VS
GPM5 LPC_FRAME#
GPIO 79 Unused INT_PIRQC# EXT PU +3VS
GPM6 INT_SERIRQ
GPIO 80 Unused INT_PIRQD# EXT PU +3VS
WRST# EC_RST#
GPIO 81 HDA_SPKR
SB_SPKR REV PU +3VS
FSCE# SCE#
GPIO 82 RCIN#
RCIN# EXT PU +3VS
ID w/ ZP ODD / FSCK SCK
A
GPIO 83 w/o ZP ODD PCB_ID9 REV PU EXT PD +3VS A
ID UMA_Optimus /
FMOSI SI
GPIO 84 DSC PCB_ID10 EXT PU REV PD +3VS
ID w/ Sleep&Music
FMISO SO
GPIO 85 / w/o Sleep&Music PCB_ID11 EXT PU REV PD +3VS
Boot BIOS
KSI0 KSI0
GPIO 86 Denstination BBS_BIT0 REV PU REV PD +3VS
ID w/ USB3.0 / KSI1 KSI1
GPIO 87 w/o WUSB3.0 PCB_ID14 EXT PU REV PD +3VS
KSI2 KSI2
GPIO 88 ID Standard/Entry
PCB_ID3 EXT PU REV PD +3VS
KSI3 KSI3
GPIO 89 CRT Detection CRT_IN# Int. PU REV PU +3VS
KSI4 KSI4
GPIO 90 Unused RTD3_SATA1_PWR# EXT PU +3VS
KSI5 KSI5
GPIO 91 Unused
UART_RX EXT PU +3VS
KSI6 KSI6
GPIO 92 Unused
UART_TX EXT PU +3VS Title : System Setting
KSI7 KSI7
GPIO 93 Unused
UART_RTS# EXT PU +3VS BG1\HW5\W Engineer: Ahren_CHEN
KSO0 KSO0 Size Project Name
GPIO 94 Unused UART_CTS# EXT PU +3VS Rev
D VGST 1.1
Date: Thursday, December 20, 2012 Sheet 2 of 104
5 4 3 2 1
 5 4 3 2 1

+VCCIO_OUT +VCCIO_OUT 6,32

+VCCIO_OUT
+3VSUS +3VSUS 22,26,28,30,33,34,37,53,81,92

+3V +3V 22,44,45,57,91

1
R0420 +1.05VS +1.05VS 6,25,26,32,57,80,82
49.9Ohm
HASWELL_MCP_E
1% U0301B +VCCIOA_OUT +VCCIOA_OUT 6
@

2
T0402 1 PROC_DETECT# D61
TP_CATERR#_R K61 PROC_DETECT# MISC
R0429 1 2 43Ohm H_PECI N62 CATERR# J62 XDP_PRDY# 1 T0410
30 H_PECI_EC PECI PRDY#
D K62 XDP_PREQ# 1 T0411 D
62Ohm 1 2 R0410 PREQ# E60 XDP_TCK
+1.05VS_VCCST PROC_TCK E61 XDP_TMS 1 T0421
H_PROCHOT# 56Ohm 2 1 R0409 H_PROCHOT#_D K63 JTAG PROC_TMS E59 XDP_TRST#
PROCHOT# PROC_TRST# XDP_TRST# 20
THERMAL F63 XDP_TDI 1 T0423
PROC_TDI F62 XDP_TDO
PROC_TDO
10KOhm 2 1 R0408 H_CPUPW RGD_R C61
PROCPWRGD PWR
J60 XDP_BPM0 1 T0413
BPM#0 H60 XDP_BPM1 1 T0412 +1.05VS_VCCST
Follow Intel Doc. No. 502636 Rev.1.0 BPM#1 R1.0 PU/PD for JTAG signals
RCOMP1 changes from 75ohms to 120ohms H61 XDP_BPM2 1 T0414
BPM#2 H62 XDP_BPM3 1 T0415
200Ohm 1 1% 2 R0412 SM_RCOMP_0 AU60 BPM#3 K59 XDP_BPM4 1 T0416 R1d
120Ohm 1 1% 2 R0413 SM_RCOMP_1 AV60 SM_RCOMP0 DDR3
BPM#4 H63 XDP_BPM5 1 T0417 XDP_TDO 51Ohm 1 2 R0403
100Ohm 1 1% 2 R0414 SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60 XDP_BPM6 1 T0418
CPUDRAMRST# AV15 SM_RCOMP2 BPM#6 J61 XDP_BPM7 1 T0419
5 CPUDRAMRST# SM_DRAMRST# BPM#7
DDR_PG_CTRL_S AV61
SM_PG_CNTL1
R2
XDP_TCK 51Ohm 1 2 R0405
haswell_mcp
XDP_TRST# 51Ohm 1 2 R0406
@
R9

HASWELL_MCP_E
U0301A
C C

C54 C45 EDP_TXN0 45

48 DP1_TXN2 DDI1_TXN0 EDP_TXN0
C55 B46 EDP_TXP0 45
48 DP1_TXP2 DDI1_TXP0 EDP_TXP0
B58 A47 EDP_TXN1 45 eDP x 2
48 DP1_TXN1 DDI1_TXN1 EDP_TXN1
C58 B47 EDP_TXP1 45
48 DP1_TXP1 DDI1_TXP1 EDP_TXP1
DDI Port 1: HDMI B55

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48 DP1_TXN0 DDI1_TXN2
A55 C47
48 DP1_TXP0 DDI1_TXP2 EDP_TXN2
A57 C46
48 DP1_CLKN DDI1_TXN3 EDP_TXP2
B57 A49
48 DP1_CLKP DDI1_TXP3 EDP_TXN3
DDI EDP B49 0Ohm 1 2 R0411
EDP_TXP3 80 VR_HOT#
C51 @
46 DP2_TXN0 DDI2_TXN0
C50 A45
46 DP2_TXP0 DDI2_TXP0 EDP_AUXN EDP_AUXN 45 +VCCIOA_OUT
DDI Port 2: DP to CRT C53 B45
46 DP2_TXN1 DDI2_TXN1 EDP_AUXP EDP_AUXP 45
B54
46 DP2_TXP1 DDI2_TXP1
C49 D20 DP_COMP 24.9Ohm 1 1% 2 R0407 H_PROCHOT#
B50 DDI2_TXN2 EDP_RCOMP A43
A53 DDI2_TXP2 EDP_DISP_UTIL EDP_DISP_UTIL_S
B53 DDI2_TXN3
DDI2_TXP3 3 Q0401
eDP panel backlight control D
2N7002

DDI signals Mapping, check 502636 R1.1 Remove PWRLIMIT# 1 THRO_CPU

THRO_CPU 30
G
S 2
haswell_mcp

B B

1 R0425 2 68Ohm 1%
M_A_DIM0_ODT1 16
+3VS +LCD_VCC
1 R0426 2 68Ohm 1%
M_A_DIM0_ODT0 16

1 R0427 2 68Ohm 1%
M_B_DIM0_ODT0 17

2
2
+1.35V +5VSUS +1.35V R0418
1 R0428 2 68Ohm 1% C0402 220KOhm
M_B_DIM0_ODT1 17 0.1UF/25V 1%

1
U0402 @ @

1
09/21 Intel Stu suggestion: 66.5/1% --> 66.5/5% --> 68/5% 1 A 5
VCC
2

Q0402
C0401 R0416 EDP_DISP_UTIL_S 2 B Vcc=2~5.5
0.1UF/25V 220KOhm M_A_B_DIMM_ODT
2 S
D
1

3 4
3

GND EDP_DISP_UTIL 45
2N7002 Y
G

U0401
1

@
1

1
1 NC 5 R0417
VCC
DDR_PG_CTRL_S 2 A 2MOHM
3 GND Y 4 @
DDR_PG_CTRL 83
1

2
R0422 NOTE:VTT
1

10KOhm
@ 74AUP1G07GW R0415
06V030000021 2MOHM
2

A A
@
2

Title : CPU(1)_MSIC,DDI,eDP
BG1\HW 5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 4 of 104
5 4 3 2 1
 5 4 3 2 1

+1.35V +1.35V 4,6,16,18,57,83

HASWELL_MCP_E HASWELL_MCP_E
U0301C U0301D
16 M_A_D[63:0]
AH63 AU37 17 M_B_D[63:0]
M_A_D0
SA_DQ0 SA_CLK#0 M_A_DIM0_CLK#0 16
M_A_D1 AH62 AV37 M_B_D0 AY31 AM38
SA_DQ1 SA_CLK0 M_A_DIM0_CLK0 16 SB_DQ0 SB_CK#0 M_B_DIM0_CLK#0 17
M_A_D2 AK63 AW36 M_B_D1 AW31 AN38
AK62 SA_DQ2 SA_CLK#1 AY36 M_A_DIM0_CLK#1 16 AY29 SB_DQ1 SB_CK0 AK38 M_B_DIM0_CLK0 17
M_A_D3 M_B_D2
SA_DQ3 SA_CLK1 M_A_DIM0_CLK1 16 SB_DQ2 SB_CK#1 M_B_DIM0_CLK#1 17
M_A_D4 AH61 M_B_D3 AW29 AL38
AH60 SA_DQ4 AU43 AV31 SB_DQ3 SB_CK1 M_B_DIM0_CLK1 17
M_A_D5 M_B_D4
SA_DQ5 SA_CKE0 M_A_DIM0_CKE0 16 SB_DQ4
M_A_D6 AK61 AW43 M_B_D5 AU31 AY49
D SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 16 SB_DQ5 SB_CKE0 M_B_DIM0_CKE0 17 D
M_A_D7 AK60 AY42 M_B_D6 AV29 AU50
AM63 SA_DQ7 SA_CKE2 AY43 AU29 SB_DQ6 SB_CKE1 AW49 M_B_DIM0_CKE1 17
M_A_D8 M_B_D7
M_A_D9 AM62 SA_DQ8 SA_CKE3 M_B_D8 AY27 SB_DQ7 SB_CKE2 AV50
M_A_D10 AP63 SA_DQ9 AP33 M_B_D9 AW27 SB_DQ8 SB_CKE3
SA_DQ10 SA_CS#0 M_A_DIM0_CS#0 16 SB_DQ9
M_A_D11 AP62 AR32 M_B_D10 AY25 AM32
SA_DQ11 SA_CS#1 M_A_DIM0_CS#1 16 SB_DQ10 SB_CS#0 M_B_DIM0_CS#0 17
M_A_D12 AM61 M_B_D11 AW25 AK32
AM60 SA_DQ12 AP32 AV27 SB_DQ11 SB_CS#1 M_B_DIM0_CS#1 17
M_A_D13 M_B_D12
M_A_D14 AP61 SA_DQ13 SA_ODT0 M_B_D13 AU27 SB_DQ12 AL32
M_A_D15 AP60 SA_DQ14 AY34 M_B_D14 AV25 SB_DQ13 SB_ODT0
SA_DQ15 SA_RAS# M_A_RAS# 16 SB_DQ14
M_A_D16 AP58 AW34 M_B_D15 AU25 AM35
SA_DQ16 SA_WE# M_A_WE# 16 SB_DQ15 SB_RAS# M_B_RAS# 17
M_A_D17 AR58 AU34 M_B_D16 AM29 AK35
AM57 SA_DQ17 SA_CAS# M_A_CAS# 16 AK29 SB_DQ16 SB_WE# AM33 M_B_WE# 17
M_A_D18 M_B_D17
SA_DQ18 SB_DQ17 SB_CAS# M_B_CAS# 17
M_A_D19 AK57 AU35 M_B_D18 AL28
AL58 SA_DQ19 SA_BA0 AV35 M_A_BS0 16 AK28 SB_DQ18 AL35
M_A_D20 M_B_D19
SA_DQ20 SA_BA1 M_A_BS1 16 SB_DQ19 SB_BA0 M_B_BS0 17
M_A_D21 AK58 AY41 M_B_D20 AR29 AM36
SA_DQ21 SA_BA2 M_A_BS2 16 SB_DQ20 SB_BA1 M_B_BS1 17
M_A_D22 AR57 M_B_D21 AN29 AU49
AN57 SA_DQ22 AU36 M_A_A[15:0] 16 AR28 SB_DQ21 SB_BA2 M_B_BS2 17
M_A_D23 M_A_A0 M_B_D22
SA_DQ23 SA_MA0 SB_DQ22 M_B_A[15:0] 17
M_A_D24 AP55 AY37 M_A_A1 M_B_D23 AP28 AP40 M_B_A0
M_A_D25 AR55 SA_DQ24 SA_MA1 AR38 M_A_A2 M_B_D24 AN26 SB_DQ23 SB_MA0 AR40 M_B_A1
M_A_D26 AM54 SA_DQ25 SA_MA2 AP36 M_A_A3 M_B_D25 AR26 SB_DQ24 SB_MA1 AP42 M_B_A2
M_A_D27 AK54 SA_DQ26 SA_MA3 AU39 M_A_A4 M_B_D26 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
M_A_D28 AL55 SA_DQ27 SA_MA4 AR36 M_A_A5 M_B_D27 AP25 SB_DQ26 SB_MA3 AR45 M_B_A4
M_A_D29 AK55 SA_DQ28 SA_MA5 AV40 M_A_A6 M_B_D28 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
M_A_D30 AR54 SA_DQ29 SA_MA6 AW39 M_A_A7 M_B_D29 AM26 SB_DQ28 SB_MA5 AW46 M_B_A6
M_A_D31 AN54 SA_DQ30 SA_MA7 AY39 M_A_A8 M_B_D30 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
M_A_D32 AY58 SA_DQ31 SA_MA8 AU40 M_A_A9 M_B_D31 AL25 SB_DQ30 SB_MA7 AY47 M_B_A8
M_A_D33 AW58 SA_DQ32 SA_MA9 AP35 M_A_A10 M_B_D32 AY23 SB_DQ31 DDR CHANNEL B SB_MA8 AU46 M_B_A9
M_A_D34 AY56 SA_DQ33 SA_MA10 AW41 M_A_A11 M_B_D33 AW23 SB_DQ32 SB_MA9 AK36 M_B_A10
M_A_D35 AW56 SA_DQ34 SA_MA11 AU41 M_A_A12 M_B_D34 AY21 SB_DQ33 SB_MA10 AV47 M_B_A11
M_A_D36 AV58 SA_DQ35 DDR CHANNEL A SA_MA12 AR35 M_A_A13 M_B_D35 AW21 SB_DQ34 SB_MA11 AU47 M_B_A12
M_A_D37 AU58 SA_DQ36 SA_MA13 AV42 M_A_A14 M_B_D36 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
M_A_D38 AV56 SA_DQ37 SA_MA14 AU42 M_A_A15 M_B_D37 AU23 SB_DQ36 SB_MA13 AR46 M_B_A14
M_A_D39 AU56 SA_DQ38 SA_MA15 M_B_D38 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
AY54 SA_DQ39 AJ61 M_A_DQS#[7:0] 16 AU21 SB_DQ38 SB_MA15
M_A_D40 M_A_DQS#0 M_B_D39
SA_DQ40 SA_DQSN0 SB_DQ39 M_B_DQS#[7:0] 17
M_A_D41 AW54 AN62 M_A_DQS#1 M_B_D40 AY19 AW30 M_B_DQS#0
M_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 M_A_DQS#2 M_B_D41 AW19 SB_DQ40 SB_DQSN0 AV26 M_B_DQS#1
M_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 M_A_DQS#3 M_B_D42 AY17 SB_DQ41 SB_DQSN1 AN28 M_B_DQS#2
M_A_D44 AV54 SA_DQ43 SA_DQSN3 AV57 M_A_DQS#4 M_B_D43 AW17 SB_DQ42 SB_DQSN2 AN25 M_B_DQS#3
C C
M_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 M_A_DQS#5 M_B_D44 AV19 SB_DQ43 SB_DQSN3 AW22 M_B_DQS#4
M_A_D46 AV52 SA_DQ45 SA_DQSN5 AL43 M_A_DQS#6 M_B_D45 AU19 SB_DQ44 SB_DQSN4 AV18 M_B_DQS#5
M_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 M_A_DQS#7 M_B_D46 AV17 SB_DQ45 SB_DQSN5 AN21 M_B_DQS#6
M_A_D48 AK40 SA_DQ47 SA_DQSN7 M_B_D47 AU17 SB_DQ46 SB_DQSN6 AN18 M_B_DQS#7
SA_DQ48 M_A_DQS[7:0] 16 SB_DQ47 SB_DQSN7
M_A_D49 AK42 AJ62 M_A_DQS0 M_B_D48 AR21
AM43 SA_DQ49 SA_DQSP0 AN61 AR22 SB_DQ48 AV30 M_B_DQS[7:0] 17
M_A_D50 M_A_DQS1 M_B_D49 M_B_DQS0
M_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 M_A_DQS2 M_B_D50 AL21 SB_DQ49 SB_DQSP0 AW26 M_B_DQS1
M_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 M_A_DQS3 M_B_D51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQS2
M_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57 M_A_DQS4 M_B_D52 AN22 SB_DQ51 SB_DQSP2 AM25 M_B_DQS3
M_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53 M_A_DQS5 M_B_D53 AP21 SB_DQ52 SB_DQSP3 AV22 M_B_DQS4

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M_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 M_A_DQS6 M_B_D54 AK21 SB_DQ53 SB_DQSP4 AW18 M_B_DQS5
M_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 M_A_DQS7 M_B_D55 AK22 SB_DQ54 SB_DQSP5 AM21 M_B_DQS6
M_A_D57 AK46 SA_DQ56 SA_DQSP7 M_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQS7
M_A_D58 AM49 SA_DQ57 AP49 M_B_D57 AR20 SB_DQ56 SB_DQSP7
SA_DQ58 SM_VREF_CA DIMM_VREF_CA 18 SB_DQ57
M_A_D59 AK49 AR51 M_B_D58 AK18
AM48 SA_DQ59 SM_VREF_DQ0 AP51 DIMM0_VREF_DQ 18 AL18 SB_DQ58
M_A_D60 M_B_D59
SA_DQ60 SM_VREF_DQ1 DIMM1_VREF_DQ 18 SB_DQ59
M_A_D61 AK48 M_B_D60 AK20
M_A_D62 AM51 SA_DQ61 M_B_D61 AM20 SB_DQ60
M_A_D63 AK51 SA_DQ62 M_B_D62 AR18 SB_DQ61
SA_DQ63 M_B_D63 AP18 SB_DQ62
SB_DQ63

haswell_mcp haswell_mcp

B +1.35V B

1
R0501 R0501 INTEL use 470ohm 5% but
464Ohm PEGA VX P/N only find 464ohm 1 %
1%

2
SP0501 1 2
4 CPUDRAMRST# DDR3_DRAMRST# 16,17
R0402

A A

Title : CPU(2)_DDR3
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 5 of 104
5 4 3 2 1
 5 4 3 2 1

+1.35V +1.35V 4,5,16,18,57,83

+VCORE +VCORE 57,80

+VCORE
HASWELL_MCP_E
U0301L
32A
L59 C36
J58 RSVD4 VCC62 C40
RSVD5 VCC63 C44
+1.35V
4.2A AH26 VCC64 C48
AJ31 VDDQ3 VCC60 C52
AJ33 VDDQ2 VCC61 C56
D VDDQ6 VCC57 D

1
AJ37 E23

330UF/6.3V

330UF/6.3V
+ + AN33 VDDQ5 VCC58 E25

CE0603

CE0602
C0606 C0607 C0603 C0604 C0605 C0608 C0609 C0610 C0601 C0602
2.2UF/10V 2.2UF/10V 2.2UF/10V 2.2UF/10V AP43 VDDQ4 VCC59 E27
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
@ @ AR48 VDDQ8 VCC55 E29

2
AY35 VDDQ7 VCC56 E31
AY40 VDDQ10 VCC52 E33
AY44 VDDQ9 VCC53 E35
AY50 VDDQ1 VCC54 E37
Put on Top side VDDQ11 VCC50 E39
+VCCIOA_OUT +VCCIO_OUT F59 VCC51 E41
+1.05VS_VCCST +VCORE VCCIN VCC47
N58 E43
AC58 RSVD7 VCC48 E45
RSVD6 VCC49 E47
+1.05VS_VCCST +1.05VS_VCCST VCCSENSE E63 VCC45 E49
Follow Intel Doc. No. 503160 SVID ALERT/CLK: VCC_SENSE VCC46

2
+1.05VS_VCCST AB23 E51
Intel recommendation Intel 503694 page29 RSVD8 VCC42
C0646 use 1% PU 0Ohm 1 2 R0608 +VCCIO_OUT_R A59 E53
VCCIO_OUT VCC43

1
0.1UF/25V 0Ohm 1 2 R0609 +VCCIOA_OUT_R E20 E55
R1.0 on 9/5

1
R0604 R0605 @ R0603 R0602 AD23 VCCIOA_OUT VCC44 E57
130Ohm 130Ohm 56Ohm 75Ohm 4.7UF/6.3V 2 1 C0642 AA23 RSVD9 VCC41 F24
1% 1% @ AE59 RSVD11 VCC40 F28
RSVD10 VCC37 F32

2
43Ohm R0601 H_CPU_SVIDALRT# L62 VCC38 F36
80 VR_SVID_ALERT# VIDALERT# VCC39
0Ohm 1 2 R0610 H_CPU_SVIDCLK N63 F40
80 VR_SVID_CLK VIDSCLK VCC36
0Ohm 1 2 R0612 H_CPU_SVIDDAT L63 F44
80 VR_SVID_DATA VIDSOUT VCC35
+1.05VS_PWRGD_S 0Ohm 1 2 R0615 +1.05VS_PWRGD_S_R B59 F48
Placement note: CPU_VRON 0Ohm 1 2 R0616 CPU_VRON_R F60 VCCST_PWRGD VCC34 F52
80 CPU_VRON VR_EN VCC32
1. R0601 close to CPU CPU_VR_READY 0Ohm 1 2 R0617 CPU_VR_READY_R C59 F56
2. R0602 close to CPU +1.05VS_VCCST VR_READY HSW ULT POWER VCC33 G23
3. R0603 close to VR D63 VCC31 G25
4. R0605 close to CPU 150Ohm 2 1 R0622 CPU_PWR_DEBUG H59 VSS1 VCC30 G27
5. R0604 close to VR PWR_DEBUG VCC29
6. R0606 close to CPU P62 G29
T0603 1 RSVD_69 P60 VSS2 VCC27 G31
T0604 1 RSVD_70 P61 RSVD_TP1 VCC28 G33
T0605 1 RSVD_71 N59 RSVD_TP2 VCC26 G35
T0606 1 RSVD_72 N61 RSVD_TP3 VCC25 G37
T59 RSVD_TP4 VCC24 G39
AD60 RSVD54 VCC22 G41
C RSVD38 VCC23 C
AD59 G43
+3VS +1.05VS_VCCST AA59 RSVD37 VCC21 G45
+3VS AE60 RSVD34 VCC19 G47
AC59 RSVD39 VCC20 G49
AG58 RSVD36 VCC16 G51
RSVD40 VCC17
1

1
U59 G53
RSVD55 VCC18

2
10KOhm R0620 +1.05VS_VCCST V59 G55
R0621 C0647 10KOhm RSVD56 VCC14 G57
@ 0.1UF/25V 1.29A AC22 VCC15 H23
U0602

1
AE22 VCCST3 VCC12 J23

https://vinafix.com
2

2
VCCST2 VCC13

1
AE23 K23
1 NC 5 C0643 C0644 VCCST1 VCC65 K57
VCC VCC11
+1.05VS_PWRGD 2 A 22UF/6.3V 1UF/6.3V AB57 L22
82,92 +1.05VS_PWRGD +VCORE

2
3 Y 4 +1.05VS_PWRGD_S @ AD57 VCC67 VCC10 M23
GND VCC66 VCC7
AG57 M57
C24 VCC4 VCC8 P57
C28 VCC1 VCC9 U57
74AUP1G07GW C32 VCC3 VCC6 W57
06V030000021 VCC2 VCC5

haswell_mcp

+VCORE

Put on Top side

Vinafix.com
1

+VCORE +1.05VS +1.05VS_VCCST

330UF/6.3V

+
CE0601

1.29A
@ SP0602 2 1 R0805

2
2

R0606
100Ohm
1% +VCCIO_OUT
B 0.67A B

1
0Ohm 1 2 R0613
80 VCCSENSE
@ vx_r0805_h24_small
1

C0612 C0613 C0614 C0615 C0616 C0617 C0618 C0619 C0620 C0621 C0622
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2

@ @ @ @ @ @ @ @

+3VS
Put on Top side
CPU_VRON
1

2
C0623 C0624 C0625 C0626 C0627 C0628 C0629 C0630 C0631 C0632
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V C0645 R0618
2

@ @ @ 0.1UF/25V 10KOhm
U0601

1
1 NC 5
VCC
2 A
30,80,92 VRM_PWRGD 3 4
Y CPU_VR_READY
GND
1

C0633 C0634 C0635 C0636 C0637 C0638 C0639 C0640 C0641

22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 74AUP1G07GW
2

@ @ @ 06V030000021

Decoupling guide from Intel (EE)

VDDQ(+1.2V) 2.2uF * 4pcs (stuff)
10uF * 6pcs (stuff)
330uF * 2pcs (non stuff)
A A

Decoupling guide from Intel ( EE)

+VCORE 22uF * 14pcs (non stuff)
22uF * 16pcs (stuff)
330uF * 1pcs (non stuff)

Title : CPU(4)_PWR
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 6 of 104
5 4 3 2 1
 5 4 3 2 1

U0301N HASWELL_MCP_E
HASWELL_MCP_E
U0301O
A11 AJ35 U0301P HASWELL_MCP_E
A14 VSS128 VSS16 AJ39 AP22 AV59 H17
A18 VSS127 VSS14 AJ41 AP23 VSS148 VSS147 AV8 D33 VSS321 H57
A24 VSS126 VSS15 AJ43 AP26 VSS252 VSS146 AW16 D34 VSS277 VSS279 J10
A28 VSS125 VSS73 AJ45 AP29 VSS251 VSS145 AW24 D35 VSS307 VSS276 J22
A32 VSS129 VSS72 AJ47 AP3 VSS250 VSS202 AW33 D37 VSS308 VSS322 J59
A36 VSS124 VSS17 AJ50 AP31 VSS254 VSS201 AW35 D38 VSS309 VSS323 J63
D A40 VSS123 VSS71 AJ52 AP38 VSS249 VSS200 AW37 D39 VSS310 VSS324 K1 D
A44 VSS122 VSS70 AJ54 AP39 VSS253 VSS199 AW4 D41 VSS311 VSS325 K12
A48 VSS121 VSS18 AJ56 AP48 VSS248 VSS198 AW40 D42 VSS280 VSS326 L13
A52 VSS120 VSS69 AJ58 AP52 VSS247 VSS144 AW42 D43 VSS281 VSS327 L15
A56 VSS119 VSS68 AJ60 AP54 VSS246 VSS197 AW44 D45 VSS306 VSS328 L17
AA1 VSS118 VSS67 AJ63 AP57 VSS245 VSS196 AW47 D46 VSS305 VSS329 L18
AA58 VSS117 VSS66 AK23 AR11 VSS244 VSS195 AW50 D47 VSS304 VSS330 L20
AB10 VSS116 VSS65 AK3 AR15 VSS262 VSS194 AW51 D49 VSS303 VSS331 L58
AB20 VSS115 VSS64 AK52 AR17 VSS243 VSS193 AW59 D5 VSS268 VSS332 L61
AB22 VSS114 VSS63 AL10 AR23 VSS242 VSS192 AW60 D50 VSS302 VSS333 L7
AB7 VSS113 VSS62 AL13 AR31 VSS241 VSS143 AY11 D51 VSS301 VSS278 M22
AC61 VSS112 VSS61 AL17 AR33 VSS240 VSS191 AY16 D53 VSS300 VSS334 N10
AD21 VSS111 VSS60 AL20 AR39 VSS239 VSS190 AY18 D54 VSS299 VSS335 N3
AD3 VSS110 VSS59 AL22 AR43 VSS238 VSS189 AY22 D55 VSS298 VSS336 P59
AD63 VSS109 VSS58 AL23 AR49 VSS237 VSS188 AY24 D57 VSS297 VSS337 P63
AE10 VSS108 VSS57 AL26 AR5 VSS236 VSS187 AY26 D59 VSS296 VSS338 R10
AE5 VSS107 VSS56 AL29 AR52 VSS235 VSS186 AY30 D62 VSS352 VSS339 R22
AE58 VSS106 VSS55 AL31 AT13 VSS234 VSS185 AY33 D8 VSS295 VSS341 R8
AF11 VSS105 VSS54 AL33 AT35 VSS233 VSS184 AY4 E11 VSS294 VSS340 T1
AF12 VSS104 VSS53 AL36 AT37 VSS232 VSS183 AY51 E17 VSS293 VSS342 T58
AF14 VSS103 VSS52 AL39 AT40 VSS231 VSS182 AY53 F20 VSS315 VSS343 U20
AF15 VSS102 VSS51 AL40 AT42 VSS230 VSS181 AY57 F26 VSS292 VSS344 U22
AF17 VSS19 VSS50 AL45 AT43 VSS229 VSS180 AY59 F30 VSS291 VSS346 U61
AF18 VSS101 VSS49 AL46 AT46 VSS228 VSS179 AY6 F34 VSS314 VSS345 U9
AG1 VSS20 VSS48 AL51 AT49 VSS227 VSS178 B20 F38 VSS316 VSS347 V10
AG11 VSS100 VSS130 AL52 AT61 VSS226 VSS177 B24 F42 VSS320 VSS348 V3
C AG21 VSS99 VSS47 AL54 AT62 VSS225 VSS176 B26 F46 VSS317 VSS269 V7 C
AG23 VSS98 VSS46 AL57 AT63 VSS224 VSS175 B28 F50 VSS290 VSS270 W20
AG60 VSS97 VSS45 AL60 AU1 VSS223 VSS174 B32 F54 VSS319 VSS271 W22
AG61 VSS96 VSS44 AL61 AU16 VSS222 VSS173 B36 F58 VSS289 VSS272 Y10
AG62 VSS95 VSS43 AM1 AU18 VSS221 VSS172 B4 F61 VSS288 VSS349 Y59
AG63 VSS94 VSS131 AM17 AU20 VSS220 VSS171 B40 G18 VSS287 VSS350 Y63
AH17 VSS93 VSS42 AM23 AU22 VSS219 VSS170 B44 G22 VSS286 VSS351
AH19 VSS92 VSS41 AM31 AU24 VSS218 VSS169 B48 G3 VSS313
VSS91 VSS40 VSS217 VSS168 VSS285

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AH20 AM52 AU26 B52 G5 V58 Placement note:
AH22 VSS90 VSS39 AN17 AU28 VSS216 VSS167 B56 G6 VSS284 VSS275 AH46 1. R0801 close to CPU
AH24 VSS89 VSS38 AN23 AU30 VSS140 VSS166 B60 G8 VSS312 VSS274 V23
AH28 VSS88 VSS132 AN31 AU33 VSS215 VSS165 C11 H13 VSS283 VSS273 E62
AH30 VSS87 VSS37 AN32 AU51 VSS261 VSS142 C14 VSS282 VSS_SENSE AH16 VSSSENSE 80
AH32 VSS86 VSS36 AN35 AU53 VSS214 VSS141 C18 VSS318
VSS85 VSS35 VSS213 VSS164

2
AH34 AN36 AU55 C20 haswell_mcp
AH36 VSS12 VSS34 AN39 AU57 VSS260 VSS163 C25 R0802
AH38 VSS13 VSS33 AN40 AU59 VSS212 VSS162 C27 100Ohm
AH40 VSS136 VSS133 AN42 AV14 VSS211 VSS161 C38 1%
AH42 VSS84 VSS32 AN43 AV16 VSS210 VSS160 C39

1
AH44 VSS83 VSS31 AN45 AV20 VSS267 VSS159 C57
AH49 VSS139 VSS30 AN46 AV24 VSS263 VSS158 D12
AH51 VSS138 VSS29 AN48 AV28 VSS266 VSS157 D14
AH53 VSS137 VSS28 AN49 AV33 VSS264 VSS156 D18
AH55 VSS82 VSS134 AN51 AV34 VSS265 VSS155 D2
AH57 VSS81 VSS27 AN52 AV36 VSS149 VSS154 D21
AJ13 VSS80 VSS26 AN60 AV39 VSS209 VSS153 D23
AJ14 VSS79 VSS25 AN63 AV41 VSS208 VSS256 D25
B B
AJ23 VSS78 VSS24 AN7 AV43 VSS207 VSS257 D26
AJ25 VSS77 VSS23 AP10 AV46 VSS206 VSS259 D27
AJ27 VSS76 VSS135 AP17 AV49 VSS205 VSS258 D29
AJ29 VSS75 VSS22 AP20 AV51 VSS204 VSS152 D30
VSS74 VSS21 AV55 VSS203 VSS151 D31
VSS255 VSS150
haswell_mcp

haswell_mcp

A A

Title : CPU(3)_CFG,RSVD,GND
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 8 of 104
5 4 3 2 1
 5 4 3 2 1

+VCORE +VCORE 6,57,80

CFG strapping information: The CFG signals have a default value of '1'
U0301S HASWELL_MCP_E

CFG[3:0]: Reserved configuration lane. A test point may be placed on the board for these lanes.
CFG[20:0] - INT. PU
D D
CFG[4]: eDP enable T0966 1 CFG0 AC60 AV63 RSVD_TP5 1 T0925
T0967 1 CFG1 AC62 CFG0 RSVD_TP5 AU63 RSVD_TP11 1 T0926
T0903 1 CFG2 AC63 CFG1 RSVD_TP11
-1 = Disabled 1 AA63 CFG2
T0904 CFG3
-0 = Enabled R0903 2 1KOhm 1 CFG4 AA60 CFG3 C63 RSVD_TP10 1 T0927
T0905 1 CFG5 Y62 CFG4 RSVD_TP10 C62 RSVD_TP9 1 T0928
T0907 1 CFG6 Y61 CFG5 RSVD_TP9 B43 EDP_SPARE 1 T0929
T0906 1 CFG7 Y60 CFG6 EDP_SPARE
CFG[19:5]: Reserved configuration lanes. 1 V62 CFG7 A51 1
CFG[4]: eDP enable T0968 CFG8 RSVD_TP6 T0930
A test point may be placed on the board for these lands. T0969 1 CFG9 V61 CFG8 RSVD_TP6 B51 RSVD_TP7 1 T0931
T0970 1 CFG10 V60 CFG9 RSVD_TP7
-1 = Disabled CFG10
T0910 1 CFG11 U60 L60 RSVD_TP8 1 T0932
-0 = Enabled T0912 1 CFG12 T63 CFG11 RSVD_TP8
T0913 1 CFG13 T62 CFG12 N60
T0915 1 CFG14 T61 CFG13 RESERVED RSVD32
T0914 1 CFG15 T60 CFG14 W23
CFG15 RSVD30 Y22
T0916 1 CFG16 AA62 RSVD31 AY15 PROC_OPI_COMP
T0917 1 CFG18 U63 CFG16 PROC_OPI_COMP
CFG18

1
T0918 1 CFG17 AA61 AV62
T0919 1 CFG19 U62 CFG17 RSVD28 D58 R0911
CFG19 RSVD29 49.9Ohm
49.9Ohm 2 1 R0910 CFG_RCOMP V63 P22 1%
CFG_RCOMP VSS353 N21

2
A5 VSS354
RSVD33 P20
T0921 1 TP9 E1 RSVD52 R20
C TP9 RSVD53 C
T0922 1 TP10 D1
T0923 1 TP11 J20 TP10
T0924 1 TP12 H18 TP11
8.2KOhm 2 1 R0908 TD_IREF B12 TP12
TD_IREF

haswell_mcp

HASWELL_MCP_E
U0301Q

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4 1 T0942
T0940 1 TP_DC_TEST_AY60 AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4
DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60 1 T0943
DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A61 DC_TEST_A61_B61
DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61

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T0941 1 TP_DC_TEST_B2 B2 A62 TP_DC_TEST_A62 1 T0945
DC_TEST_A3_B3 B3 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 AV1 TP_DC_TEST_AV1 1 T0946
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 TP_DC_TEST_AW1 1 T0947
DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61
B DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 B
C2 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW63 1 T0944
DAISY_CHAIN_NCTF_AW63
haswell_mcp

HASWELL_MCP_E
U0301R

N23
RSVD20 R23
RSVD21 T23
AT2 RSVD19
RSVD12 U10
AU44 RSVD26
AV44 RSVD13
D15 RSVD14
RSVD15 AL1
RSVD25 AM11
RSVD24 AP7
F22 RSVD27
RSVD16 AU10
H22 RSVD23
RSVD17 AU15
J21 RSVD22
RSVD18 AW14
RSVD44 AY14
RSVD45

A haswell_mcp A

TitleCPU(3)_CFG,RSVD,GND
:
Vinafix.com BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 9 of 104
5 4 3 2 1
 5 4 3 2 1

+1.35V +1.35V 4,5,6,18,57,83

+1.35V_DDR3 +0.675VS
+1.35V_DDR3 +1.35V_DDR3 17 +1.35V +1.35V_DDR3 +1.35V_DDR3
Layout Note: Place these caps near SO DIMM 0
+0.675VS +0.675VS 17,57,83

1
+3VS JP1601
+3VS 4,6,17,20,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92 +
1 2 CE1603
1 2

1
+V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 18 220UF/2V
3mm_open_5mil_m1m2 @ C1609 C1610 C1611 C1612 C1613 C1620 C1616 C1617 C1618 C1619

2
+V_VREF_DQ_DIMM0 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
+V_VREF_DQ_DIMM0 18

2
D @ @ @ @ @ D

H:4mm REV type +1.35V_DDR3

5 M_A_A[15:0] M_A_D[63:0] 5 +1.35V_DDR3
J1601A J1601B
M_A_A0 98 5 M_A_D0 75 76
M_A_A1 97 A0 DQ0 7 M_A_D7 81 VDD1 VDD2 82
M_A_A2 96 A1 DQ1 15 M_A_D2 87 VDD3 VDD4 88
A2 DQ2 VDD5 VDD6

2
M_A_A3 95 17 M_A_D6 93 94
M_A_A4 92 A3 DQ3 4 M_A_D1 C1605 C1606 99 VDD7 VDD8 100 C1607 C1608
M_A_A5 91 A4 DQ4 6 M_A_D4
0:0~7 0.1UF/25V 0.1UF/25V 105 VDD9 VDD10 106 0.1UF/25V 0.1UF/25V

1
M_A_A6 90 A5 DQ5 16 M_A_D3 111 VDD11 VDD12 112
M_A_A7 86 A6 0 DQ6 18 M_A_D5 117 VDD13 VDD14 118
M_A_A8 89 A7 DQ7 21 M_A_D8 123 VDD15 VDD16 124
M_A_A9 85 A8 DQ8 23 M_A_D9
Layout Note: Place these caps near SO DIMM 0 VDD17 VDD18
M_A_A10 107 A9 DQ9 33 M_A_D13
M_A_A11 84 A10/AP DQ10 35 M_A_D14 2 3
M_A_A12 83 A11 DQ11 22 M_A_D10
1:8~15 8 VSS1 VSS2 9
M_A_A13 119 A12/BC# DQ12 24 M_A_D12 13 VSS3 VSS4 14
M_A_A14 80 A13 DQ13 34 M_A_D11 19 VSS5 VSS6 20
C M_A_A15 78 A14 1 DQ14 36 M_A_D15 25 VSS7 VSS8 26 C
A15 DQ15 39 M_A_D18 31 VSS9 VSS10 32
DQ16 41 M_A_D19 37 VSS11 VSS12 38
102 DQ17 51 M_A_D17 43 VSS13 VSS14 44
5 M_A_DIM0_CLK1 CK1 DQ18 VSS15 VSS16
104 53 M_A_D16 48 49
5 M_A_DIM0_CLK#1
101 CK1# DQ19 40 M_A_D20
2:16~23 54 VSS17 VSS18 55
5 M_A_DIM0_CLK0 CK0 DQ20 VSS19 VSS20
103 42 M_A_D21 60 61
5 M_A_DIM0_CLK#0 CK0# DQ21 VSS21 VSS22
50 M_A_D22 65 66
121
2 DQ22 52 M_A_D23 71 VSS23 VSS24 72
5 M_A_DIM0_CS#1 S1# DQ23 VSS25 VSS26
114 57 M_A_D24 127 128
5 M_A_DIM0_CS#0 S0# DQ24 VSS27 VSS28
59 M_A_D30 133 134
120 DQ25 67 M_A_D31 138 VSS29 VSS30 139
4 M_A_DIM0_ODT1
116 ODT1 DQ26 69 M_A_D26
3:24~31 144 VSS31 VSS32 145
4 M_A_DIM0_ODT0 ODT0 DQ27 VSS33 VSS34
56 M_A_D29 150 151
113 DQ28 58 M_A_D25 155 VSS35 VSS36 156
5 M_A_WE# WE# DQ29 VSS37 VSS38
110 68 M_A_D27 161 162
5 M_A_RAS#
115 RAS# 3 DQ30 70 M_A_D28 167 VSS39 VSS40 168
5 M_A_CAS# CAS# DQ31 VSS41 VSS42
129 M_A_D33 172 173
79 DQ32 131 M_A_D38 178 VSS43 VSS44 179
5 M_A_BS2 BA2 DQ33 VSS45 VSS46
108 141 M_A_D39 184 185
5 M_A_BS1 BA1 DQ34 VSS47 VSS48
109 143 M_A_D37 189 190
5 M_A_BS0 BA0 DQ35 130 M_A_D36
4:32~39 195 VSS49 VSS50 196
74 DQ36 132 M_A_D32 VSS51 VSS52
5 M_A_DIM0_CKE1 CKE1 DQ37

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73 140 M_A_D34 207
5 M_A_DIM0_CKE0 CKE0 4 DQ38 142 M_A_D35 T1601 1 PM_EXTTS#0_DIM_A 198 GND1 208
201 DQ39 147 M_A_D41 125 EVENT# GND2
197 SA1 DQ40 149 M_A_D45 TEST 205
SMBus Slave Address: A0H Reserve
SA0 DQ41 157 M_A_D40 77 NP_NC1 206
B DQ42 NC1 NP_NC2 B
159 M_A_D44 122
M_A_DQS6 188 DQ43 146 M_A_D42
5:40~47 NC2 203
DQS7 DQ44 +V_VREF_CA_DIMM0 VTT1 +0.675VS +3VS
M_A_DQS#6 186 148 M_A_D43 204
5 M_A_DQS[7:0] DQS#7 DQ45 VTT2
M_A_DQS7 171 158 M_A_D47
swap
M_A_DQS#7 169 DQS6 5 DQ46 160 M_A_D46 126
5 M_A_DQS#[7:0] DQS#6 DQ47 VREFCA
M_A_DQS5 154 163 M_A_D58 1 199
M_A_DQS#5 152 DQS5 DQ48 165 M_A_D59 VREFDQ VDDSPD
DQS#5 DQ49

1
M_A_DQS4 137 175 M_A_D61 DDR3_DIMM_204P
M_A_DQS#4 135 DQS4 DQ50 177 M_A_D56 C1624 C1623 12V02GIRM001 C1615 C1614
M_A_DQS3 64 DQS#4 DQ51 164 M_A_D63 2.2UF/10V 0.1UF/25V 0.1UF/25V 2.2UF/10V
7:56~63

2
M_A_DQS#3 62 DQS3 DQ52 166 M_A_D62 @ @
M_A_DQS2 47 DQS#3 DQ53 174 M_A_D60
M_A_DQS#2 45 DQS2 6 DQ54 176 M_A_D57
M_A_DQS1 29 DQS#2 DQ55 181 M_A_D52 +V_VREF_DQ_DIMM0
M_A_DQS#1 27 DQS1 DQ56 183 M_A_D51
M_A_DQS0 12 DQS#1 DQ57 191 M_A_D48
M_A_DQS#0 10 DQS0 DQ58 193 M_A_D49
DQS#0 DQ59 6:48~55

2
180 M_A_D50
187 DQ60 182 M_A_D53 C1622 C1625
170 DM7 DQ61 192 M_A_D55 2.2UF/10V 0.1UF/25V
7

1
153 DM6 DQ62 194 M_A_D54 @
DM should connect to GND directly
Design Guide 1.0 P.88 (436735) 136 DM5 DQ63
63 DM4
46 DM3
28 DM2
11 DM1
DM0
A A
R0402 2 1 SP1601 SMB_CLK_S_CHA 202 30
17,28,31,45 SMB_CLK_S SCL RESET# DDR3_DRAMRST# 5,17
R0402 2 1 SP1602 SMB_DAT_S_CHA 200
17,28,31,45 SMB_DAT_S SDA
2

DDR3_DIMM_204P C1631
12V02GIRM001 0.1UF/25V
Title : DDR3L(1)_SO-DIMM0
1

@
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 16 of 104
5 4 3 2 1
 5 4 3 2 1

+1.35V_DDR3 +1.35V_DDR3 +0.675VS

+1.35V_DDR3 +1.35V_DDR3 16
Layout Note: Place these caps near SO DIMM 1

1
+0.675VS +0.675VS 16,57,83 +
CE1703
+3VS +3VS 4,6,16,20,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92 220UF/2V

1
@

2
+V_VREF_CA_DIMM1 C1709 C1710 C1711 C1712 C1713 C1726 C1716 C1717 C1718 C1719
+V_VREF_CA_DIMM1 18
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
+V_VREF_DQ_DIMM1 @ @ @ @ @
+V_VREF_DQ_DIMM1 18

D D

H:4mm STD
5 M_B_A[15:0] M_B_D[63:0] 5 +1.35V_DDR3 +1.35V_DDR3
J1701A
98 5 J1701B
M_B_A0 M_B_D4
M_B_A1 97 A0 DQ0 7 M_B_D1 75 76
M_B_A2 96 A1 DQ1 15 M_B_D2 81 VDD1 VDD2 82
A2 DQ2 VDD3 VDD4

2
M_B_A3 95 17 M_B_D3 87 88
M_B_A4 92 A3 DQ3 4 M_B_D0
0:0~7 C1705 C1706 93 VDD5 VDD6 94 C1707 C1708
M_B_A5 91 A4 DQ4 6 M_B_D5 0.1UF/25V 0.1UF/25V 99 VDD7 VDD8 100 0.1UF/25V 0.1UF/25V

1
M_B_A6 90 A5 DQ5 16 M_B_D6 105 VDD9 VDD10 106
M_B_A7 86 A6 0 DQ6 18 M_B_D7 111 VDD11 VDD12 112
M_B_A8 89 A7 DQ7 21 M_B_D13 117 VDD13 VDD14 118
M_B_A9 85 A8 DQ8 23 M_B_D9 123 VDD15 VDD16 124
M_B_A10 107 A9 DQ9 33 M_B_D15
Layout Note: Place these caps near SO DIMM 1 VDD17 VDD18
M_B_A11 84 A10/AP DQ10 35 M_B_D11
M_B_A12 83 A11 DQ11 22 M_B_D14
1:8~15 2 3
M_B_A13 119 A12/BC# DQ12 24 M_B_D10 8 VSS1 VSS2 9
M_B_A14 80 A13 DQ13 34 M_B_D12 13 VSS3 VSS4 14
M_B_A15 78 A14 1 DQ14 36 M_B_D8 19 VSS5 VSS6 20
C
A15 DQ15 39 M_B_D36 25 VSS7 VSS8 26 C
DQ16 41 M_B_D33 31 VSS9 VSS10 32
102 DQ17 51 M_B_D38 37 VSS11 VSS12 38
5 M_B_DIM0_CLK1 104 CK1 DQ18 53 M_B_D34 43 VSS13 VSS14 44
5 M_B_DIM0_CLK#1
101 CK1# DQ19 40 M_B_D37
4:32~39 48 VSS15 VSS16 49
5 M_B_DIM0_CLK0 CK0 DQ20 VSS17 VSS18
103 42 M_B_D32 54 55
5 M_B_DIM0_CLK#0 CK0# DQ21 50 M_B_D39 60 VSS19 VSS20 61
121
2 DQ22 52 M_B_D35 65 VSS21 VSS22 66
5 M_B_DIM0_CS#1 114 S1# DQ23 57 71 VSS23 VSS24 72
M_B_D44
5 M_B_DIM0_CS#0 S0# DQ24 59 127 VSS25 VSS26 128
M_B_D45
120 DQ25 67 M_B_D42 133 VSS27 VSS28 134
4 M_B_DIM0_ODT1 116 ODT1 DQ26 69 M_B_D43
5:40~47 138 VSS29 VSS30 139
4 M_B_DIM0_ODT0 ODT0 DQ27 VSS31 VSS32

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56 M_B_D41 144 145
113 DQ28 58 M_B_D40 150 VSS33 VSS34 151
5 M_B_WE# W E# DQ29 VSS35 VSS36
110 68 M_B_D47 155 156
5 M_B_RAS#
115 RAS# 3 DQ30 70 M_B_D46 161 VSS37 VSS38 162
5 M_B_CAS# CAS# DQ31 129 167 VSS39 VSS40 168
M_B_D29
79 DQ32 131 M_B_D28 172 VSS41 VSS42 173
5 M_B_BS2 108 BA2 DQ33 141 M_B_D26 178 VSS43 VSS44 179
5 M_B_BS1 BA1 DQ34 VSS45 VSS46
109 143 M_B_D31 184 185
5 M_B_BS0 BA0 DQ35 130 M_B_D25
3:24~31 189 VSS47 VSS48 190
74 DQ36 132 M_B_D24 195 VSS49 VSS50 196
5 M_B_DIM0_CKE1 CKE1 DQ37 VSS51 VSS52
73 140 M_B_D30
5 M_B_DIM0_CKE0 CKE0 4 DQ38 142 M_B_D27 207
10KOhm 1 2 R1705 201 DQ39 147 M_B_D60 T1701 1 PM_EXTTS#0_DIM_B 198 GND1 208
+3VS SA1 DQ40 EVENT# GND2
SMBus Slave Address: A4H 197 149 M_B_D56 125
SA0 DQ41 157 M_B_D62 TEST 205
Reserve
DQ42 159 M_B_D63 77 NP_NC1 206
M_B_DQS6 188 DQ43 146 M_B_D61
7:56~63 122 NC1 NP_NC2
M_B_DQS#6 186 DQS7 DQ44 148 M_B_D57 NC2 203
B
M_B_DQS2 171 DQS#7 5 DQ45 158 M_B_D59 +V_VREF_CA_DIMM1 VTT1 204
+0.675VS B
5 M_B_DQS[7:0] 169 DQS6 DQ46 160 VTT2 +3VS
M_B_DQS#2 M_B_D58
5 M_B_DQS#[7:0] DQS#6 DQ47
M_B_DQS7 154 163 M_B_D17 126
M_B_DQS#7 152 DQS5 DQ48 165 M_B_D16 1 VREFCA 199
swap 137 DQS#5 DQ49 175 VREFDQ VDDSPD
M_B_DQS3 M_B_D22
DQS4 DQ50 2:16~23

2
M_B_DQS#3 135 177 M_B_D23 C1724 DDR3_DIMM_204P
M_B_DQS5 64 DQS#4 DQ51 164 M_B_D20 2.2UF/10V C1723 12V02GISM001
DQS3 DQ52

1
M_B_DQS#5 62 166 M_B_D21 @ 0.1UF/25V C1714

1
M_B_DQS4 47 DQS#3 DQ53 174 M_B_D19 C1715 2.2UF/10V
M_B_DQS#4 45 DQS2 6 DQ54 176 M_B_D18 0.1UF/25V @

2
M_B_DQS1 29 DQS#2 DQ55 181 M_B_D55
M_B_DQS#1 27 DQS1 DQ56 183 M_B_D51 +V_VREF_DQ_DIMM1
M_B_DQS0 12 DQS#1 DQ57 191 M_B_D48
M_B_DQS#0 10 DQS0 DQ58 193 M_B_D53
DQS#0 DQ59 180 M_B_D49
6:48~55
DQ60

2
187 182 M_B_D52 C1722
170 DM7 DQ61 192 M_B_D50 2.2UF/10V C1725
153 DM6 7 DQ62 194 M_B_D54 @ 0.1UF/25V

1
136 DM5 DQ63
63 DM4
46 DM3
28 DM2
11 DM1
DM0
R0402 2 1 SP1701 SMB_CLK_S_CHB 202 30
16,28,31,45 SMB_CLK_S 2 1 SP1702 SCL RESET# DDR3_DRAMRST# 5,16
R0402 SMB_DAT_S_CHB 200
16,28,31,45 SMB_DAT_S SDA
2

C1731

A
DDR3_DIMM_204P
12V02GISM001
0.1UF/25V
@ Vinafix.com A
1

Title : DDR3(2)_SO-DIMM1
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 17 of 104
5 4 3 2 1
 5 4 3 2 1

+1.35V +1.35V 4,5,6,16,57,83

+V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM0 16

DDR3L Vref +V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 16

+V_VREF_DQ_DIMM1 +V_VREF_DQ_DIMM1 17

+V_VREF_CA_DIMM1 +V_VREF_CA_DIMM1 17

D D

M3: CPU driven VREF path is stuffed be default.

M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off

+V_VREF_DQ_DIMM0

M3
R1821 2 1 0Ohm
5 DIMM0_VREF_DQ

1
R1814
0Ohm +V_VREF_DQ_DIMM1
@

2
R1822 2 1 0Ohm
5 DIMM1_VREF_DQ
+1.35V

1
+1.35V

2
C1804 C1805
0.022UF/16V 0.022UF/16V R1815

2
1KOhm
R1810
1KOhm

1
1

1
R1818 R1819

1
C 24.9Ohm 24.9Ohm C

1
1% 1%
C1803 R1816

1
0.1UF/25V 1KOhm

1
C1802 R1809
0.1UF/25V 1KOhm

2
M1

https://vinafix.com +V_VREF_CA_DIMM0
Intel 0203
M3+M1: Default Recommendation

R0402 1 2 SP1801
M3 nb_r0402_short_25mil
+V_VREF_CA_DIMM1
B B
R1823 2 0Ohm 1 R0402 1 2 SP1802
5 DIMM_VREF_CA
nb_r0402_short_25mil
1

+1.35V
C1806
0.022UF/16V
1 2

R1807
R1820 1KOhm
24.9Ohm
1%
1
2

C1801 R1808
0.1UF/25V 1KOhm
1

M1

A A

Title : DDR3(3)_CA/DQ Voltage

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 18 of 104
5 4 3 2 1
 5 4 3 2 1

RTC battery
+RTCBAT +3VA +VCC_RTC
D2001
1
3
+VCC_RTC +VCC_RTC 22,26
1KOhm 2 1 R2001 +RTC_BAT 2

1
+3VA +3VA 26,30,33,37,57,60,65,81,88,93
0.8V/0.2mA C2003

1
J2001 1UF/6.3V +3VS +3VS 4,6,16,17,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

2
3
4
+3VSUS_ORG +3VSUS_ORG 21,22,24,25,26
GND
BATT_HOLDER_2P +12VS +12VS 28,31,46,48,57,91
2

12V20GBSM000
+1.5VS +1.5VS 26,48,53,57,84
GND M : 1220-001O000 +1.05VS_ASATA3PLL +1.05VS_ASATA3PLL 26
D
S : 1220-00F2000 D

+VCC_RTC
RTCRST# RC delay
should be 18ms~25ms
@
20KOhm 2 1 R2003 TPM Settings JRST2001 GND 15PF/50V 2 1 C2001 XTAL_32K_X1_C 2 1 SP2005
Clear ME RTC Shunt NB_R0402_20MIL_SMALL
Registers
1

1
1

1
C2004 JRST2001 Keep ME RTC Open
1

1UF/6.3V SGL_JUMP 2 R2002

Registers (Default)
2

@ X2001 10MOhm
2

3 U0301E HASWELL_MCP_E
32.768KHZ
2

2
XTAL_32K_X1 AW5

4
GND GND GND 15PF/50V 2 1 C2002 XTAL_32K_X2 AY5 RTCX1
1MOhm 2 1 R2005 SM_INTRUDER# AU6 RTCX2 J5
INTRUDER# SATA_RN0/PERN6_L3 SATA_RXN0 51
+VCC_RTC R2006 1 2 330KOhm PCH_INTVRMEN AV7 H5 SATA_RXP0 51
AV6 INTVRMEN SATA_RP0/PERP6_L3 B15
SRTC_RST#
SRTCRST#
RTC
SATA_TN0/PETN6_L3 SATA_TXN0 51 SATA HDD
20KOhm 2 1 R2004 RTC_RST# AU7 A15
SATA_TXP0 51
RTCRST# SATA_TP0/PETP6_L3
J8
SATA_RN1/PERN6_L2 SATA_RXN1 51
H8 SATA_RXP1 51 SATA ODD
1

SATA_RP1/PERP6_L2 A17
SATA_TN1/PETN6_L2 SATA_TXN1 51
1

C2005 JRST2002 B17

1

SATA_TP1/PETP6_L2 SATA_TXP1 51
1UF/6.3V SGL_JUMP
2

@ R2059 33Ohm HDA_BCLK_R AW8 J6

36 ACZ_BCLK_AUD
2

HDA_SYNC_R AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6

2

R2052 33Ohm HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14

36,37 ACZ_RST#_AUD HDA_RST#/I2S_MCLK# SATA_TN2/PETN6_L1
AY10 C15
36 ACZ_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
T2012 1 HDA_SDI1_DSP AU12 AUDIO
R2055 33Ohm HDA_SDO_R AU11 HDA_SDI1/I2S1_RXD F5
36 ACZ_SDOUT_AUD HDA_SDO/I2S0_TXD INT. PD SATA_RN3/PERN6_L0
GND GND T2001 1 HDA_DOCK_EN# AW10 E5
T2003 1 HDA_DOCK_RST# AV10 DOCKEN#/I2S1_TXD# SATA SATA_RP3/PERP6_L0 C17
T2013 1 I2S1_SCLK AY8 HDA_DOCK_RST#/I2S1_SFRM# SATA_TN3/PETN6_L0 D17
I2S1_SCLK SATA_TP3/PETP6_L0

V1 INT. PU EXT_SMI#
SATA0GP/GPIO34 EXT_SMI# 30,44
U1 INT. PU SATA_ODD_DA#
C SATA1GP/GPIO35 SATA_ODD_DA# 51
V6 INT. PU SATA_ODD_PRSNT# C
SATA2GP/GPIO36 SATA_ODD_PRSNT# 51
AC1 INT. PU PCB_ID0
SATA3GP/GPIO37 PCB_ID0 25
AU62
4 XDP_TRST# PCH_TRST#
Request by CSC T2018 1 PCH_JTAG_TCK AE62 A12 R2018 remove 1031 +1.05VS_ASATA3PLL
T2015 1 PCH_JTAG_TDI AD61 PCH_TCK SATA_IREF L11
for CMOS clear Recommend to remove by Intel
T2016 1 PCH_JTAG_TDO AE61 PCH_TDI RSVD50 K10
function T2017 1 PCH_JTAG_TMS AD62 PCH_TDO JTAG
RSVD48 C12 SATA_COMP R2007 1 1% 2 3.01KOHM
PCH_TMS SATA_RCOMP +1.05VS_ASATA3PLL
AL11 U3 SATALED# R2009 1 2 10KOhm
RSVD41 SATALED# +3VS
AC4
CMOS Settings JRST2002 T2019 1 PCH_JTAGX AE63 RSVD35
AV2 JTAGX
Clear CMOS Shunt RSVD1

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Open
Keep CMOS (Default) +5VS

reserved for leakage haswell_mcp +3VS

INTVRMEN: Integrated SUS 1.05V VRM Enables Q2010

1
G
Low: Enable External VRs 2N7002
High:Enable Internal VRs 33Ohm R2057 ACZ_SYNC_C HDA_SYNC_R

2 S

3
36 ACZ_SYNC_AUD

D
2

EXT_SMI# R2011 1 10KOhm 2

PCH_INTVRMEN 330KOhm 1 2 R2012 0Ohm 1 2 R2058
@ R2056 @
1MOhm SATA_ODD_DA# R2069 2 10KOhm 1
1

GND

GND

+3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG

/XDP /XDP /XDP /XDP

R2062 R2064 R2066 R2068
220Ohm 220Ohm 220Ohm 220Ohm
B B
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAGX
PCH_JTAG_TDO

/XDP /XDP /XDP /XDP

PCH_JTAG_TCK 51Ohm 1 2 R2022 R2061 R2063 R2065 R2067
/XDP 102OHM 102OHM 102OHM 102OHM
1% 1% 1% 1%

GND +3VS R2021 1 2 10KOhm SATA_ODD_PRSNT#

GND GND GND GND

+3VSUS_ORG

PCH_JTAG_TMS R2040 1 1% 2 220Ohm @

PCH_JTAG_TDO R2038 1 1% 2 220Ohm @
PCH_JTAG_TDI R2039 1 1% 2 220Ohm @

R2041 1 1% 2 100Ohm @
R2042 1 1% 2 100Ohm @
R2043 1 1% 2 100Ohm @

GND
Flash Descriptor Strap
A A
Strap information:

HDA_SDO_R 1KOhm 1 2 R2013

DVDD_IO
@

HDA_SDO: SP2006 1 2 R0402

PCH_FLASH_DESCRIPTOR 30
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override

2.HDA_SDOwhich sample high on the rising edge of PWROK

Will also disable Intel ME.

Title : PCH(1)_SATA,IHDA,RTC,LPC
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 20 of 104
5 4 3 2 1
 5 4 3 2 1

PCIE_CLK_0
DGPU (N14x) +3VS +3VS 4,6,16,17,20,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92
PCIE_CLK_1
+1.5VS +1.5VS 26,48,53,57,84
PCIE_CLK_2 Mini CARD (WLAN)
+3VSUS_ORG +3VSUS_ORG 20,22,24,25,26
PCIE_CLK_3
PCIE_CLK_4 LAN
HASWELL_MCP_E
U0301F 10PF/50V 1 2 C2102
PCIE_CLK_5 GND

D D

1
Swap XTAL_IN and XTAL_OUT, MOW 48999
SP2104 2 1 CLKOUT_PCIE_N0 C43 A25 XTAL_24M_IN R2116
70 CLK_PCIE_PEG#_PCH CLKOUT_PCIE_N0 XTAL24_IN
70 CLK_PCIE_PEG_PCH SP2105 2 1 CLKOUT_PCIE_P0 C42 B25 XTAL_24M_OUT 1MOhm 2 GND
SP2106 2 1 CLK_REQ0# U2 CLKOUT_PCIE_P0 XTAL24_OUT X2101
70 CLKREQ_PEG# PCIECLKRQ0#/GPIO18# K21 RSVD49 1 T2116 24MHZ 4

2
B41 RSVD49 M21 RSVD51 1 T2115
A41 CLKOUT_PCIE_N1 RSVD51 C26 DIFFCLK_BIASREF R2108 1 1% 2 3.01KOHM
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +1.05VS_AXCK_LCPLL
CLK_REQ1# Y5

3
PCIECLKRQ1#/GPIO19# C35 TESTLOW 1
SP2119 2 1 CLKOUT_PCIE_N2 C41 CLOCK TESTLOW_C35 C34 TESTLOW 2 1 2 XTAL_24M_OUT_C 10PF/50V 1 2 C2101
53 CLK_PCIE_W LAN# CLKOUT_PCIE_N2 TESTLOW_C34 GND
53 CLK_PCIE_W LAN SP2117 2 1 CLKOUT_PCIE_P2 B42 SIGNALS AK8 TESTLOW 3 SP2111
SP2113 2 1 CLK_REQ2# AD1 CLKOUT_PCIE_P2 TESTLOW_AK8 AL8 TESTLOW 4
53 CLK_W LAN_REQ# PCIECLKRQ2#/GPIO20# TESTLOW_AL8
B38
CLKOUT_PCIE_N3 CLKOUT_LPC_0
AN15 CLK_KBCPCI_PCH_R R2123 1 2 22Ohm CLK_KBCPCI_PCH 30
24MHz
C37 AP15 CLK_DEBUG_R R2124 1 2 22Ohm CLK_DEBUG 44
CLK_REQ3# N1 CLKOUT_PCIE_P3 CLKOUT_LPC_1
PCIECLKRQ3#/GPIO21# B35 CLK_XDP_N 1 T2120
SP2120 2 1 CLKOUT_PCIE_N4 A39 CLKOUT_ITPXDP# A35 CLK_XDP_P 1 T2121
33 CLK_PCIE_LAN# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
33 CLK_PCIE_LAN SP2121 2 1 CLKOUT_PCIE_P4 B39
SP2122 2 1 CLK_REQ4# U5 CLKOUT_PCIE_P4
33 CLK_REQ_LAN# PCIECLKRQ4#/GPIO22#

2
B37
A37 CLKOUT_PCIE_N5 C2103
CLK_REQ5# T2 CLKOUT_PCIE_P5
10PF/50V

1
PCIECLKRQ5#/GPIO23# @
TESTLOW 1 3 4 RN2127B
10KOhm
TESTLOW 2 1 2 RN2127A
10KOhm
haswell_mcp TESTLOW 3 3 4 RN2128B
10KOhm
GND TESTLOW 4 1 2 RN2128A
10KOhm
C C

HASWELL_MCP_E
U0301G

30,44 LPC_AD0 AU14 AN2 GPIO11

AW12 LAD0 SMBALERT#/GPIO11# AP2 SCL_3A
30,44 LPC_AD1 LAD1 SMBCLK SCL_3A 28
30,44 LPC_AD2 AY12 LPC AH1 SDA_3A SDA_3A 28 GND
AW11 LAD2 SMBUS SMBDATA AL2 RTD3_USB3_CR_PW REN#
30,44 LPC_AD3 LAD3 SML0ALERT#/GPIO60#
AV12 AN1 SML0_CLK

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30,44 LPC_FRAME# LFRAME# SML0CLK AK1 SML0_DAT
SML0DATA AU4 SML1_ALERT#
SML1ALERTZ#/PCHHOT#/GPIO73# AU3 SML1_CLK
SML1CLK/GPIO75 SML1_CLK 28
AH3 SML1_DAT SML1_DAT 28
AA3 SML1DATA/GPIO74
28,30 SPI_CLK SPI_CLK
Y7 AF2
28 SPI_CS#0 SPI_CS0# CL_CLK
Y4 AD2
T2117 1
28,30

28,30
SPI_CS#1

SPI_SI
SPI_CS2# AC2
AA2
SPI_CS1#
SPI_CS2#
SPI_MOSI
SPI C-LINK CL_DATA
CL_RST#
AF4
Vinafix.com
28,30 SPI_SO AA4
Y6 SPI_MISO
28 SPI_W P_IO2 SPI_IO2
AF1
28 SPI_HOLD#_IO3 SPI_IO3

+3VSUS_ORG

haswell_mcp

GPIO11 10KOhm 1 2 R2101

B SCL_3A 3 4 RN2103B B
2.2KOhm
SDA_3A 1 2 RN2103A
2.2KOhm

PCH CLKREQ Setting:

Connected to device. SML0_CLK 3 4
2.2KOhm
Not connected to device. Default : Clock free run. (PD 10K). RN2104B
PCIECLKRQ[5:0]# are core well powered. Reserver 10K PU for power saving purpose. SML0_DAT 1 2 RN2104A
2.2KOhm
+3VS SML1_CLK 3 4 RN2105B
+3VS 2.2KOhm
SML1_DAT 1 2 RN2105A
2.2KOhm
CLK_REQ0# R2126 1 2 10KOhm
CLK_REQ1# RN2102A 1 2 SML1_ALERT# 1 10KOhm 2 R2105
10KOhm
CLK_REQ2# R2109 1 2 10KOhm
CLK_REQ3# R2130 1 2 10KOhm
CLK_REQ4# R2131 1 2 10KOhm RTD3_USB3_CR_PW REN# 1 10KOhm 2 R2127

CLK_REQ0# R2128 1 2 10KOhm

CLK_REQ5# RN2102B 3 4 @
10KOhm
CLK_REQ2# R2112 1 2 10KOhm
@
CLK_REQ4# R2129 1 2 10KOhm
@

GND

A A

Title : PCH(2)_PCIE,CLK,SMB
BG1\HW 5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 21 of 104
5 4 3 2 1
 5 4 3 2 1

+3VSUS_ORG +3VSUS_ORG 20,21,24,25,26

+3VS +3VS 4,6,16,17,20,21,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+3VSUS +3VSUS 26,28,30,33,34,37,53,81,92

+5VSUS +5VSUS 4,26,51,52,81

30 SUSACK# R2221 2 @ 1 0Ohm +12VSUS +12VSUS 26,33,36,51,81,91

SUS_PW R_ACK_R R2222 2 1 0Ohm SUSACK#_R +3V +3V 44,45,57,91

D D
+3VS R2201 2 1 10KOhm PM_SYSRST#_R U0301H HASWELL_MCP_E

SYSTEM POWER MANAGEMENT

If SUSWARN #/SUS_ACK # handshake R2205 1 @ 2 330KOhm GND DSWODVREN - On Die DSW VR Enable
is not used, these signals are tied on the board AK2 AW7 DSW ODVREN R2204 1 2 330KOhm HIGH - Enabled(DEFAULT) ; LOW-Disabled
SUSACK# DSWVRMEN +VCC_RTC
AC3 AV5 PCH_DPROK R2235 2 1 0Ohm PM_RSMRST_R
SYS_PW ROK AG2 SYS_RESET# DPWROK AJ5
SYS_PWROK WAKE# PCIE_W AKE# 33,53
30,92 PM_PW ROK R2229 2 1 0Ohm PM_PCH_PW ROK_R AY7
R2230 2 1 0Ohm PM_APW ROK_R AB5 PCH_PWROK
PLT_RST# AG7 APWROK V5
PLTRST# CLKRUN#/GPIO32# PM_CLKRUN# 30
AG4 SUS_STAT# 1 T2206
SUS_STAT#/GPIO61# AE6 SUS_CLK
SUSCLK/GPIO62 AP5 SLP_S5# 1 T2204
R2232 2 1 0Ohm PM_RSMRST_R AW6 SLP_S5#/GPIO63#
30 PM_RSMRST# RSMRST#
30 ME_SUSPW RDNACK R2231 2 1 0Ohm SUS_PW R_ACK_R AV4
AL7 SUSWARN#/SUSPWRDNACK#/GPIO30# AJ6 SLP_S4#_R R2234 2 0Ohm 1
30 PM_PW RBTN# PWRBTN# SLP_S4# PM_SUSC# 30
30 ME_AC_PRESENT R2233 2 1 0Ohm AC_PRESENT_R AJ8 AT4 SLP_S3#_R R2236 2 0Ohm 1 PM_SUSB# 30
BATLOW # AN4 ACPRESENT/GPIO31 SLP_S3# AL5 ME_PM_SLP_A#_R
T2209 1 SLP_S0# AF3 BATLOW#/GPIO72# SLP_A# AP4 SLP_SUS# 1 T2208
AM5 SLP_S0# SLP_SUS# AJ7 SLP_LAN#
SLP_WLAN#/GPIO29# SLP_LAN#
SLP_S0#: remove TP:required by layout
when C10 use for
Low power mode
+3V

haswell_mcp

U2202 N/A
1 5
PLT_RST# 2 A VCC
C
3 B 4 C
GND Y BUF_PLT_RST# 30,32,33,40,46,53,70
SN74LVC1G08DCKR
1

GND +VCCDSW

R2223 1 @ 2 0Ohm R2224 @ BATLOW # R2211 1 2 10KOhm

10KOhm SUS_CLK R2227 1 2 1KOhm 5%
PM_PW ROK R2210 1 2 10KOhm PCIE_W AKE# R2212 1 2 10KOhm

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2

ME_AC_PRESENT R2215 1 2 10KOhm

GND GND

+3VSUS_ORG

ME_SUSPW RDNACK R2214 1 2 10KOhm

ME_PM_SLP_A#_R R2213 1 2 10KOhm

@
SYS_PWROK for PCH
SLP_LAN# R2216 1 2 10KOhm
@
R2202 2 @ 1 0Ohm

+3VSUS

B U2201 +3VS B
PM_PW ROK 1 A 5
VCC

30 DELAY_VR_AND_ALL_SYS 2 B
PM_CLKRUN# R2209 2 5% 1 8.2KOhm
3 4 SYS_PW ROK
GND
Y
Vcc=2~5.5

R2203 2 @ 1 0Ohm

A A

Title : PCH(3)_FDI,DMI,SYS P
BG1\HW 5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 22 of 104
5 4 3 2 1
 5 4 3 2 1

+3VS +3VS 4,6,16,17,20,21,22,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+3V +3V 22,44,45,57,91

HASWELL_MCP_E
U0301I

+3VS
Close to CPU B8 B9 DPB_DDC_CLK 48
D 45 L_BKLT_CTRL EDP_BKLCTL DDPB_CTRLCLK DPB_DDC_DATA 48 D
A9 C9 INT. PD
45 eDP_BL_EN EDP_BKLEN DDPB_CTRLDATA
R2309 1 @ 2 1KOhm L_BKLT_CTRL C6 eDP SIDEBAND D9 DDPC_CTRLCLK 1 T2304
45 EDP_VDD_EN EDP_VDDEN DDPC_CTRLCLK D11 INT. PD R2333 1 2 2.2KOhm
+3VS DDPC_CTRLDATA +3VS
R2307 1 @ 2 1KOhm eDP_BL_EN
R2333 is for DP HW Strap, enable DP port C
R2308 1 @ 2 1KOhm EDP_VDD_EN RN2301A 1 2 10KOhm INT_PIRQA# U6
RN2301B 4 3 10KOhm INT_PIRQB# P4 PIRQA#/GPIO77# C5 DDPB_AUXN 1 T2305
R2324 1 2 10KOhm VGA_PWRON RN2301C 5 6 10KOhm INT_PIRQC# N4 PIRQB#/GPIO78# DISPLAY DDPB_AUXN B6
PIRQC#/GPIO79# DDPC_AUXN DPC_AUXN 46
RN2301D 8 7 10KOhm INT_PIRQD# N2 B5 DDPB_AUXP 1 T2306
R2330 1 @ 2 10KOhm TPANEL_RST# AD4 PIRQD#/GPIO80# DDPB_AUXP A6
remove TP:required by layout PME# DDPC_AUXP DPC_AUXP 46
PU at device side GPIO
SATA_ODD_PWRGT U7
51 SATA_ODD_PWRGT L1 GPIO55
TPANEL_RST#
R2331 1 @ 2 10KOhm WLAN_LED VGA_PWRON L3 GPIO52 C8
91 VGA_PWRON GPIO54 DDPB_HPD DPB_HPD 48
PCB_ID1 R5 A8
25 PCB_ID1 GPIO51 DDPC_HPD DPC_HPD 46
WLAN_LED L4 D6 EDP_HPD 45
56 WLAN_LED GPIO53 EDP_HPD
For RTD3_AUD_IRQ

haswell_mcp

C C

+3VS

DPC_AUXN R2328 2 1 100KOhm

https://vinafix.com
DPC_AUXP R2327 2 1 100KOhm

DPC_HPD R2326 2 1 100KOhm

B B

A A

Title : PCH(4)_DP,LVDS,CRT
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 23 of 104
5 4 3 2 1
 5 4 3 2 1

+3VSUS +3VSUS 22,26,28,30,33,34,37,53,81,92

+3VSUS_ORG +3VSUS_ORG 20,21,22,25,26

+1.5VS +1.5VS 26,48,53,57,84

D D

Vinafix.com
HASWELL_MCP_E
U0301K

PCIENB_RXN0 F10 AN8

70 PCIENB_RXN0 E10 PERN5_L0 USB2N0 AM8 USB_PN0 52
PCIENB_RXP0 USB2.0 Right-down side
70 PCIENB_RXP0 PERP5_L0 USB2P0 USB_PP0 52
PCIEG_TXN0 C2407 1 2 0.1UF/25V PCIEG_TXN0_C C23 AR7
70 PCIEG_TXN0 1 2 0.1UF/25V PCIEG_TXP0_C C22 PETN5_L0 USB2N1 AT7 USB_PN1 52
PCIEG_TXP0 C2408 USB2.0 Left-up side (Debug Port)
70 PCIEG_TXP0 PETP5_L0 USB2P1 USB_PP1 52
/VGA
/VGA PCIENB_RXN1 F8 AR8
70 PCIENB_RXN1 E8 PERN5_L1 USB2N2 AP8 USB_PN2 53
PCIENB_RXP1 WiFi
70 PCIENB_RXP1 PERP5_L1 USB2P2 USB_PP2 53
PCIEG_TXN1 C2406 1 2 0.1UF/25V PCIEG_TXN1_C B23 AR10
70 PCIEG_TXN1 PETN5_L1 USB2N3 USB_PN3 40
PCIEG_TXP1 C2405 1 2 0.1UF/25V PCIEG_TXP1_C A23 AT10 Card Reader
70 PCIEG_TXP1 PETP5_L1 USB2P3 USB_PP3 40
/VGA
C /VGA PCIENB_RXN2 H10 AM15 C
70 PCIENB_RXN2 PERN5_L2 USB2N4 USB_PN4 61
DGPU (N14x) PCIENB_RXP2 G10 AL15 Touch Penal
70 PCIENB_RXP2 PERP5_L2 USB2P4 USB_PP4 61
PCIEG_TXN2 C2404 1 2 0.1UF/25V PCIEG_TXN2_C B21 AM13
70 PCIEG_TXN2 1 2 0.1UF/25V PCIEG_TXP2_C C21 PETN5_L2 USB2N5 AN13 USB_PN5 45
PCIEG_TXP2 C2403 Camera
70 PCIEG_TXP2 PETP5_L2 USB2P5 USB_PP5 45
/VGA
/VGA PCIENB_RXN3 E6 AP11
70 PCIENB_RXN3 F6 PERN5_L3 USB2N6 AN11 USB_PN6 52
PCIENB_RXP3 USB2.0 Right-up side
70 PCIENB_RXP3 PERP5_L3 USB2P6 USB_PP6 52

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PCIEG_TXN3 C2402 1 2 0.1UF/25V PCIEG_TXN3_C B22 AR13
70 PCIEG_TXN3 1 2 0.1UF/25V PCIEG_TXP3_C A21 PETN5_L3 USB2N7 AP13 USB_PN7 52
PCIEG_TXP3 C2401 USB2.0 Left-down side (Design ready)
70 PCIEG_TXP3 PETP5_L3 USB2P7 USB_PP7 52
/VGA
/VGA G11
53 PCIE_RXN_WLAN PERN3
F11 G20
53 PCIE_RXP_WLAN PERP3 USB3RN0 H20 USB3_RXN0 52
1 2 0.1UF/25V PCIE_TXN3_C C29 USB3RP0 USB3_RXP0 52
WLAN(HMC)53 PCIE_TXN_WLAN C2411 USB3.0 Right-up side
C2412 1 2 0.1UF/25V PCIE_TXP3_C B30 PETN3 PCIe USB C33
53 PCIE_TXP_WLAN PETP3 USB3TN0 USB3_TXN0 52
B34
USB3TP0 USB3_TXP0 52
F13
33 PCIE_RXN_LAN G13 PERN4 E18
33 PCIE_RXP_LAN PERP4 USB3RN1 F18 USB3_RXN1 52
LAN(Atheros) USB3RP1 USB3_RXP1 52
33 PCIE_TXN_LAN C2413 1 2 0.1UF/25VPCIE_TXN_LAN_C B29 USB3.0 Right-down side
C2414 1 2 0.1UF/25VPCIE_TXP_LAN_C A29 PETN4 B33
33 PCIE_TXP_LAN PETP4 USB3TN1 USB3_TXN1 52
A33
G17 USB3TP1 USB3_TXP1 52
F17 PERN1/USB3RN2
PERP1/USB3RP2
B B
C30
C31 PETN1/USB3TN2 AJ10 USB_BIAS# 1 R2403 2 22.6Ohm
PETP1/USB3TP2 USBRBIAS# GND
AJ11
F15 USBRBIAS AN10 RSVD43 1 T2403 +3VSUS_ORG
G15 PERN2/USB3RN3 RSVD43 AM10 RSVD42 1 T2404
PERP2/USB3RP3 RSVD42
B31
A31 PETN2/USB3TN3
PETP2/USB3TP3 AL3 OC0#/GPIO40 1 2 RN2402A
OC0#/GPIO40# 10KOhm
AT1 OC1#/GPIO41 3 4 RN2402B
OC1#/GPIO41# AH2 10KOhm
OC2#/GPIO42# ONKYO_DET1 37
T2401 1 RSVD47 E15 AV3 HARMAN_DET2 37
T2402 1 RSVD46 E13 RSVD47 OC3#/GPIO43#
R2401 1 1% 2 3.01KOHM PCIE_RCOMP A27 RSVD46
+1.05VS_AUSB3PLL
+1.05VS_AUSB3PLL B27 PCIE_RCOMP Pull up at connector side
PCIE_IREF
R2402 remove 1031

haswell_mcp

A A

Title : PCH(5)_PCI,NVRAM,USB
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 24 of 104
5 4 3 2 1
 5 4 3 2 1

+3VS +3VS +3VS +3VS +3VS +3VS

+VCCDSW +VCCDSW 22,26

1

1
+3VS +3VS 4,6,16,17,20,21,22,23,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92
R2508 R2506 R2504 R2516 R2518 R2539
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm
@ @ @ /standard_ID /premium_ID /usb3x1_ID BIOS Rev. SKU +3VSUS_ORG +3VSUS_ORG 20,21,22,24,26

+3VA +3VA 20,26,30,33,37,57,60,65,81,88,93

2

2
PCB_ID0
PCB_ID1
PCB_ID0 20 ID0 ID1 ID2 PCB Rev.
PCB_ID1 23
PCB_ID2
PCB_ID3 0 0 0 R1.0
PCB_ID4 1 0 0 R1.1
PCB_ID5
0 1 0 R2.0 PCB_ID3 PCB_ID4 PCB_ID5 PCB_ID6 PCB_ID9 PCB_ID10 PCB_ID11 PCB_ID12 PCB_ID14
1

1
D 1 1 0 R2.1 D
R2523 R2507 R2505 R2515 R2517 R2538
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 0 0 1 TBD 0: Entry 0: Mainstream 0:USB3.0*2 0: No HDMI 0: Zero_ODD 0: DSC 0: NoS&M 0: LVDS 0: no USB3.0
/pcb1.0 /pcb1.0 /pcb1.0 /Entry_ID /main_ID /usb3x2_ID 1 0 1 TBD
0 1 1 TBD 1: Starndard 1: Premium 1:USB3.0*1 1: HDMI 1: Non Zero ODD 1: PX_UMA 1: S&M 1: eDP 1: USB3.0
2

2
1 1 1 TBD
GND GND GND GND GND GND

+3VS +3VS +3VS +3VS +3VS +3VS HASWELL_MCP_E

U0301J

R2520 1 2 1KOhm +1.05VS

1

R2527 R2513 R2514 R2510 R2554 R2559 RTD3_AUD_PWR P1 D60 PM_THRMTRIP# 0Ohm 2 1 R2582
36 RTD3_AUD_PWR BMBUSY#/GPIO76# THRMTRIP# H_THRMTRIP# 32
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm GPIO8 AU2 V4
/HDMI_ID /PX/UMA_ID /S&M_ID /eDP_ID /usb3_ID PM_LANPHY_EN AM7 GPIO8 RCIN#/GPIO82# T4 Serial Interrupt Request
RCIN# 30
LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ INT_SERIRQ 30,44
/non-zeroodd_ID HOST_ALERT1#_R INT. PD AD6 AW15 PCH_OPIRCOMP R2511 2 1% 1 49.9Ohm GND
2

GPIO16 Y1 GPIO15 MISC PCH_OPI_COMP AF20 RSVD3 1 T2533

PCB_ID6 DGPU_PWROK T3 GPIO16 RSVD3 AB21 RSVD2 1 T2534
87,91,92 DGPU_PWROK GPIO17 RSVD2
PCB_ID9 AD5
53 WLAN_ON GPIO24
PCB_ID10 SMC_WAKE_SCI# AN5
PCB_ID11 NFC_RESET AD7 GPIO27
PCB_ID12 AN3 GPIO28
53 BT_ON/OFF# GPIO26
PCB_ID14 R6 PCB_ID9
GPIO56 AG6 GSPI0_CS#/GPIO83# L6 PCB_ID10
GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 PCB_ID11
GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 INT. PD BBS_BIT0
GPIO58 GSPI0_MOSI/GPIO86
1

GPIO59 AT5 R7 PCB_ID14

R2529 R2509 R2524 R2526 R2577 R2537 EXT_SCI# AK4 GPIO59 GPIO GSPI1_CS#/GPIO87# L5 PCB_ID3
30 EXT_SCI# GPIO44 GSPI1_CLK/GPIO88
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm GPIO47 AB6 N7 CRT_IN#
U4 GPIO47 GSPI1_MISO/GPIO89 K2 CRT_IN# 46
/non-HDMI_ID /zeroodd_ID /DSC_ID /non-S&M_ID /LVDS_ID /non-usb3_ID PCB_ID12 RTD3_SATA1_PWR#
PCB_ID2 Y3 GPIO48 GSPI_MOSI/GPIO90 J1 UART_RX PU at IT511FN
2

DGPU_HOLD_RST# P3 GPIO49 UART0_RXD/GPIO91 K3 UART_TX

C 70 DGPU_HOLD_RST# GPIO50 UART0_TXD/GPIO92 C
Y2 J2 UART_RTS#
26 HSIO_PWR_CNTL AT3 HSIOPC/GPIO71 LPIO UART0_RTS#/GPIO93# G1
RTD3_USB3_P0_PWREN UART_CTS# Pull up at connector side
GND GND GND GND GND GND GPIO14 AH4 GPIO13 UART0_CTS#/GPIO94# K4 KB_LED_ID
GPIO14 UART1_RXD/GPIO0 KB_LED_ID 31 +3VS
RTD3_USB3_CAM_PWR# AM4 G2 PCB_ID4
GPIO45 AG5 GPIO25 UART1_TXD/GPIO1 J3 PCB_ID5
RTD3_SNSR_HUB_PWREN AG3 GPIO45 UART1_RST#/GPIO2# J4 PCB_ID6
GPIO46 UART1_CTS#/GPIO3# F2 I2C0_SDA I2C0_SDA R2531 2 1 10KOhm
GPIO9 AM3 I2C0_SDA/GPIO4 F3 I2C0_SCL I2C0_SCL R2532 2 1 10KOhm
TLS CONFIDENTIALITY Strap information: SMC_RUNTIME_SCI# AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA I2C1_SDA R2533 2 1 10KOhm
DEVSLP0 P2 GPIO10 I2C1_SDA/GPIO6 F1 I2C1_SCL I2C1_SCL R2534 2 1 10KOhm
DISABLED = EMPTY R2519 (DEFAULT) GPIO70 C4 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 E3 SDIO_CLK
ENABLED = STUFF R2519 DEVSLP1 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 SDIO_CMD
DEVSLP1/GPIO38 SDIO_CMD/GPIO65

https://vinafix.com
+3VSUS_ORG DEVSLP2 N5 D3 INT. PD SDIO_DATA0
INT. PD V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4 SDIO_DATA1
36 SB_SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3 SDIO_DATA2
SDIO_D2/GPIO68 E2 SDIO_DATA3
R2519 1 @ 2 1KOhm HOST_ALERT1#_R SDIO_D3/GPIO69
R2521 1 2 10KOhm GPIO8
R2530 1 2 10KOhm NFC_RESET haswell_mcp
R2540 1 2 10KOhm PM_LANPHY_EN

R2540: +3VS
Stuff -> non Intel LAN
No stuff -> Intel LAN( Pull up on chip side) INT_SERIRQ R2502 1 2 10KOhm

R2522 1 2 10KOhm RTD3_USB3_P0_PWREN

R2556 1 2 10KOhm GPIO9 +3VS
R2555 1 2 10KOhm SMC_RUNTIME_SCI#

UART_RX R2592 1 2 49.9KOhm 10V220000078

R2558 1 2 10KOhm GPIO45 UART_TX R2591 1 2 49.9KOhm 10V220000078
UART_RTS# R2593 1 2 49.9KOhm 10V220000078
R2562 1 2 10KOhm GPIO56 UART_CTS# R2594 1 2 49.9KOhm 10V220000078
R2561 1 2 10KOhm GPIO57
R2572 1 2 10KOhm GPIO14 +3VS_+1.8VS_SDIO
R2512 1 2 10KOhm EXT_SCI#
B R2528 1 2 10KOhm GPIO47 B
R2576 1 2 10KOhm RTD3_SNSR_HUB_PWREN SDIO_DATA1 R2586 1 2 49.9KOhm 10V220000078
SDIO_DATA2 R2587 1 2 49.9KOhm 10V220000078
R2570 1 2 10KOhm GPIO58 SDIO_DATA3 R2588 1 2 49.9KOhm 10V220000078
SDIO_CLK R2589 1 2 49.9KOhm 10V220000078
R2548 1 2 10KOhm GPIO59 SDIO_CMD R2590 1 2 49.9KOhm 10V220000078

GPIO need to pull high to power with 10Kohm if Strap information:

unused HDA_SPKR: No reboot strap SB_SPKR R2543 1 @ 2 1KOhm +3VS
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap STP_A16OVR:
Low: Disable (Default)
+3VS High:Enable
Boot BIOS Strap
A16 swap override Strap/
R2569 1 2 10KOhm DGPU_PWROK
Top-Block swap override jumper
BBS_BIT0 Boot BIOS Location
R2571 1 2 10KOhm GPIO16 High=Enabled A16 swap override/
1 LPC Top-Block swap override
R2567 1 2 10KOhm GPIO70
0 SPI (PCH)
R2542 1 2 10KOhm DEVSLP0

R2544 2 1 100KOhm HSIO_PWR_CNTL

Low=Default

R2545 1 @ 2 10KOhm HSIO_PWR_CNTL

R2553 1 2 10KOhm RTD3_SATA1_PWR# Sampled on rising edge of PWROK.
R2565 1 2 10KOhm RTD3_AUD_PWR +3VS +3VS_+1.8VS_SDIO
GND
R2546 1 @ 2 10KOhm DEVSLP1
SDIO_DATA0 R2575 1 @ 2 150KOhm
R2547 1 @ 2 10KOhm DEVSLP2 BBS_BIT0 R2501 2 @ 1 10KOhm 1%
R2557 1 2 10KOhm DGPU_HOLD_RST#
Clear password for TODs required
Place ONTO D-part
A BBS_BIT0 R2574 1 @ 2 1KOhm SDIO_DATA0 R2503 1 @ 2 1KOhm A
JRST2501
1 2 GPIO16
1 2 GND
SGL_JUMP
+VCCDSW GND GND

R2535 2 1 10KOhm SMC_WAKE_SCI#

R2566 2 @ 1 10KOhm RTD3_USB3_CAM_PWR#

Title : PCH(6)_CPU,GPIO,MISC
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 25 of 104
5 4 3 2 1
 5 4 3 2 1

+3VSUS +3VSUS 22,28,30,33,34,37,53,81,92

+3VSUS_ORG +3VSUS_ORG 20,21,22,24,25

+1.5VS +1.5VS 48,53,57,84

+3VS +3VS 4,6,16,17,20,21,22,23,25,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+1.05VS +1.05VS 6,25,32,57,80,82

+3VA +3VA 20,30,33,37,57,60,65,81,88,93

+3VSUS
+VCC_RTC +VCC_RTC 20,22 +3VSUS_ORG

D
+1.05VS_ASATA3PLL +1.05VS_ASATA3PLL 20
2
JP2602
2 1
1MM_OPEN_M1M2
1 Vinafix.com D

+1.05VS_AUSB3PLL +1.05VS_AUSB3PLL 24

VCCHDA VCCHDA 36

+1.05VS_HSIO R2630 1 2 0Ohm 1.84A

+VCC_RTC

1
C2641 C2640 U0301M HASWELL_MCP_E
1UF/6.3V 1UF/6.3V

1
K9
L10 VCCHSIO3 C2609 C2610 C2617
M9 VCCHSIO1 0.1UF/25V 0.1UF/25V 1UF/6.3V

2
R2609 1 2 0Ohm +1.05VS_AIDLE GND 1.632A N8 VCCHSIO2 mPHY RTC AH11 +VCCPRTCSUS 62mA
+1.05VS VCCIO4 VCCSUS3
L2603 P9 AG10 1mA
VCCIO3 VCCRTC
+1.05VS_HSIO 1 2 2.2UH L2601 +1.05VS_AUSB3PLL 41mA B18 AE7 +VCCRTCEXT C2608 1 2 GND
2

C2607 1 2 2.2UH +1.05VS_ASATA3PLL 42mA B11 VCCUSB3PLL DCPRTC 0.1UF/16V GND

1 VCCSATA3PLL

1
0.1UF/25V 09V020000018 +1.05VS_HSIO

1
@ C2653 09V020000018 T2606
1

22UF/6.3V C2616 C2654 C2618 1TP_VCCAPLLOPI_VAL Y20 SPI Y8 +3VM_VCCPSPI 20mA

2

+3VSUS_ORG 2 22UF/6.3V 22UF/6.3V 22UF/6.3V 57mA AA21 VCCAPLL4 OPI VCCSPI

2
GND W21 VCCAPLL2 0.67A
+1.05VS_APLLOPI VCCAPLL3 +1.05VS
AG14 +1.05VM_VCCASW4 R2605 1 0Ohm 2
VCCASW4 +1.05VM_VCCASW

1
Intel updated for Ramp issue AG13 +1.05VM_VCCASW5 R2606 1 0Ohm 2
+1.05A_VCCUSB3SUS USB3 VCCASW5 +1.05VM_VCCASW
@ GND GND C2642 C2643 C2644
R2640 DCPSUS R2614 1 @ 2 0Ohm 10mA J13 1UF/6.3V 1UF/6.3V 10UF/10V

2
DCPSUS3 J11 1.74A
220Ohm
VCC1P05_1

1
H11
DCPSUS 150mA C2623 C2622 DVDD_IO DVDD_IO11mA AH14 AXALIA/HDA CORE VCC1P05_2 H15
1UF/6.3V VCCHDA VCC1P05_3 AE8
10UF/6.3V

2
@ +1.05A_VCCUSB3SUS VCC1P05_5 AF22 GND
R2637 2 1 25mA AH13 VRM/USB2/AZALIA VCC1P05_4 AG19 +PCH_VCCDSW 1UF/6.3V 2 1 C2601
GND DCPSUS2 DCPSUSBYP1 GND
102OHM C2625 AG20
1% GND 1UF/6.3V DCPSUSBYP2 AE9 0.67A
VCCASW1 +1.05VM_VCCASW
AF9
R2602 1 2 0Ohm +3VSUS_VCCPUSB 62mA AC9 VCCASW2 AG8
+3VSUS_ORG

1
AA9 VCCSUS3_3_4 VCCASW3 AD10
VCCSUS3_3_3 DCPSUS5
1

C GND C2605 +VCCDSW 114mA AH10 AD8 110mA +1.05A_VCCUSB3SUS C2604 C2603 C2602 C
VCCDSW3_3 DCPSUS1

1
22UF/6.3V V8 GPIO/LCC 1UF/6.3V 1UF/6.3V 22UF/6.3V

2
0Ohm 1 2 R2610 +3VS_VCC 41mA W9 VCC3_3_1 C2651
+3VS
2

VCC3_3_2 J15 3mA 1UF/6.3V

+1.5VS

2
1 2 THERMAL SENSOR VCCTS1_5 K14
GND VCC3_3_4
GND C2626 22UF/6.3V K16 GND 41mA +3VS GND GND GND
VCC3_3_3

2
0Ohm ICC C2645
+1.05VS 1 2 +1.05VS_VCC_AXCK_DCB 240mA J18 SDIO/PLSS 0.1UF/25V

1
R2603 K19 VCC1P05_7 U8
VCC1P05_6 VCCSDIO2
1

C2612 +1.05VS 31mA A20 T9

+ +1.05VS_AXCK_LCPLL VCCACLKPLL VCCSDIO1
CE2604 1UF/6.3V J17 GND
VCCCLK6

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100UF/6.3V 200mA R21 17mA +3VS_+1.8VS_SDIO
2

T21 VCCCLK3 LPT LP POWER

2

1BV080000001 T2603 1 VCCCLK1 K18 VCCCLK4 SUS OSCILLATOR AB8 +1.05VSUS_AOSCSUS

1mA
VCCCLK1 DCPSUS4

1
T2605 1 VCCCLK5 M20
VCCCLK5
1

T2604 1 VCCCLK2 V21 C2646

C2628 C2627 63mA AE20 VCCCLK2 AC20 1 T2607 1UF/6.3V
+3VSUS_VCCPUSB

2
AE21 VCCSUS3_3_2 VCCAPLL1 AG16 1.632A
1UF/6.3V 1UF/6.3V +1.05VS
2

GND VCCSUS3_3_1 USB2 VCCIO2 AG17

VCCIO1

1
GND GND C2647 GND
1UF/6.3V

2
haswell_mcp
GND

DCPSUS 0Ohm 1 2 R2633 +1.05VSUS_AOSCSUS

+3VA +3VSUS_ORG @

1
+VCCDSW C2648
+
CE2606 1UF/6.3V
+1.05VS_APLLOPI +1.05VS_AXCK_LCPLL 0Ohm 2 1 R2608 100UF/6.3V

2
1kOhm/100Mhz @

2
+1.05VS R2613 1 2 0Ohm
+1.05VS B2602 1 2 31mA
0Ohm 2 1 R2607
1

@
+ +
1

1
CE2601 C2620 CE2605 C2614
100UF/6.3V 1UF/6.3V 100UF/6.3V 1UF/6.3V C2606
2

B @ @ 1UF/6.3V GND B
Close to pin AH10
2

GND +3VS_+1.8VS_SDIO +3VS

SP2601 2 1
GND
GND
all DVDD_IO change to VCCHDA for NON-RTD3 Pull up to +3VS for non-SDIO
+3VSUS_ORG
When VCCHDA is +1.5VS,
then DVDD_IO of DPS & Codec need to change to +1.5VS

Vinafix.com
2 0Ohm 1 VCCHDA
R2629
1

+1.05VS +1.05VS_HSIO C2639

Q2601 1UF/6.3V +1.05VS
2

+1.05VM_VCCASW
JP2604
2 S
D

GND 2 1 0.67A
3

2 1
G

IRFML8244TRPBF 2MM_OPEN_5MIL
1

+12VSUS
1

DVDD_IO
R2636
100Ohm
1

+5VSUS 1%
1
2

R2634 C2652
1MOhm 1UF/6.3V +3VSUS_ORG +3VA
2
2

+3VS
2

R2635 HSIO_PWR_CNTL_R
100KOhm R2623 1 0Ohm 2
Close to pin AH14
3

C2650 GND
1
2

UM6K1N +VCCPRTCSUS R2622 1 0Ohm 2

R2638 HSIO_PWR_CNTL# 5 Q2602B 1UF/25V @
2

10KOhm @
4

A C2635 A
6

@ 3 1UF/6.3V
1

UM6K1N D
Q2603
2

2 Q2602A
25 HSIO_PWR_CNTL +3VM_VCCPSPI +3VM_SPI
1
1

G 2N7002
2

2 S 20mA SP2602 2 1 GND

R2639
2

10KOhm
C2637
@ 0.1UF/25V
1

GND
Title : PCH(8)_POWER,GND
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 26 of 104
5 4 3 2 1
 5 4 3 2 1

+3VS +3VS 4,6,16,17,20,21,22,23,25,26,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+12VS +12VS 31,46,48,57,91

+12VSUS +12VSUS 26,33,36,51,81,91

+3VM_SPI +3VM_SPI 26

PCH SPI ROM

+3VM_SPI

+3VM_SPI
2 1 +3VM_SPI +3VM_SPI
D D
R2863 0Ohm
D2801

2
+3VA_EC 2 1 1

2
R2861 @ 0Ohm 3 R2835

1
+3VSUS 2 1 2 @ 1KOhm R2831
R2862 @ 0Ohm C2802 1KOhm
0.8V/0.2mA 0.1UF/16V

1
2 1 U2801
R2847 @ 0Ohm 0Ohm 1 2 R2855 SPI1_CS#0 1 8
21 SPI_CS#0 CS# VCC 7
33Ohm 1 2 R2850 SPI1_SO 2 SPI1_HOLD# R9220 1 2 33Ohm
21,30 SPI_SO SO/SIO1 NC/SIO3 6 SPI_HOLD#_IO3 21
33Ohm 1 2 R9219 +3VM_SPI1_WP# 3 SPI1_CLK R2848 1 2 33Ohm
21 SPI_WP_IO2 WP#/SIO2 SCLK 5 SPI_CLK 21,30
4 SPI1_SI R2849 1 2 33Ohm
GND SI/SIO0 SPI_SI 21,30
R1.1
MX25L1675EM2I-10G
05V000000023 (16Mb)

+3VM_SPI

1
C2803 <6.5 inch <6.5 inch
0.1UF/16V
PCH EC

2
U2802 SPI ROM
0Ohm 1 2 R2856 SPI2_CS#1 1 8
21,30 SPI_CS#1 1 2 R2853 2 CS# VCC 7
33Ohm SPI2_SO SPI2_HOLD# R2858 1 33Ohm 2
33Ohm 1 2 R2859 +3VM_SPI2_WP# 3 DO(IO1) HOLD#/RESET#(IO3) 6 SPI2_CLK R2851 1 33Ohm 2
4 WP#(IO2) CLK 5 SPI2_SI R2852 1 33Ohm 2
GND DI(IO0)
16Mb 32Mb
W25Q32FVSSIQ
05V000000022 QUAD 05V000000023 05V000000022
C (32Mb) C
DUAL 05V000000010 05V000000005

https://vinafix.com
PCH SMBus
+3VS SMBUS Link device
SPD (A0h,A4h)
WLAN (NC)
Touch Pad

1
+12VS
RTD2132R(eDP to LVDS) (6Ah)
R2854 R2857
4.7KOhm 4.7KOhm

2
2
Q2801A
UM6K1N
6 1
21 SCL_3A SMB_CLK_S 16,17,31,45

5
Q2801B
PCH UM6K1N
3 4
21 SDA_3A SMB_DAT_S 16,17,31,45
B B

+12VS

2
Q2802A
UM6K1N
1 6
30,45,58,74 SMB1_CLK SML1_CLK 21

EC

5
Q2802B
UM6K1N PCH
4 3
30,45,58,74 SMB1_DAT SML1_DAT 21

A A

Title : PCH(9)_SPI,SMB
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 28 of 104
5 4 3 2 1
 5 4 3 2 1

+3VA_EC
+3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+3VSUS +3VSUS 22,26,28,33,34,37,53,81,92 +3VA_EC

Vendor debug

1
+3VA
+3VA_EC C3006 C3007
10UF/6.3V 0.1UF/16V For +3VPLL

2
1

1
SPI_CLK_C R3076 1 2 10KOhm L3001 C3001 C3002 C3003
1AV300000018 Put beside pin 121
SPI_SO_C R3077 1 2 10KOhm 1 2 10UF/6.3V 0.1UF/16V 0.1UF/16V

2
SPI_SI_C R3078 1 @ 2 10KOhm +3VACC
SPI_CS#1_C R3079 1 @ 2 10KOhm 120Ohm/100Mhz 1AV300000018
+3VS 1 0Ohm 2
28,45,58,74 SMB1_CLK 09V010000006
Thermal sensor PM_RSMRST#_R R3048 1 2 0Ohm @
28,45,58,74 SMB1_DAT PM_RSMRST# 22 R3004

1
SMB0_DAT 60,88

1
ITE_reserve for PECI Battery GND R3005 1 2 0Ohm C3009
D Intel Platform 4 H_PECI_EC CAP_LED# SMB0_CLK 60,88
C3008 0.1UF/16V D

2
1 2 0Ohm CAP_LED# 31
R3046 LCD_BACKOFF#_R NUM_LED# 0.1UF/16V
EMI Solution 45 LCD_BACKOFF# NUM_LED# 31

2
T3012 1 CRX0 +1.1VSUS_ON 1 T3040
EC_AGND EC_AGND
74,88 AC_IN_OC
HDMI_HPD_M FSPI bus
GND GND HDMI_HPD_M 48 For PU / PD +3VA_EC
RCIN# SPI_CLK_C R3051 1 2 0Ohm Pin 101 --> SPI_CS#1_EC
SPI_CLK 21,28
4 THRO_CPU
HDPINT#
HDPINT# 58
Pin 102 --> SPI_SI_EC +3VA_EC
SPI_SO_C R3052 1 2 0Ohm Pin 103 --> SPI_SO_EC
90 BAT1_IN_OC# SPI_SO 21,28
SPI_SI_C R3053 1 2 0Ohm
4.7UF/6.3V 66 PWR_SW#_M SPI_SI 21,28 Pin 105 --> SPI_CLK_EC 1 10KOhm 2 @
1

SPI_CS#1_C R3050 1 2 0Ohm R3016 AC_IN_OC

C3012 1 SPI_CS#1 21,28 1 47KOhm 2
T3039 FB_CLAMP_TGL_REQ# R3010 BAT1_IN_OC#
1 FB_CLAMP_TGL_REQ# 74 1 2
1AV300000022 T3011 A20GATE HDPACT R3030 VSUS_ON Support Auto load code
HDPACT 58
2

HDPLOC 1 T3032 100KOhm

@
+3VA_EC
JACK_IN#
HDPLOC
JACK_IN#
58
36,37
For N14 GPU R3042 1 10KOhm 2 PWR_SW#_M VSUS_ON = High
EC_XIN RM_RSMRST# = Low
RN3001B 3 4.7KOhm4 SMB0_DAT R3071 1 10KOhm 2 FB_CLAMP_TGL_REQ#
RN3001A 1 4.7KOhm2 SMB0_CLK HW Strap pin:
GND
For IT8587, Auto Load Code Function

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
+3VS

99
98
97
U3001

CK32K/GPJ6

GA20/GPB5
PWRSW/GPE4
TMRI1/GPC6
CTX0/TMA0/GPB2
VSS6
VSTBY5
TMRI0/GPC4
CRX0/GPC0
SMDAT2/PECIRQT#/GPF7
SMCLK2/PECI/GPF6
SMDAT1/GPC2
SMCLK1/GPC1
VSTBY4
VSS5
RING#/PWRFAIL# /CK32KOUT/LPCRST#/GPB7
SMDAT0/GPB4
SMCLK0/GPB3
TXD/SOUT0/GPB1
RXD/SIN0/GPB0
DTR1#/SBUSY/GPG1/ID7
SSCE1#/GPG0
NC4
DSR0#/GPG6
NC3
NC2
NC1
SSCE0#/GPG2
GPH6/ID6
GPH5/ID5
GPH4/ID4
VSTBY(PLL)
+3VS
Part Reference = RN3001D
7 4.7KOhm 8 SMB1_DAT
R3015 1 10KOhm 2 A20GATE
RN3001C 5 4.7KOhm 6 SMB1_CLK
1 R3014 1 10KOhm 2 RCIN#
GND VSS1
R3084 1 @ 2 0Ohm LAN_PWR_EN#_R 2 96 KB_ID R3072 1 2 0Ohm EC_XIN R3018 1 2 100KOhm @
33 LAN_PWR_EN# 3 CK32KE/GPJ7 GPH3/ID3 95 BACK_EN_C 45 1 10KOhm 2 FAN0_TACH
+3VA_EC 1 2 100KOhm R3073
VBAT CTX1/SOUT1/GPH2/SMDAT3/ID2 CHGCB1# 52 PM_SUSB# R3012
4 94
25 RCIN# 5 KBRST#/GPB6 CRX1/SIN1/SMCLK3/GPH1/ID1 93 CHGCB0# 52 PM_SUSC# 1 2 100KOhm 1 10KOhm 2 THERM_ALERT#_EC
R3017 R3080
25,44 INT_SERIRQ 6 SERIRQ/GPM6 CLKRUN#/GPH0/ID0 92 PM_CLKRUN# 22
21,44 LPC_FRAME# LFRAME#/GPM5 VSTBY3 +3VA_EC VSUS_ON R3019 1 2 100KOhm @
1 2 RN3004A LPC_AD3_R 7 91
21,44 LPC_AD3 47Ohm 4 LAD3/GPM3 VSS4 GND
3 RN3004B LPC_AD2_R 8 90 TP_DAT +1.1VSUS_ON R3062 1 2 100KOhm
21,44 LPC_AD2 5 47Ohm 6 LPC_AD1_R 9 LAD2/GPM2 PS2DAT2/GPF5 89 TP_CLK TP_DAT 31
RN3004C /1.1VSUS_ON
21,44 LPC_AD1 7 47Ohm 8 10 LAD1/GPM1 PS2CLK2/GPF4 88 TP_CLK 31
RN3004D LPC_AD0_R
C3010
21,44 LPC_AD0 47Ohm
+3VS
11 LAD0/GPM0 PS2DAT1/RTS0#/GPF3 87 SUSACK#
PM_PWRBTN#
22
22
Intel Platform DELAY_VR_AND_ALL_SYS
R3003 1 2 100KOhm
2 1 12 VCC PS2CLK1/DTR0#/GPF2 86
C GND ME_SUSPWRDNACK 22 C
R3025 1 2 0Ohm CLK_KBCPCI 13 VCORE PS2DAT0/TMB1/GPF1 85 PM_RSMRST# R3011 1 2 10KOhm
21 CLK_KBCPCI_PCH 14 LPCCLK/GPM4 PS2CLK0/TMB0/CEC/GPF0 84 BAT_LEARN 88
0.1UF/16V
32 EC_RST# 15 WRST# EGCLK/GPE3 83 DELAY_VR_AND_ALL_SYS 22
20,44 EXT_SMI# ECSMI#/GPD4 EGCS#/GPE2 SUSB_EC# 57,91,92
16 82
Intel Platform 22 ME_AC_PRESENT
45,61,65,66 LID_SW#
17 PWUREQ#/BBO/SMCLK2ALT/GPC7
LPCPD#/GPE6
EGAD/GPE1
DAC5/RIG0#/GPJ5
81 CTL_FAN
SUSC_EC#
CTL_FAN
57,91
50
18 80
22
81,93
PM_SUSB#
VSUS_ON
19 RI1#/GPD0 DAC4/DCD0#/GPJ4 79 USBSLP_EN USBSLP_EN 52,81
GPU_FB_CLAMP
For N14 GPU
71,74,91
RN3003A 1
4.7KOhm4
2 SUSB_EC# +3VSUS
USB_OC2#_EC 20 L80HLAT/BAO/GPE0 DAC3/TACH1B/GPJ3 78 RN3003B 3 SUSC_EC#
52 USB_OC2#_EC OP_SD# 37 4.7KOhm
21 L80LLAT/GPE7 DAC2/TACH0B/GPJ2 77 R3013 1 10KOhm 2 PM_PWRBTN#
22 PM_SUSC#
22,32,33,40,46,53,70 BUF_PLT_RST#
22 RI2#/GPD1 GPJ1 76
BAT_OFF#
SLP_MUSIC_EN
60
36,81
Intel Platform
23 LPCRST#/GPD2 TACH2/GPJ0 75 GND
25 EXT_SCI# ECSCI#/GPD3 AVSS EC_AGND
0Ohm 2 1 R3044 PWR_LED#_R 24 74
+3VACC
1 T3037
56 PWR_WHITE_LED# PWM0/GPA0 AVCC
0Ohm 2 1 R3045 GPA1 25 73 IMON_R R3034 1 @ 2 0Ohm R3034 un-mount by Core-tram
56 DC_IN_LED# PWM1/GPA1 ADC7/CTS1#/GPI7 IMON 80
26 72 WLAN_ON_EC WLAN_ON_EC 53
+3VA_EC VSTBY1 ADC6/DSR1#/GPI6 +3VS
27 71 TMPTU2_C 1 T3041
GND

TACH1A/TMA1/GPD7

KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5
0Ohm 2 1 R3063 GPA2 28 VSS2 ADC5/DCD1#/GPI5 70 ADAPT_AD

PWM7/RIG1#/GPA7
GINT/CTS0#/GPD5
31 KEYBOARD_LED# PWM2/GPA2 ADC4/GPI4 ADAPT_AD 66
0Ohm 2 1 R3069 CHG_LED#_R 29 69 VRM_PWRGD_R R3038 1 2 0Ohm
56 BAT_ORG_LED# 30 PWM3/GPA3 ADC3/GPI3 68 VRM_PWRGD 6,80,92
WLAN_RST# ALL_SYSTEM_PWRGD_R R3037 1 2 0Ohm

TACH0A/GPD6
53 WLAN_RST# PWM4/GPA4 ADC2/GPI2 ALL_SYSTEM_PWRGD 92

KSO11/ERR#
31 67 R3036 1 2 0Ohm 1 2

KSO12/SLCT
RTS1#/GPE5
ILIM_SEL SUS_PWRGD_R RN3005A TP_CLK

KSO9/BUSY
KSO8/ACK#
52 ILIM_SEL PWM5/GPA5 ADC1/GPI1 SUS_PWRGD 81,92 4.7KOhm 4

KSI3/SLIN#
KSI1/AFD#
32 66 3

KSI0/STB#
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7

KSI2/INIT#
THERM_ALERT#_EC TP_DAT

KSO10/PE
RN3005B
74 THERM_ALERT#_EC PWM6/SSCK/GPA6 ADC0/GPI0 65 AD_IINP 88 4.7KOhm 1 2

VSTBY2
IMON_R R3075

KSO13
KSO14
KSO15
1 KSI7 KSI7 31 +5VS
T3033 100KOhm

VSS3

KSI4
KSI5
KSI6
For N14 GPU RN3002A 1
4.7KOhm4
2 TP_CLK
/Non_IMON
IT8587E/AX RN3002B 3 TP_DAT
4.7KOhm

33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
@ GND
@
06V380000017

22,92 PM_PWROK KSI6 31

Intel Platform T3034 1 KSI5
KSI4
31
31
0Ohm 2 1 R3054 PCH_FLASH_DESCRIPTOR_EC
20 PCH_FLASH_DESCRIPTOR
52 USB_OC01#_EC
USB_OC01#_EC GND
KSI3
KSI2
31
31
Keyboard ID

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B KSI1 31 B
31 KSO0 KSO17 KSI0 31
31 KSO1 KSO16 KSO17 31
31 KSO2 KSO16 31
31 KSO3 KSO15 31 +3VS
31 KSO4 KSO14 31
31 KSO5 KSO13 31 2013 Keyboard
31 KSO6 KSO12 31
31 KSO7 KSO11 31

2
31 KSO8
+3VA_EC R3085
31 KSO9
31 KSO10 10KOhm
@

1
50 FAN0_TACH
USBP01_EN
52 USBP01_EN

KB_ID

2
R3086
10KOhm

@
Ver.A

1
0638-002Y000
GND

Ver.C 0638-003A000

Ver.D 0638-003E000
A A

Title : EC_IT8587E
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 30 of 104
5 4 3 2 1
 5 4 3 2 1

KB CONNECTER +5VS

+3VS
+5VS

+3VS
20,30,36,37,46,48,50,51,56,57,58,66,80,87,91

4,6,16,17,20,21,22,23,25,26,28,30,32,36,40,45,46,48,50,5

TOP SIDE FOR 2012 KB +12VS +12VS 28,46,48,57,91

BOTTOM SIDE for 2013 KB

D3109
R1.1
+5VS CAP_LED_PU 6 1 NUM_LED#
I/O4 I/O1
D
Vinafix.com +5VS
D

5 2
VDD GND

1
J3103 CAP_LED_PU

1
35 NUM_LED_PU C3112
P35 34 NUM_LED# R3109 R3110 0.1UF/25V

2
P34 33 200Ohm 200Ohm @ NUM_LED_PU 4 3 CAP_LED#
P33 32 CAP_LED# I/O3 I/O2
P32 31
Keyboard

2
P31 30 KSI1 CM1293_04SO
P30 29 KSI6
P29 28 KSI5
P28 27 KSI0 J3101 CAP_LED_PU
P27 26 KSI4 36 NUM_LED_PU
P26 25 KSI3 P36 1
P25 P1 NUM_LED# 30
24 KSI2 2
P24 23 KSI7 P2 3
P23 P3 CAP_LED# 30
22 KSO15 4
P22 21 KSO12 P4 5
P21 P5 KSI1 30
20 KSO11 6
P20 P6 KSI6 30
19 KSO10 7
P19 P7 KSI5 30
18 KSO9 8
P18 P8 KSI0 30
17 KSO8 9
P17 P9 KSI4 30
16 KSO13 10
P16 P10 KSI3 30
15 KSO7 11
P15 P11 KSI2 30
14 KSO6 12
P14 P12 KSI7 30
13 KSO14 13
P13 P13 KSO15 30
C 12 KSO5 14 C
P12 P14 KSO12 30
11 KSO3 15
P11 P15 KSO11 30
10 KSO4 16
P10 P16 KSO10 30
9 KSO0 17
P9 P17 KSO9 30
8 KSO1 18
P8 P18 KSO8 30
7 KSO2 19
P7 P19 KSO13 30
6 20
P6 P20 KSO7 30
5 21
P5 P21 KSO6 30

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4 KSO17 22
P4 P22 KSO14 30
3 23
P3 P23 KSO5 30
2 KSO16 24
P2 P24 KSO3 30
1 25
P1 P25 KSO4 30
36 26
P36 P26 KSO0 30
27
P27 KSO1 30
FPC_CON_34P 28
P28 KSO2 30
29
12V18ABSM003 M: 1218-016P000 P29 30
P30
/2013KB S: 1218-0179000 P31
31
KSO17 30
32
S: TBD P32 33
P33 KSO16 30
34
35 P34

CN3101A
CN3101B

CN3102A
CN3102B

CN3103A
CN3103B

CN3104A
CN3104B

CN3105A
CN3105B

CN3106A
CN3106B
CN3101C
CN3101D

CN3102C
CN3102D

CN3103C
CN3103D

CN3104C
CN3104D

CN3105C
CN3105D

CN3106C
CN3106D
D3104 +3VS +5VS P35

C3108
C3111
暫暫)
Keyboard LED (暫 SMB_CLK_S 1
I/O1
6
I/O4
SMB_DAT_S 12V18GBSM015
FPC_CON_34P

2
4
6
8

2
4
6
8

1
1

2
4
6
8

2
4
6
8

2
4
6
8

2
4
6
8
/2012KB
+5VS +5VS_KB_BL R3112 1 2 0Ohm
M: 1218-006W000

33PF/50V 2
33PF/50V 2
B 2 5 R3113 1 2 0Ohm @ B
F3101 1 2 1 2 GND VDD S: 1218-01V1000

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7

33PF/50V 1
33PF/50V 3
33PF/50V 5
33PF/50V 7
S: 1218-00A2000(TBD)
1

0.75A/8V L3103 C3104 C3113 @

C3107 /KB_BL 0Ohm 0.1UF/25V
10UF/25V /KB_BL /KB_BL TP_DAT_C 3 4 TP_CLK_C 0.1UF/25V
2

/KB_BL I/O2 I/O3

CM1293_04SO

+3VS +5VS_KB_BL +5VS +3VS

M: 1218-00AL000
S: 1218-00AP000 +5VS_KB_BL Touch Pad
1

R3108 S: 1218-01QU000 R3106 1 @ 2 0Ohm

J3102
+12VS
10KOhm
J3104
S: 1218-01V9000 7 1 TP_PW R_R
R3105 1 2 0Ohm

1 5 J3105 SIDE1 1 2 TP_DAT_C 1 R3102 2 0Ohm

TP_DAT 30
2

2 1 SIDE1 4 6 2 3 TP_CLK_C 1 R3103 2 0Ohm

25 KB_LED_ID 2 4 SIDE2 3 TP_CLK 30
1

3 KB_LED_ID 3 4 TP_GND_R
R3107 KB_BL_GND 4 3 6 2 3 4 5
4 SIDE2 2 5 SMB_CLK_S 16,17,28,45
100KOhm KB_BL_GND 1 5 8 6 SMB_DAT_S 16,17,28,45
/KB_BL 3 FPC_CON_4P 1 SIDE1 SIDE2 6
D
12V18GISM000 FPC_CON_4P
2

/2013KB_BL FPC_CON_6P
12V18GBSM014
KB_BL_CTRL 1 12V18ABSM016
/2012KB_BL

1
G
2 S
A A

1
3 Q3101 R3104 C3105 C3106 C3109
D
Q3104 0Ohm
2N7002
SI2308DS-T1-E3
/KB_BL KB_LED_ID
M: 1218-01S7000 33PF/50V 33PF/50V 33PF/50V

2
1 /KB_BL
30 KEYBOARD_LED#

2
G 1 KB w/o BL
2 S
M: 1218-01JM000
0 KB w/ BL
S: 1218-01JL000 Title : KB/ TP
S: 1218-0187000(TBD) BG1\HW 5\W Engineer: Ahren_CHEN
BOTTOM SIDE for 2013 KB TOP SIDE FOR 2012 KB S: CVILUX(TBD) Size
Custom
Project Name Rev

VGST 1.1
Date: Thursday, December 20, 2012 Sheet 31 of 104
5 4 3 2 1
 5 4 3 2 1

D D

Thermal Policy
+VCCIO_OUT +VCCIO_OUT 4,6
+3VS
+3VA_EC +3VA_EC 28,30

+3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,36,40,45,46,48,50,51,53,57,58,61,80,91,92

2
R3206
10KOhm

1
Force-OFF Switch
C C

R3208 2 1 0Ohm CPU_VGA_THERM#

74 VGA_THERM#
4

/VGA
R3209 2 1 0Ohm
50,92 CPU_THERM#
6 GND1 5
GND2

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3

Q3202A

1
UM6K1NG1DTN +3VA_EC
G
SW3201 S
TACT_SWITCH_4P 2

12V09SBSM028
D
R3204 2 1 100KOhm

6
D3202 2 1 1.2V/0.1A

D3203 2 1 1.2V/0.1A
92 FORCE_OFF# EC_RST# 30

1
C3201

3
D Q3202B 1UF/6.3V

2
22,30,33,40,46,53,70 BUF_PLT_RST# 5 UM6K1NG1DTN
G S

4
B B

+1.05VS +VCCIO_OUT 3
C
R3201 2 @ 1 330Ohm 1 B Q3201
PMBS3904
R3203 2 1 330Ohm E
2

25 H_THRMTRIP#

Vinafix.com

A A

Title : RST_Reset Circuit

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 32 of 104
5 4 3 2 1
 5 4 3 2 1

3.3V Current/Power QCA8171 QCA8172

ATHEROS/QCA8171(gigaLAN) 02V0O0000015
ATHEROS/QCA8172(100LAN) 02V0O0000016 LDO mode 277 mA / 915 mW 111 mA / 366 mW

ATHEROS/QCA8171(gigaLAN) 020O-0040000
ATHEROS/QCA8172(100LAN) 020O-0041000 SWR mode 136 mA / 448 mW 56 mA / 183 mW

PCIE_TXN_LAN
PCIE_TXP_LAN PCIE_TXN_LAN 24
PCIE_TXP_LAN 24
CLK_PCIE_LAN
D CLK_PCIE_LAN# CLK_PCIE_LAN 21 D
CLK_PCIE_LAN# 21 +3VSUS_LAN 40 mil

+AVDDVCO
+DVDDL11

+AVDDL11
LAN_R2001 and LAN_R2002 are not necessary
if pull-high resistors exist on mainboard already. Vinafix.com

LED1
LED0
@

1
+3VSUS_LAN C3313 C3314 C3315 C3316 C3317 C3305 C3306
GND
10UF/25V 10UF/25V 1UF/16V 0.1UF/25V 1UF/16V 0.1UF/25V
R1.1 121206-2 R3301 1000PF/16V

2
Unmount R3301. 4.7KOhm
1

1
R1.1 121206-1

41
40
39
38
37
36
35
34
33
32
31
R3302 R3303 U3301A Symbol refresh. GND
4.7KOhm @ @ @ 4.7KOhm close to Pin1 close to Pin16

DVDDL_REG
LED[1]
LED[0]

AVDDL4

AVDDL3
LX

RX_P

REFCLK_P
GND

RX_N

REFCLK_N
R1.1 121204-2
Change from
2

+3VSUS_LAN 1 30 PCIE_RXP_LAN_C C3322 1 2 0.1UF/25V PCIE_RXP_LAN L3301 to R3323

VDD33 TX_P PCIE_RXP_LAN 24 +3VSUS +3VSUS_LAN
BUF_PLT_RST# 2 29 PCIE_RXN_LAN_C C3321 1 2 0.1UF/25V PCIE_RXN_LAN R3323 0Ohm
22,30,32,40,46,53,70 BUF_PLT_RST# PERSTn TX_N PCIE_RXN_LAN 24
PCIE_WAKE#_LAN 3 28 1 2
4 WAKEn NC 27
21 CLK_REQ_LAN#
+3VSUS_LAN R3304 1 2 30KOhm 5 CLKREQn
DEBUGMODE[0]
TESTMODE[2]
TESTMODE[1]
26 40 mil 40 mil
1% +AVDDL11 6 25
XOUT_LAN 7 AVDDL_REG TESTMODE[0] 24

2 S
D
XIN_LAN 8 XTLO PPS 23

3
+AVDDL11
+AVDDH27 9 XTLI LED[2] 22 +AVDDH27
GND G3 to S5 wake on SI2308DS-T1-E3

G
AVDDH_REG AVDDH
1

AVDDL1

AVDD33

AVDDL2
C3325 1 2 10 21
LAN disable @ Q3301

1
TRXN0

TRXN1

TRXN2
TRXP0

TRXP1

TRXP2

TRXP3
0.1UF/25V C3323 1% RBIAS TRXN3
1UF/6.3V R3305 +12VSUS
2

2.37KOhm
QCA8171-BL3A-R PCIE_WAKE#_LAN R1.1 121205-1

11
12
13
14
15
16
17
18
19
20
C 02V0O0000015 Umount R3320, C
GND

2
GND R3321, Q3302.
+3VA R3320 Mount R3322.
close to Pin6 100KOhm

+3VSUS_LAN
@
+AVDDL11

+AVDDL11

LAN_MDI3N

1
1

1
R3321 LAN_PWR_EN 2 R3322
100KOhm UM6K1N
0Ohm
@ Q3302A

3
https://vinafix.com

2
1
34 LAN_MDI0P LAN_MDI3N 34 Q3302B C3350 @
34 LAN_MDI0N LAN_MDI3P LAN_MDI3P 34 5 UM6K1N 0.1UF/25V
30 LAN_PWR_EN#
@ @

2
34 LAN_MDI1P LAN_MDI2N LAN_MDI2N 34
34 LAN_MDI1N LAN_MDI2P LAN_MDI2P 34
G3->S5 : High PCIE_WAKE# 22,53
S5 ->S0 :Low
Vinafix.com
XIN_LAN

SP3301
Placement near LAN chip
XOUT_LAN 2 1 XOUT_LAN_R ---- EMI ----
X3301 BUF_PLT_RST# +AVDDH27
NB_R0402_20MIL_SMALL 25MHZ
20 mil
1

1 3 C3327
0.1UF/25V
2
1

R1.1 121210-1 +DVDDL11

2

1
B Change C3303, C3304 C3303 C3301 C3302 C3318 B
C3304 => 1UF/16V 0.1UF/25V 0.1UF/25V
15PF/50V 15PF/50V
20 mil
2

1
1AV200000005. GND C3307 C3309

2
0.1UF/25V
1UF/6.3V

2
GND GND GND
GND GND
close to Pin37
close to Pin9 close to Pin22
LED[0] -> 1:High core voltage ; 0:Low core voltage
(AVDDL/DVDDL 1.15-1.25V) (AVDDL/DVDDL 1.1V)
LED[1] -> 1:SWR ; 0:LDO 20 mil
20 mil +AVDDL11 close to Pin19 +AVDDVCO
for QCA8172,LAN_C2009 con be NC close to Pin34
Both LEDO and LED1 with internal pull-high resistors in the chip, R3310
LAN_R2006, vR2007, LAN_R2008 and LAN_R2009 must be removed. 1 0Ohm 2
@

1
C3308 C3326 C3310 C3311 C3312
0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 1UF/16V C3324
+3VSUS_LAN R1.1 121206-1 /giga 4.7UF/6.3V
U3301B

2
Symbol refresh.
R3308 1 2 10KOhm 42 57
@ 43 GND1 GND16 56
R3307 1 2 10KOhm 44 GND2 GND15 55
@ 45 GND3 GND14 54
LED0 C3320 2 1 470PF/16V 46 GND4 GND13 53
GND5 GND12 GND GND
47 52
A 48 GND6 GND11 51 A
@ For QCA8171-C, it can GND7 GND10
close to Pin13 close to Pin31
GND +3VSUS_LAN only work at high core 49 50
GND8 GND9
voltage mode
R3309 1 2 10KOhm
@ QCA8171-BL3A-R
GND GND
R3306 1 2 10KOhm LDO 02V0O0000015

LED1 C3319 2 1 470PF/16V

@
Title : LAN-QCA8171/72
GND BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom P/N
VGST
1.1
Date: Thursday, December 20, 2012 Sheet 33 of 104
5 4 3 2 1
 5 4 3 2 1

/giga
L3401

2 23 LAN_MDI1P_T
33 LAN_MDI1P TD1+ MX1+ /giga
TCT3 1 24 LAN_CT1 C3403 1 2 0.1UF/25V TCT1
TCT1 MCT1 LAN
33 LAN_MDI1N 3 22 LAN_MDI1N_T
TD1- MX1-

5 20 LAN_MDI2P_T
33 LAN_MDI2P TD2+ MX2+ /giga
TCT2 4 21 LAN_CT2 C3404 1 2 0.1UF/25V TCT2 8 1
TCT2 MCT2

33 LAN_MDI2N 6 19 LAN_MDI2N_T
D TD2- MX2- D

33 LAN_MDI3P 8 17 LAN_MDI3P_T
TD3+ MX3+
P3 M2 P1 P0
TCT1 7 18 LAN_CT3 C3406 1 2 0.1UF/25V TCT3 M3 M1 P2 M0
TCT3 MCT3
9 16 LAN_MDI3N_T
33 LAN_MDI3N TD3- MX3-

33 LAN_MDI0P 11 14 LAN_MDI0P_T
TD4+ MX4+
TCT4 10 15 LAN_CT0 C3405 1 2 0.1UF/25V TCT4
TCT4 MCT4
12 13 LAN_MDI0N_T
33 LAN_MDI0N TD4- MX4- GND
GST5009
GIGA /Giga
RN3401B
LAN_MDI0P_T 3 4 LAN_MDI0P_TR LAN_MDI2P_T RN3403B 3 4 LAN_MDI2P_TR R1.1 121129-4
0Ohm 0Ohm
Unmount
CM3401, CM3402,

4
CM3403, CM3404.
/10_100 @ @
L3402 CM3401 CM3403 Mount
5 13 90Ohm/100Mhz 90Ohm/100Mhz RN3401, RN3402,

1
NC2 NC4
4 12 RN3403, RN3404.
NC1 NC3
LAN_MDI0N 8 9 LAN_MDI0N_T
TD2 TX2 LAN_MDI0N_T 1 2 LAN_MDI0N_TR LAN_MDI2N_T 1 2 LAN_MDI2N_TR
0Ohm 0Ohm
TCT4 6 11 LAN_CT0 RN3403A
CT3 CT4 RN3401A /Giga
LAN_MDI0P 7 10 LAN_MDI0P_T
TD1 TX1

LAN_MDI1N 2 15 LAN_MDI1N_T RN3402B

/Giga
RD2 RX2 LAN_MDI1P_T 3 4 LAN_MDI1P_TR LAN_MDI3P_T RN3404B 3 4 LAN_MDI3P_TR
3 14 0Ohm 0Ohm
TCT3 LAN_CT1
C CT1 CT2 C
LAN_MDI1P 1 16 LAN_MDI1P_T

4
RD1 RX1
10/100MB @ @
CM3402 CM3404
90Ohm/100Mhz 90Ohm/100Mhz
10M/100M

1
LAN_MDI1N_T 1 2 LAN_MDI1N_TR LAN_MDI3N_T 1 2 LAN_MDI3N_TR
0Ohm 0Ohm
RN3404A
RN3402A /Giga

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LAN_CT0 1 2 1 2 R3405
C3409 0.01UF/100V 75Ohm
LAN_CT1 1 2 1 2 R3404
C3410 0.01UF/100V 75Ohm
LAN_CT2 1 2 1 2 R3403
C3411 /giga 0.01UF/100V 75Ohm /giga
LAN_CT3 1 2 1 2 R3402 FGND1S R1.1 121130-1
D3402
C3412 /giga 0.01UF/100V 75Ohm /giga
1

D3403 AZ2025-01H.R7G
1

R3401 C3402 LAN_MDI0N 1 6 LAN_MDI0P

0Ohm 1000PF/2KV 1 2
@ @
2
2

GND 2 5 +3VSUS D3405 0603-050E101NP-LF

DGND DGND 1 2

07V180000001

LAN_MDI1P 3 4 LAN_MDI1N

CM1293_04SO

GND DGND

B D3401 /giga B

LAN_MDI2P 1 6 LAN_MDI2N

GND 2 5 +3VSUS

LAN_MDI3P 3 4 LAN_MDI3N Place near chassis GND

CM1293_04SO

1217-002E000(BGA) 12V17GISM080
J3402
CO-LAY 1 6
2 1 SIDE2
3 2
4 3 5
4 SIDE1
R1.1 121129-1
WTOB_CON_4P Delete D3407 & D3408
12V17GISM080
/10_100
J3401
A LAN_MDI0N_TR 1 A
LAN_MDI0P_TR 2 1
LAN_MDI1N_TR 3 2
LAN_MDI1P_TR 4 3
LAN_MDI2N_TR 5 4
LAN_MDI2P_TR 6 5
LAN_MDI3N_TR 7 6 9
LAN_MDI3P_TR 8 7 SIDE1 10
8 SIDE2
WTOB_CON_8P
12V17GISM006
/giga
DGND Title : RJ45
BG1\HW5\W Engineer: Ahren_CHEN
1217-000K000(BGA) 12V17GISM006
Size Project Name
VGST Rev
Custom P/N 1.1
Date: Thursday, December 20, 2012 Sheet 34 of 104
5 4 3 2 1
 5 4 3 2 1

+12VSUS +12VSUS 26,33,51,81,91

Placement near audio codec +3VO +3VO 70,81,84,91

Place close to U3601 PIN 11 ---- EMI ----

Note: +5VO +5VO 81,82,83,84,91

Kepp PVDD supply and speaker traces routed on DGND plane.

+3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,32,40,45,46,48,50,51,53,57,58,61,80,91,92
R3616 +5VS
Keep away from AGND and other analog signals.
1 2 +5VS 20,30,31,37,46,48,50,51,56,57,58,66,80,87,91
DMIC_CLK DMIC_CLK_R
+5VSUS_AVDD 45 DMIC_CLK
220Ohm/100Mhz
09V010000025

1
C3626 +3VSUS_DVDD +5VSUS_AVDD +5VSUS_PVDD

2
12PF/50V
R3601

2
D 1% 2.49KOhm
D

2
C3602 C3604 C3605 C3607 C3608
SENSE_A 1UF/6.3V 0.1UF/25V
C3603
4.7UF/6.3V Place C3602~C3610 close to U3601 1UF/6.3V 0.1UF/25V
C3606
4.7UF/6.3V 1UF/6.3V 0.1UF/25V
C3609

1
1

C3612 A_GND A_GND

1000PF/16V
2

U3601A
1 21
DVDD_CORE AVDD1 32
7 AVDD2 33
A_GND DVDD PVDD1 39
PVDD2
If SENSE_A total length is greater than 6 inches, EMI reserved 20120924 PVSS
36
change C3631 to 0.1uF C3623 2 1 10PF/50V
@
20 ACZ_BCLK_AUD 1AV200000001 5 34 H_SPKL+ 37
BITCLK PORTD_+L 35
PORTD_-L H_SPKL- 37
20 ACZ_SDOUT_AUD
4
SDATA_OUT
Place close to U3601 PIN 12 R3602 1 2 33Ohm 6 38
Speaker
20 ACZ_SDIN0 SDATA_IN PORTD_+R H_SPKR+ 37
+5VSUS_AVDD
Place R3602 close to U3601 8 PORTD_-R
37 H_SPKR- 37
20 ACZ_SYNC_AUD SYNC 22 MIC_IN_AC_E_L 37
PORTA_L
2

20,37 ACZ_RST#_AUD
9 23 MIC_IN_AC_E_R 37 Mic
R3603 RESET# PORTA_R 19
VrefOut_A VREFOUT_A_E 37
10KOhm C3624 2 1 1UF/6.3V 1 2
A_GND
1AV200000038 25 1UF/6.3V C3619
PORTB_L AC_HP_L 37
37 HP_JD# R3605 2 1 20KOhm 1% EMI request 20120924 26
AC_HP_R 37 Headphone
1

PORTB_R
SENSE_B 37 MIC_EXT_JD# R3604 1 2 39.2KOhm 1% SENSE_A 11
SENSE_A
C
Place R3604 & R3605 close to U3601 SENSE_B 12
SENSE_B PORTC_L
15
R1.1
C

If SENSE_B is un-used, then pull high SENSE_B PORTC_R

16
to +5VSUS_AVDD by 10Kohm resistor. DMIC_CLK_R 2 VrefOut_C/GPIO4
20
AUD_GPIO4# 37
DMIC_CLK/GPIO1 13 R3620 2 1 10KOhm MIC_IN_AC_E_L
DMIC_DAT 3 PORTF_L 14 R3621 2 1 10KOhm MIC_IN_AC_E_R
45 DMIC_DAT DMIC_0/GPIO2 PORTF_R C3618
R3609
+3VSUS_DVDD 40 10 PC_BEEP 2 1 PC_BEEP_C 2 1 U3601B
EAPD PCBeep SB_SPKR 25
Place JP3604~JP3607 together and close to U3601. 100KOhm
42
43 DVSS1 DVSS8
49
48
JP3605 18 0.1UF/25V 44 DVSS2 DVSS7 47
CAP2 DVSS3 DVSS6

2
1 2 30 17 45 46
R3619 Cap+ VrefFilt DVSS4 DVSS5
C3613 Close to Codec

1
NB_R0603_32MIL_SMALL 10KOhm C3613 28 92HD99B1X5NDGXWCX8
4.7UF/6.3V V-

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02V0P0000005
31

2
Vreg(+2.5V)

2
JP3604
1 2 29 R3610
37 MUTE_AMP# Cap-

1
24 C3614 C3615 C3616 C3617
NB_R0603_32MIL_SMALL 41 AVSS2_1 27
DVSS AVSS2_2
Audio Codec Power Rail

1
92HD99B1X5NDGXWCX8 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 1UF/6.3V 10KOhm
JP3606
1 2 02V0P0000005
A_GND A_GND A_GND A_GND A_GND A_GND
NB_R0603_32MIL_SMALL

1
JP3607
2 R1.1 Audio Codec Power Rail
NB_R0603_32MIL_SMALL
non-Sleep & Music --> +5VS & +3VS +3VS
/non-SLP_MUSIC/non-RTD3
R3612 1 0Ohm 2
A_GND

B
Sleep & Music --> +5VO & +3VO JP3602 1
R0603
2
+5VSUS_AVDD (0.1A) B

(0.5A) Q3602

2 S
+3VSUS_DVDD

D
/RTD3
+3VO /SLP_MUSIC/RTD3

3
D3602 /non-SLP_MUSIC/non-RTD3 IRFML8244TRPBF
Moat

G
+5VS 1 AMP_PWR_EN R3611 1 0Ohm 2

1
3 +5VS VGS= 4.5V , Rdson = 41mOhm
2 SLP_MUSIC_EN_C VGS= 10V , Rdson = 24mOhm /SLP_MUSIC/RTD3
2

/SLP_MUSIC/RTD3 1 2
/RTD3 0.8V/0.2mA Q3601 1.5A
2 S

+5VSUS_PVDD
D

+5VO

1
R3649 3 C3622 R3614
3

D IRFML8244TRPBF
(1A) 0.22UF/16V 22KOhm 1%
100KOhm
R1.1
G

Q3607 VGS= 4.5V , Rdson = 41mOhm /SLP_MUSIC/RTD3

1
1

2
1 2N7002 VGS= 10V , Rdson = 24mOhm Sleep & Music without H/W EQ reserved
G /RTD3 /SLP_MUSIC/RTD3
2 S R3613 1 22KOhm 2 1% 1 2
R3640 0Ohm
1

C3621 /SLP_MUSIC/RTD3
+3VSUS_DVDD 0.033UF/16V
25 RTD3_AUD_PWR /SLP_MUSIC/RTD3 /SLP_MUSIC/RTD3 (0.01A)
2

10% R3652
2

@ +3VS 2 10KOhm 1
@ Q3604
+12VSUS +12V_AUDIO
R3618
+12V_AUDIO_AMP
E

C
+12VSUS

1
10KOhm @ 4
3

6
/non-RTD3 D3601 @ (0.01A) R3654
47K
1

1
R3650 JACK_IN 1 R3617 10KOhm /SLP_MUSIC/RTD3 UM6K1N
B

2 0Ohm 1 3AMP_PWR_EN 100KOhm 1% /RTD3ONLY 2 R3655 1 2 Q3603A R3615

DVDD_IO @ 3 @ 2 R3651 1 2 +12VSUS 10KOhm /SLP_MUSIC/RTD3 100KOhm 1%
2
47K

+3VS
10K

1
3
VCCHDA
47K

Q3605 10KOhm /SLP_MUSIC/RTD3

2
/RTD3 0.8V/0.2mA /SLP_MUSIC UM6K1N

2
Q3606 1 R3653 2 4.7KOhm1 SLP_MUSIC_EN_C 5 Q3603B
1

30,37 JACK_IN# 30,81 SLP_MUSIC_EN

G 68@-5mA/Vceo=+/-50V /SLP_MUSIC/RTD3

4
S
2N7002 2
2 S
D
3

required check
A IRFML8244TRPBF A
G
1

Audio Codec Power Rail +5VSUS_PVDD/AVDD

Turn ON by MIC JACK_IN# Audio Codec Power Rail +3VSUS_DVDD
+12V_AUDIO Turn ON by SLP_MUSIC_EN( keep H/W EQ.( present)
SUSB_EC# keeps +5VSUS_PVDD/AVDD for S0

Title : AUDIO_ID92HD99
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 36 of 104
5 4 3 2 1
 5 4 3 2 1

+5VSUS_AVDD +3VA
Sleep & Music 20120924 Internal Speakers Header
+3VA +3VA 20,26,30,33,57,60,65,81,88,93

2
R3720 R3719 update speaker header define 20120914
36 MIC_EXT_JD# +5VS +5VS 20,30,31,36,46,48,50,51,56,57,58,66,80,87,91
5% /SLP_MUSIC 5% /SLP_MUSIC

3
Q3702B +3VSUS
+3VSUS +3VSUS 22,26,28,30,33,34,53,81,92
UM6K1N 100KOhm 10KOhm

1
/SLP_MUSIC 5

6
Q3702A
UM6K1N

3
D D
/SLP_MUSIC 2 RN3701A RN3701B
10KOhm 10KOhm

1
A_GND A_GND
Close to J3704

4
NOTE: J3704
R3718 0Ohm ONKYO: Pin 5 & Pin7 short in speaker side 9
2 1 HARMAN: Pin 6 & Pin7 short in speaker side 7 SIDE2
30,36 JACK_IN# 6 7
/SLP_MUSIC HARMAN_DET2
24 HARMAN_DET2 5 6
24 ONKYO_DET1 ONKYO_DET1
R3717 0Ohm H_SPKL- R3731 1 2 0Ohm H_SPKL-_R 4 5
36 H_SPKL- 4
2 1 MIC_JACK_IN# 36 H_SPKL+ H_SPKL+ R3732 1 2 0Ohm H_SPKL+_R 3
/non-SLP_MUSIC H_SPKR- R3733 1 2 0Ohm H_SPKR-_R 2 3
36 H_SPKR- 2
R3703 4.7KOhm H_SPKR+ R3734 1 2 0Ohm H_SPKR+_R 1
36 VREFOUT_A_E
2 1 R1.1 36 H_SPKR+ 1
SIDE1
8

R3704 4.7KOhm MIC- JACK WTOB_CON_7P

1
2 1 12V17AISM017
J3701 C3710 C3709 C3708 C3707 1217-01D1000

1
1 2200PF/50V 2200PF/50V 2200PF/50V 2200PF/50V C3731 C3732 C3733 C3734

2
2 1 1 2 MIC_IN_AC_E_J_R_E 3 1500PF/50V 1500PF/50V 1500PF/50V 1500PF/50V
36 MIC_IN_AC_E_R 2
C3704 1UF/10V R3713 0Ohm
R1.1

2
2

2
2 1 1 2 MIC_IN_AC_E_J_L_E 4
36 MIC_IN_AC_E_L 5
C3703 1UF/10V R3714 0Ohm R3708 R3707 R3706 R3705
3.3Ohm 3.3Ohm 3.3Ohm 3.3Ohm
C Note: Default is 0 Ohm note PHONE_JACK_5P C
1

1
For EMI solution, it can be replaced with bead. C3706 C3705 12V14GBSD051

1
IDT has verified three ferrite beads that will 1500PF/50V 1500PF/50V
M: 1214-00Y4000
meet the WLP performance requirements:
R1.1
2

2
Murata: BLM18BD601SN1 S: HP_JD#_R
TDK: MMZ1608Y601BTA MIC_JACK_IN#
Taiyo Yuden: LF BK 1608HM601 A_GND A_GND Populated these CLOSE to CODEC.
A_GND
R1.1

1
D3703 D3704 D3705

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@ @

JMV0402E520T030 JMV0402E520T030

2
AZ2025-02S
AMP De-Pop Control circuit R1.1 07V220000001 07V220000001

3
07V220000015
Note:
Q3701 prevent the codec from seeing a jack +5VS

insertion during SLEEP_MUSIC mode. A_GND A_GND A_GND

2
+5VS
R3721
36 HP_JD#
36 AUD_GPIO4# 5%

3
3 Q3701 100KOhm
D R1.1
2

R3712 Q3703B

1
2
5 UM6K1N
B
/non-SLP_MUSIC 1 R1.1 R3722
B

4
6
G 5%
S 2
0Ohm 2N7002 100KOhm Q3703A
HP JACK
1

/SLP_MUSIC 2 UM6K1N
D3702

1
J3702

1
HP_JD#_R 1 HP_JACK_R_E 1 5 HP_JACK_L_E
R3701 1 2 5.1Ohm 1 2 HP_JACK_R_E 3
36 AC_HP_R
R3715 0Ohm 2
A_GND 2
R3702 1 2 5.1Ohm 1 2 HP_JACK_L_E 4 @
36 AC_HP_L
R3716 0Ohm 5 20,36 ACZ_RST#_AUD 2
1

C3702 C3701 3 MIC_IN_AC_E_J_R_E 3 4 MIC_IN_AC_E_J_L_E

MUTE_AMP# 36
note 1500PF/50V 1500PF/50V PHONE_JACK_5P 30 OP_SD# 1

1
12V14GBSD051
2

D3701 1V/0.1A R3710 AZ2025-04S

M: 1214-00Y4000 @ 07V220000025
S: 1 2 10KOhm
07V220000025

2
R3711 0Ohm
A_GND A_GND A_GND

R1.1 Reserve 20120913

A
Vinafix.com A

Title : AUDIO_ID92HD99
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 37 of 104
5 4 3 2 1
 5 4 3 2 1

+3V_CARD

+3VS Max : 0.25A +3VS_CR

1
1

1
SP4001 C4011
1 2 4.7UF/6.3V C4012 5.1KOhm
0.1UF/16V R4009

2
D D
@ Pin 6 @

2
NB_R0603_32MIL_SMALL

GND
Close to connector
EMI

C4014 5PF/50V
4 3 USB_PP3_R USB_PP3_R 1 2
24 USB_PP3 0Ohm
RN4002B
@
2

EMI
@ L4001
90Ohm/100Mhz
C4015 5PF/50V
3

USB_PN3_R 1 2
2 0Ohm 1 RN4002A USB_PN3_R
24 USB_PN3
@

T4007 1 XI J4001
GND 10
SD_D2 9 GN1 13
SD_D3 1 DATE2 NP_NC1
SD_CMD 2 CD/DAT3
3 CMD
C C
4 VSS1
+3V_CARD VDD
SD_CLK 1 R4008 2 SD_CLK_R 5 14
6 CLK NP_NC2 11
0Ohm VSS2 GN2
SD_D0 7 12 SD_WP#
C4010 SD_D1 8 DAT0 WP 15
2.2PF/50V DATE1 GN3 16 SD_CD#
1AV200000056 CD
SD_CARD_9P

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12V21GBSM004
AU6465 GND
GND GND GND
C400910PF/50V

/48MHz AU6465R
(Default)
2

T4005 T4003
@
Close to connector
Mount R4005 ,R4003
1

1
SD_CMD

Unmount R4005 ,R4003

SD_D2
SD_D3

SD_CLK
GND
AU6465: 020K-0015000 ALCOR/AU6465A61-GBF-GR SD_CLK trace length shorter , surround with GND
AU6465R: 020K-0014000 ALCOR/AU6465RA61-GBF-GR
29
28
27
26
25
24
23
22

U4001A
GND
MSCLK
MSD7/SDD2
MSD3/SDD3
MSD6/SDD4
SDCMD
MSD2/SDD5
SDCLK

B B
R4001 330Ohm 1%
GND 2 1 REXT 1
2 REXT 21 1 T4002
+3VS_CR V33P MSD0/SDD6
USB_PP3_R 3 20 1 T4001
DP MSD4/SDD7
1

USB_PN3_R 4 19 SD_D0
C4001 5 DM MSD1/SDD0 18 SD_D1
0.1UF/16V XI 6 VS33P MSD5/SDD1 17 SD_WP#
2

1 7 XI MSBS/SDW P 16 VDDIO_INT
XO VDDIO 15 XTALSEL XTALSEL 1 T4008
T4006 XTALSEL
VDDHM
C1_V33

SDCDN
MSINS

1
RSTN
VDD
V18

C4006
GND 0.1UF/16V
2

AU6465A61-GBF-GR
8
9
10
11
12
13
14

02V0K0000006 +3VS_CR
V18_CR GND
2
CR_RESET

R4002
SD_CD#
V18_CR

U4001B @ 0Ohm
30 +3V_CARD
31 GND1 R4006 @ 0Ohm
1

32 GND2 1 2
GND3 +3VS_CR BUF_PLT_RST# 22,30,32,33,46,53,70
33
GND4
1

34 T4004
35 GND5
GND6
1

36
37 GND7 C4002 C4003 C4004 C4005
GND8 4.7UF/6.3V 4.7UF/6.3V 0.1UF/16V 0.47UF/6.3V
2

A AU6465A61-GBF-GR A
02V0K0000006

GND GND GND GND GND

Title : AU6465
BG1\HW5\W Engineer: VGST
Size Project Name Rev
Custom 1.1
Date: Thursday, December 20, 2012 Sheet 40 of 104
5 4 3 2 1
 5 4 3 2 1

D D

DEBUG CARD CONN.

+3V

C
C4401 2 1 0.1UF/16V
C
@
J4402

1
LPC_AD0 2 1 13
21,30 LPC_AD0 3 2 SIDE1
LPC_AD1 4 3
21,30 LPC_AD1 4
20,30 EXT_SMI# R4412 2 @ 1 0Ohm 5
LPC_AD2 6 5
21,30 LPC_AD2 6
25,30 INT_SERIRQ R4413 2 @ 1 0Ohm 7
LPC_AD3 8 7
21,30 LPC_AD3 8

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9
LPC_FRAME# 10 9
21,30 LPC_FRAME# 11 10 14
12 11 SIDE2
21 CLK_DEBUG 12
FPC_CON_12P
12V18AWSM010
M :1218-00I1000
S : 1218-01GU000
S : 1218-01BR000
B B

A A

Title : BUG_Debug
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 44 of 104
5 4 3 2 1
 5 4 3 2 1

LCD_VCC for eDP

Controller circuit D4502 +LCD_VCC
1
30 LCD_BACKOFF#
3
2 +LCD_VCC +3VS
30,61,65,66 LID_SW#

2
1V/0.1A +AC_BAT_SYS
RTD2132R R4506 /eDP U4501
R4576 /LVDS LCD power sequence issue. 10KOhm R4560 1 2 0Ohm+LCD_VCC_OUT 1 5
1 2 10KOhm /eDP OUT IN L4505
From LVDS translator
2 80Ohm/100Mhz
R4508

1
D4501 GND AC_INV 1 2
LVDS_BL_EN 1 2 LVDS_BL_EN_C 2 1 R4572 1 0Ohm 2 /eDP DP_VDD_EN_R 3 4 2 1 +LCD_VCC_OUT
R4567 @ 0Ohm CPU 23 eDP_VDD_EN EN DSG Irat=2A

1
1 2 RB751V-40 150Ohm C4506 C4507 C4508
CPU 23 eDP_BL_EN
R4568 /eDP 0Ohm
R4507 /eDP
G5244T11U
@

1
39PF/50V 0.1UF/25V 1UF/25V
100KOhm

2
1

1
PANEL_VCC R4573 1 0Ohm 2 @ C4502 C4503
R4509
/eDP
100KOhm

2
4.7UF/6.3V 1UF/6.3V

2
2
D D
1kOhm/100Mhz
23 L_BKLT_CTRL L4502 1 2
/eDP

Check PCH/FCH or CPU PD

LCD_BL_PWM_C LCD_VCC for LVDS
BACK_EN_C PANEL_VCC +LCD_VCC

1
1 R4502 2 C4501 C4500
4 eDP_DISP_UTIL
R4549 1 2 0Ohm
0Ohm @ 100PF/50V 100PF/50V

2
@ /LVDS

Vinafix.com 30 BACK_EN_C
BACK_EN_C +3V

120Ohm/100Mhz
J4502
SIDE2
8

1
2 1 L4504 6

R4523
USBP5-
USBP5+
5
4
6
5
Camera
100KOhm 3 4
@ DMIC_CLK 2 3

2
DMIC_DAT 1 2
1
SIDE1
7 DMIC
LCD power sequence issue.
12V17GIRM003
NOTE: RTD2132R
WTOB_CON_6P

DMIC 1. Entire trace of Panel VCC should be wider than 80-mil

+3VS +3VS
36 DMIC_DAT DMIC_DAT
36 DMIC_CLK DMIC_CLK
+LCD_VCC +3VS
LVDS Connector
2

2
R4543 R4544
2

1
4.7KOhm 4.7KOhm C4505
D4503 1UF/10V
1

1
C4534 R1.1 11/07 J4501

34
AZ2025-02S
1

2
1
C4533 12PF/50V R4526 C4504
/LVDS /LVDS
150PF/50V 1KOhm 4.7UF/6.3V R4533 32

SIDE2
2

2
LVDS_EDID_CLK LVDS_EDID_DATA 0Ohm 30 GND2
@ @ 30
C /LVDS @ /LVDS BACK_EN_C 29 C
3

2
28 29

2
27 28
27
1

C4532 C4531 26
220PF/50V 220PF/50V 25 26
@ @ 24 25
2

23 24
22 23
21 22
LVDS_EDID_CLK R4524 1 0Ohm 2 /LVDS LVDS_EDID_CLK_C 20 21
LVDS_EDID_DATA R4525 1 0Ohm 2 /LVDS LVDS_EDID_DATA_C 19 20
R4519 1 0Ohm 2 /eDP 18 19
LVDS_L0N R4521 1 0Ohm 2 /LVDS LVDS_L0N_C 17 18
LVDS_L0P R4522 1 0Ohm 2 /LVDS LVDS_L0P_C 16 17
15 16
1 0Ohm 2 /LVDS 14 15

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LVDS_L1N R4515 LVDS_L1N_C
LVDS_L1P R4514 1 0Ohm 2 /LVDS LVDS_L1P_C 13 14
12 13
@ RN4501A LVDS_L2N R4517 1 0Ohm 2 /LVDS LVDS_L2N_C 11 12
Camera
Vinafix.com
1 2 LVDS_L2P R4516 1 0Ohm 2 /LVDS LVDS_L2P_C 10 11
0Ohm 10
R4510 1 0Ohm 2 /eDP 9
USBP5- LVDS_LCLKN R4518 1 0Ohm 2 /LVDS LVDS_LCLKN_C 8 9
24 USB_PN5 8
LVDS_LCLKP R4520 1 0Ohm 2 /LVDS LVDS_LCLKP_C 7
7
2

R4511 1 0Ohm 2 /eDP 6

L4508 LCD_BL_PWM_C 5 6
90Ohm/100Mhz 4 5
3 4
3

USBP5+ AC_INV 2 3
24 USB_PP5 2

SIDE1
1
3 4 31 1
0Ohm GND1
R4512
@ RN4501B 100KOhm

33
@ WTOB_CON_30P

2
eDP_DPIN_1N R4532 1 0Ohm 2 /eDP LVDS_L0N_C 12V37GBSM004
eDP_DPIN_1P R4531 1 0Ohm 2 /eDP LVDS_L0P_C

eDP_DPIN_0N R4529 1 0Ohm 2 /eDP LVDS_L1N_C

eDP_DPIN_0P R4530 1 0Ohm 2 /eDP LVDS_L1P_C

eDP0_AUXP R4528 1 0Ohm 2 /eDP LVDS_L2N_C +LCD_VCC +3VS +3V

eDP0_AUXN R4527 1 0Ohm 2 /eDP LVDS_L2P_C

LVDS_LCLKP_C

1
C4529 C4525 C4530 C4526
eDP and LVDS co-lay

1
C4528 47PF/50V 0.1UF/25V 47PF/50V 0.1UF/25V

2
C4523 1 2 0.1UF/25V eDP_DPIN_1P 12PF/50V
4 EDP_TXP1

2
B
4 EDP_TXN1 C4521 1 2 0.1UF/25V eDP_DPIN_1N @ B
/eDP LVDS_LCLKN_C
/eDP
C4535 1 2 0.1UF/25V eDP_DPIN_0P
C4536 1 2 0.1UF/25V eDP_DPIN_0N
/eDP
/eDP
C4522 1 2 0.1UF/25V DP_DPIN_0P
4 EDP_TXP0 SWR_V12
>25 mil or shape C4524 1 2 0.1UF/25V DP_DPIN_0N
Co-Layout 4 EDP_TXN0
/LVDS
SWR_V12 /LVDS
>25 mil or shape LDO mode current > 600mA 1KOhm
R4569
SWR_LX 1 2 SWR_V12 1 2 LVDS_HPD_C

LVDS_EDID_DATA
23 EDP_HPD
LVDS_HPD

1
LVDS_EDID_CLK
R4501 0Ohm C4514
/LVDS /LVDS 0.1UF/16V

LVDS_HPD_C
MODE_CFG1
MODE_CFG0
1

SW mode C4519 C4520 1 0Ohm 2 LVDS_EDID_CLK_C /LVDS

eDP HPD

LVDS_L0N
LVDS_L0P

2
10UF/6.3V 0.1UF/16V +3VS R4513 /eDP
R4541
1 2 /LVDS /LVDS
100KOhm
2

L4501
4.7UH @
2

Irat=650mA

GND
R4503
100KOhm
R4504 Intel Solution
100KOhm
@ /Intel_eDP
+3VS AVCC33 +3VS DVCC33
60ohm / 1A 60ohm / 2A
2

L4506 Irat=3A 80Ohm/100Mhz C4540 1 2 0.1UF/25V eDP0_AUXN

1 2 L4507 1 2 DVCC33 C4539 1 2 0.1UF/25V eDP0_AUXP eDP
35
34
33
32
31
30
29
28
27
26
25
/eDP U4502
0.1UF/25V
1

120Ohm/100Mhz C4517 /eDP

GND
HPD

TXO0+
MIICSDA
VCCK
GND2
GND1

MODE_CFG1
MODE_CFG0
MIICSCL

TXO0-
0.1UF/25V
1

C4516 C4537 1 2
/LVDS 10UF/6.3V 0.1UF/25V DP0_AUXN_C
09V010000006 C4509 /LVDS /LVDS
4
4
EDP_AUXN
EDP_AUXP
C4538 1 2 0.1UF/25V DP0_AUXP_C LVDS
2

/LVDS C4515 /LVDS /LVDS

2

10UF/6.3V /LVDS DP0_AUXN_C 1 24 LVDS_L1N

/LVDS R4570 R4571 AVCC33 DP0_AUXP_C 2 AUX_N TXO1- 23 LVDS_L1P
GND 100KOhm AVCC33 3 AUX_P TXO1+ 22 LVDS_L2N
100KOhm DP_V33 TXO2-
GND @ /Intel_eDP 4 21 LVDS_L2P
DP_DPIN_0P 5 DP_GND TXO2+ 20 LVDS_LCLKN
2

DP_DPIN_0N 6 LANE0_P TXOC- 19 LVDS_LCLKP DVCC33

LANE0_N TXOC+
PANEL_VCC

7 18 DVCC33
SWR_VCCK

SWR_V12
PWM_OUT

DP_V12 PVCC
SWR_VDD

DP_REXT 8 17 LVDS_BL_EN
SWR_LX

DP_REXT
PWM_IN

BL_EN
CIICSDA
2

CIICSCL
1

1
C4512 C4513 R4534 C4511
Initial Code EEPROM +3VS Program EEPROM, 0.1UF/16V
/LVDS
0.1UF/16V
/LVDS
12KOhm
/LVDS
0.1UF/16V
2

2
slave address=0xA8 RTD2132R-CG /LVDS
1

9
10
11
12
13
14
15
16

+3VS
1 2 MODE_CFG1 1 2
R4562 4.7KOhm R4564 @ 4.7KOhm
02V0J0000030
PANEL_VCC
LCD_BL_PWM_OUT

A
+3VS
1 2 MODE_CFG0 1 2 A
U4503 SP4501
SWR_V12

R4561 4.7KOhm R4563 4.7KOhm /LVDS

SWR_LX
DVCC33

@ 8 1 L_BKLT_CTRL_IN 1 2 L_BKLT_CTRL
EC_SDA
EC_SCL

7 VCC E0 2
LVDS_EDID_CLK R4538 1 2 0Ohm @ SCL_R_RT 6 WC# E1 3
LVDS_EDID_DATA R4539 1 2 0Ohm @ SDA_R_RT 5 SCL E2 4 R0402
SDA VSS R4547 1 0Ohm 2 @ /LVDS
M24C64-WMN6TP EC 28,30,58,74
28,30,58,74
SMB1_CLK
SMB1_DAT
R4548 1 0Ohm 2 @
SP4503
EC Mode (EP Mode): 1 2 LCD_BL_PWM_C
Please mount R4528, R4529 and R4531. @ R4566 1 0Ohm 2 /LVDS
16,17,28,31 SMB_CLK_S DVCC33
Reserve R4525, R4526 and U4503. R4565 1 0Ohm 2 /LVDS
PCH 16,17,28,31 SMB_DAT_S
Note:
R0402
/LVDS
For RTD2132R CONFIG:
1

C4510 1. Entire trace of Panel VCC should be wider than 80-mil

C4518
0.1UF/16V
22UF/6.3V
/LVDS
2

/LVDS
Title : LVDS Out
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 45 of 104
5 4 3 2 1
 5 4 3 2 1

+3VS_MCU

R4637 1 @ 2 0Ohm BUF_PLT_RST# 22,30,32,33,40,53,70

U4601B

58
59
IT6511FN
GND1
GND2
MCURSTN#
+3VS Power : 1.8V Switch

2
60 +12VS
61 GND3 R4646 R4642 MCUVDD R4602 1 2 4.7KOhm C4611 1 2 0.1UF/25V
GND4 +3VS_MCU
4.7KOhm 4.7KOhm

1
06V110000007 @ @ C4612 1 2 0.1UF/25V +1.8VS 400 mA +1.8VS_CRT
R4605 R4604 @ R4639

1
10KOhm 10KOhm R4603 1KOhm R4636 1 2 0Ohm
+3VS_CRT 22KOhm
@

1
RX_VDD18

2
D D

G
Q4602
@
ISPSCL R4626 1 @ 2 33Ohm IT6511_DDCSCL PCSDA IT6511_PWR_EN CRT_PWR_EN

2 S

2 S
D
D
ISPSDA R4627 1 @ 2 33Ohm IT6511_DDCSDA PCSCL

2
SSM3K315T

G
DPC_HPD 23
C4638

1
Q4603

2
IT6511_PWR_EN @ 0.1UF/25V

1
2N7002 C4639 CRT_PWR_EN

2
@ 07V040000001 0.1UF/25V

1
C4613 for deep standby
@ mode
U4601A

57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
0.1UF/25V Q4602 for switch deep standby mode / used : 5mW / No used : 15 mW

1
IT6511FN
DAC_VDD

DDCSCL
OVDD3

IVDD4

IVDD3

PCSCL
OVDD2
GND

MCURSTN

MCUVDDH
MCUVDD

HPD
SYSRSTN
OSCOUT
DDCSDA

PCSDA
+1.8VS_CRT close U4601 8,11,14pin
CRT_VSYNC 1 42 INT# R4606 1 @ 2 10KOhm +3VS DAC_VDD
CRT_HSYNC 2 VSYNC INT# 41 XTAL_27M_IN B4602
HSYNC XTALIN close U4601 5pin
R4601 1 2 100Ohm CRT_RSET 3 40 XTAL_27M_OUT 400 mA 1 2
CRT_COMP 4 RSET XTALOUT 39 R4619 1 2 1MOhm
COMP ASPVCC RX_VCC18
C4609 1 2 0.1UF/25V 5 38 120Ohm 60 mA
VDDA PVCC2

2
DAC_VDD 6 37 RX_VDD18
R4607 1 2 75Ohm CRT_R 7 IORP DVDD18_2 36 C4644 C4615 C4617
IORN DVSS18 RX_VCC18

1
R4610 1 2 37.4Ohm CRT_RN 8 35 C4603 1 2 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V
DP2_TXN1 4

1
R4608 1 2 75Ohm CRT_G 9 VDDC1 AVCC2 34 DP2_TXN1_C C4616
1 2 10 IOGP RX1N 33 1 2 0.1UF/25V T4601
R4611 37.4Ohm CRT_GN DP2_TXP1_C C4604 DP2_TXP1 4 1UF/10V

2
11 IOGN RX1P 32 IT6511_DBG 1 X4601 27MHZ SR4603
R4609 1 2 75Ohm CRT_B 12 VDDC2 URDBG 31 DP2_TXN0_C C4605 1 2 0.1UF/25V 1 3 1 2
IOBP RX0N DP2_TXN0 4
R4612 1 2 37.4Ohm CRT_BN 13 30 DP2_TXP0_C RX_VDD18

VGADDCSDA
IOBN RX0P

VGADDCCLK
VGADETECT

14 29 RX_VCC18 C4606 1 2 0.1UF/25V DP2_TXP0 4 R0402 B4606 close U4601 28,37pin close U4601 15,17,49,52pin
VDDC3 AVCC1

DVDD18_1
DCAUXN 1 2

4
RXAUXN
DCAUXP

RXAUXP
ISPSDA

C4633 C4632
ISPSCL
OVDD1

PVCC1
IVDD1

IVDD2

18PF/50V 18PF/50V 120Ohm 48 mA 100 mA

2
C4626
RX_VDD18 +3VS_CRT 06V110000007 1UF/10V C4645 C4625 C4627 C4647
15
16
17
18
19
20
21
22
23
24
25
26
27
28 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V

1
RX_VDD18
C C
CRT_DET_R R4615 1 2 0Ohm CRT_DET CRT_DDC_CLK R4613 1 2 22Ohm CRT_DDC_CLK_R 42 mA close U4601 39pin close U4601 29,35pin
CRT_DDC_CLK_R @ R4640 1 2 0Ohm ISPSCL RX_VCC18 SP4607 close U4601 26,38pin RX_VCC18
2

CRT_DDC_DATA_R @ R4641 1 2 0Ohm ISPSDA CRT_DDC_DATA R4614 1 2 22Ohm CRT_DDC_DATA_R 1 2 57 mA

@ R4616
10KOhm DPC_AUXP_C C4607 1 2 0.1UF/25V DPC_AUXP_R C9202 1 2 0.1UF/25V r0402
DPC_AUXP 23

2
1
DPC_AUXN_C C4608 1 2 0.1UF/25V DPC_AUXN_R C9201 1 2 0.1UF/25V C4646 C4629 C4631
DPC_AUXN 23
1

C4630 0.1UF/25V 0.1UF/25V 0.1UF/25V

1
1UF/10V 7 mA

2
https://vinafix.com
+3VS +3VS

DPC_AUXP_R R4617 1 1MOhm 2 R4649 2 100KOhm1

DPC_AUXN_R R4618 1 1MOhm 2 R4650 2 100KOhm1

+5VS
U4607
1
2
3
OE# Vcc
A
5

4
Power : +3.3V switch
GND Y +3VS_MCU up to 1.35mA / +3VS_CRT up to 5 mA
74AHCT1G125GW +5VS_CRT
20 mA 10 mA
CRT_VSYNC R4643 1 2 0Ohm CRT_VSYNC_R R4631 1 2 33Ohm CRT_VSYNC_CON +3VS +3VS_MCU
CRT_HSYNC R4644 1 2 0Ohm CRT_HSYNC_R R4632 1 2 33Ohm CRT_HSYNC_CON
1

@ J4601
@ +5VS F4601 16
U4606
1.6A/6V R4633 1 2 0Ohm
1 5
OE# Vcc

2
2 CRT_DDC_CLK_CON 15 5 CRT_DET_R
2

3 A 4 10 @ C4610
GND Y CRT_VSYNC_CON 14 4 ISPSCL_R R4625 1 22Ohm 2 ISPSCL 0.1UF/25V

1
CRT_PIN9 9 10 mA
74AHCT1G125GW CRT_HSYNC_CON 13 3 CRT_B_CON
8 +3VS_CRT
B B
CRT_DDC_DATA_CON 12 2 CRT_G_CON
@ 7 R4634 1 2 0Ohm
ISPSDA R4624 1 22Ohm 2 ISPSDA_R 11 1 CRT_R_CON

2
6 @
2

D4610 C4648 NOTE: R4624 , R4625 Q4601 C4602 C4601

2 S
D
3
0.1UF/25V 1UF/10V 0.1UF/25V
for Programming

1
CRT_HSYNC_CON 1 6 CRT_VSYNC_CON SSM3K315T

G
1

17

1
M : 1210-00K9000 CRT_PWR_EN
D_SUB_15P
12V10GBSD007
2 5
+5VS Q4601 for switch deep standby mode / used : 5mW / No used : 15mW
+3VS

CRT_DDC_CLK_CON 3 4 CRT_DDC_DATA_CON
R4647 IT6511FN internal Pull up
47KOhm
CM1293_04SO @
@
+5VS CRT_IN# R4648 CRT_DET_R
25 CRT_IN#
100Ohm

C4624
1

0.1UF/25V
D4604 1AV300000024
RB751V-40
+5VS_CRT
+3VS_MCU 0.068UH
2

CRT_R SP4601 2 1 SHORT_PIN CRT_R_R L4603 1 2 CRT_R_CON

+5VS_CRT
0.068UH
CRT_G SP4602 2 1 SHORT_PIN CRT_G_R L4604 1 2 CRT_G_CON
2

R4620 R4621 R4622 R4623

4.7KOhm 4.7KOhm 2.2KOhm 2.2KOhm 0.068UH
2

A CRT_B SP4603 2 1 SHORT_PIN CRT_B_R L4605 1 2 CRT_B_CON A

G
1

CRT_DDC_DATA_R 1 6 CRT_DDC_DATA_CON @ @ @
1

3
@ @ @ @ @ @ D4605 D4602 D4603
S

C4618 C4619 C4620 C4621 C4622 C4623 1.25V/0.15A 1.25V/0.15A 1.25V/0.15A

22PF/50V 22PF/50V 22PF/50V 22PF/50V 22PF/50V 22PF/50V
2

Q4604A
5

UM6K1NG1DTN
G

2
CRT_DDC_CLK_R 4 3 CRT_DDC_CLK_CON +3VS_CRT +3VS_CRT +3VS_CRT
Title : DP to CRT IT6511FN
S

Q4604B BG1\HW5\W Engineer: Ahren_CHEN

UM6K1NG1DTN Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 46 of 104
5 4 3 2 1
 5 4 3 2 1

4 DP1_CLKP C4832 1 2 0.1UF/16V DP1_CLKP_C DP1_TXP2_C RN4801B 3 4 @ DP1_TXP2_CR +12VS

0Ohm +12VS 28,31,46,57,91 +3VS
/CRLS
C4834 1 2 0.1UF/16V DP1_CLKN_C
4 DP1_CLKN +3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,32,36,40,45,46,50,51,53,57,58,61,80,91,92

2
/CRLS +1.5VS
C4833 1 2 0.1UF/16V DP1_TXP0_C CM4801
4 DP1_TXP0 +5VS +5VS 20,30,31,36,37,46,50,51,56,57,58,66,80,87,91
/CRLS 67ohm
C4835 1 2 0.1UF/16V DP1_TXN0_C /CRLS
4 DP1_TXN0 +1.5VS +1.5VS 26,53,57,84

3
/CRLS

1
4 DP1_TXP1 C4828 1 2 0.1UF/16V DP1_TXP1_C DP1_TXN2_C RN4801A 1 2 @ DP1_TXN2_CR C4836
0Ohm

1
/CRLS C4813 C4814 0.01UF/16V

HDMI_SDA
HDMI_SCL
SDA_SRC
SCL_SRC
4 DP1_TXN1 C4829 1 2 0.1UF/16V DP1_TXN1_C DP1_TXP1_C RN4802B 3 4 @ DP1_TXP1_CR 0.1UF/10V 0.01UF/16V /ALS8401
0Ohm

2
/CRLS /ALS /ALS

2
ISET
C4830 1 2 0.1UF/16V DP1_TXP2_C
4 DP1_TXP2

2
/CRLS
C4831 1 2 0.1UF/16V DP1_TXN2_C CM4802
4 DP1_TXN2
/CRLS

41
40
39
38
37
36
35
34
33
32
31
D 67ohm D
/CRLS

3
2 680OHM

2 680OHM

2 680OHM

2 680OHM

2 680OHM

2 680OHM

2 680OHM

2 680OHM

VDD15_4

NC4
PD#

NC3

VDD15_3
EPAD

SDA_SRC
SCL_SRC

GND

SDA_SNK
SCL_SNK
DP1_TXN1_C RN4802A 1 2 @ DP1_TXN1_CR
0Ohm
DP1_TXP0_C RN4803B 3 4 @ DP1_TXP0_CR DP1_TXP2 C4807 1 2 0.1UF/16V
0Ohm
/ALS IN_D2P 1 30 OUT_D2P
DP1_TXN2 C4808 1 2 0.1UF/16V IN_D2N 2 IN_D2p OUT_D2p 29 OUT_D2N
IN_D2n OUT_D2n

2
/ALS HPD_SRC 3 28 DP1_HPD_CON
CM4803 DP1_TXP1 C4805 1 2 0.1UF/16V IN_D1P 4 HPD_SRC HPD_SNK 27 OUT_D1P

/CRLS

/CRLS

/CRLS

/CRLS

/CRLS

/CRLS

/CRLS

/CRLS
67ohm /ALS IN_D1N 5 IN_D1p OUT_D1p 26 OUT_D1N

1
/CRLS DP1_TXN1 C4806 1 2 0.1UF/16V IN_D0P 6 IN_D1n OUT_D1n 25 OUT_D0P

3
/ALS IN_D0N 7 IN_D0p OUT_D0p 24 OUT_D0N

R4826

R4829

R4825

R4823

R4828

R4824

R4822

R4827

DCIN_EN/SCL_CTL
DDCBUF/SDA_CTL
DP1_TXN0_C RN4803A 1 2 @ DP1_TXN0_CR DP1_TXP0 C4803 1 2 0.1UF/16V 8 IN_D0n OUT_D0n 23 CFG
0Ohm 9 I2C_CTL_EN CFG 22
/ALS IN_CLKP OUT_CLKP

EQ/I2C_ADDR
DP1_CLKP_C RN4804B 3 4 @ DP1_CLKP_CR DP1_TXN0 C4804 1 2 0.1UF/16V IN_CLKN 10 IN_CKp OUT_CKp 21 OUT_CLKN
0Ohm IN_CKn OUT_CKn
/ALS

VDD15_1
VDD15_2
DP1_CLKP C4801 1 2 0.1UF/16V U4801B /ALS

VDD33
1

REXT
HDMI_DP_M /ALS 42 49

PRE
NC1

NC2
CM4804 DP1_CLKN C4802 1 2 0.1UF/16V 43 EPAD1 EPAD8 48
/ALS 44 EPAD2 EPAD7 47
67ohm EPAD3 EPAD6
3 U4801A /ALS 45 46
D /CRLS

11
12
13
14
15
16
17
18
19
20
PS8201ATQFN40GTR2-A0 EPAD4 EPAD5
Q4802 DP1_CLKN_C RN4804A 1 2 @ DP1_CLKN_CR DPB_DDC_CLK R4815 2 1 0Ohm SCL_SRC 02V080000006 02V080000006
1 0Ohm
+3VS 2N7002 /ALS PS8201ATQFN40GTR2-A0

DCIN_EN
G /CRLS DPB_DDC_DATA R4816 2 1 0Ohm SDA_SRC

DDCBUF
2 S /ALS
+3VS +1.5VS

PRE
OUT_D2P RN4805A 1 2 @ DP1_TXP2_CR DPB_HPD R4819 2 1 0Ohm HPD_SRC

EQ
0Ohm
Active Level Shifter = ALS /ALS

2
Cost-reduced Level Shifter = CRLS GND

3
R4861
CM4805 510Ohm

1
67ohm N/A

1
/ALS U4801. BOM Optional P/N C4810 C4809 R4834 C4838 C4837 C4812 C4811

1
0.01UF/16V 0.1UF/10V 4.99KOhm 0.1UF/10V 0.1UF/10V 0.01UF/16V 0.1UF/10V
OUT_D2N RN4805B 3 4 @ DP1_TXN2_CR /ALS /ALS /ALS /ALS8401 /ALS8401 /ALS /ALS
0Ohm

2
PS8201A /ALS 0208-000V000

2
OUT_D1P RN4806A 1 2 @ DP1_TXP1_CR
0Ohm
C C

2
PS8401A /ALS + /ALS8401 0208-0015000

3
HDMI Level Shifter BOM Optional R4862
CM4806 510Ohm
67ohm N/A Compatible design for PS8201A and PS8401A
HDMI 4K2K Active Level Shifter /ALS /ALS

1
OUT_D1N RN4806B 3 4 @ DP1_TXN1_CR Pin # Name PS8201A PS8401A
0Ohm
Non HDMI 4K2K Cost-reduced Level Shifter /CRLS OUT_D0P 1 2 @ DP1_TXP0_CR
RN4807A
0Ohm 12 +1.5VS NC Connected to +1.5VS

https://vinafix.com
2
15 GND NC Connected to GND

3
R4863
+3VS CM4807 510Ohm 34 ISET NC Pls see below table
USE for non-RGB output 67ohm N/A
+5VS /ALS 37 +3VS NC Connected to +3.3VS

1
1

/non-RGB
R4867 U4802 OUT_D0N RN4807B 3 4 @ DP1_TXN0_CR
0Ohm
10KOhm 1 8
/non-RGB 2 GND OUT3 7 OUT_CLKP RN4808A 1 2 @ DP1_CLKP_CR

次
IN1 OUT2 0Ohm +3VS
3 6
2

IN2 OUT1

2
4 5 R4868 1 10KOhm 2 DCIN_EN : DC cou;ing enable; Internal pull down at ~150k , 3.3V I/O.
EN# OC# +3VS
4

3
/non-RGB R4864 L: default, AC coupling input

次
CM4808 510Ohm DCIN_EN R4805 2 1 4.7KOhm
TPS2041BDR 67ohm N/A @
H: DC coupling input
06V290000020 /ALS DDCBUF : Enable active DDC buffer; Internal pull up at ~150K , 3.3V I/O
1

1
DDCBUF R4817 2 1 4.7KOhm L: default, passive DDC pass-through
OUT_CLKN RN4808B 3 4 @ DP1_CLKN_CR /ALS H: active DDC buffer with default threshold
次
+12VS 0Ohm
R4818 2 1 4.7KOhm M: active DDC buffer without internal pull up resistor
@ PRE : Output pre-emphasis setting; Internal pull down at ~150k , 3.3V
PRE R4809 2 1 4.7KOhm
@
I/O.
1

L: no pre-emphasis
G

F4801 0.35A/6V R4814 2 1 4.7KOhm

2 1 +5VS_HDMI @ H: 1.6dB pre-emphasis
2 S

次
+5VS
M: 2.5dB pre-emphasis
D

CFG : Configuration pin, 3.3V IO, internal pull down at ~150k . 3.3V
Q4806 CFG R4811 2 1 4.7KOhm I/O.
NDS351AN_NL @
B L: HDMI ID disable B
H: HDMI ID enable
次
3

EQ R4812 2 1 4.7KOhm
+3VS +3VS @ EQ : Receiver equalization setting; Internal pull down at ~150k , 3.3V
D4803 R4813 2 1 4.7KOhm I/O.
1V/0.1A @ L: programmable EQ for channel loss up to 6.5dB @ 3Gbps
H: programmable EQ for channel loss up to 9.5dB @ 3Gbps

次
For PS8401A M: programmable EQ for channel loss up to 3dB @ 3Gbps
11

12
1

R4833 R4832 R4830 R4831 ISET : TMDS output swing adjustment; Internal pull down at ~150k , 3.3V
2

2.2KOhm 2.2KOhm 2.2KOhm 2.2KOhm ISET R4865 2 1 4.7KOhm I/O.

/CRLS /CRLS @ L: default
G

Q4801A UM6K1NG1DTN HDMI_SCL & HDMI_SDA : no via , R4866 2 1 4.7KOhm H: increase +13%
2

/CRLS 1 6 trace length should be as short as possible @ M: reduce -13%

R4801 2 1 0Ohm
S

23 DPB_DDC_CLK /CRLS HDMI_SCL

R4802 2 1 0Ohm HDMI_SDA
S

23 DPB_DDC_DATA /CRLS 4 3
/CRLS
1

Q4801B UM6K1NG1DTN
G

C4827 C4826
10PF/50V 10PF/50V
Vinafix.com
5

@ @
Intel 0203
HDMI HPD Cost Reduced Level Shifter

23
21
Design Recommendation J4801
+3VS

P_GND4
P_GND2
+3VS

+5VS_HDMI 18 19 DP1_HPD_CON
18 19
2

30 HDMI_HPD_M R4820 2 1 0Ohm HDMI_SDA 16 17

R4806 /CRLS 14 16 17 15 HDMI_SCL
1MOhm DP1_CLKN_CR 12 14 15 13
@ DP1_CLKP_CR 10 12 13 11
8 10 11 9 DP1_TXN0_CR
1
1

8 9
G

A 23 DPB_HPD R4810 2 1 0Ohm DP1_HPD_R R4803 1 2 4.7KOhm DP1_HPD_CON DP1_TXN1_CR 6 7 DP1_TXP0_CR A

DP1_HPD_R DP1_HPD_CON /CRLS /CRLS DP1_TXP1_CR 4 6 7 5
2 S

4 5
D

2 3 DP1_TXN2_CR
2 3 1 DP1_TXP2_CR
1
1

@ Q4803
P_GND3
P_GND1

2N7002 R4807 D4802 R4804

20KOhm 1.25V/0.15A 10KOhm
@ /CRLS /CRLS
3.3V tolerent to HPD
2

HDMI_CON_19P
2

22
20

12V12GBSD009
Title : HDMI-4K2K
+3VS Engineer: Ahren_CHEN
BG1\HW5\W
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 48 of 104
5 4 3 2 1
 5 4 3 2 1

D D

U5001 Close to CPU

+3VS
temp setting : 97 degree
U5001
5 1 THERM_SET R5001 1 1% 2 17.4KOhm
VCC SET 2
GND
2

4 3 CPU_THERM#
C5004 HYST OT# CPU_THERM# 32,92
0.1UF/25V G709T1UF
1

06V220000007

C C

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B B

FAN
R5011 1 2 0Ohm
only for 15S FAN
D5001
2 1 @
FAN0_TACH 30
1

C5003
C5008 SS0520 100PF/50V
22PF/50V @
2

J5001
4
SIDE1 1
1 2 +5VS
2 3
5 3
SIDE2
U5002
12V17AISM011 1 8
W TOB_CON_3P 2 FSM# GND4 7
FAN_PW R 3 VIN GND3 6
A VOUT GND2 A
4 5
30 CTL_FAN VSET GND1
1

C5011 C5010 C5009 APL5606AKI-TRG

M: 1217-00LH000 22PF/50V 2.2UF/10V 2.2UF/10V 06V520000005
2

S: 1217-0114000 @
S: 1217-01EC000
S: XINYA(TBD) Title : THERMAL/ FAN
BG1\HW 5\W Engineer: Ahren_CHEN
Size Project Name Rev
Vinafix.com
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 50 of 104
5 4 3 2 1
 5 4 3 2 1

HDD
J5102
S1
C5106 2 1 0.01UF/50V SATA_TXP0_C S2 S1 4
D 20 SATA_TXP0 D
C5107 2 1 0.01UF/50V SATA_TXN0_C S3 S2 P_GND1
20 SATA_TXN0 S3
S4 2
C5108 2 1 0.01UF/50V SATA_RXN0_C S5 S4 NP_NC1
20 SATA_RXN0 S5
C5109 2 1 0.01UF/50V SATA_RXP0_C S6
20 SATA_RXP0 S6
S7
+3VS S7

P1
P2 P1
P3 P2
+3VS +5VS P4 P3
+5VS P5 P4
P6 P5
P7 P6
C5102 P8 P7
P8

1
10UF/6.3V C5101 C5105 C5103 P9
@ 0.1UF/25V @ @ C5104 0.1UF/25V P10 P9
@ 10UF/6.3V T5101 1 P11 P10
10UF/6.3V

2
P12 P11 1
P13 P12 NP_NC2
P14 P13 3
P15 P14 P_GND2
P15

SATA_CON_22P

Vinafix.com 12V24GBRD031

C
M: 1224-0138000 C
S :TBD

ZERO POWER ODD SUPPORT https://vinafix.com

support Hokey turn off ODD power
20
20
ODD Power Consumption MAX 1.8A /Cuntinue 1.1A

SATA_TXP1
SATA_TXN1
C5122
C5123
1
1
2 0.01UF/50V
2 0.01UF/50V
SATA_TXP1_C
SATA_TXN1_C
S1
S2
S3
S4
J5103
S1
S2
S3
P_GND2
4

2
+5VS_ODD
ODD

C5124 1 2 0.01UF/50V SATA_RXN1_C S5 S4 NP_NC2

20 SATA_RXN1 S5

1
R5102 1 2 0Ohm C5125 1 2 0.01UF/50V SATA_RXP1_C S6 C5114
+5VS +5VS_ODD 20 SATA_RXP1 S6
/NON_Zero_ODD S7 @ C5115 @ C5116 0.1UF/25V
S7
10UF/6.3V 10UF/6.3V

2
B B
2 S
D
3

SI2308DS-T1-E3 20 SATA_ODD_PRSNT# R5105 1 0Ohm 2 SATA_ODD_PRSNT#_R P1

G

Q5103 /Zero_ODD P2 P1
1

+5VS_ODD P2
/Zero_ODD /Zero_ODD P3 1
+12VSUS R5106 1 0Ohm 2 SATA_ODD_DA#_R P4 P3 NP_NC1
20 SATA_ODD_DA# P4
P5
P6 P5 3
P6 P_GND1
2

+3VS +5VSUS SATA_CON_13P

R5103 12V24GBRD024
100KOhm
/Zero_ODD
1

M: 1224-012E000
1

R5107 R5104
10KOhm 100KOhm S :TBD
/Zero_ODD /Zero_ODD
3

1
2

Q5101B R5108
1

5 UM6K1N 10KOhm
/Zero_ODD C5117 /Zero_ODD
4

1UF/16V
2

2
6

/Zero_ODD
UM6K1N
23 SATA_ODD_PW RGT 2 Q5101A
/Zero_ODD 3
D
1

Q5104
2N7002
1 /Zero_ODD
A A
G
2 S

Title : SATA HDD/ ODD

BG1\HW 5\W Engineer:

Size Project Name Rev
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 51 of 104
5 4 3 2 1
 A B C D E

USB 2.0 port x2 (Left Up) 2 PORT USB Sub-BOARD 1 PORT USB Sub-BOARD 2 PORT USB Sub-BOARD
Mount LX5210 -> For EMI request Mount J5201 Mount J5206
+5V_USB1 J5206 /2-PORT USB2.0
+5VSUS U5202 @ +5V_USB1 12
1 8 RNX5210A 2 1 J5201 /1-PORT USB2.0 DPP7_CON_P 11 12 14
GND OUT1 0Ohm 11 SIDE2
2 7 DPN7_CON_N 6 8 DPN7_CON_N 10
IN1 OUT2 24 USB_PN7
3 6 5 6 SIDE2 +5V_USB1 9 10
IN2 OUT/NC 4 5 9

2
4 5 LX5210 JP5201 8
30 USBP01_EN EN#/EN OC# USB_OC01#_EC 30
90Ohm/100MHz DPP1_CON_P 3 4 1 2 7 8 For 1 USB PORT
G547E1P81U /2-PORT USB2.0 DPN1_CON_N 2 3 1 2 6 7
1 2 6 USB Port
1

C5232 C5213 06V290000008 7 1MM_OPEN_M1M2 5

For 2 USB PORT

3
1 39PF/50V 1UF/6.3V DPP7_CON_P 1 SIDE1 4 5 1
24 USB_PP7 4
4 0Ohm 3 FPC_CON_6P DPP1_CON_P 3
2

RNX5210B DPN1_CON_N 2 3 13
12V18AWSM023
@ 1 2 SIDE1
M : 1218-01UN000 1 USB3.0: port 2
FPC_CON Power SW(U5201) FPC_CON_12P
1port FPC_CON_6P 06V290000010(1.5A) 12V18AWSM010

2port FPC_CON_12P 06V290000008(2.5A) RNX5206A 2 1 @

Co-Lay M : 1218-00I1000 USB3.0 port 1
24 USB_PN1
0Ohm
DPN1_CON_N TP (S & C)

2
LX5206
90Ohm/100MHz

USB Sub-Board Mount Unmount

3
DPP1_CON_P
24 USB_PP1
RNX5206B
4 0Ohm 3
@
1port J5201 J5206
2port J5206 J5201

USB 3.0 ports x 1 without Sleep & Charge (Right Up) PLACE ESD Diodes near USB Connector
D5202 @
USB3_RX0_CON_N 1 10 USB3_RX0_CON_N
@ USB3_RX0_CON_P 2 LINE_1 NC4 9 USB3_RX0_CON_P
RNX5208B 4 0Ohm 3
3 LINE_2 NC3
C5215 2 1 0.1UF/25V USB3_TX0_C_N USB3_TX0_CON_N USB3_TX0_CON_N 4 GND(Pin8) 7 USB3_TX0_CON_N M:1213-017J000
24 USB3_TXN0 LINE_3 NC2

3
2 LX5208 USB3_TX0_CON_P 5 6 USB3_TX0_CON_P 2
LINE_4 NC1
+5V_USB3 67ohm

11
13
+5VSUS U5203 AZ1045_04F J5202
1 8

P_GND2
P_GND4
1

2
2 GND OUT1 7 USB3_RX0_CON_N 5
IN1 OUT2 C5209 2 1 0.1UF/25V USB3_TX0_C_P USB3_TX0_CON_P 4 STDA_SSRX-
3 6 24 USB3_TXP0
IN2 OUT/NC 2 1 +5V_USB3 USB3_RX0_CON_P 6 GND1
USBP01_EN 4 5 USB_OC01#_EC 0Ohm
EN#/EN OC# RNX5208A DPP0_CON_P 3 STDA_SSRX+
@ D+
G547E1P81U @ 7
GND2
1

C5216 06V290000008 @ D5201 DPN0_CON_N 2

RNX5209B 4 3 USB3_TX0_CON_N 8 D-
0Ohm STDA_SSTX-

P_GND1
P_GND3
1UF/6.3V DPP0_CON_P 1 6 DPN0_CON_N 1
VBUS
2

USB3_RX0_CON_N USB3_TX0_CON_P 9
2.5A 24 USB3_RXN0 STDA_SSTX+

3
LX5209 +5VSUS

2
67ohm C5220 C5221 C5207 USB_CON_9P

10
12
2 5 47UF/6.3V 47UF/6.3V 0.1UF/25V 12V13GUSD006
@

1
USB3_RX0_CON_P
24 USB3_RXP0
GND
2 0Ohm 1
RNX5209A @ DPN6_CON_N 3 4 DPP6_CON_P

CM1293_04SO

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RNX5207B 4 3 @
0Ohm

24 USB_PN0
DPN0_CON_N
USBSLP / NON_USBSLP

3
3 LX5207 +5V_USB3 +5V_USB2 3
90Ohm/100MHz

2
DPP0_CON_P
24 USB_PP0
2 1 R5212 1 2 0Ohm
0Ohm
RNX5207A @ /NON-USBSLP

USB 3.0 ports x 1 with Sleep & Charge (Right Down)

TPS2544 Device True Table

RNX5201B 4 0Ohm 3 @
C5212 2 1 0.1UF/25V USB3_TX1_C_N USB3_TX1_CON_N
24 USB3_TXN1
M:1213-017J000

3
LX5201
67ohm

4 4

2
C5206 2 1 0.1UF/25V USB3_TX1_C_P USB3_TX1_CON_P

11
13
24 USB3_TXP1
2 0Ohm 1 J5204
RNX5201A @

P_GND2
P_GND4
USB3_RX1_CON_N 5
+5V_USB2 4 STDA_SSRX-
+5V_USB2 USB3_RX1_CON_P 6 GND1
L5201 DPP6_CON_P 3 STDA_SSRX+
1 2 RNX5202B 4 3 @ 7 D+
0Ohm GND2
USB3_RX1_CON_N DPN6_CON_N 2
24 USB3_RXN1 D-
80Ohm/100Mhz USB3_TX1_CON_N 8
STDA_SSTX-

P_GND1
P_GND3
/USBSLP LX5202 1
+5VSUS Device Pega No. VX No. 67ohm USB3_TX1_CON_P 9 VBUS
STDA_SSTX+
1

High Current Limit : 2A R5229 R5227 TPS2544RTER 0629-00CU000 06V290000019

2
1

2
22KOhm 22KOhm USB3_RX1_CON_P C5223 C5224 C5211 USB_CON_9P
Low Current Limit : 2A

10
12
R5221 /USBSLP /USBSLP 2 0Ohm 1 47UF/6.3V 47UF/6.3V 0.1UF/25V 12V13GUSD006
24 USB3_RXP1
10KOhm 1% 1% RNX5202A @ @
2

1
@ @
R5222 1 2 10KOhm +5VSUS
2

ILIM_SEL_C +5VSUS
/USBSLP
1

1 2 0Ohm
USB_OC2#_EC 30
R5240 /USBSLP
1

(OD)

10KOhm C5222 close to U5207 R5231

17
16
15
14
13

C5222
@ U5207A

PLACE ESD Diodes near USB Connector

ILIM_LO
GND2
ILIM_HI

GND1
FAULT#
2

0.1UF/16V 4 0Ohm 3 @
24 USB_PN6 RNX5211B D5205 @
24 USB_PP6
1 12 DPN6_CON_N USB3_RX1_CON_N 1 10 USB3_RX1_CON_N
2 IN OUT 11 USB_N6- USB3_RX1_CON_P 2 LINE_1 NC4 9 USB3_RX1_CON_P
DM_OUT DM_IN LINE_2 NC3
2

3 10 3
/USBSLP 1 R5241 2 0Ohm ILIM_SEL_C 4 DP_OUT DP_IN 9 LX5204 USB3_TX1_CON_N 4 GND(Pin8) 7 USB3_TX1_CON_N
30 ILIM_SEL ILIM_SEL NC USB_P6+ LINE_3 NC2
(OD) 90Ohm/100MHz USB3_TX1_CON_P 5 6 USB3_TX1_CON_P
CTL1
CTL2
CTL3

5 LINE_4 NC1 5
EN

DPP6_CON_P AZ1045_04F
TPS2544RTER /USBSLP
5
6
7
8

2 0Ohm 1 RNX5211A
@ @ @
1

30,81 USBSLP_EN /USBSLP R5237 1 2 0Ohm

C5204 C5217
30 CHGCB0# /USBSLP R5238 1 2 0Ohm
30 CHGCB1# /USBSLP R5239 1 2 0Ohm 0.1UF/16V 0.1UF/16V
2

U5207B
18
19 GND3 Title : USB JACK
RN5223B RN5224B GND4
USB_PN6 3 4 /NON-USBSLP USB_PN6_C 3 4 /NON-USBSLP Engineer: Ahren_CHEN
0Ohm 0Ohm BG1\HW5\W
TPS2544RTER /USBSLP
USB_PP6 1 RN5223A 2 /NON-USBSLP USB_PP6_C 1 RN5224A 2 /NON-USBSLP GND GND Size Project Name Rev
0Ohm 0Ohm
GND Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 52 of 104
A B C D E
 5 4 3 2 1

D D

+12VS +12VS 28,31,46,48,57,91

+5VS +5VS 20,30,31,36,37,46,48,50,51,56,57,58,66,80,87,91

+3V +3V 22,44,45,57,91

+3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,57,58,61,80,91,92

+3VSUS +3VSUS 22,26,28,30,33,34,37,81,92

+1.5VS +1.5VS 26,48,57,84

22,33 PCIE_WAKE# WLAN/BT

2
R5317
0Ohm
H =4mm Half Card
/WOWL +1.5VS +3VS_WLAN

1
J5303
1 2 +3VS_WLAN
T5310 1 3 WAKE# 3.3V_1 4
BT_ON/OFF#_C R5326 1 2 0Ohm 5 Reserved1 GND7 6
@ 7 Reserved2 1.5V_1 8 1 T5318
21 CLK_WLAN_REQ# CLKREQ# UIM_PWR
9 10 1 T5317 R5313 0Ohm
GND1 UIM_DATA WLAN_ON_EC 30
11 12 1 T5316 R5312 /WOWL
21 CLK_PCIE_WLAN# REFCLK- UIM_CLK
13 14 1 T5315 10KOhm
21 CLK_PCIE_WLAN 15 REFCLK+ UIM_RESET 16 1 T5314
GND2 UIM_VPP
RB751V-40
T5311 1 17 18 WLAN_ON_C D5301 1 2
Reserved/UIM_C8 GND8 WLAN_ON 25
C BT_ON/OFF#_C R5325 1 2 0Ohm 19 20 /nonWOWL C
@ 21 Reserved/UIM_C4 W_DISABLE# 22 WLAN_RST#_R R5310 1 2 0Ohm
GND3 PERST# BUF_PLT_RST# 22,30,32,33,40,46,70
23 24 SP5301 1 2 +3VS_WLAN /nonWOWL
24 PCIE_RXN_WLAN PERn0 +3.3Vaux
25 26 NB_R0603_32MIL_SMALL
24 PCIE_RXP_WLAN 27 PERp0 GND9 28 R5329 1 2 0Ohm
WLAN_RST# 30
29 GND4 1.5V_2 30 SMB_C 1 T5329 /WOWL
31 GND5 SMB_CLK 32 SMB_D 1 T5330
24 PCIE_TXN_WLAN PETn0 SMB_DATA
33 34
+3VS_WLAN 24 PCIE_TXP_WLAN PETp0 GND10
35 36 USB_PN2_R 1 2 RN5303A 10/03
37 GND6 USB_D- 38 0Ohm USB_PN2 24
USB_PP2_R
Reserved3 USB_D+ USB_PP2 24
39 40

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Reserved4 GND11

3
41 42 1 T5313 +3VS_WLAN
+3VS_WLAN Reserved5 LED_WWAN#
R5316 43 44 90Ohm/100MHz
10KOhm T5321 1 45 Reserved6 LED_WLAN# 46 1 T5312 @ L5303
T5322 1 47 Reserved7 LED_WPAN# 48

2
T5323 1 49 Reserved8 1.5V_3 50 /nonWOWL
R5315 1 2 0Ohm BT_ON/OFF#_C R5324 1 2 0Ohm 51 Reserved9 GND12 52 3 4 RN5303B 0Ohm 1 2 R5311
25 BT_ON/OFF# Reserved10 3.3V_2 0Ohm +3VS
/WOWL vx_r0805_h24_small
/WOWL
D5302 53 56 1 2 R5314
+3VSUS 0Ohm
2 1 54 GND13 NP_NC2 55 vx_r0805_h24_small
GND14 NP_NC1 LED_WLAN# 1 T5309
RB751V-40 MINI_PCI_LATCH_52P
/nonWOWL 12V44GBSD001

M:1244-0083000

WLAN +3VS bypass capactor: WLAN +1.5VS bypass capactor:

Place 0.1UF near pin 2,24,52,39 41.
Place 10UF near +3VS_WLAN source side.

+3VS_WLAN +1.5VS
B B
1

C5321 C5318 C5322 C5323 C5315 C5316 C5320 C5317 C5319

10UF/6.3V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 10UF/6.3V 0.1UF/25V 0.1UF/25V 0.1UF/25V
@ @ @ @ @ @
2

A A

Title : WLAN Board

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 53 of 104
5 4 3 2 1
 5 4 3 2 1

WLAN
+5VS

Order of Indicator LEDs

1
LED5603
DC-IN/Battery

+
ORANGE
07V130000043
D D
+5VA Power LED

2
1
R5617
523OHM
+5VA

2
1

1
LED5601 LED5602

1
WHITE ORANGE
07V130000012 07V130000002 LED5604 3

+
D
WHITE Q5602
07V130000012 2N7002

2
1
23 WLAN_LED
G

2
2 S

1
R5605
100KOhm
C C
1 R5616 2 383Ohm
30 DC_IN_LED#

2
R5602 1 2 300OHM
30 PWR_WHITE_LED#

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1 R5614 2 523Ohm
30 BAT_ORG_LED#

B B

A A

Title :LED
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 56 of 104
5 4 3 2 1
 5 4 3 2 1

+0.675VS +3VS +1.5VS +1.05VS +5VS +VCORE +12VS

1
@ @ @ @ @ @ @
+3VA
R5703 R5704 R5705 R5707 R5713 R5714 R5715
330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm

2
1
D @ +0.675VS_DISCHRG +3VS_DISCHRG +1.5VS_DISCHRG +VTT_PCH_DISCHRG +5VS_DISCHRG +VCC_CORE_DISCHRG +12VS_DISCHRG D
R5701
100KOhm

6
Q5711B D Q5707B D Q5701B D Q5703B D Q5704B D Q5703A D Q5704A D

2
5 5 5 5 5 2 2

G S G S G S G S G S G S G S
UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN

1
6
UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN
D
2
30,91,92 SUSB_EC#
G S
UM6K1NG1DTN

1
Q5701A
+3V +1.35V
R1.1

1
@ @
+3VA
R5711 R5716
330Ohm 330Ohm

2
1
C C
@ +3V_DISCHRG
R5702 +1.35V_DISCHRG
100KOhm +5V non-use

6
D
2

6
2
D
G S 2
UM6K1NG1DTN

1
3 G S
D Q5707A
Q5706 UM6K1NG1DTN

1
2N7002 Q5711A
1
30,91 SUSC_EC#
G
2 S

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+3VA +3VA 20,26,30,33,37,60,65,81,88,93
B B
+VCORE +VCORE 6,80

+3VS_VGA +VCCIO_OUT +VCCIO_OUT 4,6,32

+1.5VS_VGA
+0.675VS +0.675VS 16,17,83
2

2
+3VA R5720 +1.05VS +1.05VS 6,25,26,32,80,82
200 Ohm 1% +3VA R5721
+1.05VS_VGA 51 Ohm +1.5VS +1.5VS 26,48,53,84
2

R5718
1

2
100KOhm R5719

1
2

100KOhm
6

Q5714A R5717 +3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,58,61,80,91,92

3
UM6K1N 22Ohm Q5712B
1

DGPU_EN_PWR# 2 UM6K1N +5VS +5VS 20,30,31,36,37,46,48,50,51,56,58,66,80,87,91

1

DGPU_PWROK_C# 5
1

3
D

4
6

Q5713 Q5712A
3

2N7002 Q5714B UM6K1N +3V

1 2 +3V 22,44,45,91
UM6K1N
74,87,91,93 DGPU_EN_PWR 91 DGPU_PWROK_C
G 5
+5V +5V 91
1

2 S
4

A A

USE for DGPU power sequence Title : DSG_Discharge

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 57 of 104
5 4 3 2 1
 5 4 3 2 1

G-sensor

D D
+3VS_GS +3VS_GS
Vinafix.com
/G-sensor /G-sensor /G-sensor /G-sensor

R5804

R5805

R5806

R5807
/G-sensor /G-sensor

1
C5801 C5802
0.1UF/16V 0.1UF/16V

2
2 4.7KOhm1

2 4.7KOhm1

2 4.7KOhm1

2 4.7KOhm1
/G-sensor 60mA
U5801
1 20
28,30,45,74 SMB1_CLK P3_5/SSCK/SCL/CMP1_2 P3_4/SCS#/SDA/CMP1_1 SMB1_DAT 28,30,45,74
AXSTST 2 19
3 P3_7/CNTR0#/SSO/TXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0 18 GSensor_Y
4 RESET# P1_0/KI0#/AN8/CMP0_0 17 GSensor_X
5 XOUT/P4_7(1) P1_1/KI1#/AN9/CMP0_1 16
6 VSS/AVSS P4_2/VREF 15 GSensor_Z
7 XIN/P4_6 P1_2/KI2#/AN10/CMP0_2 14
VCC/AVCC P1_3/KI3#/AN11/TZOUT HDPLOC 30
/G-sensor 8 13
R5803 1 2 1KOhm 9 MODE P1_4/TXD0 12
30 HDPINT# P4_5/INT0#/RXD1 P1_5/RXD0/CNTR01/INT11#
10 11 HDPACT 30
C P1_7/CNTR00/INT10# P1_6/CLK0/SSI01 C

R5F211B4D34SP

0.033UF/16V

0.033UF/16V

0.033UF/16V
2

2
06V130000008

1
47KOhm

47KOhm
R5800

C5803

C5804

C5805

R5801
2

2
1

1
/G-sensor
/G-sensor /G-sensor /G-sensor /G-sensor

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+3VS
JP5801
2 1
2 1

1MM_OPEN_M1M2 T5801
@
B B

1
+3VS_GS
+5VS /G-sensor
U5803 0.85mA
+5VS 1 5 2 R5808 1
2 SHDN# SET
3 GND 4 64.9KOhm 1% U5802
13
12
11
IN OUT 10
9
/G-sensor TSH352TR
GND2
Vdd2
Reserved3
Reserved2
Reserved1
1

C5800 G923-470T1UF C5808 C5807

Vref=1.25V R5809
1UF/10V 39KOhm 1UF/6.3V 0.1UF/16V
2

/G-sensor /G-sensor /G-sensor 14 8

/G-sensor 15 NC1 FS 7 GSensor_Z
1

16 NC2 Voutz 6
1% NC3 PD
GND1

Voutx

Vouty
Vdd1

ST

Vout=1.25*(1+(64.9K/39K)= 3.33V
1
2
3
4
5

/G-sensor
GSensor_X

GSensor_Y

A A
AXSTST

Title : G-sensor
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 58 of 104
5 4 3 2 1
 5 4 3 2 1

Battery Connector
PS: 1 . Pin define check by 2012 10/04
+BAT_CON
D
DC IN T6011 T6012 T6013 T6014
D

T6001 T6002 T6003 T6004 A/D_DOCK_IN_F +A/D_DOCK_IN F6001 1 2

T6009 T6010

1
15A/65V C6006
1

F6002 0.1UF/25V

1
D_A/D_DOCK_IN L6001 1 2 150Ohm/100Mhz 1 2 @

2
Irat=5A T6019 1AV200000041
1

C6001 C6002 10A/125V J6001 1

+A/D_DOCK_IN 66,88

1
0.1UF/25V 1000PF/50V C6003 11
1AV200000041 1AV200000018 NP_NC1 1 BAT_CON_C T6015 T6016 T6017
0.1UF/25V
2

1 2
1AV200000041

2
2 3

1
3 4 B_I#
4
1

5 TS1#_C L6002 1 2 1KOhm/100Mhz

5 TS1# 90
6 SMB0_DAT_C L6003 1 2 1KOhm/100Mhz
T6005 T6006 T6007 T6008 6 7 SMB0_CLK_C L6004 1 2 1KOhm/100Mhz SMB0_DAT 30,88
7 8 SMB0_CLK 30,88
8 9
9

1
10 C6007 C6008 C6009 C6010
12 10 0.1UF/25V 100PF/50V 100PF/50V 100PF/50V
NP_NC2 1AV200000041 @ @ @

2
WTOB_CON_10P 1AV200000002 1AV200000002 1AV200000002
C C
12V17GBSM092
12V17AISM014
WTOB_CON_4P / DC-IN M : 1217-01B2000
4
3
D_A/D_DOCK_IN S:?
2
1

1 C6004 C6005
0.1UF/25V 10UF/25V
J6002 1AV200000041 MLCC/+/-10%
2

vx_c0805_h57_small
1AV500000015
M : 1208-01ET000 @
+RTCBAT
S : 1208-01C1000
For Battery Off

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1
R6001
0Ohm
@ +3VA

2 2
R6036

1
B 1KOhm B

D6002

2
0.8V/0.2mA
07V030000001
@

1 3
R6008

1
3 10KOhm
D
R6002 Q6001 @
0Ohm 2N7002

2
@ 1
BAT_OFF# 30
G

2
S 2

1
R6003
100KOhm

2
A A

Title : DC-IN/ Battery

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 60 of 104
5 4 3 2 1
 5 4 3 2 1

D D

Touch Pad Module

R1.1 add LID_SW# at pin5
+3VS

1
+3VS
R6101
10KOhm
/touchpanel

2
2 1 D6101
30,45,65,66 LID_SW#

1
C RB751V-40 C6101 C
/touchpanel 1UF/6.3V
/touchpanel

2
RNX6101B
3 4 J6101
24 USB_PP4 0Ohm

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1
@ 2 1
3 2
T6101 1 4 3
TP_LID_SW# 5 4
5
3

L6101 USB4+ 6
90Ohm/100Mhz USB4- 7 6 9
/touchpanel 8 7 SIDE1 10
8 SIDE2
2

WTOB_CON_8P
12V17GBSM090
@ /touchpanel
1 2
B 24 USB_PN4 0Ohm B
RNX6101A
M: 1217-01AJ000

A A
Title : LVDS CONN
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
A 1.1
Date: Thursday, December 20, 2012 Sheet 61 of 104
5 4 3 2 1
 5 4 3 2 1

R1.1
PCB : Screw A PCB : Screw F
BGA H6529 H6533

CPU NUTx4 1
2 NP_NC
GND1 GND4
5
1
2 NP_NC
GND1 GND4
5 LID Switch(Hall sensor)
3 4 3 4
GND2 GND3 GND2 GND3
D H6507 +3VA D
CT260B176D146
ST335BD118N RT531X335SBD118N
C6501 1 2 0.1UF/25V
H6508
CT260B176D146

1
H6509
PCB : Screw B PCB : Screw G R6501
100KOhm 1
U6501
Vdd
CT260B176D146 H6534 3
1 H6537 GND

2
CT335B315D217 2
1 2 30,45,61,66 LID_SW# OUTPUT
H6510
CT260B176D146 AH180-WG-7

1
C6503
D98_D118 100PF/50V
@

2
PCB : Screw Cx3
H6530
1
CT276B315D118
GND PAD H*2 close toU3001
C
H6502 C
S1V2YHCCMZ00 1 D6501
H6532 1 2
+3VA
1 3 LID_SW#
C236_NP
CT276B315D118 1

1
H6503 C6502
S1V2YHCCMZ00 1 1.25V/0.15A 100PF/50V
H6536 1 @

2
1
C236_NP
CT276B315D118
S1V2YHCCMZ00 Note:
LID_SW# is easy to cause high voltage damage when

https://vinafix.com
plugging inverter board connector to M/B with AC present.
H6538
1 Need to add bidirectional diode to protect this pin.
CT276B315D118
S1V2YHCCMZ00

VGA NUTx2
B
PCB : Screw D B

H6511 H6535
CT260B176D146 1
CT276OBDO118X98
H6512
CT260B176D146

FTG STG
R1.1
PCB : Screw E
H6531
CPU PAD SCREWx4
H6539
1 1
2 NP_NC 5
A_GND GND1 GND4 CRT331X343B166D146
3 4
GND2 GND3 H6540
1
A A
CRT331X343B166D146
RT531X335CB335D118N
H6542
1
CRT331X343B166D146 Title :ME_CONN,Skew Hole
R1.1 H6541
1
Engineer: Ahren_CHEN
CRT331X343B166D146 Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 65 of 104
5 4 3 2 1
 5 4 3 2 1

PWR BRD

D J6603 D

R6602 2 1 33Ohm PW R_SW #_S 1 6

30 PW R_SW #_M 1 SIDE2
LED_PW R 2
LED_GND 3 2
C6604 4 3 5
4 SIDE1

1
0.1UF/25V
@
12V17GISM080

2
+5VS W TOB_CON_4P

R6604 1 2 200Ohm
M: 1217-002E000
S: 1217-00FA000

3
D
PW R_SW #_S

30,45,61,65 LID_SW #
1
G Vinafix.com
2 S

2
Q6601 D6601
2N7002
C C

AZ2025-01H.R7G

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07V220000006

EMI +AC_BAT_SYS

B B
1

C6612 C6611
1500PF/50V 1500PF/50V
2

ADAPTOR VOLTAGE DETECTOR.

+A/D_DOCK_IN
1

R6605
200KOhm
1%
2

A 30 ADAPT_AD A
2

R6606 C6605
34.8KOhm
1% 0.1UF/25V
2

@
1

Title : PWR BRD/ IO BRD

BG1\HW 5\W Engineer: Ahren_CHEN
Size Project Name Rev
Custom
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 66 of 104
5 4 3 2 1
 5 4 3 2 1

+3VO

U7002
1 A 5 1
25 DGPU_HOLD_RST# VCC
T7022
22,30,32,33,40,46,53 BUF_PLT_RST# 2 B /VGA
3 4
D GND PEX_RST# 74 D
Y
SN74LVC1G08DCKR
/VGA

R7020 2 @ 1 0Ohm

2
+1.05VS_VGA
U7001A
R7009
+3VS_VGA +3VS_VGA 100KOhm 1/14 PCI_EXPRESS
/VGA GK208/GF117/GF119
PLACE UNDER BGA PLACE NEAR BGA PLACE BETWEEN BGA AND POWER SUPPLY

1
2
AB6 NC
R7008 NC_4
10KOhm AA22
AC7 PEX_IOVDD_1 AB23

1
/VGA PEX_RST# PEX_IOVDD_2

1
AC24 C7001 C7002 C7003 C7005 C7010

1
3 CLKREQ_PEG#_R AC6 PEX_IOVDD_3 AD25 C7009 C7004

S 2
21 CLKREQ_PEG# PEX_CLKREQ# PEX_IOVDD_4 AE26 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 22UF/6.3V 22UF/6.3V
D
10UF/6.3V 10UF/6.3V

2
AE8 PEX_IOVDD_5 AE27 /VGA /VGA /VGA /VGA /VGA
21 CLK_PCIE_PEG_PCH PEX_REFCLK PEX_IOVDD_6
Q7001 AD8 /VGA /VGA
21 CLK_PCIE_PEG#_PCH PEX_REFCLK#
2N7002 /VGA
/VGA PCIENB_RXP0 C7021 1 2 0.1UF/25V PEX_TX0+ AC9
24 PCIENB_RXP0 1 2 0.1UF/25V PEX_TX0
PCIENB_RXN0 C7019 PEX_TX0- AB9 3300 mA
24 PCIENB_RXN0 PEX_TX0#
/VGA
PCIEG_TXP0 AG6
24 PCIEG_TXP0 AG7 PEX_RX0 AA10
PCIEG_TXN0
24 PCIEG_TXN0 PEX_RX0# PEX_IOVDDQ_01
/VGA AA12
PEX_IOVDDQ_02

1
PCIENB_RXP1 C7041 1 2 0.1UF/25V PEX_TX1+AB10 AA13 C7008 C7006 C7007 C7012 C7014
24 PCIENB_RXP1 PEX_TX1 PEX_IOVDDQ_03
PCIENB_RXN1 C7050 1 2 0.1UF/25V PEX_TX1-AC10 AA16 C7013 C7011
24 PCIENB_RXN1 PEX_TX1# PEX_IOVDDQ_04
/VGA AA18 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V

2
PCIEG_TXP1 AF7 PEX_IOVDDQ_05 AA19 /VGA /VGA /VGA /VGA /VGA
24 PCIEG_TXP1 PEX_RX1 PEX_IOVDDQ_06
PCIEG_TXN1 AE7 AA20 /VGA /VGA
PCIEG => From CPU 24 PCIEG_TXN1
/VGA PEX_RX1# PEX_IOVDDQ_07
PEX_IOVDDQ_08
AA21
PCIENB_RXP2 C7032 1 2 0.1UF/25V PEX_TX2+AD11 AB22
PCIENB : to CPU 24
24
PCIENB_RXP2
PCIENB_RXN2
PCIENB_RXN2 C7023 1 2 0.1UF/25V PEX_TX2-AC11 PEX_TX2
PEX_TX2#
PEX_IOVDDQ_09
PEX_IOVDDQ_10
AC23
/VGA AD24
PCIEG_TXP2 AE9 PEX_IOVDDQ_11 AE25
C C
24 PCIEG_TXP2 AF9 PEX_RX2 PEX_IOVDDQ_12 AF26
PCIEG_TXN2
24 PCIEG_TXN2 PEX_RX2# PEX_IOVDDQ_13
/VGA AF27
PCIENB_RXP3 C7020 1 2 0.1UF/25V PEX_TX3+AC12 PEX_IOVDDQ_14
24 PCIENB_RXP3 1 2 0.1UF/25V PEX_TX3
PCIENB_RXN3 C7018 PEX_TX3-AB12
24 PCIENB_RXN3 PEX_TX3#
/VGA
PCIEG_TXP3 AG9
24 PCIEG_TXP3 PEX_RX3
PCIEG_TXN3 AG10
24 PCIEG_TXN3 PEX_RX3#
AB13
AC13 PEX_TX4

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PEX_TX4#
AF10
AE10 PEX_RX4
PEX_RX4# PLACE NEAR BGA
AD14 +3VS_VGA
AC14 PEX_TX5 AA8
PEX_TX5# PEX_PLL_HVDD_1 AA9
AE12 PEX_PLL_HVDD_2
PEX_RX5

2
AF12 C7017 C7015
PEX_RX5# AB8 C7016
AC15 PEX_SVDD_3V3 4.7UF/6.3V 4.7UF/6.3V
0.1UF/10V

1
AB15 PEX_TX6 /VGA /VGA /VGA
PEX_TX6# 210 mA
AG12
AG13 PEX_RX6
PEX_RX6#
AB16
AC16 PEX_TX7
PEX_TX7#
AF13
AE13 PEX_RX7
PEX_RX7#
AD17 NC
AC17 NC_11
NC_5 NC

AE15 NC
AF15 NC_15
B NC_22 NC B
AC18 NC
F2
NC_6 VDD_SENSE NVDD_SENSE 87
AB18 NC
NC_1
AG15 NC
F1
NC_28 GND_SENSE NVDD_GND_SENSE 87
AG16 NC
NC_29
AB19 NC
AC19 NC_2
NC_7 NC

AF16 NC
AE16 NC_23
NC_16 NC

AD20 NC
AC20 NC_12
NC_8 NC

AE18 NC
AF18 NC_17
NC_24 NC

AC21 NC
AB21 NC_9 PEX_TSTCLK_OUT R7007 1 @ 2 200Ohm 1%
NC_3 NC

AG18 NC
AF22
AG19 NC_30 PEX_TSTCLK_OUT AE22 PEX_TSTCLK_OUT#
NC_31 NC PEX_TSTCLK_OUT#
AD23 NC
AE23 NC_13
NC_20 NC

AF19 AA14 PLACE UNDER GPU PLACE NEAR BGA +1.05VS_VGA

NC_25 NC PEX_PLLVDD_1
AE19 NC AA15 /N14M-GL
NC_18 PEX_PLLVDD_2 +PEX_PLLVDD L7001 1 2 120Ohm/100Mhz
AF24 NC 150 mA
NC_27 1

1
AE24 NC
C7061 C7044 C7062 C7063
NC_21 0.1UF/10V
AE21 NC /VGA 1UF/6.3V 4.7UF/6.3V R7022 2 1 0Ohm 1UF/6.3V
2

2
AF21 NC_19 /VGA /VGA /N14P-GV2 @
NC_26 NC
AD9
AG24 TESTMODE
A NC A
AG25 NC_34
NC_35 NC

AG21 NC R7004 1 /VGA 2 10KOhm

AG22 NC_32
NC_33 NC

GF119 GF117
GK208 AF25 PEX_TERMP R7003 1 2 2.49KOhm1%
PEX_TERMP
/VGA
N14P-GV2
02V0A0000019
Title : VGA-PCIE
/VGA BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 70 of 104
5 4 3 2 1
 5 4 3 2 1

+1.5VS_VGA
76,77 FBAD[0..63]
76,77 FBA_CMD[0..30]
76,77 FBADQM[0..7]
76,77 FBADQS_WP[0..7]
76,77 FBADQS_RN[0..7]

1
C7105 C7106 C7107 C7108 C7109 C7110
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
10% 10% 10% 10% 10% 10%

2
R7109 2 /VGA 1 100Ohm 1% FBA_CMD4 R7121 2 /VGA 1 100Ohm 1% @ @ @ @ @ @
R7110 2 /VGA 1 100Ohm 1% FBA_CMD5 R7122 2 /VGA 1 100Ohm 1%
R7111 2 /VGA 1 100Ohm 1% FBA_CMD6 R7124 2 /VGA 1 100Ohm 1%
GPU_FB_CLAMP_R R7107 2 1 0Ohm
GPU_FB_CLAMP 30,74,91 R7112 2 /VGA 1 100Ohm 1% FBA_CMD7 R7123 2 /VGA 1 100Ohm 1%

1
/VGA R7113 2 /VGA 1 100Ohm 1% FBA_CMD8 R7125 2 /VGA 1 100Ohm 1% C7111 C7112 C7113 C7114 C7115
D U7001B D
R7114 2 /VGA 1 100Ohm 1% FBA_CMD9 R7126 2 /VGA 1 100Ohm 1% 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2/14 FBA R7115 2 /VGA 1 100Ohm 1% FBA_CMD10 R7127 2 /VGA 1 100Ohm 1% 10% 10% 10% 10% 10%

2
FBAD0 E18 NC
F3 R7106 2 1 10KOhm R7116 2 /VGA 1 100Ohm 1% FBA_CMD11 R7128 2 /VGA 1 100Ohm 1% @ @ @ @ @
FBAD1 F18 FBA_D0 FB_CLAMP /VGA R7117 2 /VGA 1 100Ohm 1% FBA_CMD12 R7129 2 /VGA 1 100Ohm 1%
FBAD2 E16 FBA_D1 R7118 2 /VGA 1 100Ohm 1% FBA_CMD13 R7130 2 /VGA 1 100Ohm 1%
FBA_D2 GF119 GF117/GK208
FBAD3 F17 R7119 2 /VGA 1 100Ohm 1% FBA_CMD14 R7131 2 /VGA 1 100Ohm 1%
FBAD4 D20 FBA_D3 R7120 2 /VGA 1 100Ohm 1% FBA_CMD15 R7132 2 /VGA 1 100Ohm 1%
FBAD5 D21 FBA_D4
FBA_D5 35 mA
FBAD6 F20
FBAD7 E21 FBA_D6
FBAD8 E15 FBA_D7
FBAD9 D15 FBA_D8
FBAD10 F15 FBA_D9 R7133 2 1 100Ohm 1% FBA_CMD21 R7143 2 1 100Ohm 1%
FBAD11 F13 FBA_D10 R7135 2 1 100Ohm 1% FBA_CMD22 R7145 2 1 100Ohm 1%
FBAD12 C13 FBA_D11 R7134 2 1 100Ohm 1% FBA_CMD23 R7144 2 1 100Ohm 1%
/VGA /VGA
FBAD13 B13 FBA_D12 R7136 2 1 100Ohm 1% FBA_CMD24 R7146 2 1 100Ohm 1%
/VGA /VGA
FBAD14 E13 FBA_D13 R7137 2 1 100Ohm 1% FBA_CMD25 R7147 2 1 100Ohm 1%
/VGA /VGA
FBAD15 D13 FBA_D14 R7138 2 1 100Ohm 1% FBA_CMD26 R7148 2 1 100Ohm 1%
/VGA /VGA
FBAD16 B15 FBA_D15 R7139 2 1 100Ohm 1% FBA_CMD27 R7149 2 1 100Ohm 1%
/VGA /VGA
FBAD17 C16 FBA_D16 R7140 2 1 100Ohm 1% FBA_CMD28 R7150 2 1 100Ohm 1%
/VGA /VGA
FBAD18 A13 FBA_D17 R7141 2 1 100Ohm 1% FBA_CMD29 R7151 2 1 100Ohm 1%
/VGA /VGA
FBAD19 A15 FBA_D18 R7142 2 1 100Ohm 1% FBA_CMD30 R7152 2 1 100Ohm 1%
/VGA /VGA
FBAD20 B18 FBA_D19
/VGA /VGA
FBAD21 A18 FBA_D20
/VGA /VGA
FBAD22 A19 FBA_D21
FBAD23 C19 FBA_D22
FBAD24 B24 FBA_D23
FBAD25 C23 FBA_D24
FBAD26 A25 FBA_D25
FBAD27 A24 FBA_D26
FBAD28 A21 FBA_D27
FBAD29 B21 FBA_D28
FBAD30 C20 FBA_D29
FBAD31 C21 FBA_D30
FBAD32 R22 FBA_D31
FBAD33 R24 FBA_D32 C27 FBA_CMD0
FBAD34 T22 FBA_D33 FBA_CMD0 C26 FBA_CMD1
FBAD35 R23 FBA_D34 FBA_CMD1 E24 FBA_CMD2
C C
FBAD36 N25 FBA_D35 FBA_CMD2 F24 FBA_CMD3
FBAD37 N26 FBA_D36 FBA_CMD3 D27 FBA_CMD4
FBAD38 N23 FBA_D37 FBA_CMD4 D26 FBA_CMD5
FBAD39 N24 FBA_D38 FBA_CMD5 F25 FBA_CMD6
FBAD40 V23 FBA_D39 FBA_CMD6 F26 FBA_CMD7
FBAD41 V22 FBA_D40 FBA_CMD7 F23 FBA_CMD8
FBAD42
FBAD43
T23
U22
FBA_D41
FBA_D42
FBA_D43
FBA_CMD8
FBA_CMD9
FBA_CMD10
G22
G23
FBA_CMD9
FBA_CMD10
GC6 RST
FBAD44 Y24 G24 FBA_CMD11
FBAD45 AA24 FBA_D44 FBA_CMD11 F27 FBA_CMD12

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FBAD46 Y22 FBA_D45 FBA_CMD12 G25 FBA_CMD13
FBAD47 AA23 FBA_D46 FBA_CMD13 G27 FBA_CMD14
FBAD48 AD27 FBA_D47 FBA_CMD14 G26 FBA_CMD15
FBAD49 AB25 FBA_D48 FBA_CMD15 M24 FBA_CMD16
FBAD50 AD26 FBA_D49 FBA_CMD16 M23 FBA_CMD17
FBAD51 AC25 FBA_D50 FBA_CMD17 K24 FBA_CMD18
FBAD52 AA27 FBA_D51 FBA_CMD18 K23 FBA_CMD19
FBAD53 AA26 FBA_D52 FBA_CMD19 M27 FBA_CMD20
FBAD54 W26 FBA_D53 FBA_CMD20 M26 FBA_CMD21
FBAD55 Y25 FBA_D54 FBA_CMD21 M25 FBA_CMD22
FBAD56 R26 FBA_D55 FBA_CMD22 K26 FBA_CMD23
FBAD57 T25 FBA_D56 FBA_CMD23 K22 FBA_CMD24
FBAD58 N27 FBA_D57 FBA_CMD24 J23 FBA_CMD25
FBAD59 R27 FBA_D58 FBA_CMD25 J25 FBA_CMD26
FBAD60 V26 FBA_D59 FBA_CMD26 J24 FBA_CMD27
FBAD61 V27 FBA_D60 FBA_CMD27 K27 FBA_CMD28 FBA_CMD20
FBA_D61 FBA_CMD28 VRAM_RST# 76,77
FBAD62 W27 K25 FBA_CMD29
FBAD63 W25 FBA_D62 FBA_CMD29 J27 FBA_CMD30
FBA_D63 FBA_CMD30

1
J26
FBA_CMD31 R7153
FBADQM0 D19 10KOhm
FBADQM1 D14 FBA_DQM0
FBADQM2 C17 FBA_DQM1 /VGA

2
FBADQM3 C22 FBA_DQM2
FBADQM4 P24 FBA_DQM3
FBADQM5 W24 FBA_DQM4 +1.5VS_VGA
FBADQM6 AA25 FBA_DQM5
B
FBADQM7 U25 FBA_DQM6 F22 R7101 1 @ 2 60.4Ohm 1% B
FBA_DQM7 FBA_DEBUG0 J22 R7102 1 @ 2 60.4Ohm 1%
FBA_DEBUG1
FBADQS_WP0 E19
FBADQS_WP1 C15 FBA_DQS_WP0
FBADQS_WP2 B16 FBA_DQS_WP1 D24
B22 FBA_DQS_WP2 FBA_CLK0 D25 FBA_CLK0 76
FBADQS_WP3
FBA_DQS_WP3 FBA_CLK0# FBA_CLK0# 76
FBADQS_WP4 R25 N22
W23 FBA_DQS_WP4 FBA_CLK1 M22 FBA_CLK1 77
FBADQS_WP5
FBA_DQS_WP5 FBA_CLK1# FBA_CLK1# 77
FBADQS_WP6 AB26
FBADQS_WP7 T26 FBA_DQS_WP6
FBA_DQS_WP7

FBADQS_RN0 F19 D18

FBADQS_RN1 C14 FBA_DQS_RN0 FBA_WCK01 C18
FBADQS_RN2 A16 FBA_DQS_RN1 FBA_WCK01# D17
FBADQS_RN3 A22 FBA_DQS_RN2 FBA_WCK23 D16
FBADQS_RN4 P25 FBA_DQS_RN3 FBA_WCK23# T24
FBADQS_RN5 W22 FBA_DQS_RN4 FBA_WCK45 U24
FBADQS_RN6 AB27 FBA_DQS_RN5 FBA_WCK45# V24
FBADQS_RN7 T27 FBA_DQS_RN6 FBA_WCK67 V25
FBA_DQS_RN7 FBA_WCK67#

F16
FB_PLLAVDD_1
P22 +1.05VS_VGA FBA_ODT_L FBA_CMD0 R7103 2 /VGA 1 10KOhm
FB_PLLAVDD_2 1.05V+-3% 100 mA
L7101
FB_PLLAVDD
H22 +FB_PLL_AVDD 1 2 FBA_ODT_H FBA_CMD16 R7104 2 /VGA 1 10KOhm
FB_DLLAVDD
1

GF117 GF119/GK208 C7118 C7104 C7101 C7103 30Ohm/100Mhz FBA_CKE_L FBA_CMD3 R7105 2 /VGA 1 10KOhm
0.1UF/10V 0.1UF/10V 0.1UF/10V 22UF/6.3V /VGA
10% 10% 10% 09V010000029 FBA_CKE_H FBA_CMD19 R7108 2 /VGA 1 10KOhm
2

/VGA /VGA /VGA /VGA

T7101
A 1 FB_VREF D23 Place Under GPU Place NEAR GPU A
/VGA FB_VREF_PROBE

N14P-GV2
02V0A0000019
/VGA

Title : VGA-N14P-FRAME BUFFER

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 71 of 104
5 4 3 2 1
 5 4 3 2 1

D D

+1.05VS_VGA PLACE NEAR GPU PLACE UNDER GPU

L7202
1 2 +PLL_VDD

1
U7001M

1
30Ohm/100Mhz C7203 C7204
/VGA 22UF/6.3V 0.1UF/10V 9/14 XTAL_PLL

2
09V010000029 /VGA 1AV200000024 52 mA

2
+1.05VS_VGA /VGA L6
+SP_PLLVDD M6 CORE_PLLVDD
SP_PLLVDD
71 mA
L7201 1 2 180Ohm/100Mhz N6 NC
VID_PLLVDD
41 mA
/VGA GF117
GF119/GK208

1
C7208 C7205
C7206 C7215
22UF/6.3V 4.7UF/6.3V 0.1UF/10V 0.1UF/10V

2
/VGA 1AV200000024 1AV200000024 XTALSSIN A10 C10 XTAL_OUTB
/VGA /VGA /VGA XTAL_SSIN XTAL_OUTBUFF

C11 B10
XTAL_IN XTAL_OUT

1
RN7203B 02V0A0000019 RN7203A
N14P-GV2
10KOhm 10KOhm

2
/VGA /VGA /VGA

nb_r0402_short_5mil_small SP7201

2
1
C VGA_XTALIN 1 3 VGA_XTALOUT C

2
C7207 X7201 27MHZ C7201

4
18PF/50V /VGA /VGA 18PF/50V

1
/VGA
1AV200000006 1AV200000006
STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS IS NOT USED

Vinafix.com
https://vinafix.com +3VS_VGA

1
RN7201B RN7201A
2.2KOhm 2.2KOhm
U7001K
/VGA /VGA
3/14 DACA

2
B GF119/GK208 GF117 GF117 GF119/GK208 B
W5 NC NC
B7
DACA_VDD I2CA_SCL A7
NC I2CA_SDA
AE2 TSEN_VREF
DACA_VREF
AF2 NC NC
AE3
DACA_RSET DACA_HSYNC AE4
NC DACA_VSYNC

AG3
NC DACA_RED
AF4
NC DACA_GREEN
NC
AF3
DACA_BLUE

N14P-GV2
02V0A0000019
/VGA

A A

Title : VGA_RGB,XTAL
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 72 of 104
5 4 3 2 1
 5 4 3 2 1

LVDS
U7001G
4/14 IFPAB
U7001J
GF117 GF119/GK208
AC4 7/14 IFPEF
NC IFPA_TXC#
NC
AC3 GF119/GK208
GF119/GK208 GF117 IFPA_TXC GF117
DVI-DL DVI-SL/HDMI DP
AA6 NC
IFPAB_RSET Y3 GF117 J3
NC IFPA_TXD0# GF119 GK208 NC I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA#
NC
Y4 NC I2CY_SCL I2CY_SCL J2
IFPA_TXD0 J7 IFPE_AUX_I2CY_SCL
NC_57 NC
V7 NC
IFPAB_PLLVDD_1 AA2 J1
D NC IFPA_TXD1# NC TXC TXC NC_53 D
W7 NC NC
AA3 K1
IFPAB_PLLVDD_2 IFPA_TXD1 NC TXC TXC NC_58
K7 NC
NC_64 K3
AA1 NC TXD0 TXD0 NC_60 K2
NC IFPA_TXD2# NC TXD0 TXD0 NC_59
NC
AB1
IFPA_TXD2 K6 M3
NC_63 NC NC TXD1 TXD1 NC_69 M2
NC TXD1 TXD1 NC_68
NC
AA5
IFPA_TXD3# AA4 M1
NC IFPA_TXD3 NC TXD2 TXD2 NC_67 N1
NC TXD2 TXD2 NC_72
NC
AB4
IFPB_TXC# NC FOR GK208
NC IFPB_TXC
AB5 IFPE
GF119/GK208 GF117
W6 NC NC
AB2 NC HPD_E
C2
IFPA_IOVDD IFPB_TXD4# HPD_E GPIO18
NC
AB3
Y6 IFPB_TXD4
IFPB_IOVDD NC GF117
GF119 GK208
NC
AD2
IFPB_TXD5# AD3 H6
NC IFPB_TXD5 NC_52 NC
GF119/GK208
J6 GF117
NC_56 NC DVI-DL DVI-SL/HDMI DP
NC
AD1
IFPB_TXD6# AE1 H4
NC IFPB_TXD6 NC I2CZ_SDA IFPF_AUX_I2CZ_SDA#
NC I2CZ_SCL H3
IFPF_AUX_I2CZ_SCL
NC
AD5
IFPB_TXD7# AD4 J5
NC IFPB_TXD7 NC TXC NC_55
NC TXC J4
NC_54
NC TXD3 TXD0
K5
NC_62 K4
NC TXD3 TXD0 NC_61
NC B3 NC TXD4 TXD1 L4
GPIO14 NC_66
IFPAB IFPF NC TXD4 TXD1
NC_65
L3

C NC TXD5 TXD2
M5 C
N14P-GV2 NC_71 M4
NC TXD5 TXD2 NC_70
02V0A0000019
/VGA NC FOR GK208

NC HPD_F
F7
GPIO19

https://vinafix.com
N14P-GV2
02V0A0000019
/VGA

B B
U7001I
6/14 IFPD
GF119/GK208 GF117
U6 GF117 GF119/GK208
IFPD_RSET NC
DVI/HDMI DP

T7 NC NC I2CX_SDA IFPD_AUX_I2CX_SDA# P4
IFPD_PLLVDD_2 P3
U7001H NC I2CX_SCL IFPD_AUX_I2CX_SCL
R7 NC
IFPD_PLLVDD_1
5/14 IFPC
IFPC NC TXC
R5
GF119/GK208 GF117 IFPD_L3# R4
NC TXC IFPD_L3
T6 NC GF117 GF119/GK208
IFPC_RSET T5
NC TXD0 IFPD_L2#
DVI/HDMI DP TXD0
T4
NC IFPD_L2
M7 NC NC I2CW_SDA IFPC_AUX_I2CW_SDA# N5 NC TXD1 U4
N7 IFPC_PLLVDD_1 N4 IFPD IFPD_L1# U3
IFPC_PLLVDD_2 NC NC I2CW_SCL IFPC_AUX_I2CW_SCL NC TXD1 IFPD_L1
V4
NC TXD2 IFPD_L0#
NC TXC
N3 NC TXD2
V3
IFPC_L3# N2 IFPD_L0
NC TXC IFPC_L3
R3
NC TXD0 IFPC_L2#
TXD0
R2 R6 NC NC
D4
NC IFPC_L2 IFPD_IOVDD GPIO17
NC TXD1 R1
IFPC_L1# GF119/GK208 GF117
NC TXD1 T1
IFPC_L1

NC
T3
TXD2 IFPC_L0#
NC TXD2
T2
IFPC_L0
N14P-GV2
02V0A0000019
A P6 NC NC C3 /VGA A
IFPC_IOVDD GPIO15

N14P-GV2
02V0A0000019
/VGA

Title : VGA_LVDS_HDMI
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 73 of 104
5 4 3 2 1
 5 4 3 2 1

U7001L
10/14 MISC2
+3VS_VGA STRAP0(1,1,1,1 pu 45K)
GF117/GF119/GK208 GB2-64
USER[3:0]
E10 NC 3 2 1 0 PANEL VS/HS
F10 NC_39 D12 1
NC_41 NC ROM_CS#
T7401 0 0 0 0 XGA -/-

2
/VGA 0 0 0 1 XGA +/+
B12 ROM_SI R7410 R7412 R7414 R7417 R7418 0 0 1 0 SXGA +/+
ROM_SI A12 ROM_SO
ROM_SO
45.3KOhm 34.8KOhm 10KOhm 45.3KOhm 45.3KOhm 0 0 1 1 SXGA+ -/-
STRAP0 D1 C12 ROM_SCLK 1% 1% 1% 1% 1% 0 1 0 0 UXGA +/+
STRAP1 D2 STRAP0 ROM_SCLK /VGA @ @ @ 1 1 1 1 EDID N/A

1
STRAP2 E4 STRAP1 STRAP0 @
STRAP3 E3 STRAP2 STRAP1
D3 STRAP3 STRAP1(0,1,1,1 PD 45K) ROM_SO (1,0,0,0 PU 5K))
STRAP4 STRAP2
STRAP4 3GIO_PADCFG[3:0] 11/13
STRAP3 LOGICAL BIT 4.99K PU 1000 PD 0000
GF117 STRAP4 3 2 1 0 3 FB[1]
GF119
GK208 0 1 1 1 Gen3 support 2 FB[0]
10.0K PU 1001 PD 0001
D
C1 NC 1 SMB_ALT_ADDR 15.0K PU 1010 PD 0010 D
NC_37

2
BUFRST#
D11 R7402 2 /VGA 1 10KOhm 0 1 1 0 Gen1/ Gen2 only 0 VGA_DEVICE 20.0K PU 1011 PD 0011
R7411 R7413 R7415 R7416 R7419 others RESERVED 24.9K PU 1100 PD 0100
STRAP_REFGND F6 D10 45.3KOhm 45.3KOhm 15KOhm 4.99KOhm 45.3KOhm
MULTI_STRAP_REF0_GND NC NC_38 1% 1% 1% 10V220000073 ROM_SCLK(1,0,0,0 PU 5K) 30.1K PU 1101 PD 0101
2

GF119
GF117 GF117 @ /VGA
for GV2 QS 34.8K PU 1110 PD 0110

1
GF119
R7401 GK208 GK208
1%
/VGA /VGA
1% STRAP2 (0,0,1,0 PD 15K) 45.3K PU 1111 PD 0111
40.2KOhm F4 NC for GV2 QS LOGICAL BIT
NC_43 E9 /VGA
NC NC_40
LOGICAL BIT 3 PCI_DEVID[4]
/N14P-GV2 F5 NC 10V220000073 0 PCI_DEVID[0] 2 SUB_VENDOR
1

NC_44 GF117
1 PCI_DEVID[1] 1 PCI_DEVID[5] 4.99K : 1022-00DD000
1% GK208
GF119
11/13 10/31 2 PCI_DEVID[2] 0 PEX_PLL_EN_TERM 10.0K : 1022-0009000
+3VS_VGA 3 PCI_DEVID[3]
15.0K : 1022-0038000
N14P-GV2
STRAP3 (0,0,0,0 PD 5K) STRAP4 (0,1,1,1 PD 45K) 10/31 20.0K : 1022-005M000
02V0A0000019
24.9K : 1022-007M000

2
/VGA LOGICAL BIT LOGICAL BIT
R7404 R7405 R7406 0 SOR0_EXPOSED 0 DP_PLL_VDD33V 30.0K : 1022-0092000
5.1KOhm 4.99KOhm 4.99KOhm 1 SOR1_EXPOSED 1 PCIE_MAX_SPEED 34.8K : 1022-00AG000
1% 1% 1% 2 SOR2_EXPOSED 2 PCIE_SPEED_CHANGE_GEN3 45.3K : 1022-00CQ000
@ 3 SOR3_EXPOSED 3 RESERVED

1
ROM_SI /VGA /VGA
+3VS_VGA ROM_SO
ROM_SCLK
2

2
R7423
10KOhm R7407 R7408 R7409
@ 30KOhm 10KOhm 15KOhm
1% 1% 1% PCI_DEVID[3..0]
1

AC_BATT# /VGA @ @
N12P-GV2 ES -->0x12AD ~ 1 1 0 1 --> pull up 30K

1
Q7401B
N12P-GV2 QS -->0x1292 ~ 0 0 1 0 --> pull down 15K
3

UM6K1N
@
5
Q7401A
4

+3VS_VGA UM6K1N
@ BINARY STRAP MODE MAPPING for N14M-GL
C 2 C
AC_IN_OC 30,88
Pin Name Mapping
1
2

C7401 ROM_SI RAMCONFIG (0,1,0,1 PD 30K)

4.7UF/6.3V ROM_SCLK SMB_ALT_ADDR Pull down 10K Micron 128Mbx16
11/30 base on Nv RVL v12
/VGA
ROM_SI SUB_VENDOR Pull down 10K
1

ROM_SO VGA_DEVICE Pull down 10K RAM_CFG[3:0]

Q7402
1
G

2N7002 STRAP0 RAM_CFG[0] Vendor RVL AVL Strap

THERM_ALERT# /VGA
2 S

THERM_ALERT#_EC 30 STRAP1 RAM_CFG[1]

D

STRAP2 RAM_CFG[2] Micron **MT41J128M16JT-093G:K (NA) 0x5 (0101) Pull down 30k
MT41J128M16JT-107G:K (NA) 0x5 (0101) Pull down 30k

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STRAP3 RAM_CFG[3]
STRAP4 PCI_MAX_SPEED Pull down 10K (TBD) (0315-00YF0TB) 0x5 (0101) Pull down 30k

Samsung ** K4W2G1646E-BC1A (0315-010B0TB) 0x7 (0111) Pull down 45k

RAM_CFG[3:0] K4W2G1646E-BC11 (0315-00XJ0TB) 0x7 (0111) Pull down 45k
Vendor Part Number Strap
Micron *MT41J128M16JT-093G:K (NA) 0x1 (0001) ** RVL list part MULTI-LEVEL MODE STRAPPING for N14P-GV2/GS
MT41J128M16JT-107G:K (NA) 0x1 (0001)
(TBD) (0315-00YF0TB) 0x1 (0001)

Samsung *K4W2G1646E-BC1A (0315-010B0TB) 0x5 (0101)

K4W2G1646E-BC11 (0315-00XJ0TB) 0x5 (0101)
Hynix *H5TQ2G63DFR-N0C (0315-010C0TB) 0x6 (0110) R7428 2 @ 1 0Ohm
H5TQ2G63DFR-11C (0315-00UD0TB) 0x6 (0110)
* is RVL list part +3VS_VGA

+3VS_VGA U7405
1:Pull up 10k 5 A 1
0:Pull down 10k VCC DGPU_EN_PWR 57,87,91,93
B 2 GPU_FB_CLAMP 30,71,91
B B
11/30 base on Nv RVL v12 FB_CLAMP_MON 4
GND
3
Y

2
SN74LVC1G08DCKR
1

R7433 /VGA
R7425 R7426 +3VS_VGA 10KOhm
2.2KOhm 2.2KOhm
/VGA /VGA Q7405A @
Nv AE review change 12/05

1
UM6K1N
U7001N
2

2
/VGA
8/14 MISC1
D9 SMB_CLK_VGA 1 6
I2CS_SCL SMB1_CLK 28,30,45,58
D8 SMB_DAT_VGA 4 3
I2CS_SDA SMB1_DAT 28,30,45,58

S 2
FB_CLAMP_TGL_REQ#_VGA /VGA

D
FB_CLAMP_TGL_REQ# 30

3
A9 RN7424A 2 110VI40000008
I2CC_SCL 2.2KOhm UM6K1N +3VS_VGA
B9 RN7424B 4 310VI40000008 2N7002

G
2.2KOhm +3VS_VGA
5
I2CC_SDA Q7405B

1
R7436 1 @ 2 10KOhm Q7408
GF119
/VGA
1VGA_THERMDN E12 GF117 GK208
T7407 +3VS_VGA
THERMDN C9 RN7424C 6 510VI40000008 +3VS_VGA
11/30
NC I2CB_SCL 2.2KOhm
T7408 1VGA_THERMDP F12 C8 RN7424D 8 710VI40000008 +3VS_VGA R7427 2 @ 1 0Ohm
THERMDP NC I2CB_SDA 2.2KOhm +3VS_VGA Nv AE review change
T7403 1VGA_JTAG_TCK AE5
T7406 1VGA_JTAG_TMS AD6 JTAG_TCK
/VGA JTAG_TMS
T7404 1VGA_JTAG_TDI AE6
/VGA1 JTAG_TDI
1
T7405 VGA_JTAG_TDO AF6 3
/VGA JTAG_TDO
R7424 1 /VGA 2 10KOhm AG4
VGA_JTAG_TRST_N C6 FB_CLAMP_MON RN7422A RN7422B PEX_RST# 70
/VGA JTAG_TRST# GPIO0 B2 10KOhm 10KOhm
GPIO1 D6 /VGA /VGA @
GPIO2 C7 C7402 2 1 4.7UF/6.3V
GPIO3 F9
2
4

GPIO4 A3
GPIO5 A4 FB_CLAMP_TGL_REQ#_VGA Q7403

1
GPIO6

G
GK208
B6 nb_r0402_short_5mil_small 2N7002
GPIO7 A6 VGA_OVERTEMP#_R_GPIO8 SP7401 2 1 VGA_OVERTEMP#_R 2 S

3
OVERT GPIO8 VGA_THERM# 32

D
F8 THERM_ALERT#_GPIO9 2 1 THERM_ALERT#
GPIO9 C5 SP7402
A Pull high +3VS at system A
GPIO10 E7 nb_r0402_short_5mil_small /VGA
GPIO11 VGA_VID 87
D7 AC_BATT# R7421 1 /VGA 2 10KOhm +3VS_VGA
GPIO12 B4 R7434 2 1 0Ohm R7431 2 @ 1 0Ohm
GPIO13 @
VGA_PSI 87 11/30
R7435 1 2
GK208 GF117 GF119
@ 10KOhm
+3VS_VGA unmount R7434 and R7435
GPIO16 NC
D5 VPS 1 @ 2 +3VS_VGA
GPIO16 E6 R7420 10KOhm
GPIO20 NC GPIO20
GPIO8 NC
C4
GPIO21

Title : VGA_GPIO,STRAP
BG1\HW5\W Engineer: Ahren_CHEN
N14P-GV2 Size Project Name Rev
02V0A0000019
/VGA
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 74 of 104
5 4 3 2 1
 5 4 3 2 1

+VGA_VCORE +VGA_VCORE
U7001F
U7001E

Vinafix.com
13/14 GND
11/14 NVVDD A2 M13
K10 AB17 GND_001 GND_071 M15
K12 VDD_01 AB20 GND_005 GND_072 M17
VDD_02 GND_006 GND_073

1
K14 AB24 N10
K16 VDD_03 C7506 C7505 C7509 C7508 PLACE UNDER GPU AC2 GND_007 GND_074 N12
K18 VDD_04 AC22 GND_008 GND_075 N14
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
L11 VDD_05 /VGA /VGA /VGA /VGA AC26 GND_009 GND_076 N16
L13 VDD_06 AC5 GND_010 GND_077 N18
L15 VDD_07 AC8 GND_011 GND_078 P11
D
L17 VDD_08 GND AD12 GND_012 GND_079 P13 D
M10 VDD_09 AD13 GND_013 GND_080 P15
VDD_10 GND_014 GND_081

1
M12 C7510 C7511 C7512 C7513 C7514 C7515 C7516 C7522 C7517 C7518 A26 P17
M14 VDD_11 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V AD15 GND_002 GND_082 P2
M16 VDD_12 /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA AD16 GND_015 GND_083 P23

2
M18 VDD_13 AD18 GND_016 GND_084 P26
N11 VDD_14 AD19 GND_017 GND_085 P5
N13 VDD_15 AD21 GND_018 GND_086 R10
N15 VDD_16 AD22 GND_019 GND_087 R12
N17 VDD_17 GND AE11 GND_020 GND_088 R14
P10 VDD_18 AE14 GND_021 GND_089 R16
P12 VDD_19 AE17 GND_022 GND_090 R18
P14 VDD_20 AE20 GND_023 GND_091 T11
P16 VDD_21 AB11 GND_024 GND_092 T13
P18 VDD_22 AF1 GND_003 GND_093 T15
VDD_23 11/30 GND_025 GND_094

1
R11 C7527 C7523 C7520 C7521 C7524 C7525 @ AF11 T17
R13 VDD_24 + AF14 GND_026 GND_095 U10
C7528 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V CE7501
R15 VDD_25 22UF/6.3V /VGA /VGA /VGA /VGA /VGA AF17 GND_027 GND_096 U12
2 47UF/6.3V 330UF/2.5V

2
R17 VDD_26 /VGA vx_c3528_h79 AF20 GND_028 GND_097 U14

2
T10 VDD_27 /VGA AF23 GND_029 GND_098 U16
T12 VDD_28 AF5 GND_030 GND_099 U18
T14 VDD_29 AF8 GND_031 GND_100 U2
T16 VDD_30 GND AG2 GND_032 GND_101 U23
T18 VDD_31 Option caps PLACE NEAR BGA AG26 GND_033 GND_102 U26
U11 VDD_32 AB14 GND_034 GND_103 U5
U13 VDD_33 B1 GND_004 GND_104 V11
U15 VDD_34 NV PUN-0636-001_v03 change H/W design add a 330uF cap B11 GND_035 GND_105 V13
U17 VDD_35 B14 GND_036 GND_106 V15
V10 VDD_36 B17 GND_037 GND_107 V17
V12 VDD_37 B20 GND_038 GND_108 Y2
V14 VDD_38 B23 GND_039 GND_109 Y23
V16 VDD_39 B27 GND_040 GND_110 Y26
V18 VDD_40 B5 GND_041 GND_111 Y5
VDD_41 B8 GND_042 GND_112
E11 GND_043
E14 GND_044
N14P-GV2 E17 GND_045
02V0A0000019 E2 GND_046
C C
E20 GND_047
/VGA GND_048
E22
E25 GND_049
E5 GND_050
E8 GND_051
H2 GND_052
H23 GND_053
U7001D GND_054
H25
14/14 XVDD/VDD33
85 mA +3VS_VGA H5 GND_055
K11 GND_056

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AD10 G10 R7501 2 /VGA 1 0Ohm K13 GND_057
AD7 NC_10 VDD33_1 G12 K15 GND_058
NC_14 VDD33_2 GND_059

2
B19 G8 C7502 C7503 K17
NC_36 VDD33_3 G9 C7507 C7501 C7504 L10 GND_060
VDD33_4 1UF/6.3V 4.7UF/6.3V L12 GND_061
0.1UF/10V 0.1UF/10V 0.1UF/10V

1
F11 /VGA /VGA /VGA /VGA /VGA L14 GND_062
NC_42 L16 GND_063
+1.5VS_VGA V5 L18 GND_064
U7001C V6 NC_75 L2 GND_065
NC_76 PLACE NEAR BALLS PLACE NEAR BGA GND L23 GND_066
PLACE UNDER GPU 12/14 FBVDDQ
L25 GND_067
B26 L5 GND_068 AA7
C25 FBVDDQ_01 M11 GND_069 GND_113 AB7
FBVDDQ_02 GND_070 GND_114
1

C7532 C7531 E23 CONFIGURABLE

C7526 C7530 E26 FBVDDQ_03
POWER CHANNELS
1UF/6.3V 1UF/6.3V F14 FBVDDQ_04
0.1UF/10V 0.1UF/10V * nc on substrate
2

/VGA /VGA /VGA /VGA F21 FBVDDQ_05

G13 FBVDDQ_06 G1 N14P-GV2
G14 FBVDDQ_07 G2 NC_45 02V0A0000019
G15 FBVDDQ_08 G3 NC_46
FBVDDQ_09 NC_47 /VGA
G16 G4 GND GND
FBVDDQ_10 NC_48
2

C7533 C7534 G18 G5

GND G19 FBVDDQ_11 G6 NC_49
4.7UF/6.3V 4.7UF/6.3V G20 FBVDDQ_12 G7 NC_50
1

G21 FBVDDQ_13 NC_51

H24 FBVDDQ_14
/ / FBVDDQ_15
V V H26 V1
B G G J21 FBVDDQ_16 V2 NC_73 B
A A FBVDDQ_17 NC_74
K21
L22 FBVDDQ_18
GND L24 FBVDDQ_19
L26 FBVDDQ_20
M21 FBVDDQ_21 W1
N21 FBVDDQ_22 W2 NC_77
R21 FBVDDQ_23 W3 NC_78
T21 FBVDDQ_24 W4 NC_79
FBVDDQ_25 NC_80
1

C7535 V21
C7529 W21 FBVDDQ_26
22UF/6.3V FBVDDQ_27
10UF/6.3V
2

/VGA N14P-GV2
02V0A0000019
Vinafix.com
/VGA
/VGA

GND

PLACE NEAR BGA

PLACE CLOSE TO GPU BALLS

+1.5VS_VGA

D22 +FB_CAL_PD_VDDQ R7504 1 /VGA 2 40.2Ohm 1%

FB_CAL_PD_VDDQ
A A

C24 +FB_CAL_PU_GND R7503 1 /VGA 2 42.2Ohm 1%

FB_CAL_PU_GND

B25 +FB_CAL_TERM_GND R7502 1 2 51.1Ohm

FB_CAL_TERM_GND

N14P-GV2 /VGA GND

02V0A0000019
/VGA Title : VGA_Power,GND
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
C VGST 1.1
Date: Thursday, December 20, 2012 Sheet 75 of 104
5 4 3 2 1
 5 4 3 2 1

71,77 FBAD[0..63]

FBA Partition 31..0 RANK 0

71,77 FBA_CMD[0..30]
71,77 FBADQM[0..7]
71,77 FBADQS_WP[0..7]
71,77 FBADQS_RN[0..7]

*TOP SIDE* --- M2 *TOP SIDE* --- M1

D D

R7604 U7603
1 2 FBA_VREF_CA0 M8 E3 FBAD22
U7604 +1.5VS_VGA VREFCA DQL0
FBA_VREF_DQ0 H1 F7 FBAD19
VREFDQ DQL1

1
FBA_VREF_CA0 M8 E3 FBAD2 1.33KOhm 1% F2 FBAD16
1 R7607 2 FBA_VREF_DQ0 H1 VREFCA DQL0 F7 FBAD3 C7621 R7605 FBA_CMD7 N3 DQL2 F8 FBAD18
+1.5VS_VGA VREFDQ DQL1 A0 DQL3
F2 FBAD1 0.01UF/16V 1.33KOhm FBA_CMD10 P7 H3 FBAD23 Byte 2

2
DQL2 A1 DQL4

1
1.33KOhm FBA_CMD7 N3 F8 FBAD0 /VGA 1% FBA_CMD24 P3 H8 FBAD17
/VGA

1
FBA_CMD10 P7 A0 DQL3 H3 FBAD7 FBA_CMD6 N2 A2 DQL5 G2 FBAD21
1% R7608 Byte 0

2
C7623 FBA_CMD24 P3 A1 DQL4 H8 FBAD5 FBA_CMD22 P8 A3 DQL6 H7 FBAD20
1.33KOhm A2 DQL5 A4 DQL7
/VGA 0.01UF/16V 1% FBA_CMD6 N2 G2 FBAD6 FBA_CMD26 P2

2
FBA_CMD22 P8 A3 DQL6 H7 FBAD4 /VGA FBA_CMD5 R8 A5
place near VRAM

2
/VGA A4 DQL7 A6
FBA_CMD26 P2 FBA_CMD21 R2 D7 FBAD9
FBA_CMD5 R8 A5 FBA_CMD8 T8 A7 DQU0 C3 FBAD8
/VGA FBA_CMD21 R2 A6 D7 FBAD29 FBA_CMD4 R3 A8 DQU1 C8 FBAD10
place near VRAM A7 DQU0 A9 DQU2
FBA_CMD8 T8 C3 FBAD26 FBA_CMD25 L7 C2 FBAD11
FBA_CMD4 R3 A8 DQU1 C8 FBAD28 FBA_CMD23 R7 A10/AP DQU3 A7 FBAD12
L7 A9 DQU2 C2 N7 A11 DQU4 A2
FBA_CMD25
A10/AP DQU3
FBAD31 FBA_CMD9
A12/BC# DQU5
FBAD13 Byte 1
FBA_CMD23 R7 A7 FBAD27 FBA_CMD12 T3 B8 FBAD15
N7 A11 DQU4 A2 M7 A13 DQU6 A3
FBA_CMD9
A12/BC# DQU5
FBAD30 Byte 3 A15 DQU7
FBAD14
FBA_CMD12 T3 B8 FBAD25
M7 A13 DQU6 A3 FBAD24 N1
A15 DQU7 VDD1 +1.5VS_VGA
FBA_CMD29 M2 R1
N1 FBA_CMD13 N8 BA0 VDD2 B2
VDD1 +1.5VS_VGA BA1 VDD3

1
FBA_CMD29 M2 R1 FBA_CMD27 M3 K2 C7603 C7601 C7605 C7602
FBA_CMD13 N8 BA0 VDD2 B2 BA2 VDD4 G7 /VGA /VGA /VGA /VGA C7604 C7622
BA1 VDD3 VDD5

1
FBA_CMD27 M3 K2 C7611 C7609 C7613 C7610 J7 K8 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 1UF/6.3V
71 FBA_CLK0

2
BA2 VDD4 G7 /VGA /VGA /VGA /VGA C7612 C7617 K7 CK VDD6 D9
VDD5 71 FBA_CLK0# CK# VDD7 /VGA /VGA
FBA_CLK0 J7 K8 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 1UF/6.3V FBA_CMD3 K9 N9

2
FBA_CLK0# K7 CK VDD6 D9 CKE VDD8 R9
FBA_CMD3 K9 CK# VDD7 N9 /VGA /VGA FBA_CMD0 K1 VDD9
CKE VDD8 R9 R7609 L2 ODT A1
FBA_CMD2
FBA_CMD0 K1 VDD9 1 2 FBA_CMD11 J3 CS# VDDQ1 C1
FBA_CMD2 L2 ODT A1 FBA_CMD15 K3 RAS# VDDQ2 F1
CS# VDDQ1 CAS# VDDQ3

1
FBA_CMD11 J3 C1 FBA_CMD28 L3 D2 C7608 C7606 C7607 C7627
FBA_CMD15 K3 RAS# VDDQ2 F1 160Ohm WE# VDDQ4 H2 C7624 C7625 /VGA /VGA /VGA /VGA
CAS# VDDQ3 VDDQ5

1
FBA_CMD28 L3 D2 C7616 C7614 C7615 C7620 /VGA FBADQS_WP2 F3 A8 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
WE# VDDQ4 H2 C7618 C7619 /VGA /VGA /VGA /VGA FBADQS_WP1 C7 DQSL VDDQ6 C9
FBADQS_WP0 F3 VDDQ5 A8 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V DQSU VDDQ7 E9 /VGA /VGA
1UF/6.3V 1UF/6.3V place near VRAM

2
FBADQS_WP3 C7 DQSL VDDQ6 C9 FBADQM2 E7 VDDQ8 H9
DQSU VDDQ7 E9 /VGA /VGA FBADQM1 D3 DML VDDQ9
VDDQ8 DMU 10/2

盡盡盡盡盡
FBADQM0 E7 H9 E1
DML VDDQ9 VSS1
FBADQM3 D3
10/2 FBADQS_RN2 G3 M1 PLACE CLOSE to DRAM
盡可可可可
DMU DQSL# VSS2

盡盡盡盡盡
E1 FBADQS_RN1 B7 P1
FBADQS_RN0 G3 VSS1 M1 PLACE CLOSE to DRAM DQSU# VSS3 T1 0.1uF DRAM

盡可可可可
DQSL# VSS2 VSS4
FBADQS_RN3 B7
DQSU# VSS3
P1
T1 0.1uF DRAM VRAM_RST# T2
RESET# VSS5
J2
B3
1uF
VSS4 VSS6
C T2 J2 1uF L8 G8 C
71,77 VRAM_RST# RESET# VSS5
VSS6
B3 ZQ VSS7
VSS8
J8 Decouling for M1/M501 DRAMs

1
L8 G8 /VGA A9
ZQ VSS7
VSS8
J8 Decouling for M2/M502 DRAMs R7603 VSS9
VSS10
M9

1
/VGA A9 243Ohm J1 P9
R7606 VSS9 M9 1% L1 NC1 VSS11 T9
J1 VSS10 P9 J9 NC2 VSS12
243Ohm

2
1% L1 NC1 VSS11 T9 L9 NC3 B1
J9 NC2 VSS12 FBA_CMD14 T7 NC4 VSSQ1 D1

2
L9 NC3 B1 NC5 VSSQ2 G1
FBA_CMD14 T7 NC4 VSSQ1 D1 VSSQ3 E2
NC5 VSSQ2 G1 VSSQ4 D8
VSSQ3 E2 VSSQ5 E8
VSSQ4 D8 VSSQ6 B9
VSSQ5 E8 VSSQ7 F9
VSSQ6 B9 VSSQ8 G9
VSSQ7 F9 VSSQ9
VSSQ8 G9
VSSQ9 H5TQ2G63BFR-11C
03V150000029
H5TQ2G63BFR-11C
03V150000029

https://vinafix.com
FBA Partition 31..0 RANK 1
*BOT SIDE* --- M501
*BOT SIDE* --- M502 10/3
For N14P-GV2

B B

U7602
M8 E3 U7601
FBA_VREF_CA0 FBAD2
FBA_VREF_DQ0 H1 VREFCA DQL0 F7 FBAD3 FBA_VREF_CA0 M8 E3 FBAD22
VREFDQ DQL1 F2 FBAD1 FBA_VREF_DQ0 H1 VREFCA DQL0 F7 FBAD19
FBA_CMD9 N3 DQL2 F8 FBAD0 VREFDQ DQL1 F2 FBAD16
FBA_CMD24 P7 A0 DQL3 H3 FBAD7 FBA_CMD9 N3 DQL2 F8 FBAD18
A1 DQL4 Byte 0 A0 DQL3
FBA_CMD10 P3 H8 FBAD5 FBA_CMD24 P7 H3 FBAD23 Byte 2
FBA_CMD13 N2 A2 DQL5 G2 FBAD6 FBA_CMD10 P3 A1 DQL4 H8 FBAD17
FBA_CMD26 P8 A3 DQL6 H7 FBAD4 FBA_CMD13 N2 A2 DQL5 G2 FBAD21
FBA_CMD22 P2 A4 DQL7 FBA_CMD26 P8 A3 DQL6 H7 FBAD20
FBA_CMD21 R8 A5 FBA_CMD22 P2 A4 DQL7
FBA_CMD5 R2 A6 D7 FBAD29 FBA_CMD21 R8 A5
FBA_CMD8 T8 A7 DQU0 C3 FBAD26 FBA_CMD5 R2 A6 D7 FBAD9
FBA_CMD23 R3 A8 DQU1 C8 FBAD28 FBA_CMD8 T8 A7 DQU0 C3 FBAD8
FBA_CMD28 L7 A9 DQU2 C2 FBAD31 FBA_CMD23 R3 A8 DQU1 C8 FBAD10
FBA_CMD4 R7 A10/AP DQU3 A7 FBAD27 FBA_CMD28 L7 A9 DQU2 C2 FBAD11
N7 A11 DQU4 A2 R7 A10/AP DQU3 A7
FBA_CMD7
A12/BC# DQU5
FBAD30 Byte 3 FBA_CMD4
A11 DQU4
FBAD12
FBA_CMD14 T3 B8 FBAD25 FBA_CMD7 N7 A2 FBAD13 Byte 1
M7 A13 DQU6 A3 FBAD24 FBA_CMD14 T3 A12/BC# DQU5 B8 FBAD15
A15 DQU7 M7 A13 DQU6 A3 FBAD14
N1 A15 DQU7
VDD1 +1.5VS_VGA
FBA_CMD29 M2 R1 N1
BA0 VDD2 VDD1 +1.5VS_VGA
FBA_CMD6 N8 B2 FBA_CMD29 M2 R1
FBA_CMD30 M3 BA1 VDD3 K2 FBA_CMD6 N8 BA0 VDD2 B2
BA2 VDD4 G7 FBA_CMD30 M3 BA1 VDD3 K2
FBA_CLK0 J7 VDD5 K8 BA2 VDD4 G7
FBA_CLK0# K7 CK VDD6 D9 FBA_CLK0 J7 VDD5 K8
FBA_CMD3 K9 CK# VDD7 N9 FBA_CLK0# K7 CK VDD6 D9
CKE VDD8 R9 FBA_CMD3 K9 CK# VDD7 N9
FBA_CMD0 K1 VDD9 CKE VDD8 R9
FBA_CMD1 L2 ODT A1 FBA_CMD0 K1 VDD9
FBA_CMD11 J3 CS# VDDQ1 C1 FBA_CMD1 L2 ODT A1
FBA_CMD15 K3 RAS# VDDQ2 F1 FBA_CMD11 J3 CS# VDDQ1 C1
FBA_CMD25 L3 CAS# VDDQ3 D2 FBA_CMD15 K3 RAS# VDDQ2 F1
WE# VDDQ4 H2 FBA_CMD25 L3 CAS# VDDQ3 D2
FBADQS_WP0 F3 VDDQ5 A8 WE# VDDQ4 H2
FBADQS_WP3 C7 DQSL VDDQ6 C9 FBADQS_WP2 F3 VDDQ5 A8
DQSU VDDQ7 E9 FBADQS_WP1 C7 DQSL VDDQ6 C9
FBADQM0 E7 VDDQ8 H9 DQSU VDDQ7 E9
FBADQM3 D3 DML VDDQ9 FBADQM2 E7 VDDQ8 H9
DMU E1 FBADQM1 D3 DML VDDQ9
FBADQS_RN0 G3 VSS1 M1 DMU E1
FBADQS_RN3 B7 DQSL# VSS2 P1 FBADQS_RN2 G3 VSS1 M1
DQSU# VSS3 T1 FBADQS_RN1 B7 DQSL# VSS2 P1
VRAM_RST# T2 VSS4 J2 DQSU# VSS3 T1
RESET# VSS5 B3 VRAM_RST# T2 VSS4 J2
L8 VSS6 G8 RESET# VSS5 B3
A ZQ VSS7 J8 L8 VSS6 G8 A
1

/N14P-GV2 VSS8 A9 ZQ VSS7 J8

VSS9 VSS8

1
R7602 M9 /N14P-GV2 A9
J1 VSS10 P9 R7601 VSS9 M9
243Ohm NC1 VSS11 VSS10
1% L1 T9 243Ohm J1 P9
J9 NC2 VSS12 1% L1 NC1 VSS11 T9
2

L9 NC3 B1 J9 NC2 VSS12

2
FBA_CMD12 T7 NC4 VSSQ1 D1 L9 NC3 B1
NC5 VSSQ2 G1 FBA_CMD12 T7 NC4 VSSQ1 D1
VSSQ3 E2 NC5 VSSQ2 G1
VSSQ4 D8 VSSQ3 E2
VSSQ5 E8 VSSQ4 D8
VSSQ6 B9 VSSQ5 E8
VSSQ7 F9 VSSQ6 B9
VSSQ8 G9 VSSQ7 F9
VSSQ9 VSSQ8 G9
VSSQ9
H5TQ2G63BFR-11C
03V150000029 H5TQ2G63BFR-11C Title : VGA_FBA_HYNIX DDR3 [31:0]
03V150000029
BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
D
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 76 of 104
5 4 3 2 1
 5 4 3 2 1

71,76 FBAD[0..63]

FBA Partition 63..32 RANK 0 71,76

71,76
71,76
71,76
FBA_CMD[0..30]
FBADQM[0..7]
FBADQS_WP[0..7]
FBADQS_RN[0..7]

*TOP SIDE* --- M4 *TOP SIDE* --- M3

D D

U7702
M8 E3 U7701
FBA_VREF_CA1 FBAD45
1 R7707 2 FBA_VREF_DQ1 H1 VREFCA DQL0 F7 FBAD46 1 R7705 2 FBA_VREF_CA1 M8 E3 FBAD33
+1.5VS_VGA VREFDQ DQL1 +1.5VS_VGA VREFCA DQL0
F2 FBAD47 FBA_VREF_DQ1 H1 F7 FBAD32
DQL2 VREFDQ DQL1

1
1.33KOhm 1% FBA_CMD7 N3 F8 FBAD43 1.33KOhm 1% F2 FBAD35
FBA_CMD10 P7 A0 DQL3 H3 FBAD40 FBA_CMD7 N3 DQL2 F8 FBAD34
C7702 R7708
A1 DQL4 Byte 5 /VGA C7701 R7706
A0 DQL3
0.01UF/16V 1.33KOhm FBA_CMD24 P3 H8 FBAD44 0.01UF/16V 1.33KOhm FBA_CMD10 P7 H3 FBAD36 Byte 4

2
1% FBA_CMD6 N2 A2 DQL5 G2 FBAD41 /VGA FBA_CMD24 P3 A1 DQL4 H8 FBAD37
/VGA /VGA A3 DQL6 A2 DQL5
FBA_CMD22 P8 H7 FBAD42 1% FBA_CMD6 N2 G2 FBAD39

2
FBA_CMD26 P2 A4 DQL7 /VGA FBA_CMD22 P8 A3 DQL6 H7 FBAD38
FBA_CMD5 R8 A5 FBA_CMD26 P2 A4 DQL7
/VGA FBA_CMD21 R2 A6 D7 FBAD54 FBA_CMD5 R8 A5
place near VRAM A7 DQU0
place near VRAM A6
FBA_CMD8 T8 C3 FBAD51 FBA_CMD21 R2 D7 FBAD56
FBA_CMD4 R3 A8 DQU1 C8 FBAD55 FBA_CMD8 T8 A7 DQU0 C3 FBAD61
FBA_CMD25 L7 A9 DQU2 C2 FBAD53 FBA_CMD4 R3 A8 DQU1 C8 FBAD58
FBA_CMD23 R7 A10/AP DQU3 A7 FBAD49 FBA_CMD25 L7 A9 DQU2 C2 FBAD59
N7 A11 DQU4 A2 R7 A10/AP DQU3 A7
FBA_CMD9
A12/BC# DQU5
FBAD52 Byte 6 FBA_CMD23
A11 DQU4
FBAD63
FBA_CMD12 T3 B8 FBAD50 FBA_CMD9 N7 A2 FBAD57 Byte 7
M7 A13 DQU6 A3 FBAD48 FBA_CMD12 T3 A12/BC# DQU5 B8 FBAD62
A15 DQU7 M7 A13 DQU6 A3 FBAD60
N1 A15 DQU7
VDD1 +1.5VS_VGA
FBA_CMD29 M2 R1 N1
BA0 VDD2 VDD1 +1.5VS_VGA
FBA_CMD13 N8 B2 FBA_CMD29 M2 R1

1
FBA_CMD27 M3 BA1 VDD3 K2 C7718 C7716 C7720 C7717 FBA_CMD13 N8 BA0 VDD2 B2
BA2 VDD4 BA1 VDD3

1
G7 /VGA /VGA /VGA /VGA C7719 C7724 FBA_CMD27 M3 K2 C7706 C7704 C7708 C7705
J7 VDD5 K8 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V BA2 VDD4 G7 /VGA /VGA /VGA /VGA C7707 C7712
71 FBA_CLK1 1UF/6.3V 1UF/6.3V

2
K7 CK VDD6 D9 FBA_CLK1 J7 VDD5 K8 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
71 FBA_CLK1# 1UF/6.3V 1UF/6.3V

2
FBA_CMD19 K9 CK# VDD7 N9 /VGA /VGA FBA_CLK1# K7 CK VDD6 D9
CKE VDD8 R9 FBA_CMD19 K9 CK# VDD7 N9 /VGA /VGA
FBA_CMD16 K1 VDD9 CKE VDD8 R9
R7709 L2 ODT A1 K1 VDD9
FBA_CMD18 FBA_CMD16
1 2 FBA_CMD11 J3 CS# VDDQ1 C1 FBA_CMD18 L2 ODT A1
FBA_CMD15 K3 RAS# VDDQ2 F1 FBA_CMD11 J3 CS# VDDQ1 C1

1
FBA_CMD28 L3 CAS# VDDQ3 D2 C7723 C7721 C7722 C7727 FBA_CMD15 K3 RAS# VDDQ2 F1
WE# VDDQ4 CAS# VDDQ3

1
160Ohm H2 C7725 C7726 /VGA /VGA /VGA /VGA FBA_CMD28 L3 D2 C7711 C7709 C7710 C7715
/VGA FBADQS_WP5 F3 VDDQ5 A8 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V WE# VDDQ4 H2 C7713 C7714 /VGA /VGA /VGA /VGA
1UF/6.3V 1UF/6.3V

2
FBADQS_WP6 C7 DQSL VDDQ6 C9 FBADQS_WP4 F3 VDDQ5 A8 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
1UF/6.3V 1UF/6.3V

2
DQSU VDDQ7 E9 /VGA /VGA FBADQS_WP7 C7 DQSL VDDQ6 C9
place near VRAM VDDQ8 DQSU VDDQ7 /VGA /VGA
FBADQM5 E7 H9 E9
FBADQM6 D3 DML VDDQ9 FBADQM4 E7 VDDQ8 H9
DMU 10/2 DML VDDQ9

盡盡盡盡盡
E1 FBADQM7 D3
VSS1
PLACE CLOSE to DRAM DMU 10/2

盡盡盡盡盡
FBADQS_RN5 G3 M1 E1

盡可可可可
DQSL# VSS2 VSS1
FBADQS_RN6 B7 P1
0.1uF DRAM FBADQS_RN4 G3 M1 PLACE CLOSE to DRAM
盡可可可可
DQSU# VSS3 T1 FBADQS_RN7 B7 DQSL# VSS2 P1
VRAM_RST# T2 VSS4 J2 1uF DQSU# VSS3 T1 0.1uF DRAM
RESET# VSS5 VSS4
L8 VSS6
B3
G8
71,76 VRAM_RST#
T2
RESET# VSS5
J2
B3
1uF
C ZQ VSS7 J8 Decouling for M4/M504 DRAMs L8 VSS6 G8
Decouling for M3/M503 DRAMs
C

1
/VGA VSS8 A9 ZQ VSS7 J8
VSS9 VSS8

1
R7702 M9 /VGA A9
J1 VSS10 P9 R7701 VSS9 M9
243Ohm NC1 VSS11 VSS10
1% L1 T9 243Ohm J1 P9
J9 NC2 VSS12 1% L1 NC1 VSS11 T9

2
L9 NC3 B1 J9 NC2 VSS12

2
FBA_CMD14 T7 NC4 VSSQ1 D1 L9 NC3 B1
NC5 VSSQ2 G1 FBA_CMD14 T7 NC4 VSSQ1 D1
VSSQ3 E2 NC5 VSSQ2 G1
VSSQ4 D8 VSSQ3 E2
VSSQ5 E8 VSSQ4 D8
VSSQ6 B9 VSSQ5 E8
VSSQ7 F9 VSSQ6 B9
VSSQ8 G9 VSSQ7 F9
VSSQ9 VSSQ8 G9
VSSQ9
H5TQ2G63BFR-11C
03V150000029 H5TQ2G63BFR-11C
03V150000029

FBA Partition 63..32 RANK 1

B
https://vinafix.com *BOT SIDE* --- M504

FBA_VREF_CA1
FBA_VREF_DQ1

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
M8
H1

N3
P7
P3
N2
P8
U7704

VREFCA
VREFDQ

A0
A1
A2
A3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
E3
F7
F2
F8
H3
H8
G2
H7
FBAD45
FBAD46
FBAD47
FBAD43
FBAD40
FBAD44
FBAD41
Byte 5
10/3
For N14P-GV2
*BOT SIDE* --- M503

FBA_VREF_CA1
FBA_VREF_DQ1

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
M8
H1

N3
P7
P3
N2
P8
P2
U7703

VREFCA
VREFDQ

A0
A1
A2
A3
A4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
FBAD33
FBAD32
FBAD35
FBAD34
FBAD36
FBAD37
FBAD39
FBAD38
Byte 4
B

FBA_CMD26 FBAD42 FBA_CMD22

FBA_CMD22 P2 A4 DQL7 FBA_CMD21 R8 A5
FBA_CMD21 R8 A5 FBA_CMD5 R2 A6 D7 FBAD56
FBA_CMD5 R2 A6 D7 FBAD54 FBA_CMD8 T8 A7 DQU0 C3 FBAD61
FBA_CMD8 T8 A7 DQU0 C3 FBAD51 FBA_CMD23 R3 A8 DQU1 C8 FBAD58
FBA_CMD23 R3 A8 DQU1 C8 FBAD55 FBA_CMD28 L7 A9 DQU2 C2 FBAD59
FBA_CMD28 L7 A9 DQU2 C2 FBAD53 FBA_CMD4 R7 A10/AP DQU3 A7 FBAD63
R7 A10/AP DQU3 A7 N7 A11 DQU4 A2
FBA_CMD4
A11 DQU4
FBAD49 FBA_CMD7
A12/BC# DQU5
FBAD57 Byte 7
FBA_CMD7 N7 A2 FBAD52 Byte 6 FBA_CMD14 T3 B8 FBAD62
FBA_CMD14 T3 A12/BC# DQU5 B8 FBAD50 M7 A13 DQU6 A3 FBAD60
M7 A13 DQU6 A3 FBAD48 A15 DQU7
A15 DQU7 N1
VDD1 +1.5VS_VGA
N1 FBA_CMD29 M2 R1
VDD1 +1.5VS_VGA BA0 VDD2
FBA_CMD29 M2 R1 FBA_CMD6 N8 B2
FBA_CMD6 N8 BA0 VDD2 B2 FBA_CMD30 M3 BA1 VDD3 K2
FBA_CMD30 M3 BA1 VDD3 K2 BA2 VDD4 G7
BA2 VDD4 G7 FBA_CLK1 J7 VDD5 K8
FBA_CLK1 J7 VDD5 K8 FBA_CLK1# K7 CK VDD6 D9
FBA_CLK1# K7 CK VDD6 D9 FBA_CMD19 K9 CK# VDD7 N9
FBA_CMD19 K9 CK# VDD7 N9 CKE VDD8 R9
CKE VDD8 R9 FBA_CMD16 K1 VDD9
FBA_CMD16 K1 VDD9 FBA_CMD17 L2 ODT A1
FBA_CMD17 L2 ODT A1 FBA_CMD11 J3 CS# VDDQ1 C1
FBA_CMD11 J3 CS# VDDQ1 C1 FBA_CMD15 K3 RAS# VDDQ2 F1
FBA_CMD15 K3 RAS# VDDQ2 F1 FBA_CMD25 L3 CAS# VDDQ3 D2
FBA_CMD25 L3 CAS# VDDQ3 D2 WE# VDDQ4 H2
WE# VDDQ4 H2 FBADQS_WP4 F3 VDDQ5 A8
FBADQS_WP5 F3 VDDQ5 A8 FBADQS_WP7 C7 DQSL VDDQ6 C9
FBADQS_WP6 C7 DQSL VDDQ6 C9 DQSU VDDQ7 E9
DQSU VDDQ7 E9 FBADQM4 E7 VDDQ8 H9
FBADQM5 E7 VDDQ8 H9 FBADQM7 D3 DML VDDQ9
FBADQM6 D3 DML VDDQ9 DMU E1
DMU E1 FBADQS_RN4 G3 VSS1 M1
FBADQS_RN5 G3 VSS1 M1 FBADQS_RN7 B7 DQSL# VSS2 P1
FBADQS_RN6 B7 DQSL# VSS2 P1 DQSU# VSS3 T1
DQSU# VSS3 T1 VRAM_RST# T2 VSS4 J2
VRAM_RST# T2 VSS4 J2 RESET# VSS5 B3
RESET# VSS5 B3 L8 VSS6 G8
L8 VSS6 G8 ZQ VSS7 J8
ZQ VSS7 VSS8

1
J8 /N14P-GV2 A9
VSS8 VSS9
1

/N14P-GV2 A9 R7703 M9
R7704 VSS9 M9 J1 VSS10 P9
VSS10 243Ohm NC1 VSS11
243Ohm J1 P9 1% L1 T9
1% L1 NC1 VSS11 T9 J9 NC2 VSS12

2
J9 NC2 VSS12 L9 NC3 B1
2

A L9 NC3 B1 FBA_CMD12 T7 NC4 VSSQ1 D1 A

FBA_CMD12 T7 NC4 VSSQ1 D1 NC5 VSSQ2 G1
NC5 VSSQ2 G1 VSSQ3 E2
VSSQ3 E2 VSSQ4 D8
VSSQ4 D8 VSSQ5 E8
VSSQ5 E8 VSSQ6 B9
VSSQ6 B9 VSSQ7 F9
VSSQ7 F9 VSSQ8 G9
VSSQ8 G9 VSSQ9
VSSQ9
H5TQ2G63BFR-11C
H5TQ2G63BFR-11C 03V150000029
03V150000029

Title : VGA_FBA_HYNIX DDR3 [63:32]

BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name Rev
D
VGST 1.1
Date: Thursday, December 20, 2012 Sheet 77 of 104
5 4 3 2 1
 5 4 3 2 1

Shark Bay ULT VCORE

Vinafix.com

1 2
30 IMON
SR8010
R0402
93 CPU_VRON_PWR close U8001
D D
1 2 VRM_VREF
6 CPU_VRON

1
SR8002
R0402

1
@

@
C8000

2
1UF/6.3V R8008 1% R8017 1% R8015 R8007 1%
change to 8.87K VCORE (1-Phase)

2
@ 10% C8023

R8014

R8025
0Ohm

0Ohm
100KOhm 432KOhm 1MOhm 9.09KOHM
4700PF/25V @ TDC :32A

1
@
Frequency :1MHz

2
1%
PWR Cap. :132uF
EE Cap. :352uF

1
GND_VCORE
Input current=10A

1
R8003
39KOhm C8018
R8023 1%
R8024 R8016 R8026 1% R8027 1% +AC_BAT_SYS Total Cap. :484uF

VRM_IMON
10KOhm
0.1UF/10V 100KOhm 100KOhm 150KOhm 150KOhm

1
10% C8004 C8003 C8025

1
@ C8005

2
1500PF/50V 10UF/25V 10UF/25V 10UF/25V

1
MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

2
C8002
GND_VCORE VRM_THERM
VCORE (2-Phase)

VRM_B-RAMP
0.1UF/25V

VRM_F-IMAX

2
TDC :32A

VRM_O-USR
VRM_SLEWA

VRM_OCP-I
GND_VCORE
R8022 Frequency :800KHz

VRM_BST1_R
+AC_BAT_SYS 2 1 VRM_VBAT PWR Cap. :264uF
EE Cap. :352uF
10KOhm U8000A
Total Cap. :618uF

16
15
14
13
12
11
10
9
1% TPS51622RSM

Vinafix.com

IMON
OCP-I

O-USR
SLEWA

B-RAMP
F-IMAX
VBAT

THERM
SR8011

1
17
VRM_CSP1_IC 8 CPU_VRON_PWR R0402 SR8000
/VCOR_1PH VRM_CSN1 18 CSP1 VR_ON 7 VRM_SKIP# 1 2 VRM_SKIP#_R R0603
/VCOR_1PH 1 2 19
VRM_CSN2_IC CSN1 SKIP# 6 VRM_PWM1 T8010
SR8005 1 2 R8041 20
VRM_CSP2_IC CSN2 PWM1 5 VRM_PWM2 TPC28T DCR = 1.19m OHM (40A) +VCORE
1 2 21 CSP2 PWM2 4 U8001 L8000
R8040 0Ohm
+3VS R8028

2
0Ohm 22 PU3 N/C1 3 VRM_PWRGD 5 4 VRM_LX1 1 2

1
R0402 23 N/C2 PGOOD 2 VRM_VDD 1 2 VRM_BST1_RP 6 VIN VSW 3

VR_HOT#
GFB VDD +3VS BOOT_R PGND1

ALERT#
24 1 VRM_BST1 7 2 VRM_+5VS_1

DROOP

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
VFB VDIO BOOT VDD

COMP
0.24uH

GND1

GND2
VREF
8 1

VCLK
10Ohm VRM_SKIP#_R

C8013

C8008

C8009

C8010

C8011

C8012
PWM SKIP#

V5A

1
9 Irat=30A
C8024 PGND2 R8000 @

2
1UF/10V 2.2Ohm

25
26
27
28
29
VRM_HOT# 30
31
32
33

2
GND_VCORE 10% CSD97374CQ4M 0.05

SHORT_PIN

SHORT_PIN
JP8000

JP8001
VRM_RC1 1
06V950000022 SR8006

VRM_V5A
VRM_DROOP
C8019 100PF/50V GND_VCORE 1 2

VRM_VREF
+5VS

1
R8010 1 2 VRM_COMP
C 1 2 R0603 C
R8006

2
C8044 C8021

1
100Ohm 2 1 1 2 0.1UF/10V 10UF/6.3V
1 2 10V220000001 R8011 10KOhm 2KOhm 1% @ 20% C8001

1
8 VSSSENSE R8013 1% 330PF/50V 10%
C8017

2
0Ohm @
2 1 1 2

2
R8029 10KOhm C8020
1% 0.33UF/16V
1500PF/50V

1
1 2 close L8000 R8039
6 VCCSENSE VRM_CSP1_IC 1 2 VRM_CSP1
R8012
R8009 R8021

2
https://vinafix.com
0Ohm GND_VCORE 2.32KOhm
+VCORE 2 1 2 1 R8036 3%
+5VS 10V320000043
10KOhm

2
10Ohm 1%
100Ohm

2
C8007
R8030

1
2

2
10V220000001 1UF/10V 10% R8037

1
1 2 C8042 C8039 22KOhm
+1.05VS

1
100PF/50V 0.1UF/25V

1
R8035

1
56Ohm GND_VCORE @
SR8001 3.01KOHM
1 2

2
4 VR_HOT# VRM_CSN1
R0402
SR8003
1 2 VRM_VCLK
6 VR_SVID_CLK

R0402 C8026
SR8007 +AC_BAT_SYS

1
1 2 VRM_SVID_DATA 0.1UF/25V
6 VR_SVID_DATA
C8028 C8029 C8027

1
/VCOR_2PH C8041
R0402 1500PF/50V 10UF/25V 10UF/25V 10UF/25V
/VCOR_2PH MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

VRM_BST2_R
SR8004

2
/VCOR_2PH /VCOR_2PH /VCOR_2PH
1 2 VRM_ALERT#
6 VR_SVID_ALERT#

R0402

1
6,30,92 VRM_PWRGD SR8008
R0603 T8011
/VCOR_2PH /VCOR_2PH TPC28T /VCOR_2PH
B U8002 B
L8001
5 4 VRM_LX2 1 2

1
6 VIN
VRM_BST2_RP VSW 3
VRM_BST2 7 BOOT_R PGND1 2 VRM_+5VS_2

22UF/6.3V
/VCOR_2PH

22UF/6.3V
/VCOR_2PH

22UF/6.3V
/VCOR_2PH

22UF/6.3V
/VCOR_2PH

22UF/6.3V
/VCOR_2PH

22UF/6.3V
/VCOR_2PH
8 BOOT VDD 1 VRM_SKIP#_R 0.24uH

C8036

C8033

C8034

C8032

C8035

C8031
9 PWM SKIP#

1
Irat=30A
PGND2 R8031 @ DCR = 1.19m OHM

2
2.2Ohm

2
CSD97374CQ4M

2
/VCOR_2PH 0.05

SHORT_PIN
/VCOR_2PH

JP8003
SHORT_PIN
SR8009

VRM_RC2 1

JP8002
1 2
U8000B
+5VS

1
R0603 C8040

1
1

2
34 C8045 10UF/6.3V
35 GND3 0.1UF/10V 20%
GND4

1
36 @ /VCOR_2PH

1
37 GND5 C8037
38 GND6 10%
330PF/50V

2
39 GND7 @
JP8004 40 GND8
2 1 41 GND9
GND10
TPS51622RSM
SHORT_PIN
06V950000022

close L8001 R8038

VRM_CSP2_IC 1 2 VRM_CSP2
GND_VCORE

2
2.32KOhm
R8033 3% 10V320000043
10KOhm /VCOR_2PH

2
/VCOR_2PH

1
2

2
R8034
C8043 C8038 22KOhm

1
100PF/50V 0.1UF/25V

1
R8032 /VCOR_2PH
/VCOR_2PH

1
@ 3.01KOHM
/VCOR_2PH
/VCOR_2PH

值值值值
2
1
VRM_CSN2_IC 2 VRM_CSN2 T8000 T8001 T8002 T8003 T8004
R8042 TPC28T TPC28T TPC28T TPC28T TPC28T
0Ohm
+VCORE
2012/10/30

1
A
T8009 T8005 T8006 T8007 T8008 A
TPC28T TPC28T TPC28T TPC28T TPC28T

1
<Variant Name>

Title : POWER_VCORE
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 80 of 104
5 4 3 2 1
 5 4 3 2 1

+5VO & +3VO POWER SUPPLY

D D

T8125
JP8102 @ TPC26T
1MM_OPEN_M1M2
2 1 +5VAO +AC_BAT_SYS Input current=1.6A
+5VA +AC_BAT_SYS

1
2 1

Input current=5.7A (0.056A)

1
C8106 C8103 @
+AC_BAT_SYS C8100 1UF/25V C8108 0.1UF/10V
1UF/6.3V vx_c0603_small 10UF/25V vx_c0402_small

2
1

1
10% 10%
vx_c0402_small MLCC/+/-10%

1
C8119 C8107@ C8104 @
10UF/25V 10UF/25V 0.1UF/10V 10% T8136 vx_c0805_h57_small

2
MLCC/+/-10% MLCC/+/-10% vx_c0402_small Q8100 TPC26T Q8102

1
10% 6 5 2 IRFHS8342TRPBF IRFHS8342TRPBF 2 5 6
vx_c0805_h57_small vx_c0805_h57_small
D D
5V_LG 3V_LG

1
G 3 3 G

15
14
13
12
11
S S
T8129 T8145

DRVL1
VO1
VREG5

DRVL2
VIN
7

7
JP8107 +5VO L8100 T8133
TPC26T TPC26T
+3VO
3mm_open_5mil_m1m2 3.3UH TPC26T T8100 L8101
+5VO= 6.7A Irat=6.6A C81055V_HG SR8100 16 10 3V_HG C8110 TPC26T 3.3UH +3VO=3.5A JP8108

1
1 2 1 2 2 15V_BST_R 1 2 5V_BST17 DRVH1 DRVH2 9 3V_BST 1 2 3V_BST_R 2 1 Irat=6.6A 1MM_OPEN_M1M2
+5VSUS

1
1 2 5V_LX 18 VBST1 VBST2 8 3V_LX 1 2 2 1
+3VSUS

1 1
SW1 SW2 2 1

1
VCLK 19 7 SR8101
0.1UF/25V VCLK PGOOD 0.1UF/25V
1

LIR=0.56 R8104 @ T8134 Enable1 20 6

(4.86A) + EN1 EN2 (0.469A)
1

1
@ C8121 C8129 CE8100 6 5 2 21
2.2Ohm 5% TPC26T
GND
Q8103 R8107 @
+
C8113 @

1
0.1UF/10V 10UF/6.3V vx_r0805_h24_small IRFHS8342TRPBF 2 5 6 CE8101 C8130 0.1UF/10V
220UF/6.3V 2.2Ohm

VREG3
D
vx_c0402_small vx_c0603_small 10UF/6.3V

VFB1

VFB2
D 220UF/6.3V
2

5V_RC2

CS1

CS2
G 3
10% 20% IRFHS8342 RDSON=25mOHM LIR=0.67 vx_c0603_small
vx_c0402_small

3V_RC2

2
1BV090000004

2
U8100A 3 G 20% 10%
1BV090000004
TPS51225CRUKR JP8106

1
2
3
4
5
S 5% SHORT_PIN
SUS_PWRGD 30,92 S
1

4
1

1
C8111 @ Q8101

7
1

1
C 1500PF/50V IRFHS8342TRPBF R8100 Enable2 C8116 @ C
2

1
MLCC/+/-10% R8101 1500PF/50V

2
+5VO JP8100 JP8104 vx_c0402_small 150KOhm 93.1KOHM 1% vx_c0402_small

TDC :6.7A
SHORT_PIN SHORT_PIN 10V220000024 vx_r0402_small vx_r0805_h24_small +3VO
2

2
OCP :8.35A TDC :3.5A
Frequency :300KHz 5V_FB_R 1 2 5V_FB 3V_FB 2 1 3V_FB_R Frequency :350KHz
PWR Cap. :230uF PWR Cap. :230uF
R8108 R8111
EE Cap. :0uF

2
EE Cap. :0uF 15.4KOHM 6.65KOHM

https://vinafix.com
Total Cap. :230uF
vx_r0402_small R8106 R8105 vx_r0402_small Total Cap. :230uF
IRFHS8342 RDSON=25mOHM 1%
1 2
10KOhm
vx_r0402_small
10KOhm
vx_r0402_small
1%
1 2 ESR :18mOHM
ESR :18mOHM 1% 1%

1
C8118 @ C8124 @
C8123 C8125 U8100B
39PF/50V 39PF/50V
1 2 vx_c0402_small vx_c0402_small 1 2
10% 10% 22
23 GND1
0.1UF/10V 0.1UF/10V GND2
10% 10%
vx_c0402_small vx_c0402_small TPS51225CRUKR
@ @
T8123
JP8101 @ TPC26T
1MM_OPEN_M1M2
(0.013A)+3VA 2 1 +3VAO

1
2 1
6

1
D Q8109A
FORCE_OFF_PWR 2 UM6K1NG1DTN C8101
1UF/6.3V 10%

2
G S
vx_c0402_small
1

T8122 T8135 T8105 T8106 T8113 T8114

TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
Enable1 Enable2
B +5VO +3VSUS B

1
D8114
1.2V/0.1A T8131 T8117 T8118 T8109 T8110
2

1 2 TPC26T TPC26T TPC26T TPC26T TPC26T

/SLPMUSIC +5VA +5VSUS

1
SR8102 SR8103
D8104
1

/USBSLP 1.2V/0.1A T8121 T8130 T8127 T8138 T8139

30,52 USBSLP_EN
1 2 R8134 D8100 +5VO TPC26T TPC26T TPC26T TPC26T TPC26T
1 2 1V/0.2A
VSUS_ON_EN 1 2 1 +3VA +3VO

1
1KOhm +5VO_1_1 3 20mil
1

1
D8105 2 C8120 @
1.2V/0.1A R8121 0.1UF/10V
560KOhm 5% vx_c0402_small
2
1

vx_r0402_small 10%
C8117
2

T8124 0.1UF/25V T8101

2

TPC26T TPC26T
1 2
30,36 SLP_MUSIC_EN
VCLK +10VO
1

D8113 20mil
1

1.2V/0.1A
/SLPMUSIC C8114
1

0.1UF/25V
2

SR8104
R8126 C8115
2 1 VSUS_ON_EN 1 2 1 2 0.1UF/25V
30,93 VSUS_ON
2

T8104 T8102
1

C8128 @ D8112 1KOhm 1 TPC26T JP8103 @ TPC26T

1

R8136 0.1UF/10V 1.2V/0.1A +5VO_2_2 3 1MM_OPEN_M1M2

560KOhm vx_c0402_small R8112 2 +12VO 1 2 +12VSUS
2

1 1

5% 10% 5% 1 2
560KOhm 20mil (0.013A)
D8101
2

vx_r0402_small 1V/0.2A C8112

2

0.1UF/25V
2

A A

Q8109B
UM6K1NG1DTN
3

D
5
92 FORCE_OFF_PWR
G S
4

<Variant Name>

Title : POWER_SYSTEM
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 81 of 104
5 4 3 2 1
 5 4 3 2 1

+1.05VS POWER SUPPLY

SR8200
1.05V_VDD 2 1
TRIP OCL +5VO

1
C8206 R0402
TPS51362 GND 8A
2.2UF/6.3V 10%

2
D vx_c0603_small D

TPS51367 5V 12A C8208

1
2700PF/50V VCCP_AGND
TPS51367 Float 16A 1AV200000061

2
1.05V_VSNS
1.05V_GSNS

Vref = 2.0V Input Current 0.97A

REFIN = GND , Vout = 1.05V +AC_BAT_SYS
REFIN = FLOAT ,Vout = 1.2V
U8200A

23
22
21
20
19
18
17
16
15

1
TPS51363RVET C8214 @ C8212 C8211
1500PF/50V 10UF/25V 10UF/25V

GND1
V5
VIN3
VIN2
VIN1
SLEW
GSNS
VSNS

TRIP
D8200 MLCC/+/-10% MLCC/+/-10%

2
1.2V/0.1A @
2 1 R8203 R8204
0Ohm 0Ohm 24 14
@ 25 REFIN2 PGND5 13 JP8202 JP8200
+1.05VO
1 2 1 2 26 REFIN PGND4 12 SHORT_PIN SHORT_PIN TDC :6.65A
27 VREF PGND3 11
Frequency :800KHz

1
1 2 28 NU2 PGND2 10
83,84,91,93 SUSB#_PWR EN PGND1
29
GND2
PWR Cap. :88uF
R8200 1
EE Cap. :110uF

PGOOD
10KOhm 1% C8209 C8207

MODE
0.1UF/25V 0.1UF/10V VCCP_AGND Total Cap. :198uF

SW1
SW2
SW3
SW4
NU1

BST
NC
vx_c0402_small
2

2
10%

1
2
3
4
5
6
7
8
9
F=800KHz +1.05VO
T8234 (6.65A)
VCCP_AGND TPC28T
06V420000002
C L8200 JP8203 C
1.05V_LX 1 2 2 1
+1.05VS

1
2 1

1.05V_BST
C8215 10% 0.68UH 3MM_OPEN_5MIL (4.5A)
6,92 +1.05VS_PWRGD
0.1UF/25V Irat=15.5A
SR8201

2
(0603) X7R 10%
1 2 2 1
1.05V_BST_R R8201 @ LIR=0.27

11.05V_RC
2.2Ohm
R0603 0.05
R8202

1
0Ohm

https://vinafix.com
@ C8213

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
1 2 1500PF/50V
MODE Fsw +5VO

C8205

C8202

C8200

C8203

C8204

C8201
1

1
@

2
GND 400KHz @ @

Float 800KHz

5V 1MHz

U8200B
33
GND6 32
GND5 31
GND4 30
GND3 JP8204
SHORT_PIN
TPS51363RVET 2 1 T8213 T8214 T8215
06V420000002 TPC28TTPC28TTPC28T

1
B
VCCP_AGND B

GND
T8201 T8202 T8203 T8205 T8206 T8207
TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T

+1.05VS +1.05VO

1
A A

<Variant Name>
Ahren_CHEN
Title : POWER_+1.05VS
Engineer:
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 82 of 104
5 4 3 2 1
 5 4 3 2 1

DDR & VTT POWER SUPPLY

D R8303 D
68KOhm 1%
1 2 Input Current 1.33A
+AC_BAT_SYS
R8304
SR8300

1
154KOhm C8316 @ C8312 C8313
T8304 1% 1 2 1500PF/50V 10UF/25V 10UF/25V
+0.675VO TPC28T 1 2 +5VO vx_c0402_small vx_c0805_h57_small vx_c0805_h57_small

2
(1.05A) MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

DDR_MODE
R0402 Q8300 @

DDR_TRIP
92 DDR_PWRGD

1
C8309 IRFHS8342TRPBF
JP8303

1
1UF/6.3V T8318 2 5 6
1 2 DDR_VTTSNS GND_TPS51216 vx_c0402_small TPC28T D

S3
S5

2
10%
JP8301 3 G
+1.35V

1
1MM_OPEN_M1M2 SHORT_PIN GND_TPS51216

21
20
19
18
17
16
2 1 U8300A
+0.675VS 2 1 S
+1.35VO

1
C8300 @

MODE
TRIP
PGOOD
GND2

S3
S5
(1.05A) 10UF/6.3V
SR8301 C8310

7
1

1
C8301 C8302 @ C8303 @ vx_c0603_small T8307 (7.07A) JP8300

2
10UF/6.3V 10UF/6.3V 0.1UF/10V 20% 1 15 DDR_BST1 2 1 2
DDR_BST_R TPC28T 3mm_open_5mil_m1m2
vx_c0603_small vx_c0603_small vx_c0402_small 2 VTTSNS VBST 14 DDR_HG L8300
2

2
20% 20% 10% 3 VLDOIN DRVH 13 DDR_LX R0603 1 2 1 2
+1.35V

1
VTT SW 0.1UF/25V 1 2

VDDQSNS
4 12 DDR_VDD
C
T8320 1 5 VTTGND V5IN 11 DDR_LG Q8302 C
VTTREF DRVL 1.5UH (6.02A)

REFIN
1

PGND
GND1
VREF
TPC28T IRFHS8342TRPBF

1
C8318 T8319 2 5 6 CYNTEC/PCMC063T-1R5MN

1
0.22UF/16V TPC28T D Irat=9A

2
TPS51216RUKR R8302

6
7
8
9
10
3 G 2.2Ohm DCR=15mohm

1
1DDR_RC
R8308 2 1 F=300KHz vx_r0805_h24_small C8308
+

1
2 0Ohm 1 DDR_REF CE8301 C8317 1UF/6.3V

SHORT_PIN
S

2
4 DDR_PG_CTRL D8300 10UF/6.3V 10% @
LIR=0.39 330UF/2.5V

2
JP8302
1.2V/0.1A vx_c0603_small
Close Pin 6

2
vx_sod323_h37 C8307 20%
1BV090000006

DDR_REFIN
1
2 1 1 2 S3 1500PF/50V
82,84,91,93 SUSB#_PWR C8305 vx_c0402_small

DDR_FB

2
1
@ R8307 R8305 0.1UF/10V MLCC/+/-10%

2
0Ohm 39KOhm R8300
1

vx_r0402_small 10KOhm
1% C8314 1%

DDR_FB
0.1UF/10V IRFHS8342 RDSON=25mOHM
2

2
GND_TPS51216

VREF=1.8V +/- 0.8%

2 1 1

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1
D8301 R8301
B
1.2V/0.1A 30.9KOhm C8306
+1.35VO B

vx_sod323_h37 0.01UF/50V U8300B TDC :7.07A

2

2
1 2 S5 TPS51216RUKR
84,91,93 SUSC#_PWR 10% SR8303 Frequency :300KHz
R8306
10KOhm
1 2 22
GND3 PWR Cap. :340uF
EE Cap. :100uF
1

vx_r0402_small R0603 23
GND4
1% C8315 Total Cap. :440uF
0.1UF/10V
ESR :17mOHM
2

GND_TPS51216
GND_TPS51216

T8308 T8310 T8305

EN/DEM Function TPC28T TPC28T TPC28T
T8314 T8313 T8309
TPC28T TPC28T TPC28T

1
VDD Diode-emulation
Vinafix.com

1
+1.35V
A GND CCM T8316 T8301 T8303 T8315 T8311 T8306 A

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T

<Variant Name>

1
+0.675VS +1.35VO
Title : POWER_DDR & VTT
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 83 of 104
5 4 3 2 1
 5 4 3 2 1

+1.8VS POWER SUPPLY

D D

+1.8VO

+3VO (0.231A) JP8400

1 2
D8401 @ Input current=0.16A 1 2 +1.8VS

1
1.2V/0.1A

1
2 1 R8406 C8403 @ C8402 C8406 @ 1MM_OPEN_M1M2
U8401 @
(0.231A)
4.42KOhm 56PF/50V 10UF/6.3V 10UF/6.3V
vx_c0402_small vx_c0603_small vx_c0603_small

2
R8402 R8401 3 4 5% 20% 20%

2
0Ohm @ 0Ohm 2 IN OUT
GND GND
1 2 1 2 EN_1V8 1 5 1.8V_FB
C 83,91,93 SUSC#_PWR SHDN# SET C

1
C8405

1
10UF/6.3V
R8403 vx_c0603_small G923-470T1UF R8404

2
1
R8407 C8401 1MOhm 20% 06V060000003 10KOhm
0Ohm 0.1UF/25V 10V220000005 Vset=1.25V vx_r0402_small
1 2 10% 1%
82,83,84,91,93 SUSB#_PWR

2
@

GND

B T9308 T9310 B
TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T TPC26T TPC26T

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T8401 T8404 T8402 T8405 T8403 T8406

1
+1.8VS +1.8VO

1
A A

<Variant Name>

Title : POWER_1.8VS/+1.5V
Engineer:
Size Project Name Rev
Custom 1.1
Date: Thursday, December 20, 2012 Sheet 84 of 104
5 4 3 2 1
 5 4 3 2 1

1.5VS POWER SUPPLY(DSC)

SR8601
1.5V_VDD 1 2
+5VO

1
/DSC
C8606 R0402
TRIP OCL 2.2UF/6.3V 10%

2
vx_c0603_small
TPS51362 GND 8A C8608 /DSC

1
D D
2700PF/50V +1.5V_AGND
TPS51367 5V 12A 1AV200000061

2
/DSC

TPS51367 Float 16A 1.5V_VSNS

1.5V_GSNS

+AC_BAT_SYS
Vinafix.com Vref = 2.0V Input Current 1.05A +1.5VO
REFIN = GND , Vout = 1.05V TDC :5.01A
REFIN = FLOAT ,Vout = 1.2V Frequency :800KHz
U8600A
PWR Cap. :88uF

23
22
21
20
19
18
17
16
15

1
TPS51363RVET C8601 @ C8600 C8613
1500PF/50V 10UF/25V 10UF/25V EE Cap. :0uF

GSNS
VSNS

TRIP
SLEW

GND1
V5
VIN3
VIN2
VIN1
D8600 @ MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% Total Cap. :88uF

2
1.2V/0.1A @ /DSC
2 1
24 14
R8603 R8604 25 REFIN2 PGND5 13 JP8602 JP8600
1 2 1 2 26 REFIN PGND4 12 SHORT_PIN SHORT_PIN
100KOhm 33KOHM 27 VREF PGND3 11

1
1 2 28 NU2 PGND2 10 /DSC /DSC
84,91,93 SUSB#_PWR EN PGND1
29
R8601 /DSC /DSC GND2

PGOOD
10KOhm 1%
+1.5VO

MODE
/DSC C8607

SW1
SW2
SW3
SW4
NU1

BST
1

C8604

NC
0.1UF/10V (5.01A)

2
0.1UF/25V F=800KHz
vx_c0402_small
/DSC
2

1
2
3
4
5
6
7
8
9
10%
/DSC T8600
C C
+1.5V_AGND TPC28T JP8601
06V420000002
L8600 1MM_OPEN_M1M2
/DSC 1.5V_LX 1 2 2 1
+1.5VS

1
2 1
92 +1.5VS_PWRGD

1.5V_BST
C8609 10% 0.68UH (0.131A)
0.1UF/25V Irat=15.5A
SR8600

2
(0603) X7R 10% R8600 @ /DSC
1 2 2
1.5V_BST_R 1 2.2Ohm
vx_r0805_h24_small LIR=0.51

11.5V_RC
R0603 /DSC
R8602 /DSC

1
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0Ohm
@ C8602 @

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
U8600B 1 2 0.1UF/25V
MODE Fsw +5VO

C8605

C8611

C8612

C8610

C8614

C8603
1

1
30

2
31 GND3
32 GND4
GND 400KHz

2
33 GND5
GND6 /DSC /DSC /DSC @ @
JP8603
SHORT_PIN TPS51363RVET Float 800KHz
1 2 06V420000002
/DSC
5V 1MHz
+1.5V_AGND

B
1.5VS POWER SUPPLY(UMA) B

+3VO
+1.5VO
Input current=0.075A

1
(0.131A)

1
2 1 R8607 C8616 @
U8601
2KOhm 56PF/50V
D8601 @ vx_c0402_small

2
1.2V/0.1A 3 4 /UMA 5%

2
2 IN OUT
SUSB#_PWR 1 2 1 GND 5 1.5V_FB
SHDN# SET T8604 T8601 T8603 T8602
1

R8608 C8619 TPC26T TPC26T TPC26T TPC26T

1

1
30KOhm 1% C8618 10UF/6.3V
vx_r0402_small 0.1UF/10V 10% vx_c0603_small /UMA G923-470T1UF R8606
2

1
/UMA vx_c0402_small 20% 06V060000003 10KOhm +1.5VO
2

/UMA /UMA vx_r0402_small

1%
2

Vset=1.25V /UMA

T8605 T8606
GND TPC26T TPC26T

1
+1.5VS

A A

<Variant Name>

Title : POWER_1.5VS
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 84 of 104
5 4 3 2 1
 5 4 3 2 1

VGA_VREF
VGA_CORE POWER SUPPLY

1
R8721 /N14P-GV2
one two
20KOhm 1% R8723 /N14P-GV2 phase phase
vx_r0402_small 20KOhm 1%
vx_r0402_small R8723 39K 20K

2
2 1 VGA_REFADJ
R8721 30K 20K

1
D D
R8716 /N14P-GV2
2KOhm 1%
R8716 3K 2K
vx_r0402_small R8713 27K 18K

2
VGA_REFIN
C8703 2.2nF 2.7nF

1
C8720 /N14P-GV2
2700PF/50V C8720 2200PF 2700PF +3VS_VGA

2
2
vx_c0402_small R8713 /N14P-GV2 Vmin 0.65V 0.6V
18KOhm 1% +AC_BAT_SYS
vx_r0402_small Vmax 1.15V 1.2V R8724 /N14P-GV2
100Ohm
VGA Input current=4.17A

1
Vboot 0.9V 0.9V VGA_PSI_R 2
vx_r0402_small
1
optional

1
naming /N14M-GL /N14P-GV2
R8725 /N14M-GL C8717 /VGA C8718 /VGA

1
GND_RT8813A GND_RT8813A 100Ohm 1% C8710 @ 10UF/25V 10UF/25V
vx_r0402_small 0.1UF/25V MLCC/+/-10% MLCC/+/-10%
vx_c0603_small vx_c0805_h57_small
vx_c0805_h57_small

2
5
10%
Q8700 /VGA

Vinafix.com

5 D
6
7
8
SISA14DN-T1-GE3

S
G
4
3
2
1
D8700 @
1.2V/0.1A C8701 /VGA T8709 L8701 /VGA T8705 T8706 T8700
SR8707
SR8706 0.22UF/16V MLCC/+/-10% TPC28T 0.36UH TPC28T TPC28T TPC28T
2 1 1 2 2 1 R8708 vx_c0402_small Irat=24A
57,74,91,93 DGPU_EN_PWR 1 2VGA_BST1_R
1 2 1 2
+VGA_VCORE

1
1
nb_r0402_short_5mil_small nb_r0402_short_5mil_small C8713 @

VGA_VRON
0.01UF/16V 1Ohm

VGA_BST1
VGA_HG1
1 2 /VGA
1 PHASE 2 PHASE

1
SR8708

5
C R8705 @ C
nb_r0402_short_5mil_small
N14M-GL N14P-GV2

1
1VGA_RC1
@ Q8701 /VGA 2.2Ohm

1
5 D
6
7
8
R8701 vx_r0805_h24_small + CE8700 /VGA C8700 @
74 VGA_PSI
VGA_PSI 1 2 VGA_PSI_R
SIRA10DP-T1-GE3
470UF/2V 0.1UF/10V 10% EDP=24.33A EDP=33A

2
SR8703 RDSON=5mOHM vx_c0402_small
TDC=17.72A TDC=28A

2
0Ohm 1 2 C8712 @

S
74 VGA_VID

3
2
G
1500PF/50V
nb_r0402_short_5mil_small vx_c0402_small OCP:40A OCP:70A
（2 Phase）

4
3
2
1

2
MLCC/+/-10%
U8700A /VGA
R8718 /VGA +AC_BAT_SYS RT8812AGQW +VGA_VCORE

5
4
3
2
1
100Ohm 1%
vx_r0402_small TDC :28A

UGATE1
BOOT1
VID
PSI
EN
2

2 1
Frequency :305KHz

https://vinafix.com
R8700 /VGA
499KOhm 1%
vx_r0402_small 21
PWR Cap. :940uF
70 NVDD_GND_SENSE
VGA_REFADJ 6 GND 20 VGA_LX1 EE Cap. :140uF
1

REFADJ PHASE1
VGA_REFIN 7 19 VGA_LG1 SR8702 +AC_BAT_SYS Total Cap. :1080uF
+5VS
1

C8723 /VGA VGA_VREF 8 REFIN LGATE1 18 VGA_VDD 1 2

100PF/50V 9 VREF PVCC 17 VGA_LG2 ESR :3mOHM
vx_c0402_small 10 TON LGATE2 16 VGA_LX2 NB_R0402_20MIL_SMALL VGA Input current=2.92A
2

（1 Phase）
5% RGND PHASE2
70 NVDD_SENSE
1

UGATE2
PGOOD
VGA_PSI# VO_action C8721 /VGA C8703 @

BOOT2
2

2
VSNS
0.1UF/10V 2700PF/50V +VGA_VCORE
R8728 vx_c0402_small vx_c0402_small R8727
~ 0.8V 1 Phase DEM

SS
2

1
+VGA_VCORE 2 1 @ 43KOhm 10% GND_RT8813A 20KOhm C8709 /VGA C8722 /N14P-GV2 C8724 /VGA TDC :17.72A

1
SR8705 1UF/10V 10% C8714 @
1.2 ~ 1.8V 1 Phase FCCM Frequency :305KHz

11
12
13
14
15
10UF/25V 10UF/25V

5
R8720 /VGA /N14P-GV2 vx_c0603_small 0.1UF/25V
1

2
100Ohm 1% NB_R0402_20MIL_SMALL Q8703 /N14P-GV2 vx_c0603_small MLCC/+/-10% MLCC/+/-10% PWR Cap. :940uF
2.4V ~ 2 Phase FCCM

2
5 D
6
7
8
vx_r0402_small SISA14DN-T1-GE3 10%
EE Cap. :140uF
2

1
R8729 C8711 @ Total Cap. :1080uF
@ 80.6KOhm @ C8726 390PF/50V VGA_HG2

S
ESR :3mOHM

G
GND_RT8813A 4.7NF/50V MLCC/+/-10%
2

vx_c0402_small R8711 /N14P-GV2 C8704 /N14P-GV2

1

4
3
2
1
0Ohm 0 0.22UF/16V MLCC/+/-10%
2

vx_r0603_h28_small vx_c0402_small
R8730 VGA_BST2 1 2 VGA_BST2_R
1 2 T8712
@ 16KOHM TPC28T L8702 /N14P-GV2
B 0.36UH B
Irat=24A
1

1
1 2

1
SR8700

5
1 2 R8706 @
25,91,92 DGPU_PWROK
U8700B /VGA Q8704 /N14P-GV2 2.2Ohm

5 D
6
7
8
nb_r0402_short_5mil_small SIRA10DP-T1-GE3 vx_r0805_h24_small

1
22

2
23 GND1 T8703 T8707 T8708 + CE8701 /VGA

VGA_RC2
GND2 TPC28T TPC28T TPC28T
RDSON=5mOHM 470UF/2V

1
G
C8725 @
RT8812AGQW 1500PF/50V
1

4
3
2
1

3
2
vx_c0402_small

2
+VGA_VCORE MLCC/+/-10%

T8704 T8701 T8702

TPC28T TPC28T TPC28T
1

Vinafix.com

A A

<Variant Name>

Title : POWER_VGACORE
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 87 of 104
5 4 3 2 1
 5 4 3 2 1

BATTERY CHARGER
JP8801
Adapter 65W=3.42A 3MM_OPEN_5MIL
Adapter 45w=2.37A 1
1 2
2
D D
Q8800 Q8802 Q8806
T8818 T8814 T8815 T8816 T8817 8 D S 1 1 S D 8 8 D S 1 JP8800
TPC28T TPC28T TPC28T TPC28T TPC28T 7 2 +A/D_DOCK_IN_Q 2 7 7 2 3MM_OPEN_5MIL
6 3 3 6 R8808 6 3 +BAT 1 2 +BAT_CON
5 4 4 5 +A/D_DOCK_IN_Q_Q 1 2 +AC_BAT_SYS 5 4 1 2 +BAT_CON
0,66 +A/D_DOCK_IN G G G
1

1
+A/D_DOCK_IN IRF8707PBF IRF8707PBF 10mOhm IRF8707PBF
2

1
BATG

1
R8801 C8802 C8803 C8827 C8830

2
2.2ohm 2200PF/50V 0.1UF/25V SR8804 SR8805 C8813 C8831 1500PF/50V 1000PF/50V

2
2
R0603 R0603 1500PF/50V 10UF/25V

2
1AV500000015 C8816 R8818 @ @ 1AV200000018
1

ACG @ 0.01UF/50V 4.02KOhm

1
C8806
1

2
C8801 1 2
2.2UF/25V R8806 EMI Request,Close Q8806
4.02KOhm 0.1UF/25V EMI Request,Close Q8806
2

2
CHG_ACP
R8802 C8814 C8805

1
CHG_LDO 4.02KOhm 0.1UF/25V 0.1UF/25V

CHG_ACN
1

1
+AC_BAT_SYS

1
2

R8803 +AC_BAT_SYS
2

432KOhm
R8813
10KOhm ACDRV
1

1
C8822 C8817 C8818 C8823
30,74 AC_IN_OC 1500PF/50V 10UF/25V 10UF/25V 0.1UF/25V
1

@ @

2
5
6
7
8
Q8804

D
C IRF8707PBF C
T8825 07V040000099

S
AD_IINP 30 TPC28T

5
4
3
2
1

4
3
2
1
2

1
C8820

CMSRC

ACN
ACOK
ACDRV

ACP

1
R8804 C8825 R8814 100PF/50V C8819

1
68KOhm 0.1UF/10V 12.4KOHM 0.47UF/25V L8800
1

2
21 4.7UH
6 GND2 20 CHG_VCC Irat=5.5A R8810
1

SR8802 7 ACDET VCC 19 CHG_LX 1 2 +BAT_R 1 2 +BAT

+3VA
30,60 SMB0_DAT
1 2 8 IOUT PHASE 18 CHG_HG SR8801 +BAT
SDA HIDRV

1
9 17 1
CHG_BST 2 2 1 10mOhm
R0603 10 SCL BTST 16 CHG_BST_R R8819 @
ILIM REGN

1
SR8803 R0603 C8810 2.2Ohm LIR=0.35 C8811 C8812 C8815 @

BATDRV
https://vinafix.com
2

3
1 2 0.047UF/16V 10UF/25V 10UF/25V 10UF/25V

1CHG_RC
LODRV
30,60 SMB0_CLK

5
6
7
8
GND1
R8815 C8824

SRN
SRP

2
R0603 1UF/25V Q8805 JP8802 JP8803

D
D8801 560KOhm
BQ24735RGRR D8800 IRF8707PBF SHORT_PIN SHORT_PIN

2
1 R8817 U8800A 0.8V/0.2mA 07V040000099 C8826 @

S
1

11
12
13
14
15

2
3CHG_VCC_R
1 2 CHG_VCC T8826 TPC28T 0.1UF/25V

2
+BAT 2 CHG_LDO
R8809

4
3
2
1

2
22Ohm C8807

1
2

BATG 2 1 CHG_SRP_R 1 2 CHG_SRN_R

0.8V/0.2mA
1

R8816 CHG_LG

2
@ 150KOhm C8821 0.1UF/25V
4.02KOhm

2
0.01UF/50V C8808 C8809
2

@ 0.1UF/25V SR8806 0.1UF/25V

1

1
R0603 SR8807
R0603

1
CGH_SRP

CGH_SRN

B B

AC_IN_OC

U8800B SR8800
T8800 T8801 TPC28T T8803 T8813
1

22 1 2 TPC28T TPC28T T8802 TPC28T TPC28T

R8820 GND3 23
100KOhm GND4 24 R0603 +BAT_CON

1
GND5 25
GND6
SR8808
2

30 BAT_LEARN
1 2 BQ24735RGRR T8804 T8805 TPC28T T8807 T8812
TPC28T TPC28T T8806 TPC28T TPC28T

R8807 3 R0402 +BAT

D

1
2MOHM
Q8803
1

ACDRV 2 1 1 C8829 T8808 T8809 TPC28T T8811 T8819

G 2N7002 0.022UF/16V TPC28T TPC28T T8810 TPC28T TPC28T
2 S
2

R8805

1
1MOhm
1

T8822 T8821 TPC28T T8824 T8823

TPC28T TPC28T T8820 TPC28T TPC28T

+AC_BAT_SYS

1
A A

<Variant Name>

Title : POWER_CHARGER
Engineer:
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 88 of 104
5 4 3 2 1
 5 4 3 2 1

P.90

D D

BATTERY IN DETECT

2 1
60 TS1# BAT1_IN_OC# 30

JP9024
SHORT_PIN

C C

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B B

A A

<Variant Name>

Title : POWER_DETECT
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 90 of 104
5 4 3 2 1
https://vinafix.com
 5 4 3 2 1

+3VS POWER GOOD DETECTER

1
R9205
100KOhm
1%

2
D D

T9203
TPC28T 8/7
SR9204
1 2
VR12.5:ALL_SYSTEM_PWRGD to EC,EC to PM_PWROK&delay 99ms ,EC enable CPU_VRON
84 +1.5VS_PWRGD

1
T9202
R0402
VR12.6:ALL_SYSTEM_PWRGD to EC,EC to PM_PWROK&delay 99ms, EC enable DELAY_VR_AND_ALL_SYS
TPC28T
SR9200
1 2
83 DDR_PWRGD

1
T9200
R0402 TPC28T
ALL_SYSTEM_PWRGD 30

SR9203

1
1 2 1 2
PM_PWROK 22,30
R9202 @
Vinafix.com T9210
TPC28T
R0402 0Ohm
SR9209
1 2
6,82 +1.05VS_PWRGD

1
T9213
C R0402 C
TPC28T
+3VSUS
1 2
25,87,91 DGPU_PWROK

1
R9207 @

1
0Ohm
R9206
100KOhm
T9206 1%

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TPC28T
SR9207

2
1 2 2 1
30,81 SUS_PWRGD

1
D9201
R0402 1.2V/0.1A

B B

T9201
TPC26T

SUSB_EC#
30,57,91 SUSB_EC# FORCE_OFF# 32

1
2

1
R9201
D9200 560KOhm
1.2V/0.1A vx_r0402_small
5%
1

+3VS 2

3
D Q9200B
1

5 UM6K1NG1DTN
R9204
1.91KOhm G S
T9208 vx_r0402_small

4
6

TPC26T 1%
SR9202
2

D Q9200A
1 2 2 UM6K1NG1DTN
6,30,80 VRM_PWRGD
1

C9200
G S FORCE_OFF_PWR 81
A 4.7UF/6.3V A
NB_R0402_5MIL_SMALL vx_c0603_small
1

10%
<Variant Name>

32,50 CPU_THERM# 1 2
Title : POWER_PROTECT
R9208 @ Engineer:
0Ohm
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 92 of 104
5 4 3 2 1
 5 4 3 2 1

FOR POWER TEST

+AC_BAT_SYS +AC_BAT_SYS 45,66,80,81,82,83,84,87,88

+BAT_CON +BAT_CON 60,88

T9300
D JP9300 @ TPC28T D

+5VA SGL_JUMP
+5VA 56,81
1 2
+3VA CPU_VRON_PWR 80

1
1 2
+3VA +3VA 20,26,30,33,37,57,60,65,81,88
T9301
JP9301 @ TPC28T
SGL_JUMP
1 2
SUSB#_PWR 82,83,84,91

1
1 2
+5VO +5VO 36,81,82,83,84,91
T9302
+3VO JP9302 @ TPC28T
+3VO 36,70,81,84,91
SGL_JUMP
1 2
SUSC#_PWR 83,84,91

1
1 2
T9303
JP9303 @ TPC28T
+1.05VO +1.05VO 82,91 SGL_JUMP
1 2
VSUS_ON 30,81

1
1 2
+12VSUS T9311
+12VSUS 26,33,36,51,81,91
JP9304 @ TPC28T
+5VSUS SGL_JUMP
+5VSUS 4,26,51,52,81
C 1 2 C
DGPU_EN_PWR 57,74,87,91

1
1 2
+3VSUS +3VSUS 22,26,28,30,33,34,37,53,81,92

+12V +12V 91

+5V +5V 91

+3V +3V 22,44,45,57,91

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Vinafix.com
+12VS +12VS 28,31,46,48,57,91

+5VS +5VS 20,30,31,36,37,46,48,50,51,56,57,58,66,80,87,91

+3VS +3VS 4,6,16,17,20,21,22,23,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,80,91,92

+1.5VS +1.5VS 26,48,53,57,84

B B
+1.05VS +1.05VS 6,25,26,32,57,80,82

A A
<Variant Name>
+VCORE +VCORE 6,57,80

Title : POWER_SIGNAL
Engineer: Ahren_CHEN
Size Project Name Rev
Custom VGST 1.1
Date: Thursday, December 20, 2012 Sheet 93 of 104
5 4 3 2 1
 5 4 3 2 1

D D

PWR_J01

6 1 IO_PWR_SW#
SIDE2 1 2 IO_LED_PWR
2 3 IO_LED_GND
5 3 4 PWR_SW01
SIDE1 4

GND1 5
TACT_SWITCH_4P

12V17GISM080 1 2

1
3

1
3
WTOB_CON_4P PWR_LED01 PWR_LED02
WHITE WHITE 3 4

6 GND2
07V130000028 07V130000028
C
IO_PWR_GND IO_PWR_GND C

2
M: 1217-002E000 12V09SBSM009
S: 1217-00FA000
M : 1209-007T000
S:

B
https://vinafix.com 1
PWR_H01
IO_PWR_GND

CB394D209

IO_PWR_GND

PWR_H02
1
C79D79N

A A

Title :LED
BG1\HW5\W Engineer:
Size Project Name Rev
B VGST 1.1
Date: Thursday, December 20, 2012 Sheet 100 of 104
5 4 3 2 1
 5 4 3 2 1

121204-1 121204-2
121203-1 Change P/N Change P/N
USB_D1001 @ R1.1 R1.1 12V13GBSD006 USB_+5V_USB1 R1.1 12V13GBSD006
Add
IO_USB_DPP3_CON_P 1 6 IO_USB_DPN3_CON_N USB_+5V_USB1 USB_C1002,USB_C1003, /BD_USB2
USB_C1004,USB_C1005 USB_J1002 USB_J1003
5 5
USB_+5V_USB1 1 P_GND1 7 1 P_GND1 7
D VBUS P_GND3 VBUS P_GND3 D

USB_C1005

USB_C1004

USB_C1003

USB_C1002
IO_USB_DPN9_CON_N 2 IO_USB_DPN3_CON_N 2
2 5 IO_USB_DPP9_CON_P 3 D- IO_USB_DPP3_CON_P 3 D-
4 D+ 8 4 D+ 8
GND P_GND4 GND P_GND4

2
USB_C1001 6 6
P_GND2 P_GND2
USB_GND 0.1UF/25V
USB_CON_1X4P USB_CON_1X4P

47UF/6.3V

47UF/6.3V

47UF/6.3V

47UF/6.3V
/BD_USB2

/BD_USB2

/BD_USB2

1
IO_USB_DPN9_CON_N 3 4 IO_USB_DPP9_CON_P 12V13GBSD006 12V13GBSD006
1213-00MN000 1213-00MN000
CM1293_04SO 1213-00RL000 1213-00RL000
1213-00S1000 1213-00S1000
USB_GND USB_GND USB_GND USB_GND
PLACE ESD Diodes near USB Connector
USB_GND

USB BD CONN Co-lay

C
2 PORT USB BOARD 1 PORT USB BOARD R1.1 C
121203-2
Change USB USB_RNX11B

請請請請請
USB_J1001 USB_J1001 & USB_J1005 USB_+5V_USB1 USB_J1005 connect_6P 4 0Ohm 3
/BD_USB2 pin Co-lay /BD_USB1
/BD_USB2
12 6 8 IO_USB_DPP3_CON_P_C IO_USB_DPP3_CON_P
IO_USB_DPP3_CON_P_C 11 12 14 5 6 SIDE2
11 SIDE2 4 5

3
USB_GND IO_USB_DPN3_CON_N_C 10

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9 10 IO_USB_DPP9_CON_P_C 3 4 USB_LX11
USB_JP1001 8 9 IO_USB_DPN9_CON_N_C 2 3 90Ohm/100MHz
USB_+5V_USB1 1 2 7 8 1 2 7 @

2
1 2 6 7 1 SIDE1 IO_USB_DPN3_CON_N_C IO_USB_DPN3_CON_N
1MM_OPEN_M1M2 5 6 FPC_CON_6P
4 5 USB_GND USB_GND 2 1
4 12V18AWSM023 0Ohm
IO_USB_DPP9_CON_P_C 3
IO_USB_DPN9_CON_N_C 2 3 13 USB_RNX11A
1 2 SIDE1 M :1218-01UN000 /BD_USB2
1
USB_GND FPC_CON_12P
USB_GND
B
12V18AWSM010
1218-00AB000 Pin define check. USB_RNX12B
4 0Ohm 3
B

> >
IO_USB_DPP9_CON_P_C IO_USB_DPP9_CON_P
USB FFC M/B

3
USB_H1001 BD Cable USB_LX12
90Ohm/100MHz
1 @

2
2 NP_NC 5 IO_USB_DPN9_CON_N_C IO_USB_DPN9_CON_N
3 GND1 GND4
GND2 GND3
4 R1.1 2 1
USB_GND 121205-1 0Ohm
Change USB_H1001 part number
USB_RNX12A
CT315RCBDO161X181N

A USB_H1002 A
1

USB_GND
C315D161 Title : IO_USB
Vinafix.com BG1\HW5\W Engineer: Ahren_CHEN
Size Project Name
VGST Rev
Custom P/N 1.1
Date: Thursday, December 20, 2012 Sheet 100 of 104
5 4 3 2 1