Preliminary Datasheet LP6220A
600mA LNB Power Supply & Control Voltage Regulator
General Description Features
Designed for analog and digital satellite Low noise output to avoid sensitivity of Can
receivers/sat-TV, the LP6220A is a adjustable Tuner and DISH’s LNA dropping down
voltage regulator, specifically to provide the 14V/19V Single chip solution on 700mVpp 22KHz EXTM
power supply and the 22kHz tone signaling with 10μ s Trise/Tfall for less Transferring noise
to the LNB converter in the antenna dish or to the LNB Voltages (14V/19V) compatible with
multi-switch box. common standards, Push-pull output stage
minimizes 14→19V and 19V→14V output
LP6220A consists of a BOOST converter with a transition times
internal power MOS running at 1MHz switching External 22KHz EXTM input
frequency and a LDO regulator which with push-pull 1MHz Switch Frequency Boost
output stage generates clean 22-kHz tone signal Integrate Low Noise Linear Regulator
superimposed at the output even at zero loading. Under Voltage Lockout
The EXTM can accept a DiSEqC command and Output Short-Circuit Protection
transfer it symmetrically to the output to meet Output Over-Current Protection
DiSEqC 1.x protocol. Over-Temperature Protection
Other features include over temperature protection Available in ESOP-8
and under-voltage lockout (UVLO). The LP6220A RoHS Compliant and Halogen Free
is available in a space saving ESOP-8 package.
Order Information Applications
LNB Power supply For DVB-S/S2/ABS
LP6220A □□□
Digital Set-Top-Box
Satellite TV cards
F: Green STB Satellite Receiver
Package Type PC Card Satellite
SP: ESOP-8
Marking Information
Device Marking Package Shipping
LP6220A LPS ESOP-8 4K/REEL
LP6220A
YWX
Y: Y is year code. W: W is week code. X: X is series number.
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Preliminary Datasheet LP6220A
Typical Application Circuit
L1 D1
VIN 10uH SK24
VBoost
C1 Rin
C3
20uF 10Ω
VIN LX CP 100nF
C2
20uF
Cin
1uF
GND BOOST
Surge Protection
EN EN OUT D3
VOUT
Select 1N4007
Voltage HLS
D2
EXTM EXTM C4
100nF
SK14
(Option)
C5
100nF
LP6220A
Figure 1. Typical Application Circuit of LP6220A .
Pin Configuration
VIN 1 8 EXTM
OUT 2 7 HLS
EP
BOOST 3 GND 6 EN
CP 4 5 LX
Figure 2. Package Top View
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Preliminary Datasheet LP6220A
Function Block Diagram
LX CP BOOST
Boost OUT
Charge
Pump Driver
LDO
VIN UVLO OSC VREF
14V/19V
EN Control HLS
Select
OCP Logic 22kHz
SCP signal EXTM
OTP input
GND
Figure 3. Function Block Diagram
Functional Pin Description
Pin NO. ESOP8 Description
1 VIN Power Source Input. Connect a ceramic capacitor between VIN and GND.
2 OUT Output Voltage for LNB.
3 BOOST Boost converter output Voltage sense and internal LDO's input terminal.
4 CP Charge Pump for LDO use.
5 LX Boost Regulator Switching Node. Connect the inductor and the schottky diode to LX.
6 EN Enable Pin.
7 HLS LNB output Voltage Set Pin. HLS=H:19V；HLS=L:14V
8 EXTM 22KHz external modulation signal input Pin.
EP GND Ground.
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Preliminary Datasheet LP6220A
Absolute Maximum Ratings Note1
VIN to GND -------------------------------------------------------------------------------------------------------- -0.3V to +27V
BOOST, OUT to GND ------------------------------------------------------------------------------------------ -0.3V to +22.5V
LX to GND(10ns) ------------------------------------------------------------------------------------------------ -0.3V to +36V
CP to GND --------------------------------------------------------------------------------------------------------- -0.3V to +27V
EN, HLS, EXTM to GND --------------------------------------------------------------------------------------- -0.3V to +6V
Operating Junction Temperature Range (TJ) -------------------------------------------------------- -40°C to +125°C
Operation Ambient Temperature Range ------------------------------------------------------------- -40°C to +85°C
Storage Temperature Range ---------------------------------------------------------------------------- -65°C to +150°C
Maximum Soldering Temperature (at leads, 10sec) ----------------------------------------------- +260°C
Note1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of
the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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Preliminary Datasheet LP6220A
Electrical Characteristics
(VIN = 12V, TA = 25°C (Unless Otherwise Specified))
Parameter Symbol Test Conditions Min Typ Max Units
Supply and Reference Function
Power Source Voltage VIN 9 12 14 V
EN=H,VOUT=19V,
8 mA
EXTM=0V
Power Source Current IQ
EN=H,VOUT=19V,
24 mA
EXTM apply 22KHz
Shutdown Current ISD EN=L 1.6 mA
Input Under Voltage Lockout
VUVLO VIN Rising 8 V
Threshold
UVLO Threshold Hysteresis ΔVUVLO Falling Hysteresis 0.3 V
Thermal Shutdown Threshold TSD 160 °C
Thermal Shutdown Threshold
ΔTSD 25 °C
Hysteresis
EXTM
VIH 1.4 V
EXTM Threshold Voltage
VIL 0.4 V
EXTM Internal Pull-Low Current IEXTM Sink 4 uA
Input EXTM Frequency Range FEXTM 20 22 kHz
VOUT Output EXTM Amplitude Vpp(EXTM) ILOAD=0~0.5A, CLOAD=100nF 700 mV
VOUT Output EXTM Duty DEXTM 50 %
VOUT EXTM Rising Time TR_EXTM ILoad=0~0.5A, CLoad=100nF 7.5 10 12.5 us
VOUT EXTM Falling Time TF_EXTM ILoad=0~0.5A, CLoad=100nF 7.5 10 12.5 us
Logic (EN, HLS)
VENH 1.4 V
EN Threshold Voltage
VENL 0.4 V
EN Internal Pull-High Current IEN Source 12 uA
VHLH 1.4 V
HLS Threshold Voltage
VHLL 0.4 V
HLS Internal Pull-Low Current IHL Sink 4 uA
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Preliminary Datasheet LP6220A
Electrical Characteristics(Continued)
(VIN = 12V, TA = 25°C (Unless Otherwise Specified))
Parameter Symbol Test Conditions Min Typ Max Units
Boost Regulator
Internal Oscillator Frequency FOSC 0.8 1 1.2 MHz
Switch On Resistance RDS(ON) 150 mΩ
Maximum Duty Cycle DMAX 80 %
Minimum On Time TON(MIN) 90 ns
Current Limit ILimit 2.2 A
Output Voltage
EN=H, HLS=H 18.5 19 19.5 V
Output voltage VOUT
EN=H, HLS=L 13.6 14 14.4 V
Linear regulator drop voltage VDrop EN=H, ILOAD=500mA. 0.7 V
ΔVOUT/
VOUT Line Regulation (VOUT x ΔVIN)
VIN=9~14V, VOUT=19V 0.05 0.2 %/V
ΔVOUT/ ILoad=0~500mA, VOUT=19V
VOUT Output Load Regulation VOUT
0.5 %
COUT=0.1uF
Output Current limit ILIMIT 650 mA
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Preliminary Datasheet LP6220A
Application Information
The LP6220A is a power management IC that DiSEqC Encoding
integrates a boost converter, a LDO, and a 22-kHz
The EXTM accepts an externally modulated EXTM.
tone transfer that serves as a LNB power supply. OUT
command and in turn modulates the VOUT
voltage set by HLS pin, and accepts a tone modulated
symmetrically to meet the DiSEqC 1.x and with few
DiSEqC command and transfers it symmetrically to
more external components to meet DiSEqC 2.0
the output to meet DiSEqC 1.x protocol.
transmit protocol. Burst coding of the EXTM can be
Under Voltage Lockout (UVLO) accomplished due to the fast response of the EXTM
The LP6220A had an UVLO internal circuit that pin.
enable the device once the voltage on the VIN voltage Over Temperature Protection
exceeds the UVLO threshold voltage. The LP6220A device enters over temperature
Boost Converter protection if its junction temperature exceeds 160°C
(typical). During over temperature protection none of
The LP6220A use 1MHz fixed-frequency, current
the device's functions are available. To resume
mode architecture to regulate the output voltage. The
normal operation the junction temperature need cool
LP6220A measures the output voltage through
down, and the outputs will restart.
BOOST pin, and use the internal compensation to
saving external element. Layout Consideration
Linear Regulator The proper PCB layout and component placement are
critical for all circuit. Here are some suggestions to
The linear regulator features low drop out voltage to
the layout of LP6220A design.
minimize power loss while keeping enough head
room for the 22-kHz tone. It also implements a tight 1. The input capacitor should be located as closed as
current limit for over current protection. The linear possible to the VIN and ground plane.
regulator is used to generate the 22-kHz tone signal 2. Minimize the distance of all traces connected to the
by changing the reference voltage. LX node, that the traces short and wide route to obtain
Over Load Protection optimum efficiency.
When the LNB OUT current over the preset over 3. All output capacitor must be closed to ground
current threshold and the status continues for 65ms, plane. The ground terminal of COUT must be located
the device enters a auto-retry routine. The device as closed as possible to ground plane.
returns to normal operation after the status release. 4. Radiated noise can be decreased by choosing a
EXTM input shielded inductor.
Once LP6220A is enable, it can applying 22kHz, 50%
VIN
square pulse on EXTM in generates the DISEQ
L
EXTM (±350mV) on the output VOUT.
C1
Diode
8
C2
EP
GND
Cin
2
1
Rin
C5 Diode CCP
GND VOUT VBoost
Figure 4. Recommended PCB Layout Diagram
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Preliminary Datasheet LP6220A
Outline Information
ESOP-8 Package (Unit: mm)
D DIMENSION IN MILLIMETER
D2
SYMBOLS
UNIT MIN MAX
A 1.300 1.700
A1 0.000 0.100
LPS
A2 1.250 1.520
b 0.330 0.510
E
LP6220P E2 E1
D
D2
4.800
3.150
5.000
3.450
YWX E
E1
5.800
3.800
6.200
4.000
E2 2.260 2.560
1
e 1.270 BSC
b e L 0.410 1.270
A2 A
A1
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