CHAPTER 5:
CENTRAL PROCESSING UNIT
2.1) CPU STRUCTURE AND FUNCTION:
CPU controls the computer.
2.2) ARITHMETIC AND LOGICAL UNIT
An ALU is a multioperation, combinational logic
digital function. It can perform a set of basic arithmetic operations and a set
of logic functions. ALU has number of selection lines to select a particular
operation. The selection lines are decoded within the ALU so that K
selection variable can specify up to 2k distinct operations.
The four inputs from A are combined with the four inputs of B to generate
an operation at F outputs.
The mode select S2 distinguishes between arithmetic and logical operations.
Two function select S1 and S0 specify the particular arithmetic or logical
operations.
With these 3 selection variables (23=8),it is possible to specify four
arithmetic operations( with s2 in one state) and four logical operations(with
s2 in the other state).
The input and output carries have meanings only during arithmetic
operation.
The Cin in the least significant position of an ALU is quite often used as a
four selection variables that can double the number of arithmetic operations.
THUS, possible to generate four more operations, for a total of eight
arithmetic operations.
S2 S1 S0 Function
0 0 0 Addition (A+B)
0 0 1 Subtraction(A-B)
0 1 0 Increment (A+1)
0 1 1 Decrement(A-1)
1 0 0 ORing (Aor B)
1 0 1 AND ing (A and B)
1 1 0 XoR (A xor B)
1 1 1 Com (A’)
2.3) INSTRUCTION FORMATS:
It defines the layout of bits of an instructions.
Instruction = opcode + operand or address field
OPCODE🡪operation code
It represents the operation to be performed
OPERAND🡪 Data values
Address field contains address.
Opcode Operand or address
It represents the data in which the operation is to performed.
There is also a mode field that specifies the addressing mode or effective
address.
I Opcode Operand or address
TYPES: 4 types
A) Three Address Instructions:
In this format, address field specify either processor register or a
memory operand. The advantage is it result in short programs. The
disadvantage is that the binary coded instruction require too many bits to
specify three addresses. e.g: cyber 170 commercial computer.
opcode operand 1 operand 2 operand 3
X= (A+B) * (C+D) …..A,B,C,D,X are value
variables
ADD R1,A,B R1🡨M[A]+M[B]
ADD R2,C,D R2🡨M[C]+M[D]
MUL X, R1,R2 M[X]🡨R1*R2
B) Two address Instructions:
In this format, the address field contains two address or operands.
opcode operand1 operand2
X=(A+B) *(C+D)
MOV R1,A R1🡨M[A]
ADD R1,B R1🡨R1+ M[B]
MOV R2,C R2🡨M[C]
ADD R2,D R2🡨R2+ M[D]
MUL R1,R2 R1🡨R1* R2
MOV X,R1 M[X]🡨R1
C) One Address Instructions:
In this format, there is only one address field.
opcode operand1
It uses the implied accumulator (AC) register for all data manipulation.
X=(A+B)* (C+D)
LOAD A AC🡨M[A]
ADD B AC🡨AC+ M[B]
STORE T M[T]🡨AC T=temporary memory location
LOAD C AC🡨M[C]
ADD D AC🡨AC+ M[D]
MUL T AC🡨AC * M[T]
STORE X M[X] 🡨AC
D) ZERO Address Instructions:
opcode
This format requires no address field. PUSH and POP are zero address
instruction which requires one address field to communicate with stack. ADD and
MUL requires no address field.
X=(A+B)* (C+D)
PUSH A ,TOS🡨A
PUSH B ,TOS🡨B
ADD , TOS🡨(A+B)
PUSH C .TOS🡨C
PUSH D ,TOS🡨D
ADD ,TOS🡨(C+D)
MUL ,TOS 🡨(C+D) * (A+B)
POP X , M[X]🡨TOS
Q) Write down the code for the expression Y = (A-B/C) * (D +E*G) in 3,2,1 and 0
address instruction formats.
2.4) ADDRESSING MODES:
It is also known as memory addressing.
It is the technique of specifying the operands for any instructions. It specify the
address of data to be operated
Advantages:
1) provide flexibility in programming ( pointer to memory, counters for loop
control, indexing of data, program relocation)
2) reduce the number of bits in the addressing field of the instructions
zTypes of Addressing Modes :
Each instruction of a computer specifies an operation on certain data. The
most common addressing modes are:
Immediate addressing mode
Direct addressing mode
Indirect addressing mode
Register addressing mode
Register indirect addressing mode
Displacement addressing mode
Stack addressing mode
To specify the addressing mode of an instruction several methods are used.
Most often used are :
a) Different operands will use different addressing modes.
b) One or more bits in the instruction format can be used as mode field. The
value of the mode field determines which addressing mode is to be used.
The effective address will be either main memory address of a register.
Immediate Addressing:
This is the simplest form of addressing. Here, the operand is given in the
instruction itself. This mode is used to define a constant or set initial values
of variables. The advantage of this mode is that no memory reference other
than instruction fetch is required to obtain operand. The disadvantage is that
the size of the number is limited to the size of the address field, which most
instruction sets is small compared to word length. e.g:-MVI A,32H
Direct Addressing:
In direct addressing mode, effective address of the operand is given in the
address field of the instruction. It requires one memory reference to read the
operand from the given location and provides only a limited address space.
Length of the address field is usually less than the word length.
Eg: Move P, Ro, Add Q, Ro P and Q are the address of operand.
Indirect Addressing:
Indirect addressing mode, the address field of the instruction refers to the
address of a word in memory, which in turn contains the full length address
of the operand. The advantage of this mode is that for the word length of N,
an address space of 2N can be addressed. He disadvantage is that instruction
execution requires two memory reference to fetch the operand Multilevel or
cascaded indirect addressing can also be used.
4) Register Addressing:
Register addressing mode is similar to direct addressing. The only difference
is that the address field of the instruction refers to a register rather than a
memory location 3 or 4 bits are used as address field to reference 8 to 16
generate purpose registers. The advantages of register addressing are Small
address field is needed in the instruction.
5) Register Indirect Addressing:
This mode is similar to indirect addressing. The address field of the
instruction refers to a register. The register contains the effective address of
the operand. This mode uses one memory reference to obtain the operand.
The address space is limited to the width of the registers available to store
the effective address.
6) Displacement Addressing:
In displacement addressing mode there are 3 types of addressing mode. They
are :
1) Relative addressing
2) Base register addressing
3) Indexing addressing.
This is a combination of direct addressing and register indirect addressing.
The value contained in one address field. A is used directly and the other
address refers to a register whose contents are added to A to produce the
effective address.
7) Stack Addressing:
Stack is a linear array of locations referred to as last-in first out queue. The
stack is a reserved block of location, appended or deleted only at the top of
the stack. Stack pointer is a register which stores the address of top of stack
location. This mode of addressing is also known as implicit addressing.
Q) For LOAD operation , write the instructions for various addressing mode.
2.5) Data Transfer and Manipulation
There are large number of instructions that a computer provide to
perform various tasks.
Categories of instructions:
1) Data transfer instructions
2) Data manipulation instructions
3) Program control instructions
1) Data transfer instructions:
These instructions move data from one location to another without
changing the content. The most common transfers are between memory and
processor registers, between processor registers and input or output and
between processor registers.
Name Mnemonics
load LD
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
push PUSH
pop POP
2) Data manipulation Instructions
These instructions perform operations on data and provide the computational
capabilities for the computer.
a) Arithmetic instructions
Addition , subtraction, multiplication and division are the four
basic arithmetic operations. some of the typical arithmetic instructions
are as follows:
NAME MNEMONICS
Increment 🡪 INC
Decrement🡪 Dec
add 🡪 ADD ADDI(add two binary integers) ,ADDF(add
two floating integers
Subtract🡪 SUB
multiply🡪MUL
divide🡪DIV
add with carry🡪ADDC
subtract with borrow🡪SUBB
negate🡪NEG
b) logical instructions
Logical instructions are the group of instructions that performs
the binary operations on strings of bits stored in registers.
They are useful in manipulating individual bits or a group of bits that
represent binary coded information
NAME MNEMONICS
clear CLR
complement COM
and AND
or OR
exclusive- or XOR
clear carry CLRC
set carry SETC
complement carry COMC
enable interrupt EI
disable interrupt DI
c) shift instructions
Shift are the operations in which the bits of a word are moved to the
left or right.
The bit shifted in at the end of the word determines the type of shift
used. ( logical shift, arithmetic shift, rotate)
NAME MNEMONICS
logical shift right 🡪SHR
logical shift left🡪 SHL
arithmetic shift right🡪SHRA
arithmetic shift left🡪 SHLA
rotate right🡪ROR
rotate left🡪ROL
rotate right through carry🡪RORC
rotate left through carry🡪ROLC
3) Program control instructions
Program control instructions change the address value in program
counter and cause the flow of control to be altered. They provide branching
to different section of the program. They are conditional instructions and
looping instructions.
NAME MNEMONICS
branch🡪 BR
jump🡪JMP
skip🡪SKP
call🡪CALL
return🡪RET
compare🡪CMP
Conditional branch instructions
BZ Branch if zero(z=1)
BC Branch if carry(c=1)
BP Branch if plus(s=0)
2.6) RISC AND CISC
Reduced instructions set computer- a computer with less no. of instructions.
Complex instructions set computer- a computer with a large no. of instructions.
Design of instructions set is the important aspect of computer architecture.
RISC fundamentals
� The architecture with less instructions
� The number of registers in RISC is usually 32 or slightly more
� The first RISC CPU (mips 2000) has 32 general purpose registers
Features of RISC:
1) Fixed length instructions: The instructions are relatively simple. The
instructions are of same size and fixed. If there is 8 bit instructions, some
instructions take these 8 bits as opcode and other might take 8 bits for
opcodes or address.
2) Limited loading and storing instructions access memory.
RISC processors has limited interactions with memory to load and store
data. Results are transfer to memory through store instructions
For example: if a value from memory is to be ANDed with accumulator.
[value1] AND [A]
then cpu first loads the value into a register and perform AND operation.
[B]🡨[value1]
[A]🡨[A] +[B]
3) Fewer Addressing modes:
The use of only few addressing modes provides almost all
instructions have simple register addressing. other addressing modes may
be included such as immediate and memory mode.
4) Instruction pipelining:
The instructions are computed are in parallel. for e.g: during the
decoding of next instruction, the preceded instructions can be fetched
from memory. They have an ability to execute one instructions per clock
cycle. This can be done by overlapping the fetch,decode and execute
phase of two or more instructions.
5) Large number of registers:
In RISC computers , there are involvement of large number of
registers. All computation are performed among the data stored in
processor registers.
6) Hardwired control unit:
RISC computers uses hardwired control unit rather than
microprogrammed control unit which makes them faster.
7) Use of Overlapped register window
RISC vs CISC
RISC CISC
1) less no. of instructions 1) large no. of instructions
2) Relatively fewer addressing 2)Large variety of
modes addressing modes.
3) fixed length instruction 3)variable length instruction
format. format.
4) hardwired cu 4)Microprogrammed cu
5) It requires only a single 5)It requires more than one
cycle for execution. cycle for execution
6) It contains large no. of 6)CISC machines doesn’t have
registers large no. of registers
7) It have heavy pipelining 7)It have adopted pipelining but
less.
8) Speed of RISC machine is 8)Speed of CISC is relatively
high slower.
9) example: SPARC,MIPS 9)IBM,VAX,INTEL
OVERLAPPED REGISTER WINDOW:
There are three classes of registers:
–Global Registers •Available to all functions
–Window local registers •Variables local to the function
–Window shared registers •Permit data to be shared without actually
needing to copy it
•Only one register window is active at a time
–The active register window is indicated by a pointer
•When a function is called, a new register window is activated –This is
done by incrementing the pointer
•When a function calls a new function, the high numbered registers of the
calling function window are shared with the called function as the low
numbered registers in its register window
This way the caller’s high and the called function’s low registers overlap
and can be used to pass parameters and results.
Using overlapped register windows (RISC processors) to provide the
passing of parameters and avoid the need for saving and restoring
register values. Register Windows: ... Each procedure CALL results in
the allocation of a new window consisting of a set from the register file
for use by the new procedure.
This approach saves the time by
–Simplifying the method of data sending to the function
–Simplifying the method of data return
–No need to save the value of register while calling the function .
Suppose that
•Number of global registers = G
•Number of local registers in each window = L
•Number of Common registers in two windows = C
•Number of windows = W
Window size = L + 2C + G
Register file = (L + C)W + G
