Diploma Engineering

Laboratory Manual
Computer Organization & Architecture
(4350701)
[Computer Engineering, Semester V]
Enrollment No
Name
Branch Computer Engineering
Academic Term 231
Institute Government Polytechnic Bhuj

Directorate of Technical Education Department of Computer Engineering

Gandhinagar – Gujarat Government Polytechnic Bhuj
DTE’s Mission:
● To provide globally competitive technical education;
● Remove geographical imbalances and inconsistencies;
● Develop student friendly resources with a special focus on girls’ education and support
to weaker sections;
● Develop programs relevant to industry and create a vibrant pool of technical
professionals.

Institute vision:
“Produce competent diploma engineers to serve industry and society.”

Institute Mission:
1) Impart technical knowledge and skills through dynamic learning environment.
2) Mobilize institute resources for co – curricular and extra-curricular activities.
3) Create strong institute – industry linkages to enhance students’ employability and
entrepreneurship.

Department vision:
Envision to produce competent diploma computer engineers by achieving and professional
excellence as per the need of IT industry and society globally.

Department Mission:
1) To impart fundamentals of computer and related engineering fields among learners to
achieve skills using various teaching and learning methods.
2) To maintain and mobilize vital resources among students and faculty members for co-
curricular and extra-curricular activities.
3) Dedicate itself to create strong institute-industry linkages that will allow its students to gain
required skills, knowledge and attitudes to success as professional and entrepreneur.
 CERTIFICATE
This is to certify that Mr/Miss.
___________________________________________, Enrolment
No._____________________ of 5TH semester of diploma
course in Computer engineering has satisfactorily
completed his/her term work in COMPUTER
ORGANIZATION AND ARCHITECTURE (4350701) in
Government polytechnic, bhuj during the year 2023-
2024

Place: ……………...
Date: ………………….

Signature of Course Faculty Head of the Department

 Preface
The primary aim of any laboratory/Practical/field work is enhancement of required skills as
well as creative ability amongst students to solve real time problems by developing relevant
competencies in psychomotor domain. Keeping in view, GTU has designed competency focused
outcome-based curriculum - 2021 (COGC-2021) for Diploma engineering programmes. In this more
time is allotted to practical work than theory. It shows importance of enhancement of skills amongst
students and it pays attention to utilize every second of time allotted for practical amongst Students,
Instructors and Lecturers to achieve relevant outcomes by performing rather than writing practice in
study type. It is essential for effective implementation of competency focused outcome- based Green
curriculum-2021. Every practical has been keenly designed to serve as a tool to develop & enhance
relevant industry needed competency in each and every student. These psychomotor skills are very
difficult to develop through traditional chalk and board content delivery method in the classroom.
Accordingly, this lab manual has been designed to focus on the industry defined relevant outcomes,
rather than old practice of conducting practical to prove concept and theory.

By using this lab manual, students can read procedure one day in advance to actual
performance day of practical experiment which generates interest and also, they can have idea of
judgement of magnitude prior to performance. This in turn enhances predetermined outcomes
amongst students. Each and every Experiment / Practical in this manual begins by competency,
industry relevant skills, course outcomes as well as practical outcomes which serve as a key role for
doing the practical. The students will also have a clear idea of safety and necessary precautions to be
taken while performing experiment.

This manual also provides guidelines to lecturers to facilitate student-cantered lab activities
for each practical/experiment by arranging and managing necessary resources in order that the
students follow the procedures with required safety and necessary precautions to achieve outcomes.
It also gives an idea that how students will be assessed by providing Rubrics.

Students are eventually going to become a computer engineer and will be placed in an
industry. If he/she only possess the knowledge about the languages and its programming then they
would have been lacking in some aspects like how the memory and I/O works as well as how the CPU
and its components work inside the hardware. By studying this curriculum and performing various
practical / exercises given in this manual they can gain the full knowledge of each component’s
working and their interconnection for communication hence providing full internal knowledge.

Although we tried our level best to design this lab manual, but always there are chances of
improvement. We welcome any suggestions for improvement.
 Programme Outcomes (POs)
Following programme outcomes are expected to be achieved through the practical of the
course:

1. Basic and Discipline specific knowledge: Apply knowledge of basic mathematics, science
and engineering fundamentals and engineering specialization to solve the engineering
problems.
2. Problem analysis: Identify and analyse well-defined engineering problems using codified
standard methods.
3. Design/development of solutions: Design solutions for engineering well-defined
technical problems and assist with the design of systems components or processes to
meet specified needs.
4. Engineering Tools, Experimentation and Testing: Apply modern engineering tools and
appropriate technique to conduct standard tests and measurements.
5. Engineering practices for society, sustainability and environment: Apply appropriate
technology in context of society, sustainability, environment and ethical practices.
6. Project Management: Use engineering management principles individually, as a team
member or a leader to manage projects and effectively communicate about well-defined
engineering activities.
7. Life-long learning: Ability to analyse individual needs and engage in updating in the
context of technological changes in field of engineering.
 Practical Outcome - Course Outcome matrix
Course Outcomes (COs):
a. CO1: Analyse computer systems at the hardware level, including CPU components & circuits,
buses, and registers considering trade-offs and the evolution of processors.
b. CO2: Examine 8085 Architecture and its working.
c. CO3: Perform Assembly language programming using 8085 Instruction Set.
d. CO4: Characterize need of various Memory types in hierarchy.
e. CO5: Visualize CPU-I/O Communication and working.
Sr.
Experiment/Practical Outcome CO1 CO2 CO3 CO4 CO5
No.
1 Processor Evolution √ - - - -
Outline intel processor evolution
2 8085 Architecture - √ - - -
Prepare 8085 Microprocessor architecture in diagram
and explain it.
3 Data Transfer Instructions - - √ - -
Summarize out Data Transfer Instructions and perform
minimum 3 to 5 programs associated with the said
concept.
4 Arithmetic Instructions - - √ - -
Summarize Arithmetic Instructions and perform
minimum 3 to 5 programs associated with the said
concept.
5 Logical Instructions - - √ - -
Summarize Logical Instructions of 8085 with example
and execute minimum 3 to 5 programs associated with
said concept.
6 I/O Instructions - - √ - -
List Input-Output Instructions of 8085 with example
and execute minimum 3 to 5 programs associated with
said concept.
7 Machine Control Instructions - - √ - -
Recall Machine Control Instructions of 8085 with
example and execute minimum 2 to 3 programs
associated with said concept.
8 Branching & Looping Instructions - - √ - -
List Branching and Looping instructions of 8085 with
example and execute basic 2-3 programs associated
with said concept.
9 Memory Hierarchy - - - √ -
Make a chart to represent all types of memory in
Memory Hierarchy.
10 Associative Memory - - - √ -
Paraphrase Associative Memory in details.
11 Input – Output - - - - √
Differentiate Programmed I/O and Interrupt initiated
I/O in detail.
12 CPU-IOP Communication - - - - √
List steps to carryout CPU-IOP Communication.
 Industry Relevant Skills
The following industry relevant skills of the competency “Examine computer architecture and
explore assembly language programming using 8085 instructions set” are expected to be
developed in the student by undertaking the practical of this laboratory manual.
1. Prepare comparison table for various processors.
2. Depict processor architecture with all its components
3. Write code in assemble language using various instructions
4. Summarize various memories and their usage and working methodology
5. Explore IOP and CPU-IOP communication.

Guidelines to Teachers
1. Couse faculty should demonstrate experiment with all necessary implementation strategies
described in curriculum.
2. Couse faculty should explain industrial relevance before starting of each experiment.
3. Course faculty should involve & give opportunity to all students for hands on experience.
4. Course faculty should ensure mentioned skills are developed in the students by asking.
5. Utilise 2 hrs of lab hours effectively and ensure completion of write up with quiz also.
6. Encourage peer to peer learning by doing same experiment through fast learners.

Instructions for Students

1. Organize the work in the group and make record of all observations.
2. Students shall develop maintenance skill as expected by industries.
3. Student shall attempt to develop related hand-on skills and build confidence.
4. Student shall develop the habits of evolving more ideas, innovations, skills etc.
5. Student shall refer technical magazines and data books.
6. Student should develop habit to submit the practical on date and time.
7. Student should well prepare while submitting write-up of exercise.
 Computer Organization & Architecture (4350701)

CONTINUOUS ASSESSMENT SHEET

Enrolment No: ______________________________ Term: _______

Name: ____________________________________________

Sr. Date Marks

Experiment/Practical Outcome Page Sign
No Performed (10)
1 Processor Evolution
Outline intel processor evolution
2 8085 Architecture
Prepare 8085 Microprocessor architecture in diagram and
explain it.

3 Data Transfer Instructions

Summarize out Data Transfer Instructions and perform
given programs associated with the said concept.
4 Arithmetic Instructions
Summarize Arithmetic Instructions and perform given
programs associated with the said concept.
5 Logical Instructions
Summarize Logical Instructions of 8085 with example and
execute given programs associated with said concept.
6 I/O Instructions
List Input-Output Instructions of 8085 with example and
execute given programs associated with said concept.
7 Machine Control Instructions
Recall Machine Control Instructions of 8085 with example
and execute given programs associated with said concept.
8 Branching & Looping Instructions
List Branching and Looping instructions of 8085 with
example and execute given programs associated with said
concept.
9 Memory Hierarchy
Make a chart to represent all types of memory in Memory
Hierarchy.
10 Associative Memory
Paraphrase Associative Memory in details.

11 Input – Output
Differentiate Programmed I/O and Interrupt initiated I/O in
detail.
12 CPU-IOP Communication
List steps to carryout CPU-IOP Communication.
Computer Organization & Architecture (4350701)

Practical No. 01: Processor Evolution

1. Outline intel processor evolution.

A. Objectives:
Basic understanding of various aspects in which processors are termed as different in terms
of its architecture develops a sense of hardware and its working capability.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic mathematics,
science and engineering fundamentals and engineering specialization to solve the
engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using
codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-defined
technical problems and assist with the design of systems components or processes to meet
specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering tools
and appropriate technique to conduct standard tests and measurements.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in the
context of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Examine computer architecture’:
1. Understanding Processor word-size
2. Compute Maximum Physical Memory Addressable.

D. Relevant Course Outcomes (COs):

1. Explain Generic Computer and ALU Architecture and processor Evolution.

E. Practical Outcomes:
1. Differentiate and choose processor based on the current need.

F. Relevant Affective domain Outcomes (ADOs):

1. Understand need of the scenario and develop a system accordingly.

G. Prerequisite Theory:
Microprocessor is considered as the mind of the computer system which performs all
the computational task of Arithmetical, Logical or any other Nature. It is available in the
CPU of the computer system.

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Microprocessor has 3 buses:

1. Address Bus: It is a unidirectional bus providing addresses generated by CPU to other
devices.
2. Data Bus: It is a bi-directional bus to communicate data between microprocessor and
Peripheral devices.
3. Control Bus: Control bus is actually a set of Control lines in which each line provides
a specific signal like Read, Write Operation or I/O or Memory Operation.
● Word Size: The data that can be processed by the microprocessor in a single cycle
is known as the word size. It usually varies from 4-bits to 64-bits depending upon
the processor.
● Addressable Physical Memory: Depending upon the size of Address Bus (number of
address lines) we can identify number of unique memory locations generated by
the microprocessor.
For example: If a processor has 4 bits of Address But then number of unique
addresses generated are 0000 (0d) to 1111 (15d). 16 total locations. This can be
calculated using 2^(number of address lines)

H. Comparison:
Virtual
Size of
Sr. Microproce Invention Address Memory
Word Size Physical Data Bus
No. ssor Year Bus Supported
Memory
?

1 Intel 4004

2 Intel 8008

3 Intel 8085

4 Intel 8086

5 Intel 80186

6 Intel 80286

7 Intel 80386

8 Intel 80486

Intel
9
Pentium I

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Intel
10
Pentium II
Intel
11
Pentium III
Intel
12
Pentium IV

13 Intel Core i3

14 Intel Core i5

15 Intel Core i7

16 Intel Core i9

I. Practical related Quiz:

1. What was the word size of the Intel 4004 microprocessor?
a) 4 bits
b) 8 bits
c) 16 bits
d) 32 bits
2. Which microprocessor had the largest physical memory size among the options
below?
a) Intel 8086
b) Intel 80286
c) Intel 80386
d) Intel 80486
3. In which year was the Intel 8008 microprocessor introduced?
a) 1969
b) 1971
c) 1974
d) 1978
4. What was the word size of the Intel 8086 microprocessor?
a) 8 bits
b) 16 bits
c) 32 bits
d) 64 bits
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5. Which microprocessor introduced the x86 architecture?

a) Intel 4004
b) Intel 8086
c) Intel 80286
d) Intel 80386
6. What was the word size of the Intel 80286 microprocessor?
a) 8 bits
b) 16 bits
c) 32 bits
d) 64 bits
7. In which year was the Intel 80386 microprocessor released?
a) 1978
b) 1981
c) 1985
d) 1989
8. Which microprocessor introduced the concept of the superscalar architecture?
a) Intel 80486
b) Intel Pentium
c) Intel Core 2 Duo
d) Intel Core i9
9. What was the word size of the Intel Pentium microprocessor?
a) 16 bits
b) 32 bits
c) 64 bits
d) 128 bits
10. In which year was the Intel Core i9 series of microprocessors first introduced?
a) 2006
b) 2009
c) 2011
d) 2017

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J. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (90-100%): Thorough understanding and precise
explanation with accurate and comprehensive
information.
Adequate (70-89%): Good understanding with accurate
C1:
presentation, covering essential aspects.
Content & 50 %
Accuracy Needs Improvement (50-69%): Basic understanding with
noticeable inaccuracies or missing details.
Insufficient (Below 50%): Significant lack of understanding
with major inaccuracies or misunderstandings.
Excellent (90-100%): Insightful analysis and logical
reasoning with coherent and well-developed arguments.
Adequate (70-89%): Reasonable analysis with logical flow
and coherent arguments, though lacking depth.
C2:
30 % Needs Improvement (50-69%): Limited analysis or logical
Analysis & Logic
flaws, requiring improvement in depth and coherence.
Insufficient (Below 50%): Lack of analysis or significant
logical flaws, indicating insufficient understanding or
effort.
Excellent (90-100%): Clear and concise writing with
effective use of language and appropriate terminology.
Adequate (70-89%): Mostly clear with occasional
ambiguity, utilizing language appropriately.
C3:
Clarity & 20 % Needs Improvement (50-69%): Lack of clarity and
Presentation confusing expression, requiring improvement in language
usage.
Insufficient (Below 50%): Poor clarity and confusing
expression, indicating significant issues in language and
presentation.
Total Marks for Practical = 0.5 * (Marks of C1) + 0.3 * (Marks of C2) + 0.2 * (Marks of C3)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 02: 8085 Architecture

1. Prepare 8085 Microprocessor architecture in diagram and explain it.

A. Objectives:
Understand the basic structure and components of the 8085 microprocessor, including its registers,
instruction set, and data transfer mechanisms.
Gain hands-on experience in programming and executing instructions using the 8085-assembly
language.
Learn how to design and implement simple programs using the 8085 microprocessor, including
arithmetic and logical operations, data manipulation, and control flow.
Develop an understanding of the timing and control signals involved in the execution of instructions
in the 8085 microprocessor.
Acquire practical knowledge of interfacing peripheral devices, such as input/output ports and
memory, with the 8085 microprocessor.
Enhance problem-solving skills and the ability to analyse and debug programs written for the 8085
microprocessor.
Overall, the objective is to provide students with a practical understanding of the 8085 architecture
and its applications in computer systems, enabling them to design and implement basic
microprocessor-based systems.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic mathematics, science
and engineering fundamentals and engineering specialization to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using codified
standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-defined technical
problems and assist with the design of systems components or processes to meet specified
needs.
● Project Management (PO6): Use engineering management principles individually, as a team
member or a leader to manage projects and effectively communicate about well-defined
engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in the context
of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified competency
‘Examine computer architecture’:
1. Competency in understanding microprocessor architecture: Students will gain a solid
understanding of the architecture and organization of the 8085 microprocessor, including
its various components, registers, and data transfer mechanisms.

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Computer Organization & Architecture (4350701)

D. Relevant Course Outcomes (COs):

1. Examine 8085 Architecture and its working.

E. Practical Outcomes:
1. Microcontroller Programming: Understanding the 8085 architecture prepares individuals to
work with similar microcontrollers and microprocessors, enabling them to program and
control these devices efficiently.
2. Embedded Systems Development: Knowledge of 8085 architecture provides a foundation for
designing and developing embedded systems that utilize microcontrollers. This includes
projects such as home automation systems, robotics, industrial control systems, and more.

F. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Technical Detail
2. Curiosity and Inquisitiveness
3. Sense of Achievement
4. Passion for Technology.

G. Prerequisite Theory:
o Digital Logic: Understanding digital logic gates, Boolean algebra, and basic digital circuit
design concepts helps in comprehending the internal workings of the microprocessor.
o Number Systems: Familiarity with number systems, especially binary and hexadecimal, is
essential for understanding the representation of data and instructions in the 8085
microprocessor.
o Computer Organization: Knowledge of computer organization principles, including CPU,
memory, input/output devices, and the fetch-decode-execute cycle, provides a foundation
for understanding the overall structure of the 8085 microprocessor.
o Basic Electronics: Understanding basic electronic components and circuits, such as resistors,
capacitors, transistors, and flip-flops, is helpful in understanding the interface and
interaction of the microprocessor with the external world

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H. Diagram of 8085 Architecture

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I. Description of Various Components of 8085 Architecture

8085 microprocessor includes
• ALU (Arithmetic & Logic Unit)
• Timing and control unit
• Instruction register & decoder
• Register array
• Interrupt control
• Serial I/O control

➢ ALU:

➢ Flag register:
▪ The flag register in 8085 is an 8-bit register which act as status flags. From these 8-bit, only 5
flags are used, remaining 3 are left vacant to use in future versions of Intel processors.
▪ These five flags are of 1bit Flip-Flop and are known as zero, sign, carry, parity and auxiliary
carry.
▪ These flags are set or reset after the execution of an arithmetic or logic operation; according
to data conditions of the result in the accumulator and other registers. Data copy instructions
do not affect any flags.
▪ Flags are used extensively in programming (low level) to test a condition.
▪ For example,
o To test whether the previous instruction is making the accumulator zero, zero flag can be
tested.
o The instruction JC (Jump on Carry) is implemented to change the sequence of a program
when the CY flag is set.

Flag Register Diagram

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Computer Organization & Architecture (4350701)

Sr.
Flag Description Example
No.

➢ Timing and control unit:

➢ Instruction register & decoder:

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➢ Register array:

➢ Interrupt control:
8085 has five interrupts TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.

➢ Serial I/O control:

This unit provides the serial interface through SID and SOD.

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Practical related Quiz:

1. What is the primary function of the ALU (Arithmetic Logic Unit) in the 8085 microprocessor?
a) Data storage
b) Arithmetic and logical operations
c) Instruction fetching
d) Memory addressing
2. Which component of the 8085 microprocessor is responsible for storing temporary data during
processing?
a) Accumulator
b) Program Counter
c) Register File
d) Stack Pointer
3. Which bus connects the ALU, registers, and internal data paths in the 8085 microprocessor?
a) Address bus
b) Data bus
c) Control bus
d) Power bus
4. The instruction decoder in the 8085 microprocessor is responsible for:
a) Fetching instructions from memory
b) Executing arithmetic operations
c) Storing data temporarily
d) Controlling the flow of instructions
5. Which component of the 8085 microprocessor holds the memory address of the next instruction
to be fetched?
a) Stack Pointer
b) Instruction Register
c) Program Counter
d) Memory Address Register
6. The control signals generated by the control unit in the 8085 microprocessor are used for:
a) Addressing memory locations
b) Performing arithmetic operations
c) Controlling data transfer between registers
d) Managing the overall operation of the microprocessor

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7. The interrupt lines in the 8085 microprocessor are used for:

a) Communicating with external devices
b) Controlling the clock frequency
c) Storing intermediate results
d) Performing logical operations
8. Which component of the 8085 microprocessor is responsible for temporarily storing the return
address of subroutines?
a) Accumulator
b) Stack Pointer
c) Program Counter
d) Instruction Register
9. The control bus in the 8085 microprocessor is used for:
a) Transmitting data between the microprocessor and memory
b) Controlling the flow of instructions
c) Carrying out arithmetic and logical operations
d) Addressing memory locations
10. The function of the instruction register in the 8085 microprocessor is to:
a) Store the result of arithmetic operations
b) Store the opcode of the current instruction
c) Store the address of the next instruction
d) Store the data to be transferred to memory

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Computer Organization & Architecture (4350701)

J. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (90-100%): Thorough understanding and precise
explanation with accurate and comprehensive
information.
Adequate (70-89%): Good understanding with accurate
C1:
presentation, covering essential aspects.
Content & 50 %
Accuracy Needs Improvement (50-69%): Basic understanding with
noticeable inaccuracies or missing details.
Insufficient (Below 50%): Significant lack of understanding
with major inaccuracies or misunderstandings.
Excellent (90-100%): Insightful analysis and logical
reasoning with coherent and well-developed arguments.
Adequate (70-89%): Reasonable analysis with logical flow
and coherent arguments, though lacking depth.
C2:
30 % Needs Improvement (50-69%): Limited analysis or logical
Analysis & Logic
flaws, requiring improvement in depth and coherence.
Insufficient (Below 50%): Lack of analysis or significant
logical flaws, indicating insufficient understanding or
effort.
Excellent (90-100%): Clear and concise writing with
effective use of language and appropriate terminology.
Adequate (70-89%): Mostly clear with occasional
ambiguity, utilizing language appropriately.
C3:
Clarity & 20 % Needs Improvement (50-69%): Lack of clarity and
Presentation confusing expression, requiring improvement in language
usage.
Insufficient (Below 50%): Poor clarity and confusing
expression, indicating significant issues in language and
presentation.
Total Marks for Practical = 0.5 * (Marks of C1) + 0.3 * (Marks of C2) + 0.2 * (Marks of C3)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 03: Data Transfer Instructions

1. Summarize out Data Transfer Instructions and perform given programs associated with the
said concept.

A. Objectives:
Understand Data Transfer Instructions: Familiarize students with the various data transfer
instructions available in the assembly language of the given microprocessor (such as the 8085).
Gain Hands-on Experience: Provide students with practical exposure to writing assembly
language programs that involve data transfer instructions. This helps them develop proficiency
in using these instructions effectively.
Learn Data Movement Techniques: Explore different techniques and methods for moving data
within the microprocessor's registers, memory locations, and I/O devices using the data transfer
instructions.
Develop Programming Skills: Enhance students' programming skills by practicing the
implementation of data transfer instructions in assembly language. This includes understanding
addressing modes, syntax, and the overall structure of assembly programs.
Analyse and Debug Programs: Enable students to analyse, debug, and troubleshoot assembly
language programs that involve data transfer instructions. This helps them develop critical
thinking and problem-solving skills in the context of microprocessor programming.
Apply Knowledge to Real-world Scenarios: Encourage students to apply their understanding of
data transfer instructions to practical scenarios and real-world applications. This could include
tasks such as data copying, data manipulation, and interfacing with external devices.
Reinforce Understanding of Computer Organization: Strengthen students' understanding of
computer organization concepts, such as memory hierarchies, register utilization, and data
movement between different components of the microprocessor.
Document and Report: Develop skills in documenting and reporting the assembly language
programs, including program descriptions, flowcharts, and expected outcomes. This promotes
effective communication and presentation of the implemented solutions.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic mathematics,
science and engineering fundamentals and engineering specialization to solve the engineering
problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using
codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-defined
technical problems and assist with the design of systems components or processes to meet
specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering tools and
appropriate technique to conduct standard tests and measurements.

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 Computer Organization & Architecture (4350701)

● Project Management (PO6): Use engineering management principles individually, as a team

member or a leader to manage projects and effectively communicate about well-defined
engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in the
context of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Develop Assembly Language programs involving Data Transfer Instructions’:
1. Programming skills.
2. Debugging skills.
3. Hardware Understanding

D. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

E. Practical Outcomes:
1. Develop assembly language programs involving Data Transfer Instructions in 8085
microprocessors.

F. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

G. Prerequisite Theory:

Register
Instruction Addressing
Instruction Usage Transfer Brief Description
Size Mode
Language

Move Instructions

MOV Move data from the source register

MOV Rd <- Rs 1 byte Register
Rd, Rs (Rs) to the destination register (Rd).

MVI
Move immediate data (8-bit) into
MVI Rd, Rd <- data 2 bytes Immediate
the destination register (Rd).
data

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Load & Store Instructions

Load the accumulator (A) with data

LDA
LDA A <- (addr) from the memory location specified 3 bytes Direct
addr
by the address (addr).

Store the content of the

STA accumulator (A) into the memory
STA (addr) <- A 3 bytes Direct
addr location specified by the address
(addr).

Load the accumulator (A) with data

LDAX Register
LDAX A <- (Rp) from the memory location pointed 1 byte
Rp Pair
by the register pair (Rp).

Store the content of the

STAX accumulator (A) into the memory Register
STAX (Rp) <- A 1 byte
Rp location pointed by the register pair Pair
(Rp).

L <- (addr); Load the L and H registers with data

LHLD
LHLD H <- from consecutive memory locations 3 bytes Direct
addr
(addr+1) specified by the address (addr).

Store the content of the L and H

(addr) <- L;
SHLD registers into consecutive memory
SHLD (addr+1) <- 3 bytes Direct
addr locations specified by the address
H
(addr).

Load Register Pair

LXI Rp, Rp <- data Load the register pair (Rp) with
LXI 3 bytes Immediate
data (16-bit) immediate 16-bit data.

Exchange Instructions

Exchange the content of the H and L

H <-> D; L
XCHG XCHG registers with the content of the D 1 byte Implicit
<-> E
and E registers.

Exchange the content of the H and L

L <-> (SP); H
XTHL XTHL registers with the data from the top 1 byte Implicit
<-> (SP+1)
of the stack.

Copy the content of the H and L

SPHL SPHL SP <- HL 1 byte Implicit
registers into the stack pointer (SP).

Stack Instructions

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Computer Organization & Architecture (4350701)

(SP-1) <-
PUSH RpH; (SP-2) Push the content of the register pair Register
PUSH 1 byte
Rp <- RpL; SP (Rp) onto the stack. Pair
<- SP-2

(SP-1) <- A;
Push the content of the accumulator
PUSH (SP-2) <-
PUSH (A) and the flags register onto the 1 byte Implicit
PSW Flags; SP <-
stack.
SP-2

RpL <- (SP);

RpH <- Pop the content from the top of the Register
POP POP Rp 1 byte
(SP+1); SP stack into the register pair (Rp). Pair
<- SP+2

Flags <-
Pop the content from the top of the
POP (SP); A <-
POP stack into the accumulator (A) and 1 byte Implicit
PSW (SP+1); SP
the flags register.
<- SP+2

PCHL Instruction

Load the program counter (PC) with

PCHL PCHL PC <- HL 1 byte Implicit
the content of the H and L registers.

H. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

I. Source code and Output:

Write an assembly language program to copy data from memory location 0005h to 000Ah.
OR
Write an assembly language program to Load data from 0005h into Accumulator and Store it back
on Location 000Ah.

Before Execution: After Execution:

[0005h]: 32h [0005h]: ________
[000Ah]: ________

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Computer Organization & Architecture (4350701)

Source Code:

ADDRESS MNEMONICS COMMENTS

Write an assembly language program to swap data on memory location 0005h & 0009h.

Before Execution: After Execution:

[0005h]: 32h [0005h]: _____
[0009h]: 56h [0009h]: _____
Source Code:

ADDRESS MNEMONICS COMMENTS

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Computer Organization & Architecture (4350701)

Write an assembly language program to load H and L registers direct from memory location
0005H, load 16-bit immediate data into register pair BC and store the contents of H and L registers
direct into memory location 0008H, stack pointer, and program counter.

Before Execution: After Execution:

[0005h]: 32h [BC]: _____
[0006h]: 85h [HL]: _____
[immediate data]: 62h [0008]:______
[SP]: _______
[PC]: _______
Source Code:

ADDRESS MNEMONICS COMMENTS

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Computer Organization & Architecture (4350701)

Write an assembly language program to PUSH the contents of register pair DE onto stack and POP
the contents from SP 0002H into register pair HL.

Before Execution: After Execution:

[DE]: 32h [DE]: _____
[SP:0002H]: 85h [HL]: _____
[SP:0003H]: 62h [SP]: _______
Source Code:

ADDRESS MNEMONICS COMMENTS

Write an assembly language program to exchange the contents of registers H and L with the
contents of registers D and E, and with the contents of stack pointer.

Before Execution: After Execution:

[HL]: 32h [HL]:
[DE]: 85h [DE]:
[SP:______]:20H [SP:______]:
[SP:______]:10H [SP:______]:
Source Code:

ADDRESS MNEMONICS COMMENTS

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Computer Organization & Architecture (4350701)

J. Practical related Quiz:

1. What is the purpose of the 8085 MOV instruction?

a) Move data from memory to accumulator

b) Move data from accumulator to memory

c) Move data between registers

d) Perform arithmetic addition

2. Which addressing mode is used by the LXI instruction in the 8085 microprocessor?

a) Direct addressing mode

b) Immediate addressing mode

c) Register addressing mode

d) Indirect addressing mode

3. What does the instruction "MVI B, 0AH" do in the 8085 microprocessor?

a) Move immediate data 0AH to register B

b) Move register B to register A

c) Move data from memory address 0AH to register B

d) Move data from register B to memory address 0AH

4. The XCHG instruction in the 8085 microprocessor is used to:

a) Exchange the content of register pair HL with the content of register pair DE

b) Exchange the content of the accumulator with the content of memory location 0

c) Exchange the content of register pair BC with the content of register pair HL

d) Exchange the content of the stack pointer with the content of the program counter

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Computer Organization & Architecture (4350701)

5. What is the size (in bytes) of the LDA instruction in the 8085 microprocessor?

a) 1 byte

b) 2 bytes

c) 3 bytes

d) 4 bytes

6. The LHLD instruction in the 8085 microprocessor is used to load data from:

a) Register pair HL to memory location specified by the address

b) Memory location specified by the address to register L

c) Memory location specified by the address to register H

d) Accumulator to memory location specified by the address

7. Which data transfer instruction is used to push the content of register pair BC onto the stack in
the 8085 microprocessors?

a) PUSH B

b) PUSH BC

c) PUSH C

d) PUSH H

8. What does the 8085 instruction "STAX H" do?

a) Store the content of register H at the memory location specified by the address stored in the
stack pointer (SP).

b) Store the content of register H at the memory location specified by the address stored in the
program counter (PC).

c) Store the content of register H at the memory location specified by the content of the
accumulator (A).

d) Store the content of register H at the memory location specified by the content of the HL
register pair.

9. What is the purpose of the XTHL instruction in the 8085 microprocessor?

a) Exchange the content of the stack pointer with the content of register pair HL

b) Exchange the content of the accumulator with the content of register H

c) Exchange the content of register pair HL with the content of memory location 0

d) Exchange the content of register pair BC with the content of register pair DE

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Computer Organization & Architecture (4350701)

10. The instruction "PCHL" in the 8085 microprocessor is used to:

a) Load the program counter with the content of register pair HL

b) Load the program counter with the content of register pair BC

c) Load the program counter with the content of register pair DE

d) Load the program counter with the content of the accumulator

K. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 04: Arithmetic Instructions

1. Summarize Arithmetic Instructions and perform given programs associated with the said
concept.

B. Objectives:
Understand Arithmetic Instructions: Gain a clear understanding of various arithmetic
instructions, such as ADD, SUB, INR, DCR, ADC, SBB, and others, and their usage in the 8085
microprocessors.
Develop Assembly Language Programming Skills: Enhance programming skills in assembly
language and learn to write efficient code using arithmetic instructions for the 8085
microprocessors.
Implement Practical Arithmetic Operations: Practice Register and Memory Manipulation:
Practice manipulating data stored in registers and memory locations to perform arithmetic
operations using arithmetic instructions.
Learn Flag Manipulation: Understand how arithmetic instructions affect the flag register and
how flags are used to interpret the results of arithmetic operations.
Apply arithmetic instructions to perform practical arithmetic operations, such as addition,
subtraction, multiplication, and division, on data stored in the 8085 microprocessors.

C. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic mathematics, science
and engineering fundamentals and engineering specialization to solve the engineering
problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using codified
standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-defined
technical problems and assist with the design of systems components or processes to meet
specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering tools and
appropriate technique to conduct standard tests and measurements.
● Project Management (PO6): Use engineering management principles individually, as a team
member or a leader to manage projects and effectively communicate about well-defined
engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in the
context of technological changes in field of engineering.

D. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified competency
‘Develop Assembly Language programs involving Arithmetic Instructions’:
1. Programming skills
2. Debugging skills and 3. Hardware Understanding

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 Computer Organization & Architecture (4350701)

E. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

F. Practical Outcomes:
1. Develop assembly language programs involving Arithmetic Instructions in 8085
microprocessors.

G. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

H. Prerequisite Theory:

Register
Instruction Addressing
Instruction Usage Transfer Brief Description
Size Mode
Language

Add Instructions

Adds the content of register

ADD ADD R/M A <- A + R/M 1 byte Register
R to the accumulator A

A <- A + 8-bit Adds the 8-bit immediate

ADI ADI 8-bit data 2 bytes Immediate
data data to the accumulator A

Adds the content of register

A <- A + R/M +
ADC ADC R/M R and carry flag to the 1 byte Register
CY
accumulator A

Adds the 8-bit immediate

A <- A + 8-bit
ACI ACI 8-bit data data and carry flag to the 2 bytes Immediate
data + CY
accumulator A

Adds the content of register

DAD DAD Rp HL <- HL + Rp pair Rp to HL (RP can be BC, 1 byte Register
DE, or HL)

Subtract Instructions

Subtracts the content of

SUB SUB R/M A <- A – R/M register R from the 1 byte Register
accumulator A

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 Computer Organization & Architecture (4350701)

Subtracts the 8-bit

A <- A - 8-bit
SUI SUI 8-bit data immediate data from the 2 bytes Immediate
data
accumulator A

Subtracts the content of

A <- A – R/M –
SBB SBB R/M register R and carry flag 1 byte Register
CY
from the accumulator A

Subtracts the 8-bit

A <- A - 8-bit
SBI SBI 8-bit data immediate data and carry 2 bytes Immediate
data – CY
flag from the accumulator A

Increment/Decrement Instructions

Increments the content of

INR INR R/M R <- R/M + 1 1 byte Register
register R by 1

Decrements the content of

DCR DCR R/M R <- R/M - 1 1 byte Register
register R by 1

Increments the content of

INX INX Rp Rp <- Rp + 1 register pair Rp by 1 (Rp can 1 byte Register
be BC, DE, or HL)

Decrements the content of

DCX DCX Rp Rp <- Rp - 1 register pair Rp by 1 (Rp can 1 byte Register
be BC, DE, or HL)

Decimal Adjust Accumulator (DAA)

Adjusts the result in the

A <- BCD No
DAA DAA accumulator after BCD 1 byte
Corrected A Operand
addition or subtraction

I. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

J. Source code and Output:

Write an assembly language program to add two numbers stored at memory locations 0003h
and 0005h and also store the result back into memory location 0007h.
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 Computer Organization & Architecture (4350701)

Before Execution: After Execution:

[0003h]: _____ [0003h]: _____
[0005h]: _____ [0005h]: _____
[0007h]: _____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to subtract two numbers stored at memory locations
0003H and 0005H and also store the result back into memory location 0007H.

Before Execution: After Execution:

[0003h]: _____ [0003h]: _____
[0005h]: _____ [0005h]: _____
[0007h]: _____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program to increment a number stored in memory location 0003h
and store the result back into the same memory location using indirect addressing mode.

Before Execution: After Execution:

[0003h]: 35h [0003h]: _____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to decrement a 16-bit number stored in memory location
0005h and store the result back into the same memory location.

Before Execution: After Execution:

[0005h]: 20h [0005h]: _____
[0006h]: 50h [0006h]: _____
Source Code:

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 Computer Organization & Architecture (4350701)

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to add 2 16-bit numbers stored in memory locations 0003h
and 0005h and store the answer at memory location 0008h.

Before Execution: After Execution:

[0003h]: 42h [0005H]: 30h [0008h]: _____
[0004h]: 57h [0006H]: 50h [0009h]: _____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program to add 2 16-bit numbers stored in memory locations 0003h
and 0006h without using DAD instruction and store the answer at memory location 0009h.

Before Execution: After Execution:

[0003h]: 54h [0006h]: D5h [0009h]: _____
[0004h]: F0h [0007h]: 49h [000Ah]: _____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

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Computer Organization & Architecture (4350701)

K. Practical related Quiz:

1. Which 8085 arithmetic instruction is used to add the content of register R to the
accumulator?

a) ADD R

b) SUB R

c) ADC R

d) INR R

2. Which instruction is used to subtract the 8-bit immediate data from the accumulator
in the 8085 microprocessors?

a) ADD

b) SUB

c) ACI

d) SUI

3. The instruction DAA (Decimal Adjust Accumulator) is used to:

a) Perform arithmetic operations on 16-bit data

b) Adjust the result in the accumulator after BCD addition or subtraction

c) Multiply two numbers

d) Perform logical operations

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Computer Organization & Architecture (4350701)

4. What does the instruction INR R do in the 8085 microprocessors?

a) Increments the content of register R by 1

b) Decrements the content of register R by 1

c) Adds the content of register R to the accumulator

d) Subtracts the content of register R from the accumulator

5. The instruction MOV A, B in the 8085 microprocessor means:

a) Move the content of register B to the accumulator

b) Move the content of accumulator A to register B

c) Add the content of register B to the accumulator

d) Subtract the content of register B from the accumulator

6. Which of the following instructions is used to add the 8-bit immediate data and carry flag
to the accumulator in the 8085 microprocessors?

a) ACI

b) ADD

c) ADC

d) SBB

7. The instruction DCR R in the 8085 microprocessors:

a) Decrements the content of register R by 1

b) Increments the content of register R by 1

c) Adds the content of register R to the accumulator

d) Subtracts the content of register R from the accumulator

8. The instruction DAD R in the 8085 microprocessor is used to:

a) Add the content of register R to the accumulator

b) Add the content of register pair R to the HL register pair

c) Subtract the content of register R from the accumulator

d) Subtract the content of register pair R from the HL register pair

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Computer Organization & Architecture (4350701)

9. Which instruction is used to subtract the content of register R and carry flag from the
accumulator in the 8085 microprocessors?

a) ACI

b) ADD

c) ADC

d) SBB

10. The instruction SBI 8-bit data in the 8085 microprocessor means:

a) Subtract the 8-bit immediate data from the accumulator and borrow

b) Subtract the 8-bit immediate data from the accumulator and carry

c) Subtract the 8-bit immediate data from the accumulator

d) Subtract the 8-bit immediate data from the accumulator and add carry

L. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 05: Logical Instructions

1. Summarize Logical Instructions of 8085 with example and execute given programs
associated with said concept.

B. Objectives:
Understand Logical Instructions: Students will learn about various logical instructions
available in the microprocessor's instruction set, including AND, OR, XOR, and NOT
instructions. They will grasp the significance of these instructions in manipulating data at
the bit level.
Perform Bitwise Operations: Students will practice using logical instructions to perform
bitwise operations on data stored in registers and memory locations. They will learn how
to apply these operations to specific bits within binary numbers.
Master Binary Calculations: Through hands-on programming exercises, students will gain
proficiency in using logical instructions to perform binary calculations, such as binary
addition and subtraction
Check Conditions: Logical instructions are often used to check specific conditions in data.
Students will learn how to utilize AND, OR, and NOT instructions to test and modify
specific bits to evaluate conditions.
Set and Clear Flags: The practical will involve using logical instructions to set or clear flags
based on specific conditions. Students will understand the importance of flags in the
control flow of a program.
Implement Shift Instructions: Students will practice using shift instructions (e.g., SHL,
SHR) to perform left and right shifts on data, which are essential for multiplication and
division operations in binary arithmetic.
Enhance Programming Proficiency: The practical will improve students' programming
proficiency by introducing them to a broader range of instructions and expanding their
understanding of assembly language programming.
Foster Appreciation for Low-Level Programming: Students will develop an appreciation
for low-level programming and its significance in optimizing code execution and improving
system performance.

C. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic mathematics,
science and engineering fundamentals and engineering specialization to solve the
engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using
codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-defined
technical problems and assist with the design of systems components or processes to meet
specified needs.

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 Computer Organization & Architecture (4350701)

● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering tools
and appropriate technique to conduct standard tests and measurements.
● Project Management (PO6): Use engineering management principles individually, as a
team member or a leader to manage projects and effectively communicate about well-
defined engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in the
context of technological changes in field of engineering.

D. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Develop Assembly Language programs involving Logical Instructions’:
1. Programming skills.
2. Debugging skills.
3. Hardware Understanding

E. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

F. Practical Outcomes:
1. Develop assembly language programs involving Arithmetic Instructions in 8085
microprocessors.

G. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

H. Prerequisite Theory:

Register
Instruction
Instruction Usage Transfer Brief Description Addressing Mode
Size
Language

AND Instructions

ANA A <- A & Logical AND accumulator with

ANA 1 byte Register
R/M R/M R/M

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 Computer Organization & Architecture (4350701)

ANI 8- A <- A & 8- Logical AND accumulator with

ANI 2 bytes Immediate
bit bit data 8-bit data

OR Instructions

ORA Logical OR accumulator with

ORA A <- A | R/M 1 byte Register
R/M R/M

ORI 8- A <- A | 8-bit Logical OR accumulator with

ORI 2 bytes Immediate
bit data 8-bit data

EX-OR Instructions

XRA Logical EXCLUSIVE OR

XRA A <- A ^ R/M 1 byte Register
R/M accumulator with R/M

XRI 8- A <- A ^ 8-bit Logical EXCLUSIVE OR

XRI 2 bytes Immediate
bit data accumulator with 8-bit data

Set/Complement Instructions

Complement (NOT)
CMA CMA A <- !A 1 byte None
accumulator

CMC CMC CY <- !CY Complement (NOT) carry flag 1 byte None

STC STC CY <- 1 Set carry flag 1 byte None

Compare Instructions

Compare accumulator with

R/M
CMP
CMP A – R/M If CY = 1, Z = 0 then A > R/M 1 byte Register
R/M
If CY = 0, Z = 1 then A = R/M
If CY = 0, Z = 0 then A < R/M

CPI 8- Compare accumulator with 8-

CPI A - 8-bit data 2 bytes Immediate
bit bit data

Rotate Instructions

A = A << 1,
Rotate accumulator left
RLC RLC CY = MSB of 1 byte None
through carry
A

A = A >> 1, Rotate accumulator right

RRC RRC 1 byte None
CY = LSB of A through carry

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 Computer Organization & Architecture (4350701)

A = A << 1,
Rotate accumulator left
RAL RAL CY = MSB of 1 byte None
through carry with MSB = CY
A, MSB = CY

A = A >> 1,
Rotate accumulator right
RAR RAR CY = LSB of 1 byte None
through carry with MSB = CY
A, MSB = CY

I. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

J. Source code and Output:

Write an assembly language program to perform following operations, checks the flags
accordingly, store the result of Logical AND, OR and XOR operation in Memory.
a) Comparison operation between Register B and Accumulator
b) Logical AND operation between Memory location and Accumulator
c) Logical OR operation between Immediate data and Accumulator
d) Logical XOR operation between Register D and Accumulator

Before Execution: After Execution:

[A]: 32h [0006h]: ____ [Logical AND result]
[B]: 45h [0007h]: ____ [Logical OR result]
[D]: 78h [0008h]: ____ [Logical XOR result]
[immediate data]: 37h
[0003h]: 56h
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program to mask the lower nibble (4 bits) of the data stored at
memory location 0005h. Also store the result on 0006h.

Before Execution: After Execution:

[0005h]: _____ [0006h]: ____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program to set odd bits of the data stored at 0007h and store
the answer back on 0008h.

Before Execution: After Execution:

[0007h]: _____ [0008h]: ____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to multiply the number stored in the location pointed
by HL register pair by 4. Store the answer in 0005h.

Before Execution: After Execution:

[HL]: 0002h [0005h]: ____
[0002h]: 15h
Source Code:

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 Computer Organization & Architecture (4350701)

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to clear the contents of an accumulator and set it to
00h without using any data transfer instruction.

Before Execution: After Execution:

[A]: 12h
[A]: ____
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

Write an assembly language program to generate 2’s Complement of the number stored in
Register B and store the answer back in Register C.

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 Computer Organization & Architecture (4350701)

Before Execution: After Execution:

[B]: 25h [C]: ______
Source Code:

FLAGS
ADDRESS MNEMONICS COMMENTS
S Z AC P C

K. Practical related Quiz:

1. What does the 8085 instruction "ANA A" perform?
a. Logical AND operation between accumulator and itself
b. Logical OR operation between accumulator and itself
c. Logical XOR operation between accumulator and itself
d. Logical AND operation between accumulator and register A
2. Which instruction is used to mask the lower nibble of the data stored at memory location
2050h?
a. ANA 0F0h
b. ORA 0FFh
c. ANI 0Fh
d. XRI 00Fh
3. The 8085 instruction "XRA C" performs what operation?
a. Logical XOR between accumulator and register C
b. Logical AND between accumulator and register C
c. Logical OR between accumulator and register C
d. Logical NOT operation on register C

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Computer Organization & Architecture (4350701)

4. What is the size (in bytes) of the instruction "ANI 23h"?

a. 1 byte
b. 2 bytes
c. 3 bytes
d. 4 bytes
5. Which logical instruction is used to set specific bits in a register based on a given bitmask?
a. ANA
b. ORA
c. XRA
d. CMA
6. What is the result of "ANA 00110110b" if the accumulator contains "11001100b"?
a. 10000000b
b. 11111111b
c. 00000000b
d. 00110110b
7. The 8085 instruction "XRA 28h" performs what operation?
a. Logical OR between accumulator and 28h
b. Logical AND between accumulator and 28h
c. Logical XOR between accumulator and 28h
d. Logical NOT operation on 28h
8. Which logical instruction can be used to toggle specific bits in a register?
a. ANA c. ORA
b. XRA d. CMA
9. What is the result of "ANI 10011101b" if the accumulator contains "10101010b"?
a. 10101010b
b. 10011001b
c. 00000000b
d. 10011101b
10. The instruction "ORA 10110011b" performs what operation on the accumulator?
a. Logical AND with 10110011b
b. Logical OR with 10110011b
c. Logical XOR with 10110011b
d. Logical NOT operation

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Computer Organization & Architecture (4350701)

L. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 06: I/O Instructions

1. List Input-Output Instructions of 8085 with example and execute given programs
associated with said concept.

A. Objectives:
Introduction to I/O Operations: Introduce students to input and output instructions in
8085 microprocessors, enabling them to interact with external devices.
Understanding I/O Ports: Familiarize students with I/O ports and their addresses,
illustrating how data is read from and written to these ports.
Interfacing with External Devices: Demonstrate the process of connecting the
microprocessor to external devices such as sensors, displays, and LEDs for real-world
applications.
Input Operations: Teach students how to use input instructions (IN) to read data from
input ports, enabling them to receive external signals or data.
Output Operations: Educate students on using output instructions (OUT) to write data to
output ports, allowing them to control external devices and displays.
Data Transfer: Provide hands-on experience in transferring data between input and
output ports, highlighting the importance of data manipulation during I/O.
I/O Interfacing with Peripherals: Illustrate how I/O instructions play a crucial role in
interfacing with peripheral devices, enabling students to understand the broader
implications of I/O operations in embedded systems.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering specialization
to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems
using codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering
tools and appropriate technique to conduct standard tests and measurements.
● Project Management (PO6): Use engineering management principles individually, as
a team member or a leader to manage projects and effectively communicate about
well-defined engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating
in the context of technological changes in field of engineering.

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C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Develop Assembly Language programs involving Input-Output
Instructions’:
1. Programming skills.
2. Debugging skills.
3. Hardware Understanding

D. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

E. Practical Outcomes:
1. Develop assembly language programs involving Input-Output Instructions in 8085
microprocessors.

F. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

G. Prerequisite Theory:

Register
Instruction
Instruction Usage Transfer Brief Description Addressing Mode
Size
Language

Input-Output Instructions

Input data from the

IN IN port A <- (port) specified input port (port) 2 bytes Immediate
into the accumulator (A).

Output the content of the

OUT OUT port (port) <- A accumulator (A) to the 2 bytes Immediate
specified output port (port).

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H. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

I. Source code and Output:

Write an 8085-assembly language program to load the 65H in register C and 92H in
accumulator A. Display the number 65H at PORT 05H and 92H at PORT 07H.

Before Execution: After Execution:

[C]: 65h [PORT 05]:
[A]: 92h [PORT 07]:
Source Code:

ADDRESS MNEMONICS COMMENTS

Write an 8085-assembly language program to read the data from PORT 03H and PORT 06H.
Display the input data from PORT 03H at output PORT 0AH and store the input data from
PORT 06H in register B.

Before Execution: After Execution:

[PORT 03]: [PORT 04]:
[PORT 06]: [B]:

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Computer Organization & Architecture (4350701)

Source Code:

ADDRESS MNEMONICS COMMENTS

Write an 8085-assembly language program to read the data from PORT 01H and PORT 02H.
Perform the addition between them and display the result at PORT 05H.

Before Execution: After Execution:

[PORT 01]: [PORT 05]:
[PORT 02]:
Source Code:

ADDRESS MNEMONICS COMMENTS

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J. Practical related Quiz:

1. Which 8085 instruction is used to read data from an input port?
a) IN
b) OUT
c) ANA
d) XRA
2. The "OUT 05h" instruction in 8085 microprocessor will:
a) Read data from output port 05h
b) Write data to output port 05h
c) Read data from input port 05h
d) Write data to input port 05h
3. The "IN 08h" instruction in 8085 microprocessor will read data from:
a) Input port 08h
b) Output port 08h
c) Memory location 08h
d) Accumulator (A)
4. The "OUT 01h" instruction in 8085 microprocessor will:
a) Read data from output port 01h
b) Write data to output port 01h
c) Read data from input port 01h
d) Write data to input port 01h
5. Which instruction is used to write data to an output port?
a) OUT
b) IN
c) MOV
d) STA

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K. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 07: Machine Control & Interrupt Instructions

1. Recall Machine Control & Interrupt Instructions of 8085 with example and execute
minimum 2 to 3 programs associated with said concept.

A. Objectives:
Understanding Machine Control Instructions: Introduce students to the NOP (No
Operation) and HLT (Halt) instructions in the 8085 microprocessors, providing insights into
their roles in controlling the processor's behaviour.
Introduction to Interrupt Instructions: Familiarize students with the concept of interrupts
in 8085 microprocessors, enabling them to comprehend the need for handling external
events efficiently.
RIM and SIM Instructions Application: Educate students on using the RIM (Read Interrupt
Mask) and SIM (Set Interrupt Mask) instructions to read and set the interrupt mask,
respectively, understanding their significance in enabling or disabling interrupts.
Handling External Interrupts: Implement practical scenarios where the microprocessor
responds to external interrupts, emphasizing the need for interrupt service routines (ISRs)
to manage various interrupt sources.
Interrupt Priority Management: Illustrate the concept of interrupt priority management
using RST instructions, enabling students to comprehend the priority levels of different
interrupts.
Interrupt-Driven Data Transfer: Explore interrupt-driven data transfer techniques,
showcasing the efficiency of interrupts in handling real-time data acquisition and
processing tasks.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering
specialization to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems
using codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering
tools and appropriate technique to conduct standard tests and measurements.
● Project Management (PO6): Use engineering management principles individually,
as a team member or a leader to manage projects and effectively communicate
about well-defined engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating
in the context of technological changes in field of engineering.

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 Computer Organization & Architecture (4350701)

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Develop Assembly Language programs involving Machine Control and
Interrupt Instructions’:
1. Programming skills.
2. Debugging skills.
3. Hardware Understanding

D. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

E. Practical Outcomes:
1. Develop assembly language programs involving Input-Output Instructions in 8085
microprocessors.

F. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

G. Prerequisite Theory:
Register Instruc
Instruc Addressi
Usage Transfer Brief Description tion
tion ng Mode
Language Size

Machine Control Instructions (NOP, HLT)

No operation. Consumes one machine cycle

NOP NOP - 1 byte Implied
without performing any operation.

Halt the microprocessor's execution, stopping

HLT HLT - 1 byte Implied
further operations.

Interrupt Instructions - Restart (RST 0 - 7)

SP ← SP - 1;
RST n Call a predefined subroutine at memory
RST (SP) ← PC; 1 byte Implied
(0-7) location 0000h.
PC ← n*8

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 Computer Organization & Architecture (4350701)

Read & Set Interrupt Mask Instructions (RIM, SIM)

Read Read the status of the interrupt

accumulator enable/disable flag (IE) and store it in the
RIM RIM (A) with accumulator. 1 byte Implied
interrupt I I I M M M
SID IE
7.5 6.5 5.5 7.5 6.5 5.5
mask status

Set the interrupt enable flag (IE) to either 0 or

Interrupt 1 based on the data in the accumulator.
SIM SIM Enable Flag R M M M 1 byte Implied
(IE) ← data SOD SDE X MSE
7.5 7.5 6.5 5.5

H. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

I. Source code and Output:

Write an assembly language program to execute a delay routine stored at location 0010h.
Load the counter for the delay from 000Ah.

Before Execution:
[000Ah]: 32h Delay Routine:
DELAY: NOP
DCR C
JNZ DELAY
Source Code:

ADDRESS LABEL MNEMONICS COMMENTS T-STATES

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 Computer Organization & Architecture (4350701)

Write an assembly language program Enable Interrupts and Clear all pending requests of
RST 7.5 as well as Mask RST 7.5 and RST 5.5.

Write the Bit Pattern Here:

[7]: __,[6]: __,[5]: __,[4]: __,[3]: __,[2]: __,[1]: __,[0]: __
Source Code:

ADDRESS LABEL MNEMONICS COMMENTS

Write an assembly language program to read the interrupt mask and interpret the answer.

Source Code:

ADDRESS MNEMONICS COMMENTS

0001 RIM ; Read accumulator (A) with interrupt mask status

0002 HLT ; Halt the Program

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Computer Organization & Architecture (4350701)

After Execution:
[A]: 9Ch (1 0 0 1 1 1 0 0)
Interpret the above output bit by bit and write your answer below.

BIT BIT
INTERPRETATION
NO. VALUE

J. Practical related Quiz:

1. Which instruction is used to perform no operation (NOP) in the 8085 microprocessor?
a. ADD
b. SUB
c. NOP
d. HLT
2. What is the purpose of the HLT instruction in the 8085 microprocessor?
a) Increment the accumulator value
b) Halt the processor and stop further execution
c) Load a data byte into the accumulator
d) Restart the microprocessor
3. Which RST instruction is used to call a predefined subroutine at memory location
0000h?
a) RST 0
b) RST 1
c) RST 5
d) RST 7

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Computer Organization & Architecture (4350701)

4. What does the RIM instruction do in the 8085 microprocessor?

a) Read a data byte from the memory
b) Reset the accumulator value to zero
c) Read the status of the interrupt enable flag (IE) into the accumulator
d) Set the interrupt enable flag (IE) to 1
5. The SIM instruction in the 8085 microprocessor is used to:
a) Simulate interrupt-driven operations
b) Store data from the accumulator to the memory
c) Enable the serial input/output mode
d) Set the interrupt enable flag (IE) using data from the accumulator
6. The purpose of the HLT instruction is to:
a) Halt the processor and stop all operations
b) Halt the processor for a specific time delay
c) Halt the processor until an interrupt occurs
d) Halt the processor and disable further interrupts
7. Which of the following instructions can generate a software interrupt in the 8085
microprocessors?
a) NOP
b) HLT
c) RST
d) IN
8. What is the size of the RST instruction in the 8085 microprocessor?
a) 1 byte
b) 2 bytes
c) 3 bytes
d) 4 bytes
9. Which interrupt instruction is used to call a predefined subroutine at memory location
0038h?
a) RST 0
b) RST 1
c) RST 5
d) RST 7

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Computer Organization & Architecture (4350701)

10. The purpose of the RIM instruction is to:

a) Reset the accumulator value to zero
b) Read the status of the interrupt mask from memory
c) Enable the interrupt mask
d) Set the interrupt enable flag (IE) to 1

K. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Computer Organization & Architecture (4350701)

Practical No. 08: Branching & Looping Instructions

1. List Branching and Looping instructions of 8085 with example and execute given programs
associated with said concept.

A. Objectives:
Understanding Control Flow: Introduce students to branching and looping instructions in
assembly language, enabling them to understand how these instructions alter the control
flow of the program.
Conditional Execution: Teach students how to use conditional branching instructions like
JMP, JZ, JNZ, JC, etc., to create decision-making structures and execute specific code blocks
based on certain conditions.
Loop Implementation: Provide hands-on experience in implementing loops using
instructions like DJNZ, LOOP, etc., to repeat a set of instructions multiple times, which is
crucial for executing repetitive tasks efficiently.
Enhanced Program Logic: Enable students to enhance program logic using branching and
looping constructs, making the programs more versatile and capable of handling diverse
scenarios.
Optimizing Code: Illustrate how to optimize code by using loops to reduce repetitive
instructions, leading to efficient memory utilization and faster program execution.
Understanding Assembly Language Constructs: Familiarize students with different assembly
language constructs like labels, jump instructions, and conditional flags, emphasizing their
role in creating structured programs.
Developing Efficient Code: Encourage students to design programs that minimize resource
usage, such as minimizing the number of instructions, avoiding unnecessary branches, and
ensuring proper loop termination.

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering specialization to
solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using
codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Engineering Tools, Experimentation and Testing (PO4): Apply modern engineering
tools and appropriate technique to conduct standard tests and measurements.
● Project Management (PO6): Use engineering management principles individually, as
a team member or a leader to manage projects and effectively communicate about
well-defined engineering activities.

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 Computer Organization & Architecture (4350701)

● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in
the context of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Develop Assembly Language programs involving Branching & Looping
Instructions’:
1. Programming skills.
2. Debugging skills.
3. Hardware Understanding

D. Relevant Course Outcomes (COs):

1. Perform Assembly language programming using 8085 Instruction Set.

E. Practical Outcomes:
1. Develop assembly language programs involving Input-Output Instructions in 8085
microprocessors.

F. Relevant Affective domain Outcomes (ADOs):

1. Appreciation for Low-level Programming.
2. Curiosity and Interest in Assembly Language.
3. Confidence in Programming.
4. Critical Thinking and Troubleshooting Skills.
5. Follow ethical practices

G. Prerequisite Theory:

Register
Instruction Addressin
Instruction Usage Transfer Brief Description
Size g Mode
Language

Jump Instructions

JMP PC ← Unconditional jump to the specified

JMP 3 bytes Direct
address address memory address

if (Z = 0)
JNZ Jump to the specified memory address if
JNZ then PC ← 3 bytes Direct
address zero flag (Z) is not set
address

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Computer Organization & Architecture (4350701)

if (Z = 1)
JZ Jump to the specified memory address if
JZ then PC ← 3 bytes Direct
address zero flag (Z) is set
address

if (CY = 0)
JNC Jump to the specified memory address if
JNC then PC ← 3 bytes Direct
address carry flag (CY) is not set
address

if (CY = 1)
JC Jump to the specified memory address if
JC then PC ← 3 bytes Direct
address carry flag (CY) is set
address

if (P = 0)
JPO Jump to the specified memory address if
JPO then PC ← 3 bytes Direct
address parity flag (P) is odd (0)
address

if (P = 1)
JPE Jump to the specified memory address if
JPE then PC ← 3 bytes Direct
address parity flag (P) is even (1)
address

if (S = 0)
JP Jump to the specified memory address if
JP then PC ← 3 bytes Direct
address sign flag (S) is positive (0)
address

if (S = 1)
JM Jump to the specified memory address if
JM then PC ← 3 bytes Direct
address sign flag (S) is negative (1)
address

Call Instructions

SP ← (SP -
CALL 1), (SP) ← Call the subroutine at the specified
CALL 3 bytes Direct
address (PC + 3), PC memory address
← address

if (Z = 0)
CNZ Call the subroutine at the specified
CNZ then CALL 3 bytes Direct
address memory address if zero flag (Z) is not set
address

if (Z = 1)
CZ Call the subroutine at the specified
CZ then CALL 3 bytes Direct
address memory address if zero flag (Z) is set
address

if (CY = 0) Call the subroutine at the specified

CNC
CNC then CALL memory address if carry flag (CY) is not 3 bytes Direct
address
address set

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Computer Organization & Architecture (4350701)

if (CY = 1)
CC Call the subroutine at the specified
CC then CALL 3 bytes Direct
address memory address if carry flag (CY) is set
address

if (P = 0) Call the subroutine at the specified

CPO
CPO then CALL memory address if parity flag (P) is odd 3 bytes Direct
address
address (0)

if (P = 1) Call the subroutine at the specified

CPE
CPE then CALL memory address if parity flag (P) is even 3 bytes Direct
address
address (1)

if (S = 0) Call the subroutine at the specified

CP
CP then CALL memory address if sign flag (S) is 3 bytes Direct
address
address positive (0)

if (S = 1) Call the subroutine at the specified

CM
CM then CALL memory address if sign flag (S) is 3 bytes Direct
address
address negative (1)

Return Instructions

PC ← (SP),
Return from the subroutine to the
RET RET SP ← (SP + 1 byte Direct
calling program
1)

if (Z = 0) Return from the subroutine to the

RNZ RNZ 1 byte Direct
then RET calling program if zero flag (Z) is not set

if (Z = 1) Return from the subroutine to the

RZ RZ 1 byte Direct
then RET calling program if zero flag (Z) is set

Return from the subroutine to the

if (CY = 0)
RNC RNC calling program if carry flag (CY) is not 1 byte Direct
then RET
set

if (CY = 1) Return from the subroutine to the

RC RC 1 byte Direct
then RET calling program if carry flag (CY) is set

Return from the subroutine to the

if (P = 0)
RPO RPO calling program if parity flag (P) is odd 1 byte Direct
then RET
(0)

Return from the subroutine to the

if (P = 1)
RPE RPE calling program if parity flag (P) is even 1 byte Direct
then RET
(1)

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 Computer Organization & Architecture (4350701)

Return from the subroutine to the

if (S = 0)
RP RP calling program if sign flag (S) is positive 1 byte Direct
then RET
(0)

Return from the subroutine to the

if (S = 1)
RM RM calling program if sign flag (S) is negative 1 byte Direct
then RET
(1)

H. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Processor: Dual Core
1. Computer System RAM: 4 GB
Operating System: Windows 7

2. GNU 8085 Simulator Software

I. Source code and Output:

Write an 8085-assembly language program to compare two numbers stored in the memory
location 0005H and 0006H. Clear the register B if both are equal, otherwise store FFh in the
register B.

Before Execution: After Execution:

[0005h]: _______ [B]: ____
[0006h]: _______
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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Write an 8085-assembly language program to transfer the entire block of eight bytes of data
to new memory location.

Before Execution: After Execution:

[0001h]: _______ [0005h]: ______ [0011h]: _______ [0015h]: ______
[0002h]: _______ [0006h]: ______ [0012h]: _______ [0016h]: ______
[0003h]: _______ [0007h]: ______ [0013h]: _______ [0017h]: ______
[0004h]: _______ [0008h]: ______ [0014h]: _______ [0018h]: ______
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an 8085-assembly language program to sum integers from 0 to 9. Store the result in
accumulator.

Before Execution: After Execution:

[A]: 00h [A]: _____
[C]: 0Ah [C]: _____
[B]: 00h [B]: _____
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program that takes an integer 'N' as input from memory location
0005h and then reads 'N' numbers from memory locations 0006h to (0006+N) h. The program
should compute the sum of these 'N' numbers and store the result in memory location 000Eh.

Before Execution: After Execution:

[0005h]: 07h [000Eh]: ____
[0006h]: _______ [000Ah]: _______ [000Fh]: ____ (Carry, If Any)
[0007h]: _______ [000Bh]: _______
[0008h]: _______ [000Ch]: _______
[0009h]: _______
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Develop an assembly language program that takes an integer 'N' as input from memory
location 0005h and calculates its factorial. The result should be stored in memory location
0006h.

Before Execution: After Execution:

[0005h]: ___________ [0006h]: __________
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program that reads an array of 'N' numbers from memory
locations 0001h to (0001+N-1) h. The program should classify each number as even or odd and
store the count of even numbers in memory location 000Dh and the count of odd numbers in
memory location 000Eh.

Before Execution: After Execution:

N:0AH
[000Dh]: _________
[0001h]: _______ [0006h]: ______
[000Eh]: _________
[0002h]: _______ [0007h]: ______

[0003h]: _______ [0008h]: ______

[0004h]: _______ [0009h]: ______

[0005h]: _______ [000Ah]: ______

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 Computer Organization & Architecture (4350701)

Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program that takes an array of 'N' numbers as input from memory
locations 0001h to (0001+N-1)h. The program should find the largest number in the array and
store it in memory location 000Dh.

Before Execution: After Execution:

N:0AH
[000Dh]: _________
[0001h]: _______ [0006h]: ______

[0002h]: _______ [0007h]: ______

[0003h]: _______ [0008h]: ______

[0004h]: _______ [0009h]: ______

[0005h]: _______ [000Ah]: ______

Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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 Computer Organization & Architecture (4350701)

Write an assembly language program to multiply numbers stored in memory location 2050h
and 2051h. Also take care of the overflow if there’s any while multiplication.

Before Execution: After Execution:

[0005h]: ________ [0008h]: __________
[0006h]: ________ [0009h]: _________ [If carry]
Source Code:

FLAGS
ADDRESS LABEL MNEMONICS COMMENTS
S Z AC P C

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Computer Organization & Architecture (4350701)

J. Practical related Quiz:

1. Which 8085 instruction is used for an unconditional jump?
a) JMP (b) JNZ (c) JNC (d) JPE
2. Which flag is checked by the JNC instruction to determine whether the jump will be
executed?
a) Zero flag (Z)
b) Carry flag (CY)
c) Sign flag (S)
d) Parity flag (P)
3. What is the purpose of the LOOP instruction in 8085 assembly language?
a) To execute a loop a specified number of times
b) To jump to a specified address unconditionally
c) To call a subroutine
d) To return from a subroutine
4. The JZ instruction in 8085 is used to jump if:
a) The zero flag is set
b) The carry flag is set
c) The parity flag is set
d) The sign flag is set
5. Which flag is checked by the JNC instruction to determine whether the jump will be
executed?
a) Zero flag (Z)
b) Carry flag (CY)
c) Sign flag (S)
d) Parity flag (P)

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6. What does the RST instruction in 8085 do?

a) Restart the microprocessor
b) Return from a subroutine
c) Read and Set the Trap flag
d) Return from an interrupt routine
7. Which instruction is used to implement a loop in assembly language programming?
a) JMP (b) JZ (c) CALL (d) LOOP
8. The JPO instruction in 8085 is used to jump if:
a) The parity flag is set
b) The zero flag is set
c) The carry flag is set
d) The sign flag is set
9. How many RST instructions are available in the 8085-instruction set?
a) 4 (c) 5
b) 6 (d) 7
10. What is the function of the CALL instruction in 8085 assembly language?
a) Call a subroutine
b) Return from a subroutine
c) Jump to a specified address
d) Restart the microprocessor
11. The JC instruction in 8085 is used to jump if:
a) The zero flag is set
b) The carry flag is set
c) The parity flag is set
d) The sign flag is set
12. The RZ instruction in 8085 is used to:
a) Return if Zero
b) Return if Not Zero
c) Return from Zero
d) Return from Not Zero
13. Which flag is checked by the JPE instruction to determine whether the jump will be
executed?
a) Zero flag (Z) (c) Sign flag (S)
b) Carry flag (CY) (d) Parity flag (P)

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14. What is the purpose of the SIM instruction in 8085 assembly language?
a) Set the interrupt mask
b) Reset the interrupt mask
c) Save the interrupt mask
d) Load the interrupt mask
15. The instruction JC is used to:
a) Jump if the carry flag is not set
b) Jump if the carry flag is set
c) Jump if the zero flag is not set
d) Jump if the zero flag is set

K. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed programs/scripts
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed programs/scripts
Program correctly with approx. 70% requirements.
70 %
Completeness/ Poor (5-4 marks): Completed programs/scripts correctly
Correctness with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed programs/ scripts
correctly with less than 50% requirements.
Excellent (10-8 marks): The code is clean, well-organized and
well documented.
Adequate (7-6 marks): The code is fairly easy to read and
C2: understand and little documentation
Readability & 30 %
Comments Poor (5-4 marks): The code is readable only by someone who
knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The code is poorly organized and
very difficult to understand with no documentation

Total Marks for Practical = 0.7 * (Marks of C1) + 0.3 * (Marks of C2)

Signature with Date:

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Practical No. 09: Memory Hierarchy

1. Make a chart to represent all types of memory in Memory Hierarchy.

B. Objectives:
Classification of various types of memories based on their characteristic and working.

C. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering
specialization to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems
using codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Project Management (PO6): Use engineering management principles individually,
as a team member or a leader to manage projects and effectively communicate
about well-defined engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating
in the context of technological changes in field of engineering.

D. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Select proper memories based on requirement.’
1. Memory concepts and its hierarchy.
2. Various types of memories working and construction principles.
3. Selection of proper memory based on requirement.

E. Relevant Course Outcomes (COs):

1. Characterize need of various Memory types in hierarchy

F. Practical Outcomes: Apply proper memory based on requirement.

1. Memory classifications and Memory Hierarchy
2. Main Memory and RAM, ROM, PROM, EPROM
3. Auxiliary Memory
4. Associative Memory
5. Cache Memory
6. Virtual memory

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G. Relevant Affective domain Outcomes (ADOs):

1. Classification of memory based on construction and working.
2. Selection of memory based on application.

H. Prerequisite Theory:
Hardware fundamentals of storage element, bit, Nibble, Byte, word etc.

I. Resources Required:
Sr.
Instrument /Components Configuration/Specification
No
Chart, Display Board, Model or module of various types of memories for Learners to get
1.
familiar with various types of memories their construction and working.

J. Learner Centric Activities and Outcome:

● Compare all types of Memory in details.

Sr. COMPARISION PRIMARY SECONDARY

CACHE REGISTER
No. PARAMETERS MEMORY MEMORY

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● Prepare chart to represent all types of memory in Memory Hierarchy.

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● Collect various types of Discs and make a Chart with Explanation.

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K. Assessment Rubrics:
Learner’s outcome in form of Poster/PPT/Chart/Demo of Memory module
% of
Criteria Rubrics Marks
point
Excellent (10-8 marks): Completed poster/ppt/chart
correctly as per the requirements.
C1: Adequate (7-6 marks): Completed poster/ppt/chart
Completeness correctly with approx. 70% requirements.
40 %
and Correctness Poor (5-4 marks): Completed poster/ppt/chart correctly
of outcome with 70% - 50% requirements.
Unsatisfactory (0-3 marks): Completed poster/ppt/chart
correctly with less than 50% requirements.
Excellent (10-8 marks): The Outcome is clean, well-
organized and well documented.
C2: Creativity, Adequate (7-6 marks): The Outcome is fairly easy to read
Conciseness and understand and little documentation
and clarity of 60 %
Poor (5-4 marks): The Outcome is readable only by someone
outcome
who knows what it is supposed to be doing.
Unsatisfactory (0-3 marks): The Outcome is poorly organized
and very difficult to understand with no documentation

Total Marks for Practical = 0.4 * (Marks of C1) + 0.6 * (Marks of C2)

Signature with Date:

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Practical No. 10: Associative Memory

1. Paraphrase Associative Memory in detail.

B. Objectives:
Understanding Associative Memory: Gain an understanding of associative memory, a
type of computer memory that allows the system to perform high-speed searches based
on content rather than addresses.
Familiarity with Content Addressable Memory (CAM): Explore the concept of Content
Addressable Memory (CAM), which enables retrieval of data based on its content rather
than its physical address.
Working Principle of Associative Memory: Learn about the working principle of
paraphrasing associative memory, where a partial match of data with its paraphrased
version is considered a successful search.
Understanding Associative Memory Architecture: Study the architecture of associative
memory, including word lines, bit lines, match lines, and parallel comparison of data.
Optimization Techniques: Investigate optimization techniques to enhance the speed
and efficiency of the paraphrasing associative memory.

C. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering
specialization to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems
using codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Project Management (PO6): Use engineering management principles individually,
as a team member or a leader to manage projects and effectively communicate
about well-defined engineering activities.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating
in the context of technological changes in field of engineering.

D. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Examine computer architecture’:
1. Competency in understanding microprocessor architecture & Various Memories:
Students will gain a solid understanding of how different types of memory devices
work and when to use which type of memory.

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E. Relevant Course Outcomes (COs):

1. Characterize need of various Memory types in hierarchy.

F. Practical Outcomes:
1. Understanding of Associative Memory Concepts: Students will gain a clear
understanding of associative memory and its functioning as a content-addressable
memory, enabling high-speed data retrieval based on content matching.
2. Knowledge of Associative Memory Architecture: Students will learn about the
architecture of associative memory, including word lines, bit lines, and match lines, as
well as the mechanism of parallel data comparison.

G. Relevant Affective domain Outcomes (ADOs):

1. Enhanced Appreciation for Memory Systems
2. Curiosity and Inquisitiveness
3. Sense of Achievement
4. Passion for Technology.
5. Awareness of Real-world Relevance

H. Prerequisite Theory:
o Digital Logic: Understanding digital logic gates, Boolean algebra, and basic digital Basic
Computer Architecture: Students should have a solid understanding of the basic
architecture of a computer, including the CPU, memory units, and data storage.
o Binary Number System: Proficiency in the binary number system is essential, as
memory addresses and data representation in computer systems are based on binary
digits.
o Logic Gates and Boolean Algebra: Knowledge of logic gates (AND, OR, NOT) and
Boolean algebra is necessary to comprehend the fundamental building blocks of digital
circuits.
o Memory Hierarchy: Familiarity with the memory hierarchy, including cache, primary
memory (RAM), and secondary memory (hard disk, SSD), is important to grasp the role
of associative memory in the memory hierarchy.
o Data Representation: Understanding how data is represented in different formats
(e.g., binary, hexadecimal, decimal) is crucial for working with data in memory units.
o Pattern Matching Techniques: Basic knowledge of pattern matching techniques and
algorithms can aid in understanding how associative memory performs searches
based on content matching.
o Digital Circuits and Logic Design: A grasp of digital circuits and logic design is beneficial
for comprehending the underlying hardware implementation of associative memory
units.

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I. Explain working of Associative Memory in brief with neat diagram.

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J. Practical related Quiz:

1. What is the primary purpose of the Associative Memory in computer systems?
a) To store data in a sequential manner
b) To enable high-speed content-based data retrieval
c) To perform arithmetic and logical operations
d) To manage input and output devices
2. Which type of memory allows the system to perform high-speed searches based on
content rather than addresses?
a) Random Access Memory (RAM)
b) Read-Only Memory (ROM)
c) Content Addressable Memory (CAM)
d) Cache Memory
3. In associative memory, what is considered a successful search?
a) Exact match of data with its stored version
b) Partial match of data with its paraphrased version
c) A match of the memory address with the data content
d) Retrieval of data based on the least significant bit (LSB)
4. Which of the following is a fundamental building block of associative memory used
for parallel comparison of data?
a) Word line c) Match line
b) Bit line d) Clock signa
5. What advantage does associative memory offer over traditional memory systems
like RAM?
a) Lower cost and higher storage capacity
b) Faster access and retrieval speed based on data content
c) More reliable and durable storage of data
d) Reduced power consumption and heat generation

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K. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (90-100%): Thorough understanding and precise
explanation with accurate and comprehensive
information.
Adequate (70-89%): Good understanding with accurate
C1:
presentation, covering essential aspects.
Content & 50 %
Accuracy Needs Improvement (50-69%): Basic understanding with
noticeable inaccuracies or missing details.
Insufficient (Below 50%): Significant lack of understanding
with major inaccuracies or misunderstandings.
Excellent (90-100%): Insightful analysis and logical
reasoning with coherent and well-developed arguments.
Adequate (70-89%): Reasonable analysis with logical flow
and coherent arguments, though lacking depth.
C2:
30 % Needs Improvement (50-69%): Limited analysis or logical
Analysis & Logic
flaws, requiring improvement in depth and coherence.
Insufficient (Below 50%): Lack of analysis or significant
logical flaws, indicating insufficient understanding or
effort.
Excellent (90-100%): Clear and concise writing with
effective use of language and appropriate terminology.
Adequate (70-89%): Mostly clear with occasional
ambiguity, utilizing language appropriately.
C3:
Clarity & 20 % Needs Improvement (50-69%): Lack of clarity and
Presentation confusing expression, requiring improvement in language
usage.
Insufficient (Below 50%): Poor clarity and confusing
expression, indicating significant issues in language and
presentation.
Total Marks for Practical = 0.5 * (Marks of C1) + 0.3 * (Marks of C2) + 0.2 * (Marks of C3)

Signature with Date:

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Practical No. 11: Input-Output

1. Differentiate Programmed I/O and Interrupt initiated I/O in detail.

A. Objectives:
Visualize CPU-I/O Communication

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering specialization
to solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems
using codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating
in the context of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Visualize CPU-I/O Communication.’
1. In depth knowledge of Programmed I/O and Interrupt initiated I/O.
2. Comparison of Programmed I/O and Interrupt initiated I/O in detail.

D. Relevant Course Outcomes (COs):

1. Visualize CPU-I/O Communication and working.

E. Practical Outcomes: Apply proper memory based on requirement.

1. CPU internal and external communication with peripherals.

F. Relevant Affective domain Outcomes (ADOs):

1. Exposure to various I/O interfaces.
2. Execution of CPU communication with peripherals in programmed I/O mode
3. Execution of CPU communication with peripherals with Interrupt initiated I/O.

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G. Prerequisite Theory:
Hardware fundamentals related to various I/O interface and data communication
fundamentals are Required:
Sr.
Instrument /Components Configuration/Specification
No
1. Validate CPU-I/O Communication and working in programmed and interrupt driven mode.

H. Differentiate Interrupt Initiated I/O v/s Programmed I/O:

Programmed I/O Interrupt initiated I/O

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Programmed I/O Interrupt initiated I/O

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I. Assessment Rubrics:

% of
Criteria Rubrics Marks
point
Excellent (90-100%): Thorough understanding and precise
explanation with accurate and comprehensive
information.
Adequate (70-89%): Good understanding with accurate
C1:
presentation, covering essential aspects.
Content & 50 %
Accuracy Needs Improvement (50-69%): Basic understanding with
noticeable inaccuracies or missing details.
Insufficient (Below 50%): Significant lack of understanding
with major inaccuracies or misunderstandings.
Excellent (90-100%): Insightful analysis and logical
reasoning with coherent and well-developed arguments.
Adequate (70-89%): Reasonable analysis with logical flow
and coherent arguments, though lacking depth.
C2:
30 % Needs Improvement (50-69%): Limited analysis or logical
Analysis & Logic
flaws, requiring improvement in depth and coherence.
Insufficient (Below 50%): Lack of analysis or significant
logical flaws, indicating insufficient understanding or
effort.
Excellent (90-100%): Clear and concise writing with
effective use of language and appropriate terminology.
Adequate (70-89%): Mostly clear with occasional
ambiguity, utilizing language appropriately.
C3:
Clarity & 20 % Needs Improvement (50-69%): Lack of clarity and
Presentation confusing expression, requiring improvement in language
usage.
Insufficient (Below 50%): Poor clarity and confusing
expression, indicating significant issues in language and
presentation.
Total Marks for Practical = 0.5 * (Marks of C1) + 0.3 * (Marks of C2) + 0.2 * (Marks of C3)

Signature with Date:

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Practical No. 12: CPU-IOP Communication

1. List steps to carryout CPU-IOP Communication.

A. Objectives:
Visualize CPU-IOP Communication

B. Relevant Program Outcomes (POs):

● Basic and Discipline specific knowledge (PO1): Apply knowledge of basic
mathematics, science and engineering fundamentals and engineering specialization to
solve the engineering problems.
● Problem analysis (PO2): Identify and analyse well-defined engineering problems using
codified standard methods.
● Design/development of solutions (PO3): Design solutions for engineering well-
defined technical problems and assist with the design of systems components or
processes to meet specified needs.
● Life-long learning (PO7): Ability to analyse individual needs and engage in updating in
the context of technological changes in field of engineering.

C. Competency and Practical Skills:

This practical is expected to develop the following skills for the industry-identified
competency ‘Visualize CPU-IOP Communication.’
1. Validation of CPU-IOP Communication.

D. Relevant Course Outcomes (COs):

1. Visualize CPU-I/O Communication and working.

E. Practical Outcomes: Apply proper memory based on requirement.

1. CPU internal and external communication with peripherals.

F. Relevant Affective domain Outcomes (ADOs):

1. Exposure to need of IOP.
2. Explain CPU-IOP Communication.

G. Prerequisite Theory:
Hardware fundamentals related to various I/O interface and data communication
fundamentals are Required:
Sr.
Instrument /Components Configuration/Specification
No
Validate CPU-I/O Communication and working in programmed and interrupt
1.
driven mode.

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H. Draw sequence of CPU-IOP Communication:

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I. Assessment Rubrics:
% of
Criteria Rubrics Marks
point
Excellent (90-100%): Thorough understanding and precise
explanation with accurate and comprehensive
information.
Adequate (70-89%): Good understanding with accurate
C1:
presentation, covering essential aspects.
Content & 50 %
Accuracy Needs Improvement (50-69%): Basic understanding with
noticeable inaccuracies or missing details.
Insufficient (Below 50%): Significant lack of understanding
with major inaccuracies or misunderstandings.
Excellent (90-100%): Insightful analysis and logical
reasoning with coherent and well-developed arguments.
Adequate (70-89%): Reasonable analysis with logical flow
and coherent arguments, though lacking depth.
C2:
30 % Needs Improvement (50-69%): Limited analysis or logical
Analysis & Logic
flaws, requiring improvement in depth and coherence.
Insufficient (Below 50%): Lack of analysis or significant
logical flaws, indicating insufficient understanding or
effort.
Excellent (90-100%): Clear and concise writing with
effective use of language and appropriate terminology.
Adequate (70-89%): Mostly clear with occasional
ambiguity, utilizing language appropriately.
C3:
Clarity & 20 % Needs Improvement (50-69%): Lack of clarity and
Presentation confusing expression, requiring improvement in language
usage.
Insufficient (Below 50%): Poor clarity and confusing
expression, indicating significant issues in language and
presentation.
Total Marks for Practical = 0.5 * (Marks of C1) + 0.3 * (Marks of C2) + 0.2 * (Marks of C3)

Signature with Date:

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