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Conte - : Accumlador Andandku - ST Egster As Meùn Ogin

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0% found this document useful (0 votes)
42 views5 pages

Conte - : Accumlador Andandku - ST Egster As Meùn Ogin

Uploaded by

Aditya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Intel 8051 Microarchitecture P2.0- P2.7


PO.0-PO.7

Vco
Port 0 Porn 2
Drivers
Drwers
Vss

--
RAM Addr Port Port 2 EPROM!
RAM ROM
Register atc Latch

Program
Address
ACC SLack Regster
| Ponter

B TMP2 TMP1 Butfer


|Register
PC
Intemupt, Señal Pon, Incrementer
ALU and Timer Blocks

Renster PSW Program


Counter
PSEN+
ALEIPROGE Tming
DPTR
EAAIVPP Control
RST

Port 1 Porn 3
Latch Latch

Port 1 Pon 3
OSC. Dvers Drivers

TAL HOH KTALZ

P1.0-P1.7 P3.0-P3.7

1. Oscillator and clock generator:


All operations in a microcontroller are synchronized by the help of an oscillator clock.
The oscillator clock generates the clock pulses by which all internal operations are synchronized.
A resonant network connected through pins XTAL1 and XTAL2 forms up an oscillator. For this
purpose a quartz crystal and capacitors are employed. The crystal run at specified maximum
and minimum frequencies typically at 1 MHz to 16 MHz.
2. ALU:

It is 8 bit unit. It performs arithmetic operation as addition, subtraction, multiplication,It


EX-OR.
division, increment and decrement. It performs logical operations like AND, OR and
manipulates 8 bit and 16 bit data. It calculates address of jump locations in relative branch
instruction. It performs compare, rotate and compliment operations. It consists of Boolean
contains 34
processor which performs bit, set, test, clear and compliment. 8051 micro controller
registers A &B and 32
general purpose registers or working registers.2 of them are called math
are bank of registers.
a. Accumulator(A-reg):
It is 8 bit register. Its address is EOH and it is bit and byte accessible. Result of arithmetic
& logic operations performed by ALU is accumulated by this register. Therefore it is called
accumulator register. It is used to store 8 bit data and to hold one of operand of ALU units
during arithmetical and logical operations. Most of the instructions are carried out on
accumulator data. It is most versatile of 2CPU registers.
b. B-register:
It is special 8 bit math register. It is bit and byte accessible. It is used in conjunction with
A register as I/P operand for ALU. It is used as general purpose register to store 8 bit data.
c. PSW:
It is 8 bit register. Its address is DOH and It is bit and byte accessible. It has 4 conditional
flags or math flags which sets or resets according to condition of result. It has 3 control flags, by
setting or resetting bit required operation or function can be achieved. The format of flag
register is as shown below:
d. FLAG:
1. CarryFlag(CY): During addition and subtraction any carry or borrow is generated then
carry flag is set otherwise carry flag resets. It is used in arithmetic, logical, jump, rotate
and Boolean operations.
2. Auxiliary carry flag(AC): If during addition and subtraction any carry or borrow is
generated from lower 4 bit to higher 4 bit then AC sets else it resets. It is used in BCD
arithmetic operations.
3.Overflow flag(OV): If in signed arithmetic operations result exceeds more than 7 bit
than OV flag sets else resets.It is used in signed arithmetic operations only.
4. Parity flag(P): If in result, even no. Of ones "1" are present than it is called even parity
and parity flag sets. In result odd no. Of ones "1"are present than it is called odd parity
and parity flag resets.

ii. CONTROL FLAGS:


1. FO: It is user defined flag. The user defines the function of this flag. The user can set
,test n clear this flag through software.
2. RS1 and RSO: These flags are used to select bank of register by resetting those flags
which are as shown in table
3. Program counter (PC): The Program Counter (Pc) is a 2-byte address which tells the
8051 where the next instruction to execute is found in memory. It is used to hold 16 bit
address of internal RAM, external RAM or external ROM locations. When the 8051 is
initialized PC always starts at 000oh and is incremented each time an instruction is
executed. It is important to note that PC isnt always incremented by one and never
decremented.
4. Data pointer register (DTPR): It isa16 bit register used to hold address of external or
internal RAM where data is stored or result is to be stored. It is used to store 16 bit data.
It is divided into2- 8bit registers, DPH-data pointer higher order (83H) and DPL-data
pointer lower order (82H). Each register can be used as general purpose register to store
8 bit data and can also be used as memory location. DPTR does not have single internal
address. It functions as Base register in base relative addressing mode and in-direct
jump.
5. Stack pointer (SP): It is 8-bit register. It is byte addressable. Its address is 81H. It is
used to hold the internal RAM memory location addresses which are used as stack
memory. When the data is to be placed on stack by push instruction, the content of
stack pointer is incremented by 1, and when data is retrieved from stack, content of
stack of stack pointer is decremented by 1.

ii. Special function Registers(SFR): The 8051 microcontroller has 11 SFR divided in 4 groups:
A. Timer/Counter register: 8051 microcontroller has 2-16 bit Timer/counter registers called
Timer-reg-TOAnd Timer/counter Reg-T1.Each register is 16 bit register divide into lower and
higher byte register as shown below: These register are used to hold initial no. of count. All of
the 4 register are byte addressable.
1. Timer control register: 8051 microcontroller has two 8-bit timer control register ie.
TMOD and TCON register. TMOD Register: it is &-bit register. Its address is 89H. It is byte
addressable. used to select mode and control operation of time by writing control
word.
2. TCON register: It is 8-bit register. Its address
88H. It is byte addressable. Its MSB 4
bit are used to control operation of timer/ counter and LSB 4-bit are used for external
interrupt control.
B. Serial data register: 8051 micro controller has 2 serial data register viz. SBUF and SCON.
1. Serial buffer register (SBUF): it is 8-bit register. It is byte addressable .Its address is
99H. It is used to hold data which is to be transferred serially.
2. Serial control register (SCON): it is 8-bit register. It is bit/byte addressable. Its address
is 98H.The &-bit loaded into this register controls the operation of serial communication.
C. Interrupt register: 8051 uC has 2 8-bit interrupt register.
1. Interrupt enable register (|E): it is 8-bit register. It is bit/byte addressable. Its address
is A8H.it is used to enable and disable function of interrupt.
2. Interrupt priority register (IP): It is 8-bit register. It is bit/byte addressable. Its address
is B8H. it is used toselect low or high level priority of each individual interrupts.
D. Power controlregister (PCON): it is 8-bit register. It is byte addressable Its address is 87H,Its
bits are used to control mode of power saving circuit, either idle or power down mode and also
one bit is used to modify baud rate of serial communication.
design.
Internal RAM
See 8051 hardware for further internal RAM 00h
128-byte. address
Internal RAM has memory distinct areas: 32 bytes working registers from 128
three altogether
Internal RAM is organized into occupies RAM byte address
20h to 2Fh,
addressable
to 1Fh 16 bytes bit purpose RAM from 30h to
7Fh.
addressable bits General
Internal ROM
memory both are in different physical memory but
code OFFFh. PC
Data memory and program ROM occupied addresses from 0000h to
addresses. An internal 0FFFh that
both have the same
0000h to OFFFh. Program addresses higher than bytes from
addresses program codes from architecture to fetch codes
internal ROM capacity will cause 8051
exceed the
external program memory.

Structure (lower address space)


28 bytes of Internal RAM
7FH General
Purpose 80 bytes
Area
30H 128
Bit No. of Bits = 16 x 8 =
2FH 7FH
Address
bytes Bit address 00H -
Area
20H
1FH Register
Bank-3
18H
17H
Register
Bank-2
10H
OFH 32 byles = 8 x 4 byes
Register
Bank-1
08H
07H
RI
Regisler
Bank-0

0OH

Structure
Fig 5.3: lnternal RAM
one byte each. A
separate banks. Each register bank has 8 registers of
The lower 32 bytes are divided into 4 register. Next 16bytes are bit
depending upon two bank select bits in the PSW
register bank isselected

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