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Chapter 1 - BJT

This document provides an overview of the bipolar junction transistor (BJT) including its structure, operation, configurations, characteristic curves, and DC biasing methods. It discusses the NPN and PNP transistor structures and how current flows between the emitter, base, and collector terminals. The common emitter, common base, and common collector amplifier configurations are introduced along with their input and output characteristics. Three DC biasing circuits - base bias, collector feedback bias, and voltage divider bias - are covered through analysis of their equivalent circuits. Sample circuits are analyzed to determine their operating points and load lines.
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0% found this document useful (0 votes)
66 views105 pages

Chapter 1 - BJT

This document provides an overview of the bipolar junction transistor (BJT) including its structure, operation, configurations, characteristic curves, and DC biasing methods. It discusses the NPN and PNP transistor structures and how current flows between the emitter, base, and collector terminals. The common emitter, common base, and common collector amplifier configurations are introduced along with their input and output characteristics. Three DC biasing circuits - base bias, collector feedback bias, and voltage divider bias - are covered through analysis of their equivalent circuits. Sample circuits are analyzed to determine their operating points and load lines.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Chapter 1:

Bipolar Junction Transistor (BJT)


Dr. Pham Nguyen Thanh Loan

October, 2022
Contents
2

 Structure and operation of BJT


 Different configurations of BJT
 Characteristic curves
 DC biasing method and analysis
 Base bias
 Collector-feedback bias
 Voltage divider bias
 AC signal analysis
 Impact of other parameters (temperature, leakage
currents)
The content of these slides are based on the book titled “Electronics Devices and Circuit theory of
Robert Boylestad”
Structure and operation of BJT
3

❖BJT structure
 BJT :Bipolar Junction Transistor
 2 kinds of BJT: NPN & PNP
 3 terminals: E, B và C
 E: Emitter; B: Base, C: Collector
 Base located in the middle:
thinner than E & C; and lower
dope
Structure and operation of BJT
4

❖ Bias condition for 2 junctions: JBE & JBC


 Junction BE in forward bias: electrons
(e) move from E region to B region to
create the current IE (diffusion current;
flow of majority carriers)
 Junction BC in reverse bias: e that
moved from E to B then move from B to
C to create the current IC (drift current,
flow of minority carriers)
 The combination of some electrons with
holes in B region creates the current IB
 So: IE = IC + IB
Structure and operation of BJT
5

 3 terminals: B, E và C
❖BJT symbol
 Arrow instructs the current
IC
direction between B & E
 Conventional current is the
IB flow of positive charges
IE (holes)
 NPN: B → E
 PNP: E → B
❖Explain the symbol of BJT?
Technical parameters
6

 IC = αIE + ICBO
⚫ IE = IC + IB

⚫ IC = βIB  IC ≈ αIE (neglect leakage ICBO)

⚫ β = 100 ÷ 200 (may be higher)  α = 0.9 ÷0.998.

⚫ β is DC current gain  α is DC current transfer coefficient


=
 +1
BJT as an amplifier
Different amplifier configurations
7

 3 configurations
 Common emitter (CE)
 Common base (CB)
 Common collector (CC)
 Look at the input and output to distinguish these
configurations

Configuration Input Output


BC E C
EC B C
CC B E
BJT as an amplifier
8

 CE with voltage  CC with voltage  CB with fixed


divider biasing divider biasing biasing

C
C
B B

E E
CE configuration
9

 E is used in common for


in and out
 Input: re is considered as
AC resistor of diode BE
re=26mV/IE
 Output: Ic= βIb

❖ Definition of internal emitter re:

9
CE configuration – small signal
10

 Zi = Ube/Ib ≈ βIbre/Ib ≈ βre


(~ n100Ω – nKΩ)
 Zo = r o → ∞

(ignore in re model)
 Av = - RL/re (ro→ ∞)

 Ai = Ic/Ib = β

 Characteristics
+ Zi, Zo average
+ Av, Ai high

10
Characteristic curves: CE
11
 Input and output characteristic curves of CE configuration

❖Explain why VCE increases, IB decreases for a constant VBE?

11
Characteristic curves: CE
12

 0<VCE<0.7V: Junction BE
starts moving to forward
bias→ IC increases gradually
 VCE >0.7V: Junction BE is in
FB and Junction BC in reverse
→ IC = β*IB
CB configuration
13

 B is used in common for


in and out
 Input: re is considered as
AC resistor of diode BE
re=26mV/IE
 Isolation between in and
out
 Output: Ic=αIe

13
CB configuration
14

1) Z i = re (nΩ-50 Ω)
2) Zo = ro ≈ ∞ (nMΩ)
3) Av = αRL/re ≈ RL/re quite big, Uo & Ui in phase
4) Ai = -α ≈ 1
14
Characteristic curves: CB
15
 Input and output characteristic curves of CB configuration
CC configuration
16

 Similar to CE configuration
 Refer to Electronic Devices – Thomas Floyd

16
Limits of operation
17

 Two limits:
 cut-offregion
 Saturation region
Cutoff and saturation
18

 Cutoff state  Saturation state


DC loadline & Q point
19

❖ Q_point deplacement when Rc, Vcc, IB vary respectively

Variation of RC Variation of VCC Variation of IB

19
DC power vs. AC signal
20

DC power AC signal
Example of CE configuration
21

❖ Output and input signal is out of phase


❖ Output signal is amplified
22

DC bias:
DC operating point & DC load line
DC bias
23

 A transistor must be properly biased in order to operate as


an amplifier

 DC bias can be considered as supply power to BJT so that


◼ NPN: VE < VB < VC (JE: in Forward; JC: in Reverse bias)
◼ PNP: VE > VB > VC

 DC bias is characterized by Q-point (DC operating point)


and DC load line
DC bias
24

 NOTES: REMEMBER some equations:


VBE ≈ 0,6 ÷ 0,7V (Si) ; 0,2 ÷ 0,3(Ge)
IE = IC + IB IC = βIB IC ≈ αIE
 There 3 types of bias circuits
 Base bias
 Collector-feedback bias
 Voltage divider bias

 Question: How many amplifier circuits can be


designed?
3 types of baising
25

Base bias Voltage divider bias

Collector feedback bias


Example of DC bias
26

 Q1. What are the amplifier configuration of these circuits?


 Q2. What kind of DC bias? And then draw DC equivalent circuit.
(a) (b) (c)

 Question 3: How many amplifier circuits can be designed?


Base bias
27

 Consider the analysis for only EC configuration (similar


analysis can be obtained for BC and CC)
Base bias
28

BE loop:
Vcc – IBRB – UBE = 0
➔ IB= (Vcc - UBE)/RB
IC=β*IB
CE loop:
➔ UCE = Vcc - ICRC
Voltage divider bias
29

Method 1: Thevenin equivalent circuit:


* Group R1, R2 and Vcc can be considered as
follows:
RBB=R1//R2
VBB= Vcc * R2/(R1+R2)
➔ Now it is similar to base-bias
analysis

Current and voltage do not Method 2: Approximative analysis


depend on β
If β*R2 ≥ 10R2 -> I2 ≈ I1
 VB=Vcc*R2/(R1+R2)

 VE=VB-VBE ➔ Ic ≈ IE=VE/RE

 VCE=Vcc- IC(RC+RE)
Collector-feedback bias
30

BE loop:
(1) Vcc- Ic‘ RC – IBRB – UBE – IERE =0
(2) IC= β *IB ; IE  IC
(3) KCL at C: IC= IB + Ic‘ → Ic‘ = IC - IB
= (β-1)IB
(1)+(2)+(3)
→ IB= (Vcc - UBE)/[RB+ β(Rc+Re)]

CE loop:
UCE = Vcc – IC (RC+RE)
Quite stable
Example 1
31

❖Analyze the following circuit and then determine its Q-


point and DC loadline?
Example 1 (cont’d)
32
Example 2
33

❖Analyze the following circuit and then determine its Q-point


and DC loadline?
Example 2 (cont’d)
Analysis by method 1
34
Homework
35

❖Analyze the following circuit and then determine its Q-point


and DC loadline?
Homework
36

❖Analyze the following circuit and then determine its Q-point


and DC loadline?
Homework
37

❖Analyze the following circuit and then determine its Q-point


and DC loadline?
38

Working on your
1st in-class assignment
39

AC analysis
(Small signal analysis)
40
Small signal analysis
 Small signal analysis:
 Small signal refers to AC signal with small amplitude that take up
a relatively small percentage of an amplifier’s operation range
(compared to DC power supply)
 The operation region on amplifier should be in linear
 BJT model for small signal analysis
 Represent the BJT by an equivalent circuit that allows to visualize
and analyze the operation of BJT as an amplifier
Example of CE configuration
41

❖ Output and input signal is out of phase


❖ Output signal is amplified
Gain and impedances
42
AC equivalent circuit
43

 1. Setting all DC sources to zero


 2. Replacing all capacitors by a
short-circuit equivalent (wire)
 3. Regrouping all elements
(resistors) in parallel (introduced
by step 1 and 2)
 4. Redrawing the network in a
more convenient and logical form
AC analysis
44

 BJT amplifier is considered linear → be able to be


analyzed DC and AC separately (using
superposition theorem)
 Different approaches
 Using graphical determination method
 Using equivalent circuits
◼T model
◼ rE model
◼ Hybrid equivalent model (quite popular in the past)
AC analysis methods

Graphical Analysis
45

❖ Q-point and DC load-line


 Quiescent point (Q-point) is fixed on the output characteristic curve
and corresponding to a fixed collector-to-emitter voltage (VCE)
 DC load-line is used to describe the DC operation of BJT, a straight
line from saturation point (IC=ICmax, y-axe) to cutoff point
(VCE=VCEmax, x-axe)
➔ Q-point : intersect between DC load line and
characteristic curve
❖ DC load line vs. AC load line
 DC load line: VCE = VCC – ICRC
 AC load line: VCE = VCC - Ic(RC//RL)
AC analysis methods

Graphical determination
46

❖ Input and output characteristic curves of EC config.


46
AC load line determination
47

AC load line
(Slope_AC: 1/(Rc //Rtai)

DC load line
(slope= 1/Rc)

Q N

❖ AC loadline is steeper than DC loadline


❖Graphically: ON = OQ + QN where QN = IC-Q/Slope_AC =
IQ*(Rc//Rtai)
❖ A straight line through Q_point and N : AC load line
AC analysis methods

Graphical determination
48

❖ Q_point deplacement when Rc, Vcc, IB vary respectively

Variation of RC Variation of VCC Variation of IB

48
AC analysis methods

Graphical determination
49

 Basing on input and output characteristic curves→ determine


small signal input and output waveform
49
AC analysis methods

Graphical determination
50

 Δvbe → Δib
 Δvce → Δic
 Ai = io/ii = Δic/Δib
 AV = vo/vi = Δvce/Δvbe
 Zin = vi/ii = Δvbe/Δib
 Zout = vo/io = Δvce/Δic

50
AC analysis methods

Graphical determination
51

❖ Impact of Q point on AC output


signal
 Q closed to cutoff → BJT is closed to
OFF operation, with a very small AC
input amplitude → output voltage is
distorsed (is cut) at upper-part
 Q closed to saturation → BJT is
closed to saturation operation, with a
very small AC input amplitude →
output volage is distorsed (is cut) at
lower-part
 Large-signal may be cut at upper and
lower part
AC analysis
52

 BJT amplifier is considered linear → be able to be


analyzed DC and AC separately (using
superposition theorem)
 Different approaches
 Using graphical determination method
 Using equivalent circuits
◼T model
◼ rE model
◼ Hybrid equivalent model (quite popular in the past)
Two-port model
53

❖ Most used for small signal analysis


❖ Characterized by 2 input terminals and 2 output terminals (4
-terminals model)
❖ The common terminal is used for input and output
Remind: AC equivalent circuit
54

 1. Setting all DC sources to zero


 2. Replacing all capacitors by a
short-circuit equivalent (wire) `
`
 3. Regrouping all elements
(resistors) in parallel (introduced `
by step 1 and 2)
 4. Redrawing the network in a
more convenient and logical
form
Remind: AC equivalent circuit
55

❖ Equivalent circuit ❖ Equivalent circuit


after step 1 and 2 after step 3 and 4

?????????
?????????
AC analysis
56

 BJT amplifier is considered linear → be able to be


analyzed DC and AC separately (using
superposition theorem)
 Different approaches
 Using graphical determination method
 Using equivalent circuits
◼ rEmodel
◼ Hybrid equivalent model (quite popular in the past)
AC analysis methods

rE model
57

 BJT is modeled by a diode and current source


 Input : BE junction is characterized by a diode in Forward bias
 Output: dependent current source where controlled current is input current
that is expressed by Ic = βIb or Ic=αIe.
 3 configurations: EC; BC và CC

Common Base
(CE)
AC analysis methods

rE model
58

 BJT is modeled by a diode and current source


 Input : BE junction is characterized by a diode in Forward bias
 Output: dependent current source where controlled current is input current
that is expressed by Ic = βIb or Ic=αIe.
 3 configurations: EC; BC và CC
Common Emitter
(CE)
AC analysis methods

rE model
59

 BJT is modeled by a diode and current source


 Input : BE junction is characterized by a diode in Forward bias
 Output: dependent current source where controlled current is input current
that is expressed by Ic = βIb or Ic=αIe.
 3 configurations: EC; BC và CC
Common Collector
(CC)
AC analysis methods

rE model
60
❖ EC ❖ BC ❖ CC

e c
c c

b e
e 60
AC analysis methods

rE model
61

❖Refer to T model as learnt in Electronics Devices Course➔


Determine Rin & Iout =f(Iin) to obtain re model
❖ EC ❖ BC ❖ CC
e c
c c

b e
e
Input: ib, vb Input: ie, ve Input: ib, vb
Output: ic, vc Output: ic, vc Output: ie, ve
Rin = vb/ib = βre Rin = ve/ie = re Rin = vb/ib = βre
iout = ic = βi = βib iout = ic = αiin = αie
AC analysis methods

Hybrid equivalent model


62

 U & I relation: Iv Ir

Ui=h11Ii+h12Uo Uv 2 ports Ur

Io=h21Ii+h22Uo
 hij is determined at a given operating point (can be
different from Q_point)
 Index e (or b, c) illustrated for CE topology (or CB, CC)

 Hybrid parameters for 2N4400


AC analysis methods

Hybrid equivalent model


63

Parameters EC BC CC
h11 (hi) 1kΩ 20Ω 1kΩ
h12 (hr) 2,5x10-4 3x10-4 ≈1
h21 (hf) 50 -0,98 -50
h22 (ho) 25μA/V 0,5μA/V 25μA/V
1/h22 40kΩ 2MΩ 40kΩ
AC analysis methods

Hybrid equivalent model


64

 Other names of hij


 Read part 7.6, chapter 7 for further understanding

hi

hfIin h0
hr Vi
AC analysis methods

rE model
66

Analyze EC

66
EC configuration with fixed biasing
67
❖ EC

67
EC configuration with fixed biasing
68

68
EC configuration with fixed biasing
69

69
EC configuration with fixed biasing
70

1) Zi = Rb||βre if Rb ≥ 10βre, Zi ≈ βre


2) Zo = Rc||ro if ro ≥ 10Rc, Z o ≈ Rc
3) Av = - (Rc||ro)/re ≈ - Rc/re
(β appered in re)
Ui & Uo out of phase180o
4) Ai = βRbro / [(ro+Rc)(Rb+βre)] ≈ β
(Ii current source. Io collector current)
EC configuration with different biasing
71
EC configuration with voltage divider
72
EC configuration with voltage divider
73
EC configuration with voltage divider
74

1) Zi = R1||R2||βre = R’|| βre


2) Zo = Rc||ro (If ro ≥ 10Rc, Zo ≈ Rc)
3) Av = - (Rc||ro)/re ≈ - Rc/re
Similar to EC with fixed biasing
≈ βR’/(R’+ βre) if ro ≥ 10Rc
≈β if R’ ≥ 10 βre
EC configuration with voltage divider
75
EC configuration with feedback biasing
76

1) Zi = re/(1/β+Rc/Rf) 4) Ai = βRf/(Rf+ βRc)

2) Zo = Rc//Rf ≈ Rf/Rc

3) Av = -Rc/re if βRc >> Rf


When ro≠∞ → ro in equation
EC configuration with feedback biasing
77
EC configuration with feedback biasing
78
EC configuration with feedback biasing
79
AC analysis methods

rE model
80

Analyze BC

80
BC configuration
81

T model (learnt in Electronics Devices Courses)


BC: small signal model
82

82
BC analysis
83

83
BC analysis
84

84
Analyze BC configuration
85

1) Zi = Re||re Trở kháng vào tương đối nhỏ

2) Zo = Rc Trở kháng ra lớn

3) Av = αRc/re ≈ Rc/re Tương đối lớn


Ui & Uo cùng pha

4) Ai = - α ≈ -1 Không khuếch đại dòng

85
86

Analyze CC

86
CC configuration with fixed biasing
87
87

87
CC configuration with fixed biasing
88

88
CC configuration with fixed biasing
89

Analyze output impedance


CC configuration with fixed biasing
90

Vo
CC configuration with fixed biasing
91

1) Zi = Rb || [βre+(β+1)Re] ≈ Rb || β(re+Re)
High input impedance
2) Zo = Re||re ≈ re where Re >> re
Low output impedance
3) Av = Re/(Re+re) ≈ 1
Inphase with input and smaller amplitude
=> “emitter connection”
4) Ai = - βRb/[Rb+ β(re+Re)]
Application: Buffer
Quizz
92

 1. eq/. Circuit
 2. Av; Ai
Homework 1: Determine Ai, Av, Zi, Zo?
93
Homework 1:
94
HW1: T-model
95
HW1 : 2-port model
96
Homework 2: : Determine Ai, Av, Zi, Zo?
97
98
Homework 3: : Determine Ai, Av, Zi, Zo?
99
Homework 3
100
Homework 4: Determine Ai, Av, Zi, Zo?
101
Example: Determine Ai, Av, Zi, Zo?
102
SUMMARY
103
SUMMARY
104
105
Kiểm tra nhanh (lần 1)
106

 Đề 1  Đề 2
 Vẽ mạch BC sử dung  Vẽ mạch CC sử dung
bộ chia áp phân cực bang hồi tiếp
 Vẽ dạng song của tín  Vẽ dạng song của tín
hiệu tại B, C khi biết VB hiệu tại B, C khi biết VB
= 3.7V, vB có biên độ = 4.5 V, vB có biên độ
10mV, VC =9.3V với 5mV, VC =8.7V với
biên độ vC = 65mV. biên độ vC = 45mV.
 Xác định Av của mạch  Xác định Av của mạch

 Xác định điểm hoạt  Xác định điểm hoạt


động tĩnh Q biết IB = động tĩnh Q biết IB =
40uA, beta =95 20uA, beta =90 106

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