Chapter 13
Instruction Sets: Addressing Modes and Formats
The address field or fields in a typical
instruction format are relatively small.
In order to reference a large range of
locations in main memory or, for some
systems, virtual memory, a variety of
addressing techniques has been employed.
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The most common addressing techniques are:
◦ Immediate
◦ Direct
◦ Indirect
◦ Register
◦ Register indirect
◦ Displacement
◦ Stack
Notations
A=contents of an
address field in the
instruction
R=contents of an
address field in the
instruction that refers to
a register
EA=actual (effective)
address of the location
containing the
referenced operand
(X) =contents of memory
location X or register X
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Virtually all computer architectures provide
more than one of these addressing modes.
One or more bits in the instruction format can
be used as a mode field.
The value of the mode field determines which
addressing mode is to be used by the
processor.
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In a system without virtual memory, the
effective address (EA) will be either a main
memory address or a register.
In a virtual memory system, the effective
address (EA) is a virtual address or a register.
The actual mapping to a physical address is a
function of the memory management unit
(MMU).
Simplest form of addressing
Operand=A
This mode can be used to define and use
constants or set initial values of variables
◦ Typically the number will be stored in twos
complement form
◦ The leftmost bit of the operand field is used as a
sign bit
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No memory reference other than the
instruction fetch is required to obtain the
operand, thus saving one memory or cache
cycle in the instruction cycle.
The size of the number is restricted to the
size of the address field, which, in most
instruction sets, is small compared with the
word length.
Simple form of addressing
EA=A
It requires only one memory reference and no
special calculation.
The length of the address field is usually less
than the word length, thus limiting the
address range.
This technique was common in earlier
generations of computers.
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In indirect addressing, address field refers to
the address of a word in memory, which in
turn contains a full-length address of the
operand.
EA = (A)
Instruction execution requires two memory
references to fetch the operand
◦ One to get its address and a second to get its value
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Similar to direct addressing. The only
difference is that the address field refers to a
register rather than a main memory address.
EA=R
Only a small address field is needed in the
instruction and no time-consuming memory
references are required.
But the address space is very limited.
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Similar to indirect addressing
EA = (R)
Address space limitation of the address field
is overcome by having that field refer to a
word-length location containing an address.
Uses one less memory reference than indirect
addressing.
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Combines the capabilities of direct
addressing and register indirect addressing
EA = A + (R)
Requires that the instruction have two
address fields, at least one of which is explicit
◦ The value contained in one address field (A) is used
directly
◦ The other address field refers to a register whose
contents are added to A to produce the effective
address
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Most common uses of displacement
addressing:
◦ Relative addressing
◦ Base-register addressing
◦ Indexing
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Relative Addressing
The implicitly referenced register is the
program counter (PC)
◦ The next instruction address is added to the
address field to produce the EA
◦ Typically the address field is treated as a twos
complement number for this operation
◦ Thus the effective address is a displacement relative
to the address of the instruction
Saves address bits in the instruction if most
memory references are relatively near to the
instruction being executed
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Base-Register Addressing
The referenced register contains a main memory
address and the address field contains a
displacement from that address
The register reference may be explicit or implicit
Convenient means of implementing
segmentation
In some implementations a single segment base
register is employed and is used implicitly
In others the programmer may choose a register
to hold the base address of a segment and the
instruction must reference it explicitly
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Indexing
The address field references a main memory
address and the referenced register contains
a positive displacement from that address.
An important use is to provide an efficient
mechanism for performing iterative
operations.
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Indexing
Autoindexing
◦ Automatically increment or decrement the index register
after each reference to it
◦ EA = A + (R)
◦ (R) (R) + 1
Postindexing
◦ Indexing is performed after the indirection
◦ EA = (A) + (R)
Preindexing
◦ Indexing is performed before the indirection
◦ EA = (A + (R))
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Remember that a stack is a linear array of
locations works as a last-in-first-out queue.
Items are appended to the top of the stack so
that the block is partially filled at any time.
Associated with the stack is a pointer whose
value is the address of the top of the stack
◦ The stack pointer is maintained in a register
◦ Thus references to stack locations in memory are
in fact register indirect addresses
The machine instructions need not include a
memory reference but implicitly operate on
the top of the stack.
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An instruction format defines the layout of
the bits of an instruction.
It must include an opcode and, implicitly or
explicitly, indicate the addressing mode for
each operand.
For most instruction sets more than one
instruction format is used.
The design of an instruction format is a
complex art.
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The most basic design issue is the instruction
length.
The decision affects, and is affected by:
◦ Memory size
◦ Memory organization
◦ Bus structure
◦ Processor complexity
◦ Processor speed
The most obvious trade-off here is between
the desire for a powerful instruction
repertoire and a need to save space.
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Another design issue is how to allocate the
bits in that format.
The following factors determines the use of
the addressing bits.
◦ Number of addressing modes
◦ Number of operands
◦ Register versus memory
◦ Number of register sets
◦ Address range
◦ Address granularity
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The PDP-10 has a 36-bit word length and a
36-bit instruction length.
The opcode occupies 9 bits, allowing up to
512 operations. In fact, a total of 365
different instructions are defined.
Most instructions have two addresses, one of
which is one of 16 general-purpose registers.
Thus, this operand reference occupies 4 bits.
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The other operand reference starts with an
18-bit memory address field. This can be
used as an immediate operand or a memory
address.
The same general-purpose registers are also
used as index registers.
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Variations can be provided efficiently and
compactly
Increases the complexity of the processor
Does not remove the desirability of making
all of the instruction lengths integrally related
to word length
◦ Because the processor does not know the length of
the next instruction to be fetched a typical strategy
is to fetch a number of bytes or words equal to at
least the longest possible instruction
◦ Sometimes multiple instructions are fetched
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Instructions are made up of:
◦ from zero to four optional instruction prefixes
◦ a 1-, 2- or 3-byte opcode
◦ an optional address specifier (which consists of the
ModR/m byte and the Scale Index byte)
◦ an optional displacement
◦ an optional immediate field
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The instruction prefix, if present, consists of
the LOCK prefix or one of the repeat prefixes.
◦ The LOCK prefix is used to ensure exclusive use of
shared memory in multiprocessor environments.
◦ The repeat prefixes specify repeated operation of a
string, which enables the x86 to process strings
much faster than with a regular software loop.
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Segment override explicitly specifies which
segment register an instruction should use,
overriding the default segment-register
selection generated by the x86 for that
instruction.
An instruction has a default operand size of
16 or 32 bits, and the operand prefix
switches between 32-bit and 16-bit
operands.
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The processor can address memory using
either 16- or 32-bit address size.
The opcode field is 1, 2, or 3 bytes in length.
The ModR/m byte specifies whether an
operand is in a register or in memory; if it is
in memory, then fields within the byte specify
the addressing mode to be used.
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Certain encoding of the ModR/m byte
specifies the inclusion of the SIB byte to
specify fully the addressing mode.
When the addressing-mode specifier
indicates that a displacement is used, an 8-,
16-, or 32-bit signed integer displacement
field is added.
Immediate field provides the value of an 8-,
16-, or 32-bit operand.
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A processor can understand and execute
machine instructions. Such instructions are
simply binary numbers stored in the computer.
If a programmer wishes to program directly in
machine language, then it would be necessary to
enter the program as binary data.
Consider the simple BASIC statement
N=I +J +K
and suppose we wish to program this statement
in machine language and to initialize I, J, and K
to 2, 3, and 4, respectively.
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The program starts in location 101 (hexadecimal).
Memory is reserved for the four variables starting
at location 201.
The program consists of four instructions:
◦ Load 201 into AC
◦ Add 202 to AC
◦ Add 203 to AC
◦ Store AC into 204
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A slight improvement is to
write the program in
hexadecimal rather than
binary notation.
Each line contains the address
of a memory location and the
hexadecimal code of the
binary value to be stored in
that location.
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For more improvement, we
can make use of the symbolic
name or mnemonic of each
instruction.
Each line of input still
represents one memory
location.
To store arbitrary data in a
location, a pseudoinstruction
with the symbol DAT is used.
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A much better system, and one
commonly used, is to use
symbolic addresses known as
assembly language.
Some lines have no address,
implying that the address of
that line is one more than the
address of the previous line.
Programs written in assembly
language are translated into
machine language by an
assembler.
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