Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology

(An Autonomous Institute affiliated to University of Pune)

Structure & Syllabus of

B.E. (Information Technology)

Pattern A11 Effective from Academic Year 2011-12
Prepared by: - Board of Studies in Information Technology Approved by: - Academic Board, Vishwakarma Institute of Technology, Pune Signed by,

Chairman BOS

Chairman Academic Board

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Content
Sr. No.
1 2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 4.13 5 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10

Title

Page No.
7 9 10 11 14 17 20 23 25 27 30 32 34 36 37 38 41 43 45 47 49 51 54 56 58

Program Educational Objectives of B.E. ( Information Technology) ! Course Structure & Syllabi for Courses - Module I & Module II Course Structure - Module III Course Syllabi for courses - Module III CS20101 CS20103 CS20105 CS20107 CS20201 CS20203 CS20301 CS20305 CS27401 CS24301 CS24303 CS20401 Data structures (Theory Course) Applied Probability and Statistics(Theory Course) Principles of Programming Languages(Theory Course) Data Communication(Theory Course) Data structures (Tutorial) Applied Probability and Statistics(Tutorial) Data structures (Laboratory Course) Principles of Programming Languages(Laboratory Course) $ Mini Project VB.NET OR C#.NET(Skill Development Course ) @ Elective Soft Skill $ Comprehensive Viva Voce @ Institute Elective

Course Structure - Module IV Course Syllabi for courses - Module IV CS21102 CS21104 CS21106 CS20108 CS21202 CS21204 CS21302 CS21306 CS27402 CS24302 CS24304 Microprocessor and Interfacing (Theory Course) Mathematical Transforms and Applications (Theory Course) Digital Electronics and Logic Design (Theory Course) Computer Organization (Theory Course) Microprocessor and Interfacing (Tutorial) Mathematical Transforms and Applications (Tutorial) Microprocessor and Interfacing(Laboratory Course) Digital Electronics(Laboratory Course) $ Mini Project ASP.NET OR Python (Skill Development Course)

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

6.11 6.12 7 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 9 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11 10.12

CS20402

@ Elective Health & Hobby $ Comprehensive Viva Voce Course Structure - Module V Course Syllabi for courses - Module V

60 61 62 65 67 69 71 73 75 78 79 80 81 84 87 90 93 95 97 100 -

CS30101 CS30103 CS30105 CS30109 CS30201 CS30203 CS30301 CS30309 CS37401 CS30401 CS37301

Operating Systems(Theory Course) Computer Networks(Theory Course) Theory of Computation(Theory Course) Web Technologies (Theory Course) Operating Systems(Tutorial) Computer Networks(Tutorial) Operating Systems & Computer Networks(Laboratory Course) Web Technologies (Laboratory Course) $ Mini Project @ Professional Development Course (Institute Level) $ Comprehensive Viva Voce $ Seminar Course Structure - Module VI Course Syllabi for courses - Module VI

CS30102 CS30104 CS30106 CS30110 CS30202 CS30204 CS30302 CS30306 CS37402 CS30402 CS37302

Software Engineering(Theory Course) Computer Graphics(Theory Course) Database Management Systems(Theory Course) Management Information Systems (Theory Course) Software Engineering(Tutorial) Computer Graphics(Tutorial) Software Engineering(Laboratory Course) Database Management Systems(Laboratory Course) $ Mini Project @ Professional Development Course (Institute Level) $ Comprehensive Viva Voce $ Project Stage I

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

11 12 12.1 12.2 12.3 CS40101 CS41105 CS42101 CS42103 CS42105 CS42107 CS42109 12.4 CS42111 CS42117 CS42119 CS42121 12.5 12.6 CS41201 CS40217 CS42219 CS42221 12.7 12.8 CS41305 CS42301 CS42303 CS42305 CS42307 CS42309 12.9 13 14 14.1 14.2 CS40104 CS40108 CS47303 CS40201

Course Structure - Module VII Course Syllabi for courses - Module VII Human Computer Interaction (Theory Course) Data Acquisition Systems (Theory Course) *Elective Group I (Theory Course) Advanced Computer Graphics Parallel Algorithms Mobile Computing Software Design and Architecture Business Intelligence *Elective Group II (Theory Course) Digital Signal Processing Artificial Intelligence Information Retrievel Computer Architecture Human Computer Interaction *Elective Group II (Tutorial Course) Digital Signal Processing Artificial Intelligence Information Retrievel Computer Architecture Data Acquisition Systems (Laboratory Course) *Elective Group I (Laboratory Course) Advanced Computer Graphics Parallel Algorithms Mobile Computing Software Design and Architecture Business Intelligence Project Stage - II Course Structure - Module VIII Course Syllabi for courses - Module VIII Software Testing & Quality Assurance (Theory Course) Network Security (Theory Course)

102 103 104 106 108 110 112 114 117 119 122 125 127 130 132 134 136 138 139 141 143 144 146 148 150 153 154 155 158

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

14.3 CS42102 CS42104 CS42108 CS42110 14.4 CS42112 CS42114 CS42116 CS42118 CS42120 CS42122 14.5 14.6 CS40204 CS42212 CS42214 CS42216 CS42218 CS42220 CS42222 14.7 14.8 CS40308 CS42302 CS42304 CS42308 CS42310 14.9 15 16 16.1 16.2 16.3 16.4 16.5 16.6 16.7 CS47308

*Elective Group III (Theory Course) Image Processing Neural Networks Systems Programming Multimedia Systems *Elective Group IV (Theory Course) Distributed Systems Product Design Convergence Technologies Geographical Information Systems Data Mining and Warehousing Design and Analysis of Algorithms Software Testing & Quality Assurance(Tutorial Course) *Elective Group IV (Tutorial Course) Distributed Systems Product Design Convergence Technologies Geographical Information Systems Data Mining and Warehousing Design and Analysis of Algorithms Network Secuirty (Laboratory Course) *Elective Group III (Laboratory Course) Image Processing Neural Networks Systems Programming Multimedia Systems Project Stage III

160 162 164 166 169 172 175 177 180 183 185 187 189 191 193 195 197 199 201 203 204 205 207 210 211 212 214 216 218 221 223 -

Course Structure for Honors in B.E(Information Technology) Course Syllabi for courses offered as Honors CS28102 CS38101 CS38102 CS48101 CS10202 CS28302 Unix Programming(Theory Course) Advanced Data Structures(Theory Course) Routing Algorithms(Theory Course) Modeling and Design of Computer Network(Theory Course) Mobile Adhoc Networks(Theory Course) Unix Programming(Laboratory Course) $ Credits for Lab Courses (Group Selection)

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

17 18 18.1 18.2 18.3

Course Structure for Minors in B.E. (Computer Engineering) Course Syllabi for courses offered as Minors CS29102 CS29302 CS39101 CS39103 CS39303 CS39102 CS39104 CS39304 CS49101 CS49102 CS49302 Principles of Programming Languages(Theory Course) Principles of Programming Languages(Laboratory Course) Computer Architecture and Operating Systems(Theory Course) OR Computer Graphics (Theory Course) Computer Graphics (Laboratory Course) Analysis of Algorithms(Theory Course) OR Data Structures (Theory Course) Data Structures (Laboratory Course) Software Engineering and Project Management(Theory Course) Database Management Systems(Theory Course) Database Management Systems(Laboratory Course) $ Credits for Lab Courses (Group Selection) ACADEMIC INFORMATION

225 226 227 230 232 238 240 242 244 246 247 250 253 254

18.4

18.5
18.6 18.7

19 $ ! @

Please Refer Academic Information Please Refer F.E Structure & Syllabi Booklet Please Refer GP-PD-OE Structure & Syllabi Booklet

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Program Educational Objectives (PEO) B.E. (Information Technology)

1. Program and Course Objectives
Programme Objectives: PEOs :Description of the Objective

Preparation: To prepare the students with a commitment towards intellectual, creative and professional growth by application of innovative practices widely accepted by industry or global educational platform.

II

Core competence: To provide students with foundation in application of mathematical & engineering fundamentals to computing solutions that can result in product or process.

III

Breadth: To enable student to exercise problem solving capacity with effective use of analysis, design, development that address idea realization.

IV

Professionalism: To inculcate students with professional and ethical values communication and collaboration skill and involvement in team work as a member having multidisciplinary knowledge useful to the society.

Learning Environment: To provide students an academic environment that developed leadership qualities, excellent in subject area of computer engineering and lifelong learning in every sphere of their life.

Course Objectives: Course objectives are specified in the course syllabus.

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

2. Program and Course Outcomes Programme Outcomes:

a. Broad foundations: Graduates will understand and apply mathematical foundations, algorithmic principles, and computer science theory in the modeling and design of computer-based systems in a way that demonstrates comprehension of the tradeoffs involved in design choices. b. Disciplinary Foundation: Graduates will recognize of the need for, and an ability to engage in, continuing professional development and demonstrate an ability to use current techniques, skills, and tools necessary for computing practices. c. Specialization: Graduates will have understanding of and ability to apply the concepts and skills related to writing technical documents such as specifications, design and users manuals in appropriate formats. d. Design: Graduates will be able to analyze, design, implement, and test a solution to real world problems including appreciating the value of efficient design created to meet clearly developed requirements. e. Innovations: Graduates will demonstrate ability to formulate and answer empirical questions through participation in projects especially addressing design and deployment, of computing infrastructure with technology integration and user-centered design f. Communication skills: Graduates will demonstrate ability to communicate effectively through verbal and written form. g. Interpersonal skills: Graduates should be able to interact professionally with others in the workplace and engage themselves, effectively in team work for group projects. h. Engineering and society: Graduates will understand professional ethical and social responsibility which will prepare then to address local and global impact of engineering solutions. i. Engineering Applications: Graduates will understand and apply engineering artifacts of engineering solutions in meaningful and useful way to society and global environment.

j.

Lifelong Learning: Graduate will acquire skills necessary to engage in life long learning and understanding of need to continuity improve the skills in refining and updating the knowledge base.

Course Outcomes: Course outcomes are specified in the course syllabus

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

MODULE IV
36

Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Structure, S.E. (Module IV)

FF653, Issue No. 3, Rev 1, dt 02/04/2011
Subject No. S5 S6 S7 S8 T3 T4 P3 P4 MP4 SD4 GP4 CVV2 **OE3 Subject Code CS21102 CS21104 CS21106 CS20108 CS21202 CS21204 CS21302 CS21306 CS27402 CS24302 CS24304 GP CS20402
CS26101 CS26102 CS26103 CS26109

Subject Name

Teaching Scheme (Hrs/week) Lect. Tutorial 0 0 0 0 1 1 0 0 0 0 Practical 0 0 0 0 0 0 2 2 2 2

Credits

Microprocessor and Interfacing Mathematical Transforms and Applications Digital Electronics and Logic Design Computer Organization Microprocessor and Interfacing Mathematical Transforms and Applications Microprocessor and Interfacing Digital Electronics Mini Project ASP.NET OR Python Elective Hobby/Health Comprehensive Viva Voce
Applied Electronics Analog Electronics Linear Circuit Analysis Electrical & Electronic Measurements &Instruments

3 3 3 3 0 0 0 0 0 0 0

3 3 3 3 1 1 1 1 1 1 1 1 2

0 2 Based on Courses S5, S7 0 0

Total

14

10

22

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21102:: MICROPROCESSOR AND INTERFACING

Credits: 03

Teaching Scheme: - Theory 3 Hrs/Week

Prerequisites: Nil Objectives: To explore internal architecture of microprocessor, signal and interface with memory and I/O devices. Mapping with PEOs :- I,II, (b). Unit I 8086 Microprocessor (8+1 Hrs)

A. Introduction to 80x86 microprocessor, Internal Architecture, Generation of physical address, Minimum & Maximum Mode, Ready and Reset pin significance ,study of 8086 supporting chips 8282(Latch), 8284(Clock Generator), 8286(Transreceiver), 8288(Bus Controller). Timing Diagram Read Write Machine Cycles, Real Mode, General Purpose Instructions : B. Instruction Set Unit III Assembly Language Programming & Interrupt Structure (8+1 Hrs)

A. Address Translation, Addressing Modes, Introduction to Assembly Language Programming, Examples on Programming. Interrupt Structure , Interrupt service Routine, Interrupt Vector Table, Hardware and Software Interrupts, INTR ,NMI , Interrupt Response, Execution of an ISR, Priority of Interrupts. B. Examples on Assembly Language Programming Unit IV Interfacing with 8086 I (8+1 Hrs)

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

A. Programmable peripheral interface (8255)-block diagram, control word, interfacing ADC, DAC, Programmable Interval timer/counter (8253/8254)-block diagram, control word & interfacing, Mode0, Mode1, Mode3 of timer, Keyboard debouncing ,display refreshing cycle, Keyboard display interface (8279)-Block Diagram , encoded & decoded mode, Interfacing & programming. B. Interfacing of stepper motor, seven segment display, (8255), Mode2, Mode4, Mode5 of 8253, Programming of 8279 Unit IV Introduction to Pentium microprocessor (8+1 Hrs)

A. Historical evolution of 80286, 386, 486 processors. Pentium features and Architectures, Pentium RISC features, Pentium super-scalar architecture - Pipelining, Pipeline stages. Instruction paring rules, Init & Configuration, Bus Operations-RST, Bus Operations-RST, Mem/IO Organisation, Data Transfer Mechanism , 8/16/32 bit Data Bus, Instruction and Data caches B. Branch prediction examples , Instruction in Pipelines, Cache design. Unit V Protected Mode Architecture (8+1 Hrs)

A. Segmentation, support registers, related instructions, descriptors, descriptor Tables memory management through segmentation, logical to linear address translations, protection by segmentation, privilege-level, protection, related instructions, interprivilege level, transfer control, Paging-support registers, related data structures ,linear to physical address translation ,TLB ,page level protection. B. Switching from Real to protected mode . Text Books 1. Microprocessors and Interfacing, Douglas Hall, Tata McGraw Hill Publications, ISBN 0-07-025742-6, 2nd Edition. 2. The Pentium Microprocessor, James Antonakos 2004, Pearson Education, ISBN 81-7808-545-3 Reference Books 1. Advanced MS DOS Programming, Ray Duncan, BPB Publications ISBN 0 07 048677 8, 2nd Edition. 2. Microprocessor and Peripheral Handbook, INTEL VOL I

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Additional Reading 1. Assembly Language Programming, Peter Abel, Pearson Education Publications, ISBN 10:013030655, 5th Edition 2. Intel Pentium Manual

Structure & Syllabus of B.E.(Information Technology ) Program-Pattern A11,Issue 03,Rev01 dated 02/04/2011

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21104 :: MATHEMATICAL TRANSFORMS AND PPLICATIONS

Credits: 03 Teaching Scheme: - Theory 3 Hrs/Week

Prerequisites: Engineering Mathematics- I and Engineering Mathematics - II Objectives: To understand the linear differential equations and apply it for computer engineering. To understand various transformations like Laplace, Fourier, Z-transform. To understand concepts of vector differentiation and integration theorems. Mapping with PEOs :- I, II, (a). Unit I Linear Differential equations of higher order (08 +1Hrs)

A. Homogeneous Linear Differential Equations of Second Order, Higher Order Homogeneous & Non Homogeneous Linear Differential Equations with Constant Coefficients, Complementary solution, particular integral by short cut methods, undetermined coefficients and Variation of Parameters method, Euler Cauchy Equation, Legendre equation and its solution. B. Application of system of ordinary differential equations. Unit II Complex Variables (08 +1Hrs)

A. Complex differentiation, Analytical functions, Cauchy-Riemann equations, Complex Integration, Cauchys Integral Theorem and formula, Residue Theorem and applications to Engineering Problems, Power series, Taylor series, Laurent series, Radius of convergence. B. Bilinear Transformations and Conformal mapping. Unit III Fourier Transform and Z Transform (08+1 Hrs)

A. Complex Fourier series and frequency spectrum, Fourier integrals, Fourier cosine and sine transforms, Fourier transforms. Application of Fourier transform to Engineering Problems. Discrete Fourier Transforms Properties and Applications. Introduction to Z Transform, properties of Z-Transform, Inverse Z-Transform, application of Ztransform to difference equations.
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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

B. Solutions of Partial Differential equations by the use of Fourier transform, Introduction to Discrete Fourier transform. Definition, properties and its inverse. Introduction to Fast Fourier transform. Unit IV Laplace Transform (08 +1Hrs)

A. Introduction to Laplace Transform and its properties. Laplace Transform of Unit step function, Delta function and periodic function. Inverse Laplace Transform and its evaluation. Laplace Transforms of Special Functions. Application of Laplace Transform to Engineering Problems. B. Application of Laplace transform to simultaneous differential equations.

Unit V Vector Analysis

(08+1 Hrs)

A. Vector differentiation, gradient, curl, divergence, directional derivative, line integral independent of path and Conservative vector field, greens theorem, stokes theorem, gauss divergence theorem. B. Applications of vectors, maxwells equations. Text Books 1. Advanced Engineering Mathematics, Erwin Kreyszig, John Wiley and sons, inc. 2. Advanced Engineering Mathematics, R.K. Jain, S.R.K. Iyengar, Narosa Publications. 3. Higher Engineering Mathematics, B. S. Grewal, Khanna Publishers. 4. Vector Analysis, Schaums Outline Series, Murray R Spiegel, Seymour Lipschutz, Dennis Spellman Reference Books 1. Mathematical Techniques for Engineers & scientists, Larry C., Andrews &Ronald L. Philips, PHI Pvt. Ltd., New Delhi. 2. Signals and Linear Systems, Robert A. Gabel, Richard A. Roberts, John Wiley & sons. 3. Advanced Engineering Mathematics, Dennis G. Zill and Michael R. Cullen, CBS New Delhi.

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21106:: DIGITAL ELECTRONICS AND LOGIC DESIGN

Credits: 03 Prerequisites: Nil Objectives: To learn basics of digital electronics and its practical application. Mapping with PEOs :- I,II, (b). Unit I Number system and Codes (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Introduction, Binary number System, Sign-Magnitude representation, One's and Two's complement representation, Binary arithmetic, 2's complement arithmetic, Octal number System, Hexadecimal number System, BCD code, Excess-3 code, Gray code. Code conversion, Boolean algebra: Basic theorems and properties, K-Map: Representation of truth-table, SOP form, POS form, Simplification of logical functions, Minimization of SOP forms using K- Map. B. Minimization of POS forms using K- Map, Quine-McCluskey Method, Half adder and subtractor, full adder and subtractor. Unit II Combinational & Sequential logic circuits (9+1 Hrs)

A. Design examples- multiplexers: code converter, demultiplexers, encoder: Priority encoders, decoders: 74138, BCD adder and subtractor, parity generator and checker, Digital comparator: 7485. Introduction of flip-flop (F.F), 1 bit memory cell, clocked S-R F.F., J-K F.F. race around condition, M/S J-K F.F, flip-flop truth table, excitation table, flip-flop conversion, flipflop characteristics. T and D F.F, Design of 4 bit UP-Down ripple counter using J-K flip-flop, Design of Synchronous 3 bit up/down counter, mod-n counters (IC -7490, 7493). B. ALU 74181, BCD-to-7-segment Decoder, adder with look ahead carry generator.

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Unit III Design of sequential circuits

(8+1 Hrs)

A. Moore/Mealy M/c's: representation techniques, state diagrams, state tables, state reduction, state assignment, implementation using flip-flops. Applications like sequence generator and detector. Shift register (modes of operation), 4 bit bi-directional universal shift register, application of shift registers (Ring counter, Sequence generator, Johnson's counter.)ASM charts, notations, design of simple controller, multiplexer controller method, RTL notations and implementation. B. Examples on ASM, RTL. Unit IV Logic Families (8+1 Hrs)

A. Characteristics of Digital ICs: Speed, Power dissipation, fan-out, current and voltage parameters, noise margin, operating temperature etc., TTL: Operation of TTL NAND gate, Standard TTL, TTL Characteristics, Active pull-up, Wired-AND, totem pole, open collector, Unconnected Inputs. CMOS Logic: CMOS Inverter, CMOS NAND and NOR, CMOS characteristics. Wired-logic, Unconnected Inputs, Open-Drain Outputs, Comparison of TTL and CMOS, interfacing TTL to CMOS B. Interfacing CMOS to TTL, Tri-state logic: tri-state buffers, inverters, Study of Data sheets of 7400 Series ICs: (Basic and Universal logic gates) Unit V Programmable Logic Devices (8+1 Hrs)

A. Programmable Logic array: Input, Output Buffers, AND, OR, Invert/Non-Invert Matrix, Programming the PLA, Applications of PLAs to implement combinational and sequential logic circuits Introduction to :FPGA, CPLD. Introduction to VHDL: Modeling Digital systems, modeling languages, modeling B. Comparison of FPGA and CPLD, VHDL Programs. Text Books 1. "Modern Digital Electronics", R.P. Jain, Tata McGraw-Hill, 2003, ISBN 0 - 07 049492 4, 3rd Edition. 2. A VHDL Primer, J. Bhaskar, Englewood Cliffs, Prentice Hall, 1994, ISBN-13: 978- 0131814479, 2nd Edition. Reference Books 1. "Digital Design", M. Mano, Pearson Education, 2002, ISBN - 81 - 7808 - 555 0, 3rd Edition. 2. "Digital Principles and Applications", A. Malvino, D. Leach, Tata McGraw Hill, 2003, ISBN 0 - 07 - 047258 05, 5th Edition.
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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS20108:: COMPUTER ORGANIZATION

Credits: 03 Prerequisites: Nil Objectives: To understand the structure, function and characteristics of computer systems To understand the design principle of the various functional units of digital computers To understand concepts of Parallel Processing. Mapping with PEOs :- I, II, (b). Unit I Structure of a Computer System (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Brief History of computers, Von Neumann Architecture, Functional Units, Data Types and Computer Arithmetic: Fixed and Floating point numbers, Signed numbers, Integer Arithmetic, 2s Complement arithmetic, multiplication, Booths Algorithm, Flow Chart and Implementation of Booths Algorithm, Division, Restoring algorithms, IEEE standards for Floating point representations (Single Precision Format). B. Implementation of Modified Booths Algorithm, Non Restoring algorithm, IEEE standards for Floating point representations (Double Precision Format). Unit II Processor Organization (CPU) (8+1 Hrs)

A. CPU Architecture, Register Organization, Instruction types, Instruction formats, Instruction cycles, Types of operands, Addressing Modes, ALU organization: 8086 CPU, 8086 instruction types, addressing modes and address translation, RISC Processors: RISC- Features, Superscalar Processors : Overview. B. CISC Features, Comparison RISC , CISC Unit III Control Unit (8+1 Hrs)

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

A. Machines instructions and addressing modes, Single Bus CPU, Control Unit Operation: Instruction Sequencing, Micro-operations. Hardwired Control: examples: Multiplier CU. Pipelining, Micro-programmed Control: Basic concepts, Microinstruction-sequencing and execution, Micro-program control, B. Applications of microprogramming, Pipelining Hazards Unit IV Memory Organization (8+1 Hrs)

A. Need, Hierarchical memory system, Characteristics, Size, Access time, Read cycle time and address space Main Memory Organization: ROM, RAM, EPROM, EEPROM, DRAM (example of 64kb memory using 8kb chips) Cache Memory Organization: Address mapping, Replacement Algorithms, Cache Coherence, MESI protocol. Virtual Memory: Segmentation, Paging, Interleaved memories. B. Secondary Storage: Magnetic Disk, Optical memory, CDROM, RAID. Unit V Multiprocessor Configurations (8+1 Hrs)

A. Multiprocessor Configurations: Closely coupled and loosely coupled multiprocessor architectures, Coprocessor and I/O Processor, Programmed I/O, Interrupt Driven I/O, I/O channels Bus structures, Bus controller, Bus Arbitration, System Bus. Introduction to parallel processing: Trends towards parallel processing, Parallelism in Uniprocessor systems, Architectural classification schemes, Flynns classification Parallel computer structures: pipeline, vector, array and multiprocessing, Parallel processing applications. B. Buses and standard Interfaces: PCI, SCSI and USB Ports. Text Books 1. Computer Organization and Architecture: Designing for Performance, W. Stallings William,Pearson Prentice Hall Publication, ISBN 81-7758-993-8,7th Edition. 2. Computer Organization, C. Hamacher, V. Zvonko, S. Zaky, Tata McGraw Hill Publication, ISBN 007-120411-3,5th Edition. Reference Books 1. Computer Architecture and Parallel Processing, Hwang and Briggs, Tata McGraw Hill Publication ISBN 13: 9780070315563. 2. Structured Computer Organization, A. Tanenbaum, Prentice Hall Publication, ISBN 81 203 1553 7, 4th Edition.

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21202:: MICROPROCESSOR AND INTERFACING

Credits: 01 Prerequisites: : Nil Teaching Scheme: - Tutorial 1 Hr/Week

Objectives: To study interfacing of 8086, assembly language programming, DOS commands. Mapping with PEOs :- I, II, (b). List of Contents A TERM-WORK containing the record of the following: Assignments : 1. Understanding of different Memory Models 2. List various assembler directives, 3. Understand concepts of editor, assembler, linker, loader. 4. 8086 assembly language programming, to understand the basic concepts of various functions(01,02,08,09,0A) of INT 21h 5. List various debugging commands. 6. Interface 8086 microprocessor with 4KB RAM in minimum mode. Apply memory banking. Draw memory address map and explain address decoding logic. 7. Interface 8086 microprocessor with 16KB ROM in maximum mode. Draw memory address map and explain address decoding logic. 8. Design specified time delay (delay time calculation). 9. Near, Far procedures (string example).
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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

10. Use of string instructions 11. Study of Mother Board Note: Students should perform vi & vii assignments on drawing sheet Text Books 1. Microprocessors and Interfacing, Douglas Hall, Tata McGraw Hill Publications, ISBN 0-07-025742-6, 2nd Edition. 2. Assembly Language Programming, Peter Abel, Pearson Education Publications, ISBN 10:013030655, 5th Edition Reference Books 1. Advanced MS DOS Programming, Ray Duncan, BPB Publications ISBN 0 07 048677 8, 2nd Edition. 2. Microprocessor and Peripheral Handbook, INTEL VOL I

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Bansilal Ramnath Agarwal Charitable Trusts

Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21204 :: MATHEMATICAL TRANSFORMS AND APPLICATIONS

Credits: 01 Teaching Scheme: - - Tutorial 1 Hr/Week

Prerequisites: : Syllabus covered unit-wise in theory lectures. Objectives: Upon completion of this module students will be able to: Recognize mathematical structures in practical problems Translate problems into mathematical language and analyze problems using methods from all the units Mapping with PEOs :- I, II, (a).

List of Contents In this module students will work on problems to practice and apply methods introduced in the theory lectures. Discussions of problems in small groups is always encouraged and facilitated. Students are asked to submit weekly home work assignments and provide them immediate feedback and support materials. Tutorial No. 1: Summary on higher order linear differential equations, solution of homogeneous and non homogeneous equations, complementary solution, particular solution by short cut methods, Summary on particular solution by method of variation by parameters Method of undetermined coefficients and problems solving. Summary on Euler Cauchy and Legendre Equation, simultaneous equations and problems solving. Summary on Functions of complex variables, Differentiation of functions of complex variables, Analytic functions, Harmonic functions, Harmonic conjugate. Summary on Integration of functions of complex variables, integration along a path, Cauchys theorem, Cauchys integral formula, Cauchys residue theorem and problems solving.

Tutorial No. 2: Tutorial No. 3:

Tutorial No. 4:

Tutorial No. 5

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Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Tutorial No. 6:

Summary on Fourier series, Complex form of Fourier series, Fourier integral representation, Sine and Cosine representations and problems solving, Summary on Fourier transform, Sine transform, Cosine transform and corresponding inverse and problems solving. Summary on Summary on Z transform, properties of Z transform, inverse Z transform, methods of solution and problems solving, solution of difference equation by Z transform. Summary on Laplace transform, Laplace transform of standard functions, Properties of Laplace and problems solving. Summary on Properties of Laplace transform, Laplace transform of Unit step function, Dirac Delta function, Periodic functions and problems solving. Summary on Inverse Laplace transform, properties of inverse Laplace transform, solution of differential equations by Laplace transform method and problems solving. Summary on Vector Differentiation, problems on gradient, curl, divergence and directional derivative. Summary on Vector Integration, Problems on Line Integral, Greens Theorem. Problems on Stokes theorem, Gauss Divergence theorem and applications of vectors.

Tutorial No. 7:

Tutorial No. 8:

Tutorial No. 9:

Tutorial No. 10:

Tutorial No. 11:

Tutorial No. 12: Tutorial No. 13: Tutorial No. 14:

Text Books 1. Advanced Engineering Mathematics, Erwin Kreyszig, John Wiley and sons, inc. 2. Advanced Engineering Mathematics, R.K. Jain, S.R.K. Iyengar, Narosa Publications. 3. Higher Engineering Mathematics, B. S. Grewal, Khanna Publishers. 4. Vector Analysis, Schaums Outline Series, Murray R Spiegel, Seymour Lipschutz, Dennis Spellman
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Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS21302:: MICROPROCESSOR AND INTERFACING

Credits: 01 Prerequisites: Nil Objectives: To study programming model of 8086 and assembly language programming. Mapping with PEOs :- I, II, (b). List of Practical Group A: - ( Any 6) 1. Study of 8086 Architecture and Execution of sample programs. 2. Write 8086 Assembly language program to access marks of 5 subjects stored in array and find overall percentage and display grade according to it. 3. Write 8086 ALP to perform block transfer operation. (Dont use string operations) Data bytes in a block stored in one array transfer to another array.Use debugger to show execution of program. 4. Write 8086 ALP to find and count negative number from the array of signed number stored in memory. 5. Write 8086 Assembly language program (ALP) to arrange the numbers stored in the array in ascending as well as descending order. Assume that the first location in the array hold the number of elements in the array and successive memory location will have actual array elements. Write a separate subroutine to arrange the numbers in ascending and descending order. Accept a key from the user. a. If user enters 0, Arrange in ascending b. If user enters 1, Arrange in descending 6. Write 8086 Alp to convert 2_digit HEX number into equivalent BCD number. 7. Write 8086 ALP to convert 2_digit BCD number into equivalent HEX number. Teaching Scheme: - Laboratory 2 Hrs/Week

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Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

Group B: - (Any 6) 8. Write 8086 Assembly language program (ALP) for following operations on the string entered by the user. a. Concatenation of two strings b. Find number of words, characters 9. Write 8086 ALP to convert an analog signal in the range of 0V to 5V to its corresponding digital signal using successive approximation ADC. 10. Write 8086 ALP to interface DAC & generate following waveforms on oscilloscope. Comment on types of DACs and write detailed specifications of the DAC used i) Square wave -- Variable Duty Cycle & frequency. ii) Stair case wave iii) Triangular wave 11. Write 8086 ALP to rotate a stepper motor for a. one clockwise rotation b. one anti clockwise rotation Write routines to accelerate and de-accelerate the motor Modify your program to rotate stepper motor for given angle and given direction. 12. Write 8086 ALP to program 8253 in Mode 0 . Generate a square wave with a pulse of 10 mS. 13. Write 8086 ALP to initialize 8279 & to display characters in right entry mode. Provide also the facility to display SECOMP/. a. Character in left entry mode b. Rolling Display c. Flashing Display 14. Perform an experiment to establish communication between two USARTs. Initialize USART-A in asynchronous transmitter mode and interface USART-B by initializing it in asynchronous receiver mode. Note: - Students should perform any 6 assignments from group A and any 6 assignments from group B

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Department of Information Technology

Text Books 1. Microprocessors and Interfacing, Douglas Hall, Tata McGraw Hill Publications, ISBN 0-07-025742-6, 2nd Edition. 2. Assembly Language Programming, Peter Abel, Pearson Education Publications, ISBN 10:013030655, 5th Edition Reference Books 1. Advanced MS DOS Programming, Ray Duncan, BPB Publications ISBN 0 07 048677 8, 2nd Edition. 2. Microprocessor and Peripheral Handbook, INTEL VOL I

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Department of Information Technology

FF No. : 654

CS21306:: DIGITAL ELECTRONICS

Credits: 01 Prerequisites: Nil Teaching Scheme: - Laboratory 2 Hrs/Week

Objective: To build and verify simple combinational and sequential circuits. Mapping with PEOs :- I, II, (b). List of Practical I Combinational Logic Design 1. Verification of Logical Gates and Boolean Algebra. 2. Code converters, e.g. Excess-3 to BCD and vice versa using logical gates. 3. Multiplexer - e.g. 16:1 Mux using 4:1 Mux (IC 74153). 4. Decoder e.g. 2 bit comparator (IC 74138). 5. BCD adder using IC 7483 II Sequential Circuit Design (Any six) 1. Conversion of flip-flops. e.g. JK to D, T. 2. Ripple (asynchronous) mod N counter using J-K F-F. 3. Ripple (asynchronous) mod N counter using IC 7490. 4. Synchronous 2 bit Up /down counter using JK flip-flop. 5. Sequence generator using JK flip-flop 6. Pseudo random number generator using 74194.(universal shift register) 7. Sequence detector (Moore ckt) using JK flip-flop
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Department of Information Technology

8. Sequence detector (Mealy ckt) using JK flip-flop III ASM (Any one) 1. Simple ASM using multiplexer controller method using Simulator. 2. Design of simple combinational circuit: half adder and subs tractor using VHDL language. Text Books 1. "Modern Digital Electronics", R.P. Jain, Tata McGraw-Hill, 2003, ISBN 0 - 07 049492 4, 3rd Edition. 2. A VHDL Primer, J. Bhaskar, Englewood Cliffs, Prentice Hall, 1994, ISBN-13: 978- 0131814479, 2nd Edition. Reference Books 1. Digital Design", M. Mano, Pearson Education, 2002, ISBN - 81 - 7808 - 555 0, 3rd Edition. 2. "Digital Principles and Applications", A. Malvino, D. Leach, Tata McGraw Hill, 2003, ISBN 0 - 07 - 047258 05, 5th Edition. Additional Reading 1. J. Bignell, R. Donovan, "Digital Electronics", DELMAR Thomson Learning, 4th Edition, 2001, ISBN 981 - 240 - 352 3.

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Department of Information Technology

FF No. : 654

CS24302:: ASP.NET
Credits: 01 Prerequisites: C#.NET or VB.NET Objectives: To learn the fundamental concepts of ASP.NET. To learn to Web application development using ASP.NET. To learn to on line database application development. To learn to apply security to web applications. Mapping with PEOs :- II,III,(c). List of Practical 1. Design simple web application using ASP.NET. 2. Design web application with different validations. 3. Design on line database application. 4. Design data report application. 5. Design web application for uploading files on web. 6. Design AJAX application. 7. Design localized web application. 8. Design WPF browser application. 9. Authentication and authorization in asp.. 10. Deployment and publishing web sites. 11. Mini project. Teaching Scheme: - Laboratory 2 Hrs/Week

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Department of Information Technology

Text Books 1. Beginning ASP.NET 3.5: In C# and VB, Imar Spaanjaars, Wrox publication, ISBN: 978-0-470-18759-3, March 2008. 2. ASP.NET 3.5: A Beginner's Guide, William Sanders, McGraw Hill Publication, ISBN: 007159194X / 9780071591942, September 2008. Reference Books 1. ASP.NET AJAX Programmer's Reference: with ASP.NET 2.0, Shahram Khosravi, Wrox Publication, ISBN: 978-0-470-10998-4, Sept.2007. 2. Professional ASP.NET 2.0, B. Evjen, S.Hanselman, F.Muhammad, S. S. Sivakumar, D. Rader, Wrox Publication, ISBN: 978-0-7645-7610-2, Nov. 2005.

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Department of Information Technology

FF No. : 654

CS24304:: Python
Credits: 01 Prerequisites: C, C++ programming. Objectives: To learn the fundamental concepts of python languages. To learn to GUI application development using python languages. To learn to use regular expression for text processing in python language. Mapping with PEOs :- II, III, ( c) List of Practical 1. Design a Simple Python Script. 2. Design a Simple Python Script using conditional / loop constructs. 3. Create an empty address book using Python Script. 4. Design a Simple Python Script using modules & functions. 5. Design a Simple Python Script for file handling. 6. Design a Simple Python Script with exception handling. 7. Design a Simple Python Script using regular expressions. 8. Design a Simple Python Script to explore object oriented features. 9. Design a Simple GUI application using Python. 10. Design a Simple Python Script with event handling. 11. Mini Project Teaching Scheme: - Laboratory 2 Hrs/Week

Text Books 1. Exploring Python, Timothy Budd, Mc Graw Hill Publication, ISBN:
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Department of Information Technology

9780073523378, August 2010. 2. Beginning Python, Peter C. Norton, Alex Samuel, Dave Aitel, Eric FosterJohnson, Leonard Richardson, Jason Diamond, Aleatha Parker, Michael Roberts SBN: 978-0-7645-9654-4, August 2005. Reference Books 1. Python: Create - Modify Reuse, James O. Knowlton, Wrox Publication, ISBN: 978-0-470-25932-0, July 2008. 2. Professional Python Frameworks: Web 2.0 Programming, Dana Moore, Raymond Budd, William Wright, Wrox Publication, ISBN: 978-0-470-13809-0, October 2007.

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Department of Information Technology

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HONORS
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Structure, HONORS (INFORMATION TECHNOLOGY)

FF653, Issue No. 3, Rev 1, dt 02/04/2011
Subject No. Subject Code Subject Name Teaching Scheme (Hrs/week) Lect. S1 P1 S2 S3 S4 S5 CS28102 CS28302 CS38101 CS38102 CS48101 CS48102 Unix Programming Unix Programming Advanced Data Structures Routing Algorithms Modeling and Design of Computer Networks Mobile Adhoc Networks Total 2 0 3 3 3 3 14 Tutorial 0 0 0 0 0 0 0 Practical 0 2 0 0 0 0 2 2 1 3 3 3 3 15 Credits

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Department of Information Technology

FF No. : 654

CS28102:: UNIX PROGRAMMING

Credits: 02 Teaching Scheme: - Theory 2 Hrs/Week

Prerequisites: Familiarity with Computer Operations, C Programming. Objectives: Teaches the fundamentals of Unix Operating System. Prepares the student for Unix Administration. Prepare the students for Shell Programming, AWK Programming. Mapping with PEOs :- II, III, (d) Unit I Introduction (5+1 Hrs)

A. Introduction: Operating System, Functions of OS, Unix Architecture, Kernel, Shell, Different types of Shells, File System / Directory Structure, Features of Unix. B. Comparison of Windows with Unix. Unit II Unix Commands (5+1 Hrs)

A. Basic commands: Internal and External Commands, Command Structure, man, cat, cal, date, passwd, echo, printf, less, more, wc, bc, uname, who, tty, clear, script. File & Directory Manipulation under Unix: File Concepts, cat, cp, rm, mv, more, file, wc, od, cmp, diff, dos2unix, unix2dos, mkdir, rmdir, cd, ls, pwd. B. Input and output redirection Unit II File permissions, Filters and vi Editor (5+1 Hrs)

A. Working with File Permissions: Understanding Permissions, Changing File and Directory Permissions, Changing Ownership and Group. Filter and Redirection: Concepts, pr, head, tail, cut, paste, sort, uniq, tr, tee, grep, Pipe and I/O Redirection. vi Editor: Creating and Viewing Files using the vi Editor, vi commands B. Sed: The Stream Editor
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Department of Information Technology

Unit IV Shell Programming

(5+1 Hrs)

A. Shell Programming: Read Statement, Command Line Arguments, Different Operators Control Structures: if, for, while, case. Positional Parameters, Arrays, Functions, Writing Shell Scripts, Debugging. B. Comparison of different Shell Scripting. Unit V AWK Programming (5+1 Hrs)

A. AWK Programming: Format of AWK Programs, Records, Fields, Variables, Variables, Expressions, Operators, Print Statement, Control Statements in Actions, BEGIN and END block.Control Structures: if, for, while. AWK Functions: String Handling Functions, Mathematical Functions, Arrays B. Passing Shell Arguments to AWK, Passing AWK Output to the shell. Text Books 1. Unix Concepts and Applications, Das Sumitabha, Tata McGraw Hill, ISBN: 007-053475-6, 3rd Edition. 2. Unix Shell Programming, Yashavant Kanetkar, BPB Publications, ISBN: 817029-753-2, 1st Edition. Reference Books 1. Unix And Shell Programming, Forouzan B. A., Gilberg R. F., Australia, Thomson Brooks Cole, ISBN: 981-243-127-6, 1st Edition. 2. Unix: Concepts and Programming, Sethuraman Murugan, Dennet and Co, 1st Edition, 2006, ISBN: 819032281-8. Additional Reading 1. Vijay Mukhi's The C Odyssey Unix: Open Boundless C, Shah Rajiv, Shetty Tilak, Gandhi Meeta, BPB Publications, ISBN: 81-7029-165-8, 1992. 2. Test Your Unix Skills, Yashwant Kanetkar, BPB Publications, ISBN: 81-7029848-2, 1997. 3. UNIX Programming Environment, Kernighan B. W. , Pike R., Prentice Hall Of India, ISBN: 81-203-0499-3, 1984. 4. Unix for You, Koparkar Pramod, Tata McGraw Hill, ISBN: 0-07-052849-7, 1991. 5. Linux: The Complete Reference, Petersen R. L., Tata McGraw Hill, ISBN: 007-05849-7, 2003

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Department of Information Technology

FF No. : 654

CS38101:: ADVANCED DATA STRUCTURES

Credits: 03 Prerequisites: Data Structures Objectives: To introduce advanced data structures, problem solving paradigms To study the representation, implementation & applications of data structures. To compare alternative implementations of data structures. To choose the appropriate data structure for modeling a given problem. Mapping with PEOs :- III, (e) Unit I Hashing (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Static Hashing: Hash tables, Hash functions, Overflow Handling. Dynamic Hashing: Motivation for Dynamic Hashing, Dynamic Hashing using Directories, directory less Dynamic Hashing. Bloom Filters: An application-differential files, Bloom Filter Design. B. Theoretical evaluation of overflow techniques. Unit II Priority Queue and Advance Heaps (8+2 Hrs)

A. Single and Double Ended Priority queues, Leftist Trees: Height Biased, Weight Biased. Binomial Heaps: Cost Amortization, Definition of Binomial Heaps, Insertion, Melding two Binomial Heaps, deletion of min element. Fibonacci Heaps: Definition, Deletion from an F-heap, Decrease key, Cascading Cut. Pairing Heaps: Definition, Meld and Insert, Decrease Key, Delete Min, Arbitrary delete. Interval Heaps: Definition and Properties, Insertion and Initialization, Deletion of Min element. B. Symmetric Min-max Heaps. Unit III Advanced Binary Search Trees (9+1 Hrs)

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Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

A. Red-Black Trees: Definition, Representation, Searching, Insertion, Deletion, Joining, Splitting a Red-Black Tree. Splay Trees: Bottom-up, Top-down Splay trees, Multiway Search trees: Definition and Properties, Searching an m-way Search Tree. B-Tree: Definition and Properties, number of elements in a B-Tree, Insertion, deletion of a B-tree. B+ Tree: Searching, Insertion, Deletion. B. AA Trees. Unit IV Digital Search Structures (9+1 Hrs)

A. Digital Search Trees: Definition, Search, Insert and Delete. Binary Tries, Compressed Binary Tries. Multiway Tries: Definition, searching a Trie, sampling Strategies, Insertion, Deletion, Height of a Trie, Space required and alternative node structures, Prefix Search and applications. Compressed Tries: with Skip fields and with Labeled edges. Suffix Trees as a data structure. B. Searching a Suffix Tree. Unit V Data structures for Disjoint Sets and Linear Programming (8+1 Hrs)

A. Data structures for Disjoint Sets: Disjoint Set Operations, Linked list representation of disjoint sets, Disjoint set forests. Linear Programming: Overview, Applications, Algorithms, Standard and Slack forms, Formulating problems as linear programs, Simplex Algorithm. B. Linear Programming duality Text Books 1. Fundamentals of Data Structures in C, E. Horwitz , S. Sahani, Anderson-Freed, Universities Press, Second Edition, 2008, ISBN 978-81-7371-605-8. 2. Introduction to Algorithms, T. Cormen, R.Rivest, C. Stein, C. Leiserson, PHI publication, Second Edition, 2004, ISBN 81-203-2141-3. Reference Books 1. Advanced Data structures, Peter Brass, Cambridge Publication, 1st Edition, 2008 ,ISBN 978-0-521-88037-4. 2. Data Structures and algorithms with Object Oriented design Patterns in Java, Bruno R. Preiss, wiley Publication, 1st Edition, 2000. ISBN: 978-0-471-34613-5.

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Department of Information Technology

FF No. : 654

CS38102:: ROUTING ALGORITHMS

Credits: 03 Prerequisites: Computer Networks. Objectives: To explain routing algorithms in the Internet; link-state routing and distancevector routing; broadcast and multicast routing algorithms. To explain path determination, strengths of link state and distance vector protocols in differing configurations. To describe the goals of routing protocols and convergence as impacted by different protocols. To explain the similarities and differences between several types of routing protocols. Mapping with PEOs :- IV,V, (i) Unit I Networking and Network Routing (8 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Addressing and Internet Service: An Overview, Network Routing, IP Addressing, Service Architecture, Protocol Stack Architecture, Router Architecture, Network Topology, Architecture, Network Management Architecture, Public Switched Telephone Network. B. ICMP, PING, DHCP, ARP,RARP SLIP, SONET, MPLS. Unit II Shortest and Widest path Algorithms (8 Hrs)

A. Shortest Path and Widest Path: BellmanFord Algorithm and the Distance Vector Approach, Dijkstras Algorithm, Widest Path Algorithm, Dijkstra-Based Approach, BellmanFord-Based Approach. B. k-Shortest Paths Algorithm. Unit III (8 Hrs) Routing Protocols: Framework and Principles A. Routing Protocol, Routing Algorithm, and Routing Table, Routing Information Representation and Protocol Messages, Distance Vector Routing Protocol, Link State Routing Protocol, Protocol, and Link Cost.
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Department of Information Technology

B. Path Vector Routing. Unit IV Internet Routing Algorithms (8 Hrs)

A. IP Routing and Distance Vector Protocol Family: RIPv1 and RIPv2, OSPF and Integrated IS-IS: OSPF: Protocol Features, OSPF Packet Format, Integrated IS-IS, Key Features, comparison, BGP: Features, Operations, Configuration Initialization, phases. B. BGP Message Format. Unit V Analysis of Network Algorithms (8 Hrs)

A. IP Address Lookup Algorithms : Impact, Address Aggregation, Longest Prefix Matching, Nave Algorithms, Binary , Multibit and Compressing Multibit Tries, Search by Length Algorithms, Search by Value Approaches, Hardware Algorithms, Comparing Different Approaches. IP Packet Filtering and Classification: Classification, Classification Algorithms, Nave Solutions, Two-Dimensional Solutions, Approaches for d Dimensions. B. IPv6 Text Books 1. Network Routing: Algorithms, Protocols, and Architectures, Deepankar Medhi and Karthikeyan Ramasamy , Morgan Kaufmann , ISBN-10: 0-12-088588-3, 2007. 2. Network Algorithmic: An Interdisciplinary Approach to Designing Fast Networked Devices, George Varghese, Morgan Kaufmann, ISBN: 0-12-0884771, 2004.

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Department of Information Technology

FF No. : 654

CS48101:: MODELING AND DESIGN OF COMPUTER NETWORKS

Credits: 03 Prerequisites: Computer Networks. Objectives: To understand analysis of a problem, design of its solution, implementation of the solution, testing of the solution. To describe the methods used in modeling, analysis and design communications systems. To describe the organization of computer networks and evaluate alternative organizations. To evaluate the protocols used in computer networks. Mapping with PEOs :- III, IV, (f) Unit I Introduction to Queuing Theory Teaching Scheme: - Theory 3 Hrs/Week

( 8 Hrs )

A. Multiplexing of Traffic on a Communication Link, Queuing Models- Littles Theorem, Littles Theorem, Probabilistic Form of Littles Theorem, Application of Littles Theorem, The M/M/1 Queuing System, Arrival Statistics, Service Statistics, Markov Chain Formulation, Deviation of the Stationary Distribution, Occupancy Distribution upon Arrival, Occupancy Distribution upon Departure, The M/M/m, M/M/, M/M/m/m, AND Other Markov Systems, The M/M/m: The m-Server Case, M/M/: The Infinite-Server Case, M/M/m/m: The m-Server Loss System, multidimensional Markov Chains- Applications in Circuit Switching, The M/G/1 System, M/G/1 Queues with Vacations, Reservations and Polling, Priority Queuing, The D/D/1 Queue. B. Problems on queuing theory. Unit II Delay Models in Data Networks A. M/M/1 queue - Time-dependent behavior, Limiting behavior, Direct approach Recursion, Generating function approach, Global balance principle, Mean performance measures, Distribution of the sojourn time and the waiting time, Priorities, Preemptiveresume priority, Non-preemptive priority, Busy period ,Mean busy period, Distribution of the busy period.
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(8 Hrs)

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B. problem on M/M/ 1 system for related topics. Unit III Network Design (8 Hrs)

A. Problem definition: Multipoint line layout heuristics, CMST algorithm, ESAUWilliams algorithm, Sharmas algorithm, Unified algorithm, Bin packing, Terminal assignments, Concentrator location. B. Problems on CMST, Bin packing, Terminal Assignment, Concentrator location. Unit IV Optical network design (8 Hrs)

A. Introduction, telecom network overview, roles of three fields in optical network, cross layer design, WDM networking evolution, WDM network constructions, Optical access network, overview of PON technologies, Ethernet PON (EPON) Access Network, Routing Wavelength Assignment(RWA): Problem formulation of RWA, illustrative examples from ILP. Virtual-Topology Reconfiguration, Virtual-Topology Adaptation under Dynamic traffic. B. WDM-PON, Heuristic Adaptation Algorithm for Larger Networks. Unit V Survivable optical network (8 Hrs)

A. Introduction, Fault management in SONET/SDH, Fault management in WDM mesh network, Traffic grooming: static and dynamic, Hierarchical Switching and Waveband Grooming, Survivable Traffic Grooming. B. Advanced Topics in Network Survivability, Virtual Concatenation. Text Books 1. Telecommunication Network Design Algorithms, by Kershenbaum A., Tata McGraw HillPublication, ISBN 0-07-034228-8, 1st Edition. 2. Data Networks, by Bertsekas D. and Gallager R., Prentice-Hall, Englewood Cliffs, N.J., ISBN0-87692-780-0,2nd Edition, 1992. Reference Books 1. OPTICAL NETWORKS SERIES, by Biswanath Mukherjee, Springer, e-ISBN 0-387-29188-1, 2006. 2. Design and Analysis of Computer Communication Networks, by Vijay Ahuja, McGraw Hill, ISBN 0070006970, 1st Edition, 1981.

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Department of Information Technology

Additional Reading 1. Computer Networks, by Andrew S. Tenenbaum , Prentice Hall of India, ISBN 81-203-2175-8, 4th Edition. 2. "Data and Computer Communications", by Stallings W, Prentice Hall of India Pvt. Ltd., 2002, ISBN 81-203-2067-0, Sixth Edition.

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Vishwakarma Institute of Technology, Pune 411 037

Department of Information Technology

FF No. : 654

CS48102:: MOBILE ADHOC NETWORKS

Credits: 03 Prerequisites: Computer Networks. Objectives: To understand MANET and WSN. To learn various routing algorithms used in MANET. To understand security mechanisms in MANET. Mapping with PEOs :- I, V, ( j ) Unit I Introduction (8 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Introduction. Fundamentals of Wireless Communication Technology. The Electromagnetic Spectrum. Radio Propagation Mechanisms. Characteristics of the Wireless Channel. IEEE 802.11a b Standard. Origin of Ad hoc Packet Radio Networks. Technical Challenges. Architecture of PRNETs. Components of Packet Radios. Ad hoc Wireless Networks. Wireless Sensor Networks. B. Challenges Facing Ad hoc Mobile Networks, Ad hoc wireless Internet. Unit II Medium Access Control (8 Hrs)

A. Introduction. Issues in Designing a MAC Protocol for Ad Hoc Wireless Networks. Design Goals of a MAC Protocol for Ad Hoc Wireless Networks. Classifications of MAC Protocols. Contention-Based Protocols. Contention-Based Protocols with Reservation Mechanisms. Contention-Based MAC Protocols with Scheduling Mechanisms. B. MAC Protocols That Use Directional Antennas. Other MAC Protocols. Unit III Ad Hoc Routing Protocols (8 Hrs)

A. Introduction. Issues in Designing a Routing Protocol for Ad Hoc Wireless Networks. Classifications of Routing Protocols. Table-Driven Routing Protocols. On-Demand Routing Protocols. Hybrid Routing Protocols. Routing Protocols with Efficient Flooding Mechanisms. Hierarchical Routing Protocols.
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B. Power-Aware Routing Protocols.

Unit IV Multicast Routing In Ad hoc Networks

(8 Hrs)

A. Introduction. Issues in Designing a Multicast Routing Protocol. Operation of Multicast Routing Protocols. An Architecture Reference Model for Multicast Routing Protocols. Classifications of Multicast Routing Protocols. Tree-Based Multicast Routing Protocols. Mesh-Based Multicast Routing Protocols. Summary of Tree-and Mesh-Based Protocols. Energy-Efficient Multicasting. Multicasting with Quality of Service Guarantees. Application-Dependent Multicast Routing. B. Application-Dependent Multicast Routing. Comparisons of Multicast Routing Protocols. Unit V Transport Layer And Security Protocols (8 Hrs)

A. Introduction. Issues in Designing a Transport Layer Protocol for Ad Hoc Wireless Networks. Design Goals of a Transport Layer Protocol for Ad Hoc Wireless Networks. Classification of Transport Layer Solutions. TCP Over Ad Hoc Wireless Networks. Other Transport Layer Protocols for Ad Hoc Wireless Networks. Security in Ad Hoc Wireless Networks. Network Security Requirements. Secure Routing in Ad Hoc Wireless Networks. B. Issues and Challenges in Security Provisioning. Network Security Attacks. Text Books 1. Ad Hoc Wireless Networks Architectures and Protocols by C. Siva Ram Murthy and B. S. Manoj, Prentice Hall, ISBN-9780131470231, 2004. 2. Ad Hoc Mobile Wireless Networks Protocols and Systems by C. K. Toh, Prentice Hall, ISBN-9780130078179, 2001. Reference Books 1. Ad Hoc Networking by Charles E. Perkins, Addison Wesley, ISBN: 0-20130976-9, 2000. 2. ZigBee Wireless Sensor and Control Network" by Elahi & Gschwender, Prentice Hall, ISBN- 0137134851, 2010.

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FF No. : 654

CS28302:: UNIX PROGRAMMING

Credits: 01 Prerequisites: Operating Systems, Programming Teaching Scheme: - Laboratory 2 Hrs/Week Familiarity with Computer Operations, C

Objectives Teaches the fundamentals of Unix Operating System. Prepares the student for Unix Administration. Prepare the students for Shell Programming, AWK Programming. Mapping with PEOs :- II, III, (d) List of Practical 1. Installation of Linux 2. Execution of basic Linux commands. 3. Execution of advanced Linux commands. 4. Working with vi editor: Shell program for Fibonacci Series. 5. Shell Program to check file permissions 6. Shell Program to check string is palindrome or not. 7. Shell Program to perform arithmetic operations using case statement 8. Shell Program for Bubble Sort using Array. 9. Shell program using Function. 10. Execution of AWK related commands. 11. Generate a student report using AWK programming 12. AWK program for passing shell arguments and Passing AWK Output to the shell.
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13. Managing Users and Groups and Basic Network Setup 14. Execution of C & Java program on Unix. Text Books 1. Unix Concepts and Applications, Das Sumitabha, Tata McGraw Hill, ISBN: 007-053475-6, 3rd Edition. 2. Unix Shell Programming, Yashavant Kanetkar, BPB Publications, ISBN: 817029-753-2, 1st Edition. Reference Books 1. Unix And Shell Programming, Forouzan B. A., Gilberg R. F., Australia, Thomson Brooks Cole, 1st Edition, 2003, ISBN: 981-243-127-6 2. Unix: Concepts and Programming, Sethuraman Murugan, Dennet and Co, 1st Edition, 2006, ISBN: 819032281-8. Additional Reading 1. Vijay Mukhi's The C Odyssey Unix: Open Boundless C, Shah Rajiv, Shetty Tilak, Gandhi Meeta, BPB Publications, ISBN: 81-7029-165-8, 1992. 2. Test Your Unix Skills, Yashwant Kanetkar, BPB Publications, ISBN: 81-7029848-2, 1997. 3. UNIX Programming Environment, Kernighan B. W. , Pike R., Prentice Hall Of India, ISBN: 81-203-0499-3, 1984. 4. Unix For You, Koparkar Pramod, Tata McGraw Hill, ISBN: 0-07-052849-7, 1991. 5. Linux: The Complete Reference, Petersen R. L., Tata McGraw Hill, ISBN: 007-05849-7, 2003. 6. Teach Yourself UNIX Shell Programming in 14 days, Husain Kamran, Techmedia, ISBN: 81-7635-113-X, 1998.

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MINORS
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Structure, MINORS (COMPUTER ENGINEERING)

FF653, Issue No. 3, Rev 1, dt 02/04/2011
Subject No. S1 S2 Subject Code CS29102 CS29302 CS39101 CS39103 CS39303 S3 CS39102 CS39104 CS39304 S4 S5 CS49101 CS49102 CS49302 Subject Name Teaching Scheme (Hrs/week) Lect. Principles of Programming Languages Principles of Programming Languages Computer Architecture & Operating Systems OR Computer Graphics Computer Graphics Analysis of Algorithms OR Data Structures Data Structures Software Engineering & Project Management Database Management Systems Database Management Systems Total 2 0 3 2 0 3 2 0 3 2 0 18 Tutorial 0 0 0 0 0 0 0 0 0 0 0 0 Practical 0 2 0 0 2 0 0 2 0 0 2 6 3 3 Credits

3 3 15

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FF No. : 654

CS29102:: PRINCIPLES OF PROGRAMMING LANGUAGES

Credits: 02 Prerequisites: C Objectives: To understand the concept of Interfaces, Packages. To understand the concept of Exception Handling and Multithreading To understand the concept of Applets and AWT. Mapping with PEOs :- II, III, (d) Teaching Scheme: - Theory 2 Hrs/Week

Unit I Introduction to Programming languages & OOP (Java)

(5+1 Hrs)

A. Introduction: Role of programming languages, Necessity of studying programming languages, characteristics of a good programming language, Effects of Environments on languages ( batch Processing, Interactive, Embedded, Programming Environment) Language design issues, Programming paradigms. Introduction to JAVA: Classes & Objects Constructors, Access Modifiers, Instance Methods, this & static keywords. Inheritance Types of inheritance, Constructors in Derived Classes, Overriding & Hiding Fields& Methods, B. Multilevel Inheritance, Hierarchical Inheritance. Unit II Extended Object Oriented Programming (Java) (5+1 Hrs)

A. Abstract Classes & methods, Final Classes & Final Methods, Interfaces & Packages Interfaces, Putting Classes together. Exception Handling - built-in exceptions, checked & unchecked exceptions. Concurrent Issues with thread programming, Deadlock. Multithreading Thread life Cycle thread Priority, Thread Methods. B. User defined exception Unit III Java AWT & SWING (5+1 Hrs)

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A. Graphical Programming - Applet, Event Handling. Abstract Windows ToolkitComponents and Graphics, Containers, Frames and Panels Layout Managers- Border layout, Flow layout, Grid layout, Card layout AWT all components, Event delegation Model - Event source and handler, Event categories, Listeners, Interfaces. B. Concurrent Issues with thread programming, Deadlock. Unit IV Java Database Connectivity (5+1 Hrs)

A. overview of JDBC, ODBC, creating DSN, connecting to database using JDBC: ODBC, prepared statement, handling record/result sets, using database on remote machine. B. SQL injection Unit V Case Studies of Programming Languages (5+1 Hrs)

A. Overview of the building blocks of the language, procedures, control structures, their motivation(s), target user base, choice and paradigms of features, special features relevant to HTML-CSS-JavaScript, PHP-HTML, Matlab. B. LISP /Haskell. Text Books 1. Programming Languages Design and Implementation, T. W. Pratt, M.V. Zelkowitz, Publications, ISBN 10: 0130276782, 4th Edition. 2. Java: The Complete Reference, Herbert Schildt, TMG Publication, ISBN 9780070636774 , 7th Edition. Reference Books 1. HTML, CSS, Java Script, Perl, Python and PHP, Schafer Steven, Dreamtech India Pvt Ltd., ISBN 81-265-0620-2. Additional Reading 1. Programming Languages: Principles and Paradigms A. B. Tucker, R. Noonan, McGraw-Hill, ISBN 0-07-048704-9. 2. Programming Languages: Principles and Practice, K. C. Loudon, Thomson Publications, 981-243-130-6, 2nd Edition. 3. MATLAB Programming for Engineers, Stephen J. Chamman, Thomson Learning Publication, ISBN 981-254-893-9, 3rd Edition. 4. Programming In Prolog, Clocksin W F, Mellish C S, Narosa Pblishing House, ISBN 8185198552, 3rd Edition. 5. Lex & Yacc, John R. Levine, Tony Mason, Doug Brown, Shroff Publishers, ISBN 81-7366-062-X, 2nd Edition.
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6. LISP, Patrick Henry Winston, Berthold, Pearson Educaation, ISBN 81-7808155-5, 3rd Edition. 7. Haskell: The Craft of Functional Programming, S. Thompson, Addison Wesley, ISBN 0201342758, 2nd Edition.

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FF No. : 654

CS29302:: PRINCIPLES OF PROGRAMMING LANGUAGES

Credits: 01 Prerequisites: C Objectives: To understand basic concepts of Object Oriented Programming. To understand inheritance, polymorphisms, templates, file handling. To understand the concept of Interfaces, Packages. To understand the concept of Exception Handling and Multithreading To understand the concept of Applets, AWT and SWING Mapping with PEOs :- II, III, (d) List of Practical 1. Write a simple JAVA program to implement the concept of Class & Object. 2. Write a simple JAVA program to implement the concept of Class, Constructor, instance variable & class variable. 3. Write a JAVA program to implement the concept of inheritance. 4. Write a JAVA program to implement the concept of interface. 5. Write a JAVA program to implement the concept of package. 6. Write a JAVA program to illustrate following exceptions a. Arithmetic Exception b. NullPointerException c. ArrayIndexOutOfBoundsException d. IllegalAccessException 7. Write a JAVA program to illustrate the use of abstract class 8. Write a JAVA program to implement the concept of multithreading. 9. Write a JAVA program for file handling.
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Teaching Scheme: - Laboratory 2 Hrs/Week

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Department of Information Technology 10. Design a simple applet application with event handling.

Text Books 1. Java: The Complete Reference, Herbert Schildt, TMG Publication, ISBN 9780070636774 , 7th Edition 2. Core Java 2 Volume I ,Cay S Horstmann, Gary Cornell, Pearson Education, ISBN 9788131719459, 8th Edition Reference Books 1. Core Java Volume .II Cornell G, Horstmann C S , Sunsoft Press, ISBN 817808-018-4

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FF No. : 654

CS39101:: COMPUTER ARCHITECTURE AND OPERATING SYSTEMS

Credits: 03 Prerequisites: Nil. Objectives: To understand the structure, function and characteristics of computer systems. To understand the design principle of the various functional units of digital computers To identify the role of operating systems and explain the different structures of operating systems. To understand OS support for processes/threads, virtual memory, I/O and file systems. To evaluate processes and/or threads synchronization mechanisms and explain deadlock conditions and different ways to resolve them. Mapping with PEOs :- I,II,III, (b),(d). Unit I Structure of a Computer System & Processor Organization (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Brief History of computers, Von Neumann Architecture, Functional Units, Data Types and Computer Arithmetic: Fixed and Floating point numbers, Signed numbers, Integer Arithmetic, 2s Complement arithmetic, multiplication. CPU Architecture (8086), Register Organization, Instruction types, Instruction formats, Instruction cycles, Types of operands, Addressing Modes. B. IEEE standards for Floating point representations. Unit II (8+1 Hrs) Control Unit & I/O Organization A. Single Bus CPU, Control Unit Operation: Instruction Sequencing, Micro-operations. Hardwired Control: Multiplier CU. Micro-programmed Control: Basic concepts, Microinstruction-sequencing and execution, Micro-program control, Input/Output Systems, Synchronous, Asynchronous, Parallel and Serial I/O, Programmed I/O, Interrupt Driven I/O. B. Applications of microprogramming, I/O channels (8+1 Hrs)
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Unit III Introduction to OS & Process Management A. Architecture, Goals & Structures of O.S., Hardware Abstraction layer, Basic functions, Types of OS: Batch, multiprogramming, multitasking, time sharing. Processes: Process description & control: Process Concept, Process states, Process description, Process control, Threads. Concurrency: Principles of Concurrency, Mutual Exclusion, Semaphores, Message Passing, Monitors Classical Problems of Synchronization: Readers-Writers problem, Producer Consumer Problem, Dining Philosopher problem. B. Sleeping Barber problem, Cigarette Smokers problem Unit IV Deadlock and CPU Scheduling (8+1 Hrs)

A. Deadlock: Principles of deadlock, Deadlock Prevention, Banker's algorithm for Deadlock Avoidance, Deadlock Detection, Deadlock Recovery. Uniprocessor Scheduling: Types of scheduling: Preemptive, Non-preemptive, Long-term, Medium-term, Short-term. Scheduling Algorithms: FCFS, SJF, RR, and Priority. Multiprocessor Scheduling: Granularity, Design Issues, Process Scheduling B. Real Time Operating System. Unit V Memory Management (8+1 Hrs)

A. Memory Management requirements, Memory Partitioning: Fixed and Variable Partitioning, Memory Allocation: Allocation Strategies (First Fit, Best Fit, Worst Fit, Next Fit), Fragmentation, Swapping, Cache Memory. Virtual Memory: Concepts, Segmentation, Paging, Address Translation, Page Replacement Policies (FIFO, LRU, Optimal), Thrashing, Demand paging. B. Working Set model Text Books 1. Computer Organization and Architecture: Designing for Performance, W. Stallings William, Pearson Prentice Hall, 2006, ISBN 81-7758-993-8, 7th Edition 2. Operating Systems, Stalling William, Pearson Education, ISBN 81-317-0304-5, 5th Edition. Reference Books 1. Computer Organization, C. Hamacher, V. Zvonko, S. Zaky, McGraw Hill, ISBN 007-120411-3 , 5th Edition. 2. Modern Operating Systems, Tanenbaum Andrew S, PHI, ISBN 81-203-0974-x, 2nd Edition, 2001.
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Additional Reading 1. Structured Computer Organization, A. Tanenbaum, Prentice Hall of India, ISBN 81 203 1553 7, 4th Edition.

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FF No : 654

CS39103:: COMPUTER GRAPHICS

Credits: 02 Teaching Scheme: - Theory 2 Hrs/Week

Prerequisites: Knowledge of C Programming and Basic Data Structures & Mathematics. Objectives: To understand basics of computer graphics. To give more emphasis on implementation aspect of Computer Graphics Algorithm. To prepare the student for advance courses like multimedia / Image Processing. Mapping with PEOs :- I,II,(b)

Unit I Graphics Primitives and Scan Conversions

(5+1 Hrs)

A. Introduction to computer graphics, Display Adapters, display modes, pixel, Frame Buffer, display file structure, display file interpreter. lines, line segments, Line generation, DDA and Bresenhams line drawing algorithms and circle drawing by Midpoint and Bresenhams algorithms, Aliasing and Antialiasing. B. Interactive devices: Tablets, touch panels, mouse, joysticks, track balls, light pen etc. Unit II Polygon and Clipping (5+1 Hrs)

A. Types of Polygons, representation, Inside test of polygon, Polygon filling: Seed fill, Boundary fill, Scan line fill algorithm, Clipping: Introduction, viewing transformation, Line clipping : Cohen Sutherland algorithm, Polygon clipping : Sutherland Hodgeman algorithm, Generalized Polygon clipping, Text clipping. B. Mid-Point Line Clipping algorithm. Unit III 2D Transformations (5+1 Hrs)

A. Introduction, Scaling, Rotation, Translation, matrix representation of 2D transformation, homogeneous coordinates, Reflection Transformations, Rotation about an arbitrary point, Shear transforms. Numerical Problems on transformation B. Normalized Device Coordinates.
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Unit IV 3-D Transformations

(5+1 Hrs)

A. Introduction, 3-D point representation, 3D Scaling and Translation, Matrix representation, Derivation of Rotation matrices along the main axis, Rotation about an arbitrary axis, Reflection along different axis, Numerical Problems on transformation. B. Reflection along different Plane. Unit V Hidden lines and Curves (5+1 Hrs)

A. Hidden lines detection, Back-face removal algorithm, Depth Comparison, Z buffers, Painters algorithm. Curves and Fractals: Introduction, Curve generation, B-Splines and corners, Bezier curves, Fractals, Hilbert curve, fractal lines and Surfaces. B. Warnock algorithm, Triadic Koch Curve. Text Books 1. J. Foley, V. Dam, S. Feiner, J. Hughes, Computer Graphics Principles and Practice, 2nd Edition, Pearson Education, 2003, ISBN 81 7808 038 9. 2. D. Hearn, M. Baker, Computer Graphics C Version, 2nd Edition, Pearson Education, 2002, ISBN 81 7808 794 4. Reference Books 1. S. Harrington, Computer Graphics, 2nd Edition, McGraw-Hill Publications, 1987, ISBN 0 07 100472 6. 2. D. Rogers, J. Adams, Mathematical Elements for Computer Graphics, 2nd Edition, Tata McGraw-Hill Publication, 2002, ISBN 0 07 048677 8.

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Department of Information Technology

FF No. : 654

CS39303:: COMPUTER GRAPHICS

Credits: 01 Teaching Scheme: - Laboratory 2 Hrs/Week

Prerequisites: Knowledge of C Programming and Basic Data Structures & Mathematics. Objectives: To understand basics of computer graphics. To give more emphasis on implementation aspect of Computer Graphics Algorithm. To prepare the student for advance courses like multimedia / Image Processing. Mapping with PEOs :- I,II, (b)

List of Practical 1. Implementation of DDA Line Drawing Algorithm. 2. Implementation of Bresenhams Circle Drawing Algorithm. 3. Implementation of Scan Line polygon fill Algorithm. 4. Implementation of Cohen-Sutherland Line Clipping Algorithm. 5. Implementation of Sutherland-Hodgeman Polygon Clipping Algorithm. 6. Implementation of 2D Transformations. 7. Implementation of Triadic Koch Curve Algorithm. 8. Implementation of Fractal line and Surface Algorithm. Marking Scheme: 70% for Continuous Assessment; 30% End Semester Practical Exam

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Text Books 1. J. Foley, V. Dam, S. Feiner, J. Hughes, Computer Graphics Principles and Practice, 2nd Edition, Pearson Education, 2003, ISBN 81 7808 038 9. 2. D. Hearn, M. Baker, Computer Graphics C Version, 2nd Edition, Pearson Education, 2002, ISBN 81 7808 794 4. Reference Books 1. S. Harrington, Computer Graphics, 2nd Edition, McGraw-Hill Publications, 1987, ISBN 0 07 100472 6. 2. D. Rogers, J. Adams, Mathematical Elements for Computer Graphics, 2nd Edition, Tata McGraw-Hill Publication, 2002, ISBN 0 07 048677 8.

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FF No. : 654

CS39102:: ANALYSIS OF ALGORITHMS

Credits: 03 Prerequisites: Data Structures Objectives: Fundamental understanding of the mathematics used to analyze, evaluate, and design algorithms Develop the ability to assess the advantages and disadvantages of different types of algorithms. Understand methods for designing time and space efficient algorithms. Increased ability to design and implement efficient solutions to problems. Mapping with PEOs :- III, (e) Unit I Unit 1 : Overview of Time Complexity analysis, Divide and Conquer (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Time Complexity notations, Stable matching problem. Overview of Brute Force algorithms (sorting/searching). Using Recurrence equations and Mathematical Induction to find Time Complexity and prove correctness of algorithms. Divide and Conquer: General Strategy, Exponentiation. Binary Search, Quick Sort and Merge Sort. Strassens Matrix Multiplication, Finding median. B. Finding Maximum and Minimum, Convex Hull problem. Unit II Greedy Strategy : (8+1 Hrs)

A. General Strategy, Knapsack problem, Job sequencing with Deadlines, Optimal merge patterns, Minimal Spanning Trees and Dijkstras algorithm. Scheduling Algorithms. B. Optimal Storage Problems. Unit III Dynamic Programming Strategy (8+1 Hrs)

A. General Strategy, Review of Multistage graphs, OBST and 0/1 Knapsack, Traveling Salesperson Problem, Shortest path in a Graph, Sequence Alignment problem, B. String Editing Problem.
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Unit IV Backtracking and Branch & Bound

(8+1 Hrs)

A. Backtracking: General Strategy, n Queens problem, Graph Coloring, Hamiltonian Cycles, 0/1 Knapsack, Sum of Subsets Branch and Bound: General Strategy, 0/1 Knapsack, Traveling Salesperson Problem B. Postage stamp problem, n*n*n Queens problem. Unit V NP-Theory (8+1 Hrs)

A. Overview of Deterministic and Non Deterministic Algorithms, Complexityintractability, Non-Deterministic Polynomial time (NP) Decision problems, Cooks Theorem implication. NP-Hard problems : Halting problem. NP-Complete problems- Satisfiability problem, vertex cover problem, graph problems, scheduling, code generation problems, Dealing with NP completeness. B. Simplified NP-Hard Problems. Text Books 1. Horowitz, Sahani, Fundamentals of computer Algorithms, Galgotia. 2nd Edition, 1998.ISBN 81-7515-257-5 2. Bressard, Bratley Fundamentals of Algorithmics. ,PHI, 2nd Edition,1996, ISBN 81-203-1131-0 Reference Books 1. Jon Kleinberg, Eva Tardos Algorithm Design, Pearson, 1st edition, 2005. ISBN 978-81-317-0310-6 2. Thomas H Cormen and Charles E.L Leiserson, Introduction to Algorithm ,PHI 2nd edition, 2001. ISBN 81-203-2141-3.

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FF No. : 654

CS39104:: DATA STRUCTURES

Credits: 02 Prerequisites: Computer Programming Objectives: To introduce fundamental data structures, problem solving paradigms To introduce time complexity analysis of problems. To study the representation, implementation & applications of data structures. To compare alternative implementations of data structures. To choose the appropriate data structure for modeling a given problem. Mapping with PEOs :- I, (a) Unit I Stack using Linear Data Structure (5+1 Hrs) Teaching Scheme: - Theory 2 Hrs/Week

A. Polynomial representation using arrays, operations on polynomials like add, multiply, evaluate, Representation of sparse matrix, Addition of Sparse. Stack: Fundamentals of stack, Representation and Implementation of stack using arrays, Applications of stack: Decimal to Binary Conversion, reversing a string, Parsing: Wellform parenthesis, Different expression conversions and evaluation, representation of multiple stacks, Simulating recursion using stack. B. Expression Conversions and evaluation with respect to stack. Unit II Queue (5+1 Hrs)

A. Fundamentals of queue, Representation and Implementation of queue using arrays, Circular queue: representation and implementation, Applications of queue: Josephus Problem, Job Scheduling, Queue Simulation, Categorizing Data, Double Ended Queue, Priority queue. B. Representation of multiple queues. Unit III Linked Representation (5+1 Hrs)

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A. Dynamic Memory allocation, Array representation using dynamic memory allocation, Concept of linked organization, singly linked list, doubly linked list, circular linked list, Insertion, Deletion and traversal on above data structures. Displaying a Single Linked list in reverse way. Representation and manipulations of polynomials using linked lists. B. Stack using Linked list. Unit IV Trees (5+1 Hrs)

A. Binary trees and its representation using sequential and linked organization, full and complete binary trees, Creation of a binary tree, binary tree traversals (recursive and non recursive), operations such as copy, equal etc. Binary search tree, creation of binary Search tree, finding height and counting leaf nodes of a binary search tree (with and without recursion), Finding mirror image of the binary search tree with and without recursion, Deletion of a node from a binary search tree. Printing a tree level wise and depth wise. B. Heap sorting. Unit V Graph (5+1 Hrs)

A. Review of basic terminology, Representation of graphs using adjacency matrix, adjacency list, Traversals: Depth First and Breadth First, Kruskals and Prims algorithms for minimum spanning tree, Algorithm for shortest path- Dijkstras algorithm. B. Graph applications : Multistage Graph Problem. Text Books 1. Data structures using C and C++, Y. Langsam, M.J. Augenstein, A.M. Tenenbaum, Pearson Education, Second Edition, 2002, ISBN 81-7808-729-4. 2. Fundamentals of Data Structures in C, E. Horwitz , S. Sahani, Anderson-Freed, Universities Press, Second Edition, 2008, ISBN 978-81-7371-605-8. Reference Books 1. Data structures and Algorithm Analysis in C++, M. Weiss, Pearson Education, 2nd Edition, 2002 ,ISBN-81-7808-670-0. 2. An Introduction to data Structures with applications, J. Tremblay, P. soresan, TMH Publication, 2nd Edition, 1984, ISBN-0-07-462471-7. Additional Reading 1. Data Structures in C++, A. Drozdek, 2nd Edition, Thomson Brookes / COLE Books, 2002, ISBN 981 240 079 6. 2. Fundamentals of Computer Algorithms, E. Horwitz , S. Sahani, S. Rajasekaran, Galgotia book source, New Delhi, 2005, ISBN 81-7515-257-5.
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FF No. : 654

CS39304:: DATA STRUCTURES

Credits: 01 Prerequisites: Computer Programming Objectives: To introduce fundamental data structures, problem solving paradigms To introduce time complexity analysis of problems. To study the representation, implementation & applications of data structures. To compare alternative implementations of data structures. To choose the appropriate data structure for modeling a given problem. Mapping with PEOs :- I, (a) Teaching Scheme: - Laboratory 2 Hrs/Week

List of Practical 1. Write a C Program to represent single variable polynomial using array and perform addition, multiplication of them. 2. Write a C program to represent sparse matrix using array and perform sparse matrix addition. 3. Write a C program to convert infix expression to postfix and evaluate it using stack. 4. Write a C program to implement Circular Queue using array and perform add and delete operations on it. 5. Write a C Program to create a database (such as employee, student) using single linked list with options like Create, insert, delete, modify, search, print reverse, display etc. 6. Write a C program to accept binary numbers in doubly linked list & perform addition of them and store the result in another list. 7. Write a C Program to create two sorted singly linked lists, and Merge these two lists into third list without creating a new linked list.

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8. Write a C program to create a binary search tree and its inorder, preorder and postorder traversal. Also perform insertion and deletion of a node in it. 9. Write a C program to create a binary search tree and find height & number of leaf nodes with and without recursion. 10. Write a C program to represent a given graph using adjacency array and find the shortest path using Dijkstras algorithms. 11. Mini project which will make use of different data structures learnt in this subject. Marking Scheme: 50% for Continuous Assessment; 20% for Mini Project; 30% End Sem. Practical Exam

Text Books 1. Data structures using C and C++, Y. Langsam, M.J. Augenstein, A.M. Tenenbaum, Pearson Education, Second Edition, 2002, ISBN 81-7808-729-4. 2. Fundamentals of Data Structures in C, E. Horwitz , S. Sahani, Anderson-Freed, Universities Press, Second Edition, 2008, ISBN 978-81-7371-605-8. Reference Books 1. Data structures and Algorithm Analysis in C++, M. Weiss, Pearson Education, 2nd Edition, 2002 ,ISBN-81-7808-670-0. 2. An Introduction to data Structures with applications, J. Tremblay, P. soresan, TMH Publication, 2nd Edition, 1984. ISBN-0-07-462471-7. Additional Reading 1. Data Structures in C++, A. Drozdek, 2nd Edition, Thomson Brookes / COLE Books, 2002, ISBN 981 240 079 6. 2. Fundamentals of Computer Algorithms, E. Horwitz , S. Sahani, S. Rajasekaran, Galgotia book source, New Delhi, 2005, ISBN 81-7515-257-5.

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FF No. : 654

CS49101:: SOFTWARE ENGINEERING AND PROJECT MANGEMENT

Credits: 03 Prerequisites: Data Structures Objectives: To learn the complete Software life cycle and understand its major activities such as software requirement analysis, design, testing, and implementation. Understanding and Experience in Writing Requirements and Specifications. To thoroughly understand the practices of analysis and design (OOA and OOD) To understand the relative merits of the different UML diagrams Transforming analysis into design and relate it to implementation model Mapping with PEOs :- III, IV,(e),(f). Unit I Software Process Models and OO Methodologies (8+1 Hrs) Teaching Scheme: - Theory 3 Hrs/Week

A. Overview of Software Engineering, Software Process Framework, Process Patterns, Personal and Team Process Models, Process Models: Code-and-Fix, Waterfall Model, Incremental Models, Evolutionary Models, Iterative Development, The Unified Process, Agile process, Extreme Programming, Cleanroom Methodology, CMMI, Impact of Processes and Outcomes, Process Selection and applicability, Software Engineering Principles and Practices, The importance of modeling, UML Building blocks: things, relationships and diagrams, Architectural views: use case, design, implementation, process and deployment, Levels of detail: visualization, specification and construction, Object properties: Abstraction, encapsulation, Modularity, Hierarchy B. Overview of OO Methodologies: OOAD, OOSE, OMT, DSDM Unit II Requirement Engineering and Model Driven Development (8+1 Hrs)

A. Requirements Engineering Tasks, Requirement Elicitation Techniques, Software Requirements: Functional, Non-Functional, Domain, Requirements Characteristics and Characterization, Requirement qualities, Requirement Specification, Requirement Traceability, System Analysis Model Generation, Requirement Prioritization, Context Models, Behavioral Models, Data Models, Object Models, Structured Methods, Use Case Diagrams, Sequence Diagrams, State Chart Diagrams, Activity Diagrams
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B. Case Studies on Requirement Engineering, Use Case Diagrams, Sequence Diagrams, State Chart Diagrams, Activity Diagrams

Unit III System Design Engineering

(8+1 Hrs)

A. Design quality, Design Concepts, The Design Model, Introduction to Pattern-Based Software Design, Architecture styles, Reference Architectures Architectural Design: Software Architecture, Data Design and Architectural Design, Design of Software Objects, Features and Methods, Cohesion and Coupling between Objects, Coupling and Visibility, Interfaces, Interfaces with Ball and Socket Notation, Templates, Analysis model vs. design model classes, Categorizing classes: entity, boundary and control , Modeling associations and collections B. User Interface Design: Rules, User Interface Analysis and Steps in Interface Design, Design Evaluation, Software Reuse, Component-Based Software Engineering Unit IV System Implementation and Project Management (8+1 Hrs)

A. Packages and interfaces: Distinguishing between classes/interfaces, Exposing class and package interfaces, Component and deployment diagrams: Describing dependencies, Deploying components across threads, processes and processors Project Activities, Project Definition, Structures and Frameworks, Strategy and Project Management, Role of Teams, Types of Teams and Team Life Cycles, Teamwork, Project Planning, Project Scheduling, Project Cost Estimation, Risk analysis and Planning, Risk Estimation and Control, Classic Mistakes, Empirical Cost Estimation, COCOMO, Software Sizing, Software Scope Management, Introduction to Function Point Analysis Unit V Principles of Testing (8+1 Hrs)

A. Testing Concepts: Purpose of Software Testing, Testing Principles, Goals of Testing, Testing aspects: Requirements, Test Scenarios, Test cases, Test scripts/procedures, Strategies for Software Testing, Testing Activities, Mistakes, Faults & Failures, Planning Verification and Validation, Software Inspections, Automated Static Analysis, Verification and Formal Methods, Levels of Testing White-Box Testing: Test Adequacy Criteria, Static Testing, Structural Testing, Code Complexity Testing, Mutation Testing, Data Flow Testing Black-Box Testing: Test Case Design Criteria, Requirement Based Testing, Positive and Negative Testing, Boundary Value Analysis, Equivalence Partitioning State Based Testing, Domain Testing B. Analysis of Flow Graphs, Complexity Measures and computations
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Text Books 1. Ian Sommerville, Software Engineering, Addison-Wesley, 7th Edition ,2004. 2. Tom Pender, UML Bible, John Wiley & sons, ISBN 0764526049. Reference Books 1. Roger S Pressman,Software Engineering: A Practitioner's Approach, McGraw Hill, 6/e,2005, 2. William E. Perry, Effective Methods for Software Testing, John Wiley and Sons, ISBN 9971-51-345-5 Additional Reading 1. Jim Arlow, Ila Neustadt, UML 2 and Unified Process: Practical Object Oriented Analysis and Design. , 2nd Edition, Addison- Wesley, ISBN 0321321278. 2. Burnstein, Practical Software Testing, Springer International Edition, ISBN 818128-089-X 3. Quality Software Project Management, Robert T. Futrell, Donald F. Shafer, Linda I. Shafer Publisher: Prentice Hall PTR; 1st edition (January 24, 2002ISBN-10: 0130912972 ISBN-13: 978-0130912978

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FF No. : 654

CS49102:: DATABASE MANAGEMENT SYSTEMS

Credits: 02 Prerequisites: Nil Objectives: To understand use of MS Excel and Macro programming as a data management application To understand importance of Database Management System (DBMS) over traditional file processing system To understand design of entity relationship and relational model To use SQL to create database objects, populate tables, and retrieve data Study relational databases such as MS Access and Oracle Mapping with PEOs :- II, III, (d) Unit I MS Excel for Data Handling and Macro Programming (5+1 Hrs) Teaching Scheme: - Theory 2 Hrs/Week

A. Introduction to MS Excel: Handling a small database using MS Excel, Data Import and Export facility; Functions and Formulas: Formulas with Several Operators and Cell Ranges, Using AutoCalculate; Data Analysis and PivotTables: Creating a PivotTable, Creating Subtotals; What-If Analysis, Macro Programming, Visual Basic Code, Prompting for User Input, Using If Then-Else Statement. B. Generate Reports and Charts, Mathematical, Database Functions. Unit II Introduction to DBMS and E-R Data Model (6+1 Hrs)

A. Data Storage: File Processing System, Disadvantages; DBMS: Definition, Need of DBMS, System Architecture of DBMS; ER Model: Entity, Entity Set, Attributes, Primary Key, Relationship, Types and Attributes of Relationship, Role, Cardinality Ratio, Participation Constraint. B. Data Abstraction, EER features. Unit III Introduction to Relational Model (5+1 Hrs)

A. Relational Data Model: Relation, Schema, Attributes, Tuples, Primary Key and Foreign Key, Relational Model Constraints, ER to Relational Mapping. B. Participation Constraints, Life Cycle of a Relational Database.
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Unit IV Structured Query Language (SQL)

(6+1 Hrs)

A. SQL: Introduction, SELECT Queries: Simple and Nested Queries, Set Membership, Aggregate Functions, Group by, Having Constructs, Join queries; DML: Insert, Delete and Update Queries, TCL; DDL: Create, Drop various Database Objects (Table, Table Constraints); Using SQL in MS Access, Oracle. B. Set Operations in SELECT, Alter various Database Objects (Table, Table Constraints). Unit V Introduction to MS Access (5+1 Hrs)

A. MS Access: Introduction to MS Access, Database Implementation, Defining keys, Schema Diagram, Query Builder, Designing Forms for data manipulation B. Generating Reports in MS Access. Text Books 1. Database System Concepts, Silberschatz, Korth, Sudarshan, McGraw Hill International Edition, ISBN- 0-07-228363-7, 4th Edition. 2. Computer Fundamentals With MS Office Applications, Saravanan N, Shanti D, Chennai, Scitech Publication, 2002, ISBN 81-87328-88-6 Reference Books 1. SQL, PL/SQL, Bayross Ivan, B P B Publications, New Delhi, ISBN 81-7656964-X, 3rd Edition. 2. Learning MS Office XP, Wempen F, Fulton J, Weixel S, BPB Publications, New Delhi, ISBN 81-7656-547-4, 2002.

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Department of Information Technology

FF No. : 654

CS49302:: DATABASE MANAGEMENT SYSTEMS

Credits: 01 Prerequisites: Nil Objectives: Use of MS Excel Database design using ER and Relational model Implementation of database system in MS Access, Oracle Use of SQL for data manipulation Mapping with PEOs :- II, III, (d) List of Practical 1. Use MS Excel for Data handling, apply Formula and Functions. 2. Generate Reports and Charts in MS Excel. 3. Implement Macro in MS Excel. 4. Draw an Entity-Relationship diagram for your proposed database. 5. Translate above E/R model to Relational model. 6. Create Database in MS Access. 7. Use Query Builder of MS Access. 8. Design Forms and Reports in MS Access. 9. Use SQL for Data manipulation and data retrieval in MS Access, Oracle. Text Books 1. Fundamentals of Database Systems, Elmasri and Navathe, Pearson Education, ISBN 81-297-0228-2, 4th Edition. 2. SQL, PL/SQL, Bayross Ivan, BPB Publications New Delhi, ISBN 81-7656964-X, 3rd Edition.
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Teaching Scheme: - Laboratory 2 Hrs/Week

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Reference Books 1. Oracle: Applications Development, Bayross Ivan, BPB Publications, New Delhi, ISBN 81-7656-912-7. 2. Learning MS Office XP, Wempen F, Fulton J, Weixel S, B P B Publication, ISBN 81-7366-606-7, 2002.

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FF No. : 654

CS:: CREDITS FOR LAB COURSES Composition for Selection of 5 Credits for Honors / Minor Course
A. Comprehensive Viva Voce Compulsory at the end of Semester VIII 1 Credit B. Elective Component a. Laboratory courses Maximum Credits - 2 ( for award of 1 Credit the lab course would have a teaching scheme of 2 Hrs. / week and a plan of 12 practicals) . The credit to be awarded as per the ISA and ESA guidelines for the compulsory lab courses. b. Research publication Maximum Credits 1 ( Research Publication in a Magazine / Transaction / Journal as decided by the honors / minor co-ordinator) c. Seminar - Maximum Credits 1 (Seminar to be given on a topic consistent with the scope of the Honors or Minor. The topic Selection is to be approved by the honors / minor coordinator. The assessment and evaluation scheme would as per the guidelines used for Technical Seminar at UG level by respective Dept.) d. Honors / Minors Project Maximum Credits 2 (Project Topic and Scope, its progress and final assessment consistent with the scope of the Honors or Minor. The topic Selection is to be approved by the honors / minor co-ordinator. The assessment would as per the guidelines and evaluation scheme used for Project Work at UG level by respective Dept.) e. Industrial Training Maximum credits 4 ( An Industrial Training in an Industry identified by the student, approved by the honors / minor co-ordinator & Head of Department. The assessment would as per the guidelines and evaluation scheme used for Industrial Training at UG level by respective Dept.)

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Note: a. 4 Credits would be awarded to the students for a complete 12 Week Industrial Training and meeting with the assessment and evaluation requirements. b. Provision can be made for the students unable to procure a 12 week Industrial Training. A 4 week or 8 week Industrial Training may also be offered. 2 credits will be awarded for 8 week Industrial Training and 1 Credit would be awarded to the students for a 4 Week Industrial Training, meeting with the assessment and evaluation requirements. c. No Industrial Training less than 4 weeks be considered for award of 1 Credit. d. No cumulative addition of Industrial Training period would be considered for award of credits.

The student is expected to earn 1 Credit from Part (A) and remaining 4 Credits from Part (B)

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ACADEMIC INFORMATION
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A)

Mid Semester Examination

1. Students reporting in morning slot will have examination in morning slot. Those in evening slot will have examination in evening slot. 2. 20 multiple choice based questions to be attempted in 30 minutes x no. of theory courses i.e. 100 questions in 150 minutes for F.E., 80 questions in 120 minutes for S.E., T.E.,B.E.,M.E., 20 questions in 30 minutes for Honors, Minor, Fast Track, etc. 3. A scrambled mix of questions will be generated through software. 4. Mid Semester Examination will be based on Unit II & Unit III. 5. There will be one mark for each correct answer and (-) 0.25 marks for every wrong answer. 6. For a typical 3 hour Mid Semester Examination, first 15 minutes would be used for student attendance, record keeping, seat allocation, log in procedure if any, etc. Next 150 minutes for actual examination. A timer indicating time remaining to be provided by ERP. 15 minutes for processing & results. 7. A visual alarm / flash would be given 10 minutes before completion of 150 minutes as a warning. For auto generation of every theory course result out of 20 and dispatch of the marks on student mobile and mail ID as well as parent mail ID. 8. No repeat examination under any circumstances.

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B)

Seminar Conduct, Evaluation, etc.

Seminar (T.E.- Semester I)

1. Review I: during Mid Semester Examination (Compulsory) as per the Academic Calendar. 2. Review II : The last week of November (Optional) 3. For poor performing students identified by the examination panel, a second review to be taken. Review II optional for other students. For Review II, deduction of 10 marks will take place. 4. Seminar is an individual activity with separate topic and presentation. 5. Duration of presentation 20 minutes Question and answer session 10 minutes

Seminar Evaluation Scheme :

1. Attendance during Semester 2. Attendance during Seminar presentation self & peer 3. Relevance of Seminar topic 4. Timely Abstract submission 5. Literature review 6. Technical contents 7. Presentation 8. Question & answer Session

10 marks 10 marks 10 marks 10 marks 10 marks 10 marks 25 marks 15 marks --------------100 marks =========

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C)

Equivalence

For the courses belonging to 2008 structure counseling sessions for failure students will be arranged. The Head of Department will appoint faculty identified as subject experts as counselors. The previous examination scheme i.e.

Class Test 10 marks T.A. through Home assignment 10 marks A written paper MSE 30 marks A written paper ESE 50 marks

Will be followed. The entire processing based on 2008 structure related coding scheme will be followed. Counseling + Administration + Examination charges will be the basis for fees considered for such students.

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D)

Extra Credits

A student planning to take extra credits may be considered under following categories :

(a) A student carrying a backlog and re-registering for the previous course Re-registration charges as applicable. Consideration of all courses registered for during that Semester of Academic Year for SPI calculation. (b) Student planning to take extra courses as a fast track opportunity Administration, processing and examination charges will be considered. In any case the student has to pay the college fees for four years. This fast track facility would enable the student to undergo an industrial training, an exchange programme, research contribution in I.I.T. under scheme such as KVPY without any academic compromises for credit transfer. The phasewise development and completion of project activity cannot be considered at an accelerated pace under fast track scheme. The registration under fast track is subject to having a CPI 8.0 or above and no backlog for consideration of registration to an additional course. (c) Students opting for earning extra credits by selection of courses in addition to the courses prescribed by respective BOS which are single Semester activities and not the part of Honors / Minor scheme. Such students will be expected to pay charges equivalent to re-registration (proportionate credit based payment). The registration for such courses is subject to permission given by the Chairman BOS of the Board in the purview of which the subject is identified. Such permissions will be given based on meeting with prerequisite subject. 1. In any case (a), (b) or (c) the candidate cannot register for more than 8 credits. 2. A suitable reflection of completion of the said course will be made in the candidates Grade statement. For part (c) a separate grade & GPA will be calculated. That GPA will not be clubbed with the other regular courses for SPI, CPI calculation.

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E)

Home Assignment

A Home Assignment Calendar for Semester is prepared as under:

Week No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Activity No Home Assignments No Home Assignments No Home Assignments S1 / S2 HA1 S3 / S4 / S5* - HA1 S1 / S2 HA2 S3 / S4 / S5* - HA2 S1 / S2 HA3 S3 / S4 / S5* - HA3 S1 / S2 HA4 S3 / S4 / S5* - HA4 S1 / S2 HA5 S3 / S4 / S5* - HA5 No Home Assignments No Home Assignments No Home Assignments

The Home Assignments will be based on the self study component i.e. part B of every theory course syllabus. The Saturday or last working day will be the default deadline for submission of Home Assignment of that week. For example by the Saturday ending Week No. 9, Home Assignment No. 3 for subject S3/ S4/ S5 (if applicable) must be submitted.

1. *S5 can be OE1 / OE2 / OE3 / Honors/ Minor / Re-registration category (a) / Category (b) / Category (c). 2. For subjects S1, S2, S3, S4 & S5 (if any), the composition of the Teacher Assessment marks will be as follows :
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Department of Information Technology

S1,S2 with Tutorial

S3,S4,S5 without Tutorial

Home Assignment Tutorial Test Attendance : (a) > 90% (b) 75% to 90% (c) <75%

30 marks 30 marks 30 marks

30 marks

30 marks

10 marks 5 marks 0 marks

10 marks 5 marks 0 marks

100 marks converted to 70 marks converted to 15 15 marks marks

Explanation :

1. Tutorials to be conducted with continuous assessment throughout the Semester. Final assessment out of 30 marks for Tutorial. 2. Class Test to be conducted during a regular theory class within the time period mentioned in the Academic Calendar. 3. Class Test marks are to be entered immediately as mentioned in Academic Calendar. 4. Attendance percentage to be calculated at the end of Semester after completing all lectures as per the lesson plan.

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F)

Mini Project

Teaching Scheme: Theory 0 ; Tutorial 0 ; Laboratory 2 Hrs / week

For F.E., S.E. & T.E. students in every Semester a Mini Project be carried out. The objectives behind the Mini Project are:

1. Scope for creativity 2. Hands on experience 3. Academic occupancy

Mini Project will be based on all subjects of that Semester except GP.

1. The Semester Mini Project will be for a group of 3 to 5 students. Head of Department to appoint Mini Project Guides. 1 credit will be awarded to the candidate after the viva voce and project demonstration at the End of Semester. 2. Group formation, discussion with faculty advisor, formation of the Semester Mini Project statement, resource requirement, if any should be carried out in the earlier part of the Semester. The students are expected to utilize the laboratory resources before or after their contact hours as per the prescribed module.

The Assessment Scheme will be: (a) Continuous Assessment (b) End Semester 50 marks 50 marks --------------100 marks ==========

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G)

Project Stage I Evaluation

The project activity is broken in 3 stages:

The Project Stage I will be in T.E Semester II irrespective of student module. The evaluation of Project Stage I will be as follows:

Group formation & attendance / reporting to guide Topic finalization / Statement Literature Survey Abstract Presentation

20 marks 20 marks 20 marks 20 marks 20 marks

Project Stage II and Project Stage III evaluations will be based on Department specific norms.

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H)

Composition for Selection of 5 Credits for Honors / Minor Course (Applicable for B11 and A11 Patterns) (A) Comprehensive Viva Voce Compulsory at the end of Semester VIII 1 Credit (B) Elective Component a. Laboratory courses Maximum Credits - 2 (for award of 1 Credit the lab course would have a teaching scheme of 2 Hrs. / week and a plan of 12 practicals). The credit to be awarded as per the ISA and ESA guidelines for the compulsory lab courses. b. Research publication Maximum Credits 1 (Research Publication in a Magazine / Transaction / Journal as decided by the honors / minor co-ordinator) c. Seminar - Maximum Credits 1 (Seminar to be given on a topic consistent with the scope of the Honors or Minor. The topic Selection is to be approved by the honors / minor co-ordinator. The assessment and evaluation scheme would as per the guidelines used for Technical Seminar at UG level by respective Dept.) d. Honors / Minors Project Maximum Credits 2 (Project Topic and Scope, its progress and final assessment consistent with the scope of the Honors or Minor. The topic Selection is to be approved by the honors / minor co-ordinator. The assessment would as per the guidelines and evaluation scheme used for Project Work at UG level by respective Dept.) e. Industrial Training Maximum credits 4 (An Industrial Training in an Industry identified by the student, approved by the honors / minor co-ordinator & Head of Department. The assessment would as per the guidelines and evaluation scheme used for Industrial Training at UG level by respective Dept.)

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Note : a. 4 Credits would be awarded to the students for a complete 12 Week Industrial Training and meeting with the assessment and evaluation requirements b. Provision can be made for the students unable to procure a 12 week Industrial Training. A 4 week or 8 week Industrial Training may also be offered. 2 credits will be awarded for 8 week Industrial Training and 1 Credit would be awarded to the students for a 4 Week Industrial Training, meeting with the assessment and evaluation requirements c. No Industrial Training less than 4 weeks be considered for award of 1 Credit d. No cumulative addition of Industrial Training period would be considered for award of credits The student is expected to earn 1 Credit from Part (A) and remaining 4 Credits from Part (B)

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