V315B6-L02 TFT LCD Specs & Features
V315B6-L02 TFT LCD Specs & Features
kr
Customer: __________________________
TV Head Division
Approved By
LY Chen
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- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION ------------------------------------------------------- 4
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
9. PACKAGING ------------------------------------------------------- 27
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
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REVISION HISTORY
Page
Version Date Section Description
(New)
Ver 2.0 Feb., 13, 09’ All All Approval Specification was first issued.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V315B6-L02 is a 31.5” TFT Liquid Crystal Display module with 4U-type CCFL Backlight unit and 1ch-LVDS
interface. This module supports 1366 x 768 WXGA format and can display 16.7M (6bit+Hi-FRC) colors. The
inverter module for backlight is built-in.
1.2 FEATURES
- High Brightness 450 nits
- Ultra-high Contrast Ratio 2600:1
- Faster Response Time (Gray to Gray Average 6.5ms)
- High Color Saturation NTSC 72%
- Ultra Wide Viewing Angle: 176(H)/176(V) (CR≥20) with Super MVA Technology
- DE (Data Enable) Only Mode
- LVDS (Low Voltage Differential Signaling) Interface
- Color Reproduction (Nature Color)
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
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100
90
80
60
Operating Range
40
20
10 Storage Range
-40 -20 0 20 40 60 80
Temperature (ºC)
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Power Supply Voltage VCC 11.4 12.0 12.6 V (1)
Power Supply Ripple Voltage VRP - - 100 mV
Rush Current IRUSH - - 3.9 A (2)
White - 0.45 0.52 A
Power Supply Current Black ICC - 0.33 - A (3)
Vertical Stripe - 0.45 - A
Differential Input High
VLVTH - - +100 mV
Threshold Voltage
LVDS
Differential Input Low
Interface VLVTL -100 - - mV
Threshold Voltage
Common Input Voltage VLVC 1.125 1.25 1.375 V
Terminating Resistor RT - 100 - ohm
CMOS Input High Threshold Voltage VIH 2.7 - 3.3 V
interface Input Low Threshold Voltage VIL 0 - 0.7 V
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+12.0V
Q1 Si4435DY
Vcc
C3
FUSE (LCD Module Input)
R1 1uF
1K
VR1
47K
(Low to High)
(Control Signal)
R2
Q2 C1
SW
2N7002
1K
0.01uF
+12V
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc =12V, Ta = 25 ± 2 ºC, f v = 60 Hz,
whereas a power dissipation check pattern below is displayed.
R G B R G B
B R G B R G B R
B R G B R G B R
R G B R G B
Active Area
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Note (1) Lamp current is measured by AC current probe Tektronix P6022 as shown below:
HV (Pink) 1 A
HV (White)
2 A
HV (Pink) 1 A
LCD HV (White)
2 A Inverter
Module HV (Pink)
1 A
HV (White)
2 A
HV (Pink) 1 A
HV (White)
2 A
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second under starting up
duration. Otherwise the lamp could not be lighted on completed.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display
input signals, and it may result in line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at the
center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25 2
and IL = 7.5~8.5 mARMS.
Note (5) The power supply capacity should be higher than the total inverter power consumption PBL. Since
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered for
the changing loading when inverter dimming.
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Note (6) The measurement condition of Max. value is based on 31.5" backlight unit under input voltage 24V,
average lamp current 8.3 mA and lighting 30 minutes later.
Test Value
Parameter Symbol Unit Note
Condition Min. Typ. Max.
ON 2.0 5.0 V
On/Off Control Voltage VBLON
OFF 0 0.8 V
Internal PWM Control MAX 3.0 3.15 3.3 V Maximum duty ratio
VIPWM
Voltage
MIN 0 V Minimum duty ratio
External PWM Control HI 2.0 5.0 V Duty on
VEPWM
Voltage
LO 0 0.8 V Duty off
Error Signal ERR V
VBL Rising Time Tr1 30 ms
10%-90%VBL
VBL Falling Time Tf1 30 ms
Control Signal Rising Time Tr 100 ms
Control Signal Falling Time Tf 100 ms
PWM Signal Rising Time TPWMR 50 us
PWM Signal Falling Time TPWMF 50 us
Input impedance RIN 1 M
PWM Delay Time TPWM 100 ms
Ton 300 ms
BLON Delay Time
Ton1 300 ms
BLON Off Time Toff 300 ms
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to
change the internal/external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure. For a certain
reason, the inverter has a possibility to be damaged with wrong power sequence and control
signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL PWM signal BLON
Turn OFF sequence: BLOFF PWM signal VBL
Note (4) When inverter protective function is triggered, ERR will output open collector status; In normal
operation, the signal of ERR will output a low level voltage.
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Tr1 Tf1
VBL
TPWMR
2.0V T PWMF
V EPWM
0.8V
0 Floating
TPWM
3.15V
V IPWM
0 Floating Int. Dimming Function
VW
External External
PWM PWM Duty
Period
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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
RX0(+/-)
FRAME BUFFER
SCAN DRIVER IC
P-TWO 187053-30091)
INPUT CONNECTOR
TFT LCD PANEL
093G30-B0001A or
RX1(+/-)
(1366x3x768)
(STARCONN
RX2(+/-)
RX3(+/-) TIMING
RXCLK(+/-)
CONTROLLER
Vcc
GND
DC/DC CONVERTER & DATA DRIVER IC
REFERENCE VOLTAGE
CN1
VBL CN2-CN5:
CviLux CP042CP1MR0-LF or equal
GND INVERTER CONNECTOR BACKLIGHT
ERR CN1: CviLux CI0114M1HR0-LA or
equal UNIT
BLON
I_PWM
E_PWN
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Rx0+ 51
100pF RxOUT
TxIN Rx0- R0-R7
R0-R7 51
Rx1+ 51 G0-G7
G0-G7 100pF
Rx1-
51 B0-B7
B0-B7
Rx2+ 51
100pF
DE Rx2- DE
51
Rx3+ 51
100pF
Rx3-
51
Host
CLK+ 51
Graphics PLL 100pF
DCLK
CLK- PLL
Controller 51
Timing
Controller
LVDS Transmitter LVDS Receiver
THC63LVDM83A THC63LVDF84A
(LVDF83A)
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
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SELLVDS = H (JEIDA)
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Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Colors Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Red(253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red
Red(254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Green(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Green(253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green
Green(254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green(255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Blue(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Blue(253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue
Blue(254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue(255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note (1) 0: Low Level Voltage, 1: High Level Voltage
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc 60 76 82 MHZ
LVDS Receiver Clock Input cycle to
Trcl - - 200 ps
cycle jitter
Setup Time Tlvsu 600 - - ps
LVDS Receiver Data
Hold Time Tlvhd 600 - - ps
Fr5 47 50 53 Hz (2)
Frame Rate
Fr6 57 60 63 Hz
Vertical Active Display Term Total Tv 778 806 888 Th Tv=Tvd+Tvb
Display Tvd 768 768 768 Th -
Blank Tvb 10 38 120 Th -
Total Th 1442 1560 1936 Tc Th=Thd+Thb
Horizontal Active Display Term Display Thd 1366 1366 1366 Tc -
Blank Thb 76 194 570 Tc -
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would operate abnormally.
(2) Please refer to 5.1 for detail information.
Tv
Tvd
Tvb
DE
Th
DCLK
Tc
Thd
Thb
DE
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Tc
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T 3T 5T 7T 9T 11T 13T
14 14 14 14 14 14 14
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VCC
0.1VCC 0.1Vcc
0V
0.5T110ms T1 T3
0T250ms
0T350ms
500ms T4 T2 T4
VALID
LVDS Signals
0V
Power On Power Off
0T7T2
0T8T3
T7 T8
Option Signals
(SELLVDS, ODSEL)
T5 T6
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If T2<0,
that maybe cause electrical overstress failures.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
o
Ambient Temperature Ta 25±2 C
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 5.0 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current IL 8.0 ± 0.5 mA
Oscillating Frequency (Inverter) FW 63±3 KHz
Frame rate Fr 60 Hz
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θy- θy+
6 o’clock
y- x+ θX+ = 90º
θy- = 90º
100%
90%
Optical
Response
10%
0%
Time
Gray to gray Gray to gray
switching time switching time
The driving signal means the signal of luminance 0%, 20%, 40%, 60%, 80%, 100%.
Gray to gray average time means the average switching time of luminance 0%,20%,
40%, 60%, 80%, 100% to each other.
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LCD Module
LCD Panel
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Horizontal Line
D
D/4 D/2 3D/4
Vertical Line
W/4 1 2
X=1 to 5
3W/4 3 4
Active Area
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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
CHI MEI
OPTOELECTRONICS V315B6 -L02 Rev. XX
RoHS XXXX
XXXXXXXYMDLNNNN
Serial No.
Product Line
Revision
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 5 LCD TV modules / 1 Box
(2) Box dimensions: 826(L) X 376 (W) X 540 (H) mm
(3) Weight: approximately 31.5 Kg (5 modules per box)
LCD TV Module
Anti-static Bag
Cushion
Carton Label
Carton
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(L700*50*50mm t=5)
Corner Protector Corner Protector
Corner Protector PP Belt
PE Sheet PE Sheet
PE Sheet PP Belt
PP Belt Film
Film Film
PE Sheet
Film
(L1080*50*50mm t=5)
(L1150*W850*140mm)
(L1350*50*50mm t=3) (L700*50*50mm t=5)
(L1150*W850*140mm)
(L1150*W850*140mm)
(L1080*50*50mm t=5)
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10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
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