BGU7061 Variable Gain Amplifier Module
BGU7061 Variable Gain Amplifier Module
5
Analog high linearity low noise variable gain amplifier
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1. Product profile
1.3 Applications
Cellular base stations, remote radio heads
3G, LTE infrastructure
Low noise applications with variable gain and high linearity requirements
Active antenna
NXP Semiconductors BGU7061
Analog high linearity low noise variable gain amplifier
[1] high gain mode: GS1 = LOW; GS2 = HIGH (see Table 15)
[2] low gain mode: GS1 = HIGH; GS2 = LOW (see Table 15)
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2. Pinning information
2.1 Pinning
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3. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
BGU7061 HLQFN16R plastic thermal enhanced low quad flat package; SOT1301-1
no leads; 16 terminals; body 8 8 1.3 mm
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4. Functional diagram
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5. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0 6 V
Vctrl(Gp) power gain control voltage 1 +3.6 V
VI(GS1) input voltage on pin GS1 1 +3.6 V
VI(GS2) input voltage on pin GS2 1 +3.6 V
Pi(RF)CW continuous waveform RF input power Vctrl(Gp) = 0 V; 777 MHz f 915 MHz
high gain mode [1] - 10 dBm
low gain mode [2] - 15 dBm
Tj junction temperature - 150 C
Tstg storage temperature 40 +150 C
VESD electrostatic discharge voltage Human Body Model (HBM); according to - 2 kV
ANSI/ESDA-JEDEC JS-001-2020-Device Testing,
Human Body Model
Charged Device Model (CDM); according to - 750 V
JEDEC standard 22-C101
[1] high gain mode: GS1 = LOW; GS2 = HIGH (see Table 15)
[2] low gain mode: GS1 = HIGH; GS2 = LOW (see Table 15)
7. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-case) thermal resistance from junction to case [1] 42 K/W
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8. Characteristics
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
8.6 Graphs
DDD DDD
*S *S
G% G%
I *+] I *+]
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
Vctrl(Gp) = 0 V. Vctrl(Gp) = 0 V.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 3. Power gain as a function of frequency in high Fig 4. Power gain as a function of frequency in low
gain mode; typical values gain mode; typical values
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DDD DDD
5/LQ 5/LQ
G% G%
I *+] I *+]
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
Vctrl(Gp) = 0 V. Vctrl(Gp) = 0 V.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 5. Input return loss as a function of frequency in Fig 6. Input return loss as a function of frequency in
high gain mode; typical values low gain mode; typical values
DDD DDD
VSDUV VSDUV
G% G%
6
6
6
6
6
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GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
Vctrl(Gp) = 0 V; Tamb = 25 C. Vctrl(Gp) = 0 V; Tamb = 25 C.
Fig 7. S-parameters as a function of frequency in Fig 8. S-parameters as a function of frequency in low
high gain mode; typical values gain mode; typical values
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DDD DDD
. .
I *+] I *+]
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
Vctrl(Gp) = 0 V. Vctrl(Gp) = 0 V.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 9. Rollet stability factor as a function of Fig 10. Rollet stability factor as a function of
frequency in high gain mode; typical values frequency in low gain mode; typical values
DDD DDD
,3, ,3,
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 900 MHz. f = 900 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 11. Input third-order intercept point as a function Fig 12. Input third-order intercept point as a function
of power gain in high gain mode; typical of power gain in low gain mode; typical values
values
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DDD DDD
,3, ,3,
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 788 MHz. f = 788 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 13. Input third-order intercept point as a function Fig 14. Input third-order intercept point as a function
of power gain in high gain mode; typical of power gain in low gain mode; typical values
values
DDD DDD
,3, ,3,
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 830 MHz. f = 830 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 15. Input third-order intercept point as a function Fig 16. Input third-order intercept point as a function
of power gain in high gain mode; typical of power gain in low gain mode; typical values
values
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
DDD DDD
,3, ,3,
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 850 MHz. f = 850 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 17. Input third-order intercept point as a function Fig 18. Input third-order intercept point as a function
of power gain in high gain mode; typical of power gain in low gain mode; typical values
values
DDD DDD
3L G% 3L G%
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 900 MHz. f = 900 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 19. Input power at 1 dB gain compression as a Fig 20. Input power at 1 dB gain compression as a
function of power gain in high gain mode; function of power gain in low gain mode;
typical values typical values
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
DDD DDD
3L G% 3L G%
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 788 MHz. f = 788 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 21. Input power at 1 dB gain compression as a Fig 22. Input power at 1 dB gain compression as a
function of power gain in high gain mode; function of power gain in low gain mode;
typical values typical values
DDD DDD
3L G% 3L G%
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 830 MHz. f = 830 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 23. Input power at 1 dB gain compression as a Fig 24. Input power at 1 dB gain compression as a
function of power gain in high gain mode; function of power gain in low gain mode;
typical values typical values
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
DDD DDD
3L G% 3L G%
G%P G%P
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 850 MHz. f = 850 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 25. Input power at 1 dB gain compression as a Fig 26. Input power at 1 dB gain compression as a
function of power gain in high gain mode; function of power gain in low gain mode;
typical values typical values
DDD DDD
1) 1)
G% G%
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 900 MHz. f = 900 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 27. Noise figure as a function of power gain in Fig 28. Noise figure as a function of power gain in low
high gain mode; typical values gain mode; typical values
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DDD DDD
1) 1)
G% G%
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 788 MHz. f = 788 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 29. Noise figure as a function of power gain in Fig 30. Noise figure as a function of power gain in low
high gain mode; typical values gain mode; typical values
DDD DDD
1) 1)
G% G%
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 830 MHz. f = 830 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 31. Noise figure as a function of power gain in Fig 32. Noise figure as a function of power gain in low
high gain mode; typical values gain mode; typical values
BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
DDD DDD
1) 1)
G% G%
*S G% *S G%
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 850 MHz. f = 850 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 33. Noise figure as a function of power gain in Fig 34. Noise figure as a function of power gain in low
high gain mode; typical values gain mode; typical values
DDD DDD
*S *S
G% G%
9FWUO *S 9 9FWUO *S 9
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 900 MHz. f = 900 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 35. Power gain as a function of power gain control Fig 36. Power gain as a function of power gain control
voltage in high gain mode; typical values voltage in low gain mode; typical values
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DDD DDD
*S *S
G% G%
9FWUO *S 9 9FWUO *S 9
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 788 MHz. f = 788 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 37. Power gain as a function of power gain control Fig 38. Power gain as a function of power gain control
voltage in high gain mode; typical values voltage in low gain mode; typical values
DDD DDD
*S *S
G% G%
9FWUO *S 9 9FWUO *S 9
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 830 MHz. f = 830 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 39. Power gain as a function of power gain control Fig 40. Power gain as a function of power gain control
voltage in high gain mode; typical values voltage in low gain mode; typical values
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DDD DDD
*S *S
G% G%
9FWUO *S 9 9FWUO *S 9
GS1 = LOW; GS2 = HIGH; VCC1 = 5 V; VCC2 = 5 V; GS1 = HIGH; GS2 = LOW; VCC1 = 5 V; VCC2 = 5 V;
f = 850 MHz. f = 850 MHz.
(1) Tamb = 40 C (1) Tamb = 40 C
(2) Tamb = +25 C (2) Tamb = +25 C
(3) Tamb = +85 C (3) Tamb = +85 C
Fig 41. Power gain as a function of power gain control Fig 42. Power gain as a function of power gain control
voltage in high gain mode; typical values voltage in low gain mode; typical values
9. Application information
Table 16. List of components
For application circuit see Figure 43.
Component Description Value Remarks
C1, C2 capacitor 1 nF [1] 0402
C3, C4, C5, C6, C12 capacitor 100 pF [1] 0402
C7, C8, C9, C10, capacitor optional
C11, C17 capacitor 100 nF [1] 0402
C13, C14, C15, C16 capacitor optional
L1, L2 inductor 10 nH [2] 0402
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BGU7061 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
11. Abbreviations
Table 17. Abbreviations
Acronym Description
3G 3rd Generation
ESD ElectroStatic Discharge
LNA Low Noise Amplifier
LTE Long Term Evolution
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information is available on the Internet at URL http://www.nxp.com.
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15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 4
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 Recommended operating conditions. . . . . . . . 5
7 Thermal characteristics . . . . . . . . . . . . . . . . . . 5
8 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8.1 Characteristics at f = 900 MHz . . . . . . . . . . . . . 6
8.2 Characteristics at f = 788 MHz . . . . . . . . . . . . . 7
8.3 Characteristics at f = 830 MHz . . . . . . . . . . . . . 8
8.4 Characteristics at f = 850 MHz . . . . . . . . . . . . 10
8.5 Gain switch truth table . . . . . . . . . . . . . . . . . . 11
8.6 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9 Application information. . . . . . . . . . . . . . . . . . 21
10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 23
11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
13.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
13.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
14 Contact information. . . . . . . . . . . . . . . . . . . . . 26
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.