EN199906
EN199906
£ 2.85
PC TOPICS:
make your own music CDs
the new ST7 microcontroller
EEPROM for BASIC control computer
68HC11 evaluation system
weather
eat her-sat
-satellit
ellitee decoder
weather-satellite
from radio
from radio signal to
to comput
com puter
er display
computer
EEDTTS Pro
EED Pro
our new
new
model train
train
control
contr ol
sysstem
sy
The ST family of mic roc ontrollers is used a lot in Elektor
Elec tronic s projec ts. The well-known ST6 c ontroller has
now ac quired a sturdy younger brother in the form of
the ST7 proc essor. In this artic le, we take a c loser look
at the new member of the family.
n e w ST 7 co n t r o l l e r s
f a s t e r, m o r e v e r s a t i l e a n d w i t h m o r e f e a t u r e s
• 16-bit timer
• watc hdog timer
• A/D c onverter
• D/A c onverter
• async hronous serial interfac e
• SPI (serial peripheral interfac e)
• I2C
• USB
• CAN
Controller design
The ST7 processor complies with the Von
Neuma nn a rc hitec ture, whic h mea ns
tha t a ll system c omp onents (suc h a s
memory, timers and I/O) are loc ated in
a single memory spac e.
The processor has an 8-bit internal data
Figure 1. The ST7 is a p owerful m ic roc ontroller, whic h c om b ines a lot of p roc essing
struc ture. It has six registers (A, X, Y, PC,
p ower with num erous I/O func tions. Som e of the I/O func tions a re not inc lud ed in c erta in
SP and CC), including a 16-bit program
versions.
c ounter (PC) and a 16-bit stac k pointer
(SP). The ST7 is c onsiderably faster than
its p red ec essor, the ST6. This is d ue to
the fa c t tha t it works with a p a ra llel is used for log ic a l a nd a rithmetic hold s fla g b its tha t a re more or less
interna l b us, while the ST6 ha s a seria l instruc tions. Instruc tions that c onsist of independent of eac h other. For exam-
interna l struc ture. The ST7 p roc essor only two op era nd s a nd a lso use two p le, if the result of a n a d d ition is zero,
uses 63 instruc tions with 17 d ifferent op era tors a re only p ossib le if one of the Z fla g will b e a c tive, b ut it will b e
addressing options. The instruc tion set the two op era nd s is held in the a c c u- reset for any other result. If the result of
inc ludes several powerful instruc tions, mula tor. Instruc tions tha t emp loy only an operation is negative, the N flag will
suc h as an unsigned 8 ↔ 8 multiplic a- one op era nd , suc h a s inc rement, b e a c tiva ted , a nd it will simila rly b e
tion, bit manipulations, various bit/byte d ec rement, c omp lement, c omp a re, reset for any other result. The CC regis-
c onversions a nd p owerful b ra nc hing test for neg a tive or zero, b it c omp a re ter saves the flag bits after each instruc-
op tions. The p erip hera l ha rd wa re is a nd so on, c a n either d irec tly refer- tion has been executed. They can sub-
c ontrolled via sp ec ia lized interrup ts enc e a memory loc a tion or use the seq uently b e used b y a c ond itiona l
and registers. Figure 1 shows the over- ac c umulator. jump instruction. The following flags are
all organization of the proc essor. The condition code register (CC) c ontained in the CC register:
Sinc e the a d d ress b us is 16 b its wid e,
the proc essor c an address up to 64 kB.
This is more tha n a d eq ua te for the
intend ed a p p lic a tions of the ST7. To
make the c ode espec ially effic ient, a
sp ec ia l 256-b yte b loc k (0–0FFH) is
reserved a s ‘p a g e 0’. This mea ns tha t
the memory spac e is divided into two
reg ions. The reserved p ortion c a n b e
ac c essed using an 8-bit address, while
the remainder of the memory c an only
be ac c essed using the 16-bit address
mode. All I/O ports are located in page
0 in a reserved b loc k b etween 000 H
a nd 080 H. The memory struc ture is
depic ted in Figure 2.
The proc essor works at a c loc k rate of
16 MHz. It can be put into a WAIT, SLOW
or HALT sta te und er softwa re c ontrol.
This allows its energy consumption to be
drastic ally reduc ed.
Register usage
As a lrea d y mentioned , the ST7 ha s six
registers.
The a ccumula tor (A) is na tura lly the Figure 2. As exp ec ted, a n 8-b it p roc essor ha s 64 kB of a d d ress sp a c e. This d ia gra m
best-known register in the proc essor. It shows how the m em ory sp a c e is a lloc a ted.
Figure 4. The ST7 Develop m ent Kit from ST Mic roelec tronic s is a good sta rting p oint for getting a c q ua inted with these p roc essors.
Win d o w s 9 8
Tip s & Tr ick s
NFS is the ma kes extensive use of p rotec ted - use the Windows Update feature to
Unix Network File System mode 32-bit devic e drivers. Unfortuna- loc a te a nd insta ll a newer d evic e
Windows 98 uses the FAT32 file system to tely, d ep end ing on your ha rd wa re (or driver.
store files on your disk. In a similar way, a g e of your ha rd wa re), Wind ows 98
the Unix operating system uses the NFS or may have to use real-mode 16-bit dri- Optimizing the
Network File System. In general, FAT32 vers for sp ec ific ha rd wa re d evic es. Windows 98 File System for
and NFS define how the operating sys- Unfortunately, real-mode device drivers
tems store files on disk. Windows 98 and are muc h slower than their 32-bit pro-
your Hard Disk
Unix store files differently. As a result, using tec ted -mod e c ounterp a rts, whic h will To imp rove your system p erforma nc e,
the FAT32 file system, Windows 98 could slow down your system performanc e. Wind ows 98 ta kes a d va nta g e of d isk
As a rule, you should use 32-bit drivers c a c hes whic h resid e in your PC’s fa st
whenever p ossib le. By using the Win- elec tronic RAM. Windows 98 c an per-
d ows 98 Up d a te Wiza rd , you c a n form rea d a nd write c a c hing . As your
loc a te a nd insta ll new d evic e d rivers lea rned , when Wind ows 98 p erforms
muc h ea sier tha n users c ould in the write-behind c ac hing, Windows 98 will
past. To determine if a devic e driver is temporarily plac e the information that
using a real-mode 16-bit or a virtual 32- your programs write to disk into its disk
bit mode devic e driver, perform these c ac he. Later, when Windows 98 has a
steps: free moment, it will write the c a c he’s
1. Clic k your mouse on the Start menu contents to disk. Because your program
a nd then selec t the Setting s menu does not have to wait for the slow disk-
Control Panel option. Windows 98, in write operation to c omplete, your pro-
Figure 7. To a c c ess files on a Unix d isk, turn, will open the Control Panel win- gram’s performance improves. Unfortu-
you m a y need to insta ll NFS c lient soft- dow. na tely, if the short interva l of time
wa re on your system . 2. Within the Control Pa nel wind ow, between when Windows 98 plac es the
double-click your mouse on the Sys- informa tion into the c a c he a nd when
not read a Unix disk. Likewise, using NFS, tem ic on. Wind ows 98 will d isp la y Windows 98 rec ords the information on
Unix could not read a Windows 98 disk. the System Properties dialog box. your d isk, your system exp erienc es a
If you c onnec t to a Unix c omputer that 3. Within the System Prop erties d ia log p ower outa g e or d isk error, you ma y
resides on your network or to which you box, c lic k your mouse on the Perfor- lose the informa tion in c a c he. Worse
dial in, you may need to install software manc e tab. Windows 98, in turn, will yet, your program thinks the information
support within Windows 98 that lets your display the Performanc e sheet. was correctly written to disk. Because of
system a c c ess files stored on a n NFS 4. Within the Performa nc e sheet, look this potential data loss, users often turn
disk. In most c ases, your network admi- for the message “Your system is con- off write-behind c ac hing.
nistra tor will insta ll a nd c onfig ure the figured for optimal performanc e.” If Depending on your willingness to trade
NFS software for you. Figure 7, for exa- you find the message, your system is off risk of data loss for improved perfor-
mple, shows the Selec t Network Client using a ll a va ila b le virtua l 32-b it manc e, you may want to let Windows
software dialog box that shows FTP Soft- devic e drivers. If you see a different 98 perform write-behind caching. If you
ware, Inc .’s NFS c lient. messa g e, c lic k your mouse on the a re using write-b ehind c a c hing a nd
Devic e Manager tab. Windows 98, you a re exp erienc ing d isk errors on a
For Optimal Performance, in turn, will d isp la y the Devic e remova b le d rive, you c a n p erform
Ensure that Your System is Ma na g er sheet. Within the Devic e these step s to d isa b le write-b ehind
Manager, examine the various devi- c ac hing for that drive:
Using 32-Bit Device Drivers c es and c hec k if they are using 32- 1. Selec t the Sta rt menu Setting s
To improve performanc e, Windows 98 bit drivers. If you find an older driver, options. Windows 98, in turn, will dis-
S/ P D I F co n n e ct i o n s
f or t he PC
u s e f u l , o r a n u n n e ce s s a r y l u x u r y ?
stand what happens to the digital sig-
nal inside the c ard.
The hea rt of this sound c a rd is a DSP
chip that performs all digital processing
a t a fixed sa mp ling ra te of 48 kHz. All
digital input data are c onverted to this
sampling rate by means of a sampling
rate c onverter. The advantage of this is
tha t a ll typ es of p roc essing , suc h a s
adjusting the volume via the Windows
mixing p a nel, c a n b e p erformed b y
the DSP without the need for any extra
c alc ulations to c onvert between differ-
ent sampling rates.
The d ig ita l outp ut sig na l a lso works
with a fixed sampling rate, whic h is the
sa me 48 kHz. This is exc ellent for
rec ord ing d a ta from the PC on a DAT
rec ord er, sinc e this is the sta nd a rd
sampling rate for suc h rec orders. How-
ever, if you feed the digital signal from
a CD p la yer to the sound c a rd , the
Figure 1. The Sound b la ster Live! ha s two c onnec tor b ra c kets. The d igita l c onnec tors a re
sa mp ling ra te c onverter will c ha ng e
loc a ted on the sec ond b ra c ket (p hoto: Crea tive).
the sig na l from 44.1 kHz to 48 kHz.
Althoug h this p roc ess is p ra c tic a lly
loss-free, it still a mounts to a n extra
c onversion step . And if you wa nt to
lowly b ut surely, a fford a b le sound to pass through an intermediate ana- outp ut the d ig ita l sig na l from the
c a rd s with a n inp ut a nd /or outp ut for logue stage. sound c a rd to a d evic e tha t uses a
S/PDIF sig na ls a s a sta nd a rd fea ture sampling rate of 44.1 kHz, you are sim-
are bec oming available in inc reasing Only 48 kHz? p ly out of luc k, sinc e tha t is not p ossi-
numbers. The S/PDIF interfac e take the ble with this c ard.
form of c oaxial (Cinc h) or optic al-fibre One of the c urrently most p op ula r Still, these restric tions a re not a s b a d
connectors. With this interface, it is pos- sound c a rd s, the Sound b la ster Live!, a s they ma y seem a t first g la nc e, a s
sib le to tra nsfer d ig ita l a ud io sig na ls has a digital input and a digital output long as you first c arefully think through
from the c omp uter to a rec ord er (or as standard features. However, before wha t you wa nt to d o with the S/PDIF
the other wa y a round ) without ha ving you start using them, you should under- c onnec tion.
Other cards
The Soundblaster Live! is fully adequate
for the vast majority of PC users, for 99%
of a ll a p p lic a tions. Another g enera l-
p urp ose sound c a rd tha t ha s d ig ita l
inp uts a nd outp uts is the Aud iowerk2
c ard from Emagic , at around £200.
However, if you d o a lot of work with
digital audio signals, it’s better to use a
card that is specially designed for such
use. A well-known a nd a fford a b le
exa mp le is the Dig i32 c a rd from RME, Figure 3. This c a rd from Guillem ot p rovid es a ha nd y setup for the true a ud io hob b yist,
whic h ha s b oth RCA a nd Toslink c on- sinc e it ha s a ll c onnec tors a nd the c onverters loc a ted in a sep a ra te enc losure (p hoto:
nec tors and supports several different Guillem ot).
Desig n b y H. J. Böhling
EEP R OM s a n d t h e
B A SI C co n t r o l co m p u t e r
FA Qs f o r t h e B A SI C co m p u t e r
The 8052AH-BASIC V1.1 proc essor uses c onsump tion, b ut it must b e p ro- c omputer. This still requires a proc essor
port 0 for programming EPROMs. Sinc e grammed with MCS-51 BASIC before it with an internal BASIC interpreter, plus a
this p ort is a lso used for the externa l c an be used. If you are not able to do numb er of mod ific a tions to the ha rd -
data and address bus, using it to burn this yourself, you c an obtain a prepro- ware and the c irc uit board (980002-1),
EPROMs is only p ossib le b ec a use the grammed c ontroller from Elektor Read- as follows:
BASIC interpreter is stored in the internal ers Servic es.
memory of the 8052. It thus d oes not In a d d ition, you will need some ha rd - ✓ Remove the 80C32 CPU (IC1) from its
need the externa l d a ta /a d d ress b us wa re tha t switc hes the p rog ra mming soc ket.
while it is p rog ra mming a n EPROM. voltage to the EPROM and c ontrols the ✓ On the top side of the c irc uit board,
Unfortunately, an 80C32 processor, with low-a d d ress reg ister d uring the p ro- c ut the tra c k a t p in 31 of the CPU
MCS-51 BASIC loc ated externally, c an- gramming proc ess. Both of these func - soc ket (IC1).
not b urn EPROMS or EEPROMS! If you tions are found on the Elektor Elec tron- ✓ Connec t a 47 kΩ resistor (R2)
need to do this, you will have to have ic s 80C32 BASIC Computer, for exam- b etween p in 31 of the CPU soc ket
either the original 8052AH proc essor or ple (see the Elektor book Short Course and pin 40 of the CPU soc ket (+ 5 V).
an 87C52 proc essor (with 8 kB of inter- 8051/8032 Mic roc ontrollers and ✓ On the b ottom sid e of the c irc uit
na l EPROM) tha t ha s b een p ro- Assembler, whic h is a va ila b le a long b oa rd , c ut the tra c k tha t c onnec ts
g ra mmed with the BASIC interp reter. with the circuit board 910042-1 through pin 30 of the CPU (ALE/P) to pin 11 of
Sinc e the first of these c ontrollers is no our Readers Servic es). the a d d ress reg ister (IC2). Sold er a
longer manufac tured by Intel, it is likely On the other hand, if you c an do with- 1N4148 diode (D1) across the break,
to b e d iffic ult to ob ta in. The sec ond out burning EPROMs and can limit your- with the c a thod e on the CPU sid e
c ontroller, ma nufa c tured b y Philip s, is self to 8 kB EEPROMS, it’s a lso p ossib le and the anode on the IC2 side.
available and even has a lower current to work with the 80C32-BASIC c ontrol ✓ Connec t a 47 kΩ resistor (R3)
980002-1
(C) Segment
R2
D1 R4
D2
R3
992022 - 12
992022 - 13
Figure 1. Mod ific a tions to the top a nd b ottom sid es of the p rinted c irc uit b oa rd.
m a ke you r ow n
m u s i c CD s
D i g i t i z i n g LP s a n d m a k i n g y o u r o w n c o m p i l a t i o n s
Copying CDs
The easiest task is simply making a 1:1
c opy of an audio CD.
Before you start c opying a CD, the CD
rea d er must first b e tested . This is
bec ause the error c orrec tion for audio
CDs is much less extensive than for CD-
ROMs. As a result, mod ern 32 or 40-
sp eed CD d rives c a n typ ic a lly rea d
audio CDs at a maximum speed of 4 or
8 times the norma l ra te. Most CD
rec ording programs have a test option
to d etermine the ma ximum ra te a t
whic h the d rive c a n rea d the a ud io
data without errors. Note however that
the reliability of the test results can vary,
d ep end ing on the testing method
Althoug h nowa d a ys everyb od y in the at a sampling rate of 44.1 kHz with 16- used. It can thus be better to use a sep-
c omp uter world is ta lking a b out MP3 bit resolution. arate ‘ripper’ program (as it’s c alled in
a ud io, the norma l a ud io CD is still the To put together an audio CD, you c an tra d e ja rg on), whic h is sp ec ia lly
most imp orta nt rec ord ing med ium for use a spec ial audio CD rec order, suc h d esig ned to rea d the d a ta from a n
the true a ud io fa n, a s fa r a s q ua lity is a s the one ma d e b y Philip s. However, audio CD. Some examples of such pro-
c onc erned. The data on an audio CD the fea tures of suc h a rec ord er a re g ra ms a re Dig ita l Aud io Cop y (www.
are not c ompressed and are rec orded ra ther limited . If you wa nt to ed it or windac .de) and Easy CD-DA Extrac tor
Pre-emphasis
You may not be particulary familiar with
this term. In the ea rly d a ys of a ud io
CDs, a form of pre-emphasis was some-
times used to imp rove the d yna mic
ra ng e for hig h freq uenc ies. With p re-
emphasis, all frequenc ies above 3kHz
are rec orded a few dBs louder on the
CD. This setting is detec ted by the CD
player during playbac k, so that a de-
emp ha sis filter c a n b e switc hed in to
restore the orig ina l levels. Nowa d a ys
this tec hniq ue is tota lly unnec essa ry Figure 2. Most CD b urning softwa re is d esigned with two m a in wind ows, so tha t tra c ks
a nd is not used . However, if you a re c a n sim p ly b e d ra gged from the one wind ow (the ‘exp lorer’ wind ow) to the other win-
c opying trac ks from old CDs you have d ow (the CD-R tha t is to b e b urned ).
An ena b led p re-emp ha sis b it is not First of all, of c ourse, you need a c om- p rog ra m with more fea tures, suc h a s
a utoma tic a lly c op ied from the a ud io puter with a CD burner. In most c ases, the well-known p rog ra ms Cool Ed it
CD b y most CD-rec ord ing p rog ra ms. the c omputer will be running Windows (www.syntrillium.c om), Gold wa ve
With Win On CD you c a n set it ma nu- software. (www.goldwave.c om) or Wa vela b
a lly, whic h is a useful fea ture if you In a d d ition, you will na tura lly need a (www.steinberg.net). With these p ro-
oc c asionally need it. g ood -q ua lity sound c a rd . Wha t d oes grams, you c an more c onveniently set
this mea n? Almost a ll mod ern PCI parameters suc h as the sampling rate
Copy protec tion sound c a rd s p rovid e g ood to out- and the rec ording level. Many of these
A numb er of c op y-p rohib it b its p re- sta nd ing sound q ua lity, with a la rg e programs also have built-in VU meters,
vent a n a ud io CD from b eing c op ied dynamic range and little distortion. For so tha t you c a n c losely monitor the
d ig ita lly more tha n onc e (tha t is, they rec ord ing ma teria l from p honog ra p h rec ord ing level. Be sure to c a refully
p revent a ny further d ig ita l c op ying of rec ord s a nd c a ssettes, a sound c a rd selec t the rec ording level. Overdriving
a d ig ita l c op y of a CD). The setting s tha t c osts on the ord er of £35 to £70 is bad for the sound quality, but a sig-
of these b its a re a lso not nec essa rily should thus be satisfac tory. A c assette na l rec ord ed a t too low a level c on-
c op ied inta c t b y the rec ord ing soft- deck can be connected directly to the tains too much noise. This is actually the
wa re. Some p rog ra ms a llow c op y line inputs of the sound card, but a sep- sa me a s for ma king rec ord ing s with a
protec tion to be manually enabled or a ra te MD/MC p hono p rea mp lifier is c assette rec order, but you should keep
disabled. If it is disabled, any number needed for a phonograph (the specific in mind that the audible effects of over-
of sec ond a ry c op ies of the CD c a n type depends on the type of c artridge d riving a re muc h more evid ent in the
b e ma d e (so tha t you c a n ma ke a used ). The b est results a re ob ta ined d ig ita l d oma in tha n with a na log ue
c op y of the CD, a nd then a c op y of when the p rea mp lifier p rovid es line- rec ordings.
the c op y, a nd so on). This c a n b e level outputs that c an be direc tly c on- It is important to select the correct input
useful for rec ord ing s of your own nec ted to the line inp uts of the sound (line) in the Wind ows a ud io mixer
ma teria l. c ard (sinc e the mic rophone input of a b efore you sta rt, a nd to set a ll other
sound card delivers inferior sound qual- inp uts to zero or switc h them off. Pa y
Analogue recordings ity and is also only monophonic ). Else- partic ular attention to the mic rophone
where in this issue you will find a design input, since it will add a lot of unneces-
When you c op y d ig ita lly rec ord ed for a high-quality stand-alone MD/MC sary noise if it is not disabled!
music you will seld om if ever need to p rea mp lifier, whic h is p erfec t for this A program such as Cool Edit also allows
d o a nything to the c ontent, b ut if you applic ation. the lea d -in a nd tra iler of a p iec e of
make digital recordings from analogue Finally, you naturally need software to music to be removed, so that the result-
sourc es, suc h a s p honog ra p hs a nd rea d in the tra c ks from the rec ord s or ing wav file c ontains only exac tly what
c a ssette p la yers, some ed iting of the c assettes and write the data to disk in is nec essary.
music ma y well b e useful or even wav format, following whic h the trac ks Also make sure that everything is read
essential. Who hasn’t dreamed of being c an be c leaned up (if nec essary) and in with a sa mp ling ra te of 44.1 kHz if
able to listen to some numbers from a used to ‘burn’ an audio CD. you plan to rec ord it on a CD that is to
rare LP (that has never been released b e p la yed b a c k using a n ord ina ry
on CD) without the usual noise? Digital Reading in audio signals audio CD player. Although good audio
tec hnology provides quite a few possi- In p rinc ip le, you c a n use the sound editing programs allow the data to be
bilities in this regard. recorder function of Windows to read in resampled (for example, to change the
What do you need to be able to make a na log ue sig na ls, b ut this is a ra ther sa mp ling ra te of a d ig itized a ud io file
your own rec ordings? primitive approac h. It is better to use a from 48 kHz to 44.1 kHz), it is na tura lly
Editing
Various programs are available for edit-
ing wav files. For example, Sound Forge
(www.sfoundry.c om) a nd Steinb erg
Clean (www.steinberg.net) offer a lot of
options. Nowadays, even CD recording
programs suc h as Easy CD Creator de
Luxe a nd Win On CD 3.6 inc lud e a
number of editing modules that can for
example remove noise and c lic ks.
Although audio enthusiasts have been
very sceptical about such editing in the
p a st, it must b e a d mitted tha t the
capabilities of modern editing software
are amazingly good. It is truly possible
to very a c c ura tely loc a te a nd elimi- Figure 5. A p rogra m suc h a s Cool Ed it is very well suited to m a king rec ord ings from
na te noise and c rac kles a t the d ig ita l p honogra p h rec ord s, a nd in a d d ition it p rovid es a la rge num b er of ed iting op tions, suc h
level, without affecting the audio signal. a s resa m p ling.
Figure 6. Win On CD inc lud es va rious ed iting op tions, ra nging from elim ina ting c lic ks to a d d ing reverb era tion.
Exa c tly these sorts of d efec ts p la g ue from the ‘explorer’ window to the CD-R with a sound c a rd , a CD b urner, a
LPs (espec ially older examples). wind ow in the ord er tha t you wa nt to turntable with a separate preamplifier
If we take Win On CD 3.6 again as an ha ve them p la c ed on the CD. To sta y or a c a ssette rec ord er, a nd of c ourse
example, we see that there is a built-in as c ompatible as possible with normal the nec essa ry softwa re. All tha t’s then
a ud io ed itor tha t inc lud es a 5-b a nd a ud io CD p la yers, you should not p ut left is finishing off your p rod uc t. If you
g ra p hic eq ua lizer, a d ec lic ker for multiple sessions on an audio CD and ha ve the time, you c a n ma ke a n
removing c lic ks, a dec rac kler for elim- you should selec t the ‘d isc a t onc e’ attrac tive inlay and label for your self-
inating short tic ks suc h as c rac kling or op tion, a s p reviously mentioned . This ma d e CD. There a re c urrently a num-
ra ttling sound s, a nd a ‘d enoiser’ for guarantees that the resulting audio CD ber of commercial packages available
removing b roa d b a nd noise from a c a n b e p la yed b a c k b y a ll CD d rives for generating CD labels (from HP and
rec ording. There are also a number of without any problems. Some programs Traxdata, among others).
op tiona l ‘effec ts’, suc h a s stereo a llow you to sp ec ify the leng th of the (992025-1)
enha nc ement, a d justing the p la ying pause between suc c essive trac ks, but
speed and adding a certain amount of usually this is fixed at 2 sec onds.
reverberation. A norma l a ud io CD p la yer will a lwa ys
With Easy CD Creator de Luxe, a num- rec ognize the various trac k numbers of Copyright
ber of similar features are provided by a DIY CD. Sometimes you also have the
the c ompanion Spin Doc tor program. option of placing index markers before If you make your own music CDs, you
burning the CD. This c an be handy for must give due c onsideration to c opy-
Burning the CD c lassic al music , whic h c annot be eas- right aspec ts. It is perfec tly OK to
ily sp lit into a numb er of short p iec es. make a c opy of music from your pri-
After you have rec orded and edited a Index markers provide a simple method vate c ollec tion of CDs and LPs for your
number of wav files, you c an put them for jumping to the start of spec ific pas- own use, but you are not allowed to
all together onto a CD-R. Do not use a sages or movements. give or sell suc h c opies to others who
re-rec ord a b le CD (CD-RW), sinc e the do not already own the original(s).
ma jority of a ud io CD p la yers a re The final touches After all, the artists have to live from
absolutely unable to read suc h a CD. something as well, and they suffer the
With most CD b urning p rog ra ms, you As you c an see, it’s not all that diffic ult most from illegal c opying.
c a n simp ly d ra g the va rious wa v files if you just have the right kit: a computer
RF marker generator
calibrate receivers, receiver dials
and signal generators
Anyone involved in
the construction of
radio receivers and
associated equipment
will have felt the need
for some means of
producing an accu-
rately calibrated dial.
The ability to confi-
dently set the tuning
to a particular fre-
Early in stru m en ts of th is kin d often com p aratively sim p le m atter to cali-
quency is often half in corp orated tw o crystals, on e cu t to brate up or down from these points by
the battle when reson ate at 1 MH z, th e oth er at
100 kH z, an d th e fu n d am en tals an d
means of lower frequency signals pro-
d u ced by th e d ivision of th e crystal
searching for a weak h arm on ics of th ese frequ en cies w ere fundamental.
used to calibrate receivers and test gear Most crystal markers make n o p ro-
transmission, and up to, and beyond, 30 MHz. vision for the modulation of the signal.
greatly increases the The development of the integrated
circuit, in particular the prod uction of
H igh p erform an ce receivers in corp o-
ratin g a BFO (beat frequ en cy oscilla-
pleasure of using a binary and decimal counter ICs, made tor) can p rod u ce an au d ible ton e from
it p ossible to u se on ly on e crystal, cu t an u n m od u lated carrier, bu t w ith
receiver of any kind. to resonate at a higher frequency (often d om estic su p erh ets th ere w ill be n o
The calibrator 2 or 4 MH z), an d to d ivid e th e fre- clear au d ible in d ication th at th e
qu en cy d ow n in ord er to p rovid e marker signal has been tuned-in. Iron-
described here relies markers for lon g an d med iu m waves, ically, it is often th e listen ers w h o are
on a quartz crystal to and for the fine sub-division of the dial.
Wh en attem p tin g to calibrate th e
tryin g to get th e m ost ou t of sim p ler
receivers w h o h ave th e greatest n eed
determine and hold d ial of a sh ort-w ave receiver u sin g for som e m ean s of im p rovin g tu n in g
on ly a crystal stan d ard , d ifficu lty can accu racy. Accord in gly, p rovision is
constant the fre- be en cou n tered in id en tifyin g th e m ad e for th e op tion al m od u lation of
quency of the oscilla- p articu lar h arm on ic of a 1 MH z fu n - th e marker sign als.
d am en tal. If a 4 MH z crystal is u sed
tor providing the th e p osition is m u ch easier, bu t con - THE CIRCUIT
fusion can still arise as calibration pro- Th e fu ll circu it of th e u n it is given in
marker signals. gresses in to th e u p p er reach es of th e Figure 1. It is based on low-cost, CMOS
H F sp ectru m . (comp limen tary metal oxid e semicon -
In ord er to avoid th is, th e u n it d uctor) logic gate ICs. An inexpensive
d escribed h ere h as been d esign ed 8 MHz crystal determines the basic fre-
arou n d an 8 MH z crystal. With h ar- qu en cy of oscillation w ith a h igh
monics at 16, 24 and 32 MHz, virtually degree of accuracy and stability.
u n m istakable m arkers are p rod u ced IC5 con tain s fou r tw o-in p u t N O R
Design by Raymond Haigh th rou gh ou t th e H F ban d s, an d it is a gates. Strap p in g th e in p u ts of each
2
CTRDIV10
E ≥1 +
0
3
4
8MHz 3 2 1MHz 1 1
qu en cy of oscillation d eterm in ed by C
R S
C
2
5 100kHz
7 6
qu artz crystal X1. In th is circu it, th e 4 6 CT=0 3
500kHz
100kHz
50kHz
25kHz
10kHz
clock in p u t, an d a 2 MH z sign al is
8MHz
4MHz
2MHz
1MHz
X1 R5 S1
1M
available at p in 13. Th is p rocess is 12 13
8 7 6 5 4 C6
repeated with IC2 in order to produce 8MHz 9 3 ≥1 IC5d
R1 10
1 MHz and 500 kHz markers. 10M
8MHz
11
2
R6
100n
1 11
The 1 MHz signal is applied to clock IC5a IC5b 12 13
390k
8 9
input of IC3a, a d ual d ecimal counter. 1
≥1 3
5
≥1 4
S2
C5
≥1 IC5c
2 6
Th e first stage of th is IC d ivid es th e 1n
C2 IC1, IC2,IC4 = 4013
1 MH z in p u t by 10 to give 100 kH z. C1 10
1kHz
IC3 = 4518 D1
Th is sign al is ap p lied to th e secon d 22p 22p
IC5 = 4001 T1
R4
stage for further division by 10 to pro- 3k9
12V 1N4148
duce a 10 kHz marker. IC6 C3 K1
7812 BC550
50 kHz and 25 kHz markers are use- 10n
K3
ful when calibrating the long, medium R2
3k3
and lower HF scales of a receiver, and C9 C10 C11 C12 C13 14 C14 14 C7 14 16 C8 14 C4 K2
IC1 IC2 IC3 IC4 IC5
to p rovid e th ese th e 100 kH z ou tp u t 100µ 100n 100n 22µ 10n
7 7 7 8 7
from IC3a is ap p lied to an oth er d u al 25V 25V 100n 100n 100n 100n R3
33Ω
bistable, IC4.
990047 - 11
Tran sistor T1 acts as a m od u lator.
Con figu red as an em it-
ter follower, its base pre- Figure 1. Circuit dia-
sents a moderately high gram of the RF marker
im p ed an ce to th e generator. Alth ou gh crystal totyp e u n it for p ow erin g it from a
in com in g sign al from oscillators are ben ch su p p ly or an in exp en sive (12-
th e d ivid er ICs, th e renowned for their sta- volt dc) mains adaptor.
requ ired m arker bein g selected by bility, operating frequency is shifted, to
rotary sw itch , S2. A low-im p ed an ce som e sm all exten t, by ch an ges in th e CONSTRUCTION
ou tp u t is d evelop ed across em itter amplifier ’s supply voltage. Regulation All of the components, with the excep-
resistance, R2-R3. Socket K2 supplies a of th e su p p ly voltage w ill th erefore tion of sw itch S1 are m ou n ted on a
relatively low output level (20-50 mV) en h an ce th e p erforman ce of th e u n it. PCB. Figure 2 sh ow s th e com p on en t
w h ich m ay be safer for d irect rath er Power is accordingly derived from two m ou n tin g p lan (overlay) an d cop p er
th an in d u ctive cou p lin g to receiver 9-volt PP3 batteries connected in series track layou t. Th e board sh ow n is n ot
inputs. to give a nominal 18 V supply, which is available ready-made.
Switch S1 enables the 1-kHz oscilla- dropped to the required 12 V as well as Although the CMOS IC’s are fitted
tor w h en a m od u lated ou tp u t is regulated by IC6. Bypass capacitor C12 w ith static p rotection d iod es, th ese
required. sh u n ts an y electrical n oise d evelop ed cannot be relied upon to prevent dam-
With CMO S d evices, p rop agation by the regulator to the ground rail. age, an d ap p rop riate p recau tion s
delay (the time taken for the output to Current drain with fresh batteries is again st ESD sh ou ld be taken w h en
change in response to a change of state in the region of 35 mA and this falls to u n p ackin g an d in stallin g th e d evices.
at the input) is particularly dependent arou n d 25 m A w h en th ey reach th e Work on a grou n d ed ben ch m at, an d
on supply voltage. IC5 and IC1, located en d of th eir u sefu l life. Wh ilst th is is never insert or withd raw a CMO S IC,
at the start of the chain of dividers, are not an excessive current demand on a or w ork on th e PCB, w ith th e p ow er
working fairly close to their maximum PP3 battery, equ ip m en t of th is kin d supply connected.
clock frequency, and the lowest supply tend s to be operated for lengthy peri- IC sockets are fitted to permit rapid
voltage for reliable operation is 12 V. ods, and provision is made in the pro- su bstitu tion ch eckin g (it is n ot
H3
C8 X1
Resistors:
IC4 IC3 IC5 R1 = 10 MΩ
R2 = 3kΩ3
R1
R3 = 33 Ω
OUT
C7
C1 R4 = 3kΩ9
K1 C3 C6 C14
T1 IC2 R5 = 1 MΩ
R6 = 390 kΩ
C13
C2
OUT1
+ Capacitors:
R4
K2 IC1 C1 = 22 pF
C4 1-740099
R2
ROTKELE )C( K3 C2 = trimmer, 22 pF
S2 C11 0
C3,C4 = 10 nF
C10 C5 = 1 nF
R3
H1
H2
C12 C9 C6,C7,C8,C10,C11,C13,C14 =
IC6
100 nF
C9 = 100 µF 25V radial
C12 = 22 µF 25 V radial
Semiconductors:
D1 = 1N4148
T1 = BC550
(C) ELEKTOR
990047-1 IC1,IC2,IC4 = 4013
IC3 = 4518 (see text)
IC5 = 4001
IC6 = 7812
Miscellaneous:
X1 = 8MHz crystal
K1,K2 = cinch socket, angled, PCB
mount
S1 = on/off switch
S2 = 12-way 1-pole rotary switch,
PCB mount
K3 = 2 solder pins
TES TING
It is a good idea to check the function-
ing of the unit before the whole assem-
bly is enclosed within a case.
First of all, ch eck th e PCB for p oor
sold ered join ts an d brid ged cop p er
tracks. Check the orientation of the ICs
and other semicond uctors, in particu-
lar th e voltage regu lator IC: if th is is
connected into circuit wrongly, the full
supply voltage could appear across the
CMOS devices.
Br i e f p a r a m e t e r s
Input sensitivity
(moving-coil) 2 mV
(dynamic) about 0.2 mV
Nominal output signal 200 mV
Signal-to-noise ratio
(moving-coil) 78 dBa (750 Ω in)
88 dBA (input short-circuited)
(dynamic) 70 dBA (25 Ω in)
71 dBa (input short-circuited)
Design by T. Giesberts
30 Hz than at 15 kHz.
Large low-frequ en cy stylu s excu r-
sion s d u rin g p layback are avoid ed by
cu ttin g th e bass an d boostin g th e tre-
LINE
ble frequencies to improve the signal to
n oise ratio. Th ese con tou rs roll off at
either side of a short flat region centred
on 1 kH z to form th e RIAA (Record in g
Industry Association of America) char-
acteristic. Th e p layback am p lifier or
preamplifier has a frequency response
that is a mirror image of the RIAA char-
acteristic (see Figure 1).
DESIGN LINE
18n
C15 C11 C13
C19
* siehe Text R2
51Ω1
R3
49k9
R5
3k92
100µ
25V
100n
7 7
100n
22n
* voir texte IC1 IC2
R20
47Ω5
5 4 4 R21
2 C16 C12 C14
475Ω
C5 R6
6 5
R K1 JP1 IC1 100Ω 2
3 100µ 100n 100n
8 2µ2 R7 25V 6
IC3
1
220k
K6 3 8
* R1
47k5
C1 LT1115 15V
1
C18
5Ω62
LINE LT1028
100p K3 10n
R19
MD/MC
K5
R22
* R8 C20
5Ω62
C6
47k5
220k
LT1115 3
8
JP2
3
1
C10 R13
R18
* IC4
6
8 2
6
IC2 100Ω
475Ω
L K2 2 R17 D1 5
2µ2
S1
33k
R23
5 R24
1N4148 47Ω5
R9 R10 R12
C21
51Ω1 49k9 3k92 T1
R16
R11 C8 22n
33k
768k
18n R15
C7 C9 C17 BC547B
3k3
LINE
K4 68n 1n5
100µ
25V
14V3
15V BC550C
D3 R28
1k
10Ω 20V T2
2x D4 C40
R25 C22 7 7 C24
1N4002
100µ C26 IC3 IC4
40V 470n 4 4 470n
100µ 25V
Tr1 4x 22n
C27
K7 C38 C34 C37
L1 C23 C25
100µ 25V
100n IC5
C42 C41 7815 15V 470n 470n
R26
X2 X2 B1
1k
100n 100n C39 T3
250V 250V
27mH C32 C30 C28
100n C35 C36
470µ 100n 4µ7
2x 15V B80C1500 40V 63V
15V BC560C
3VA3 –14V3
D2
R27
6k8
990048 - 12
IC6 7915 15V
CIRCUIT DESCRIPTION elem en t are abou t 750 Ω an d 450 m H Sw itch S1 serves to en able m an u al
resp ectively. switching of the relay between ampli-
In Figure 3, the preamplifier for mov- Th e gain of IC 1 an d IC 2 is 40 d B at fiers and line input terminal; K4 with-
ing-coil elements is formed by IC3 and 1 kH z. Th e RIAA correction n etw ork is out the need of switching off the sup-
IC4, while the main amplifier is based included in the negative-feedback loop ply.
on IC1 and IC2. betw een p in s 2 an d 6. Cap acitors C 5 When a dynamic pickup element is
Wh en th e ou tp u t of a d yn am ic an d C 10 d ecou p le an y offset, w h ile used, jumper terminals JP 1 and JP 2 are
pickup is linked to terminals K1 and K2, resistors R6 and R13 protect the opera- closed . The sections based on IC3 and
the input impedance has the standard tion al am p lifiers again st cap acitive IC4 are then not used and need not be
valu e of 47 kΩ – d eterm in ed alm ost loads. Resistors R7 and R14 ensure that built.
exclusively by R1 and R8. Capacitors C1 C5 and C10 are charged in the absence Wh en a m ovin g-coil p icku p ele-
an d C 6 d eterm in e th e frequ en cy of a load , w h ich h elp s to p reven t m en t is to be u sed , JP 1 an d JP 2 m u st
response between 10 kHz and 20 kHz, switch-on phenomena. rem ain op en an d resistors R1 an d R8
which means that their value depends Wh en th e p ow er is sw itch ed on , m u st be rep laced by 100 Ω typ es.
to some extent on the type of dynamic relay Re 1 is energized, whereupon the Amplifiers IC3 and IC4 are included in
element used. output of the amplifiers is linked to ter- the signal path via terminals K5 and K6.
O perational amplifiers IC1 and IC2 minal K3. When the supply is switched These amplifiers provide an amplifica-
are typ ified by a very low n oise fig- off, th e relay is d isabled , w h ereu p on tion of about ×10.
u re, a reason ably low bias cu rren t, the additional line input at terminal K4 To en su re a low n oise figu re, th e
an d low in p u t offset. Wh en th e ou t- is linked to K3. values of R19 and R22 are very low. To
p u t is 200 m V an d th e in p u t is sh ort- To avoid switch-on clicks and plops, p reven t th is form in g too large a load
circuited , the amplifiers have a signal- the relay is energized with some delay for the op amps, an additional resistor is
to -n oise ratio of 88 d B. In p ractical p rovid ed by cap acitor C 17 via tran sis- u sed in th e n egative-feed back loop
u se, th e n oise of th e am p lifier is p ro- tor T1. Resistor R15 en su res th at th e (R21 and R24 respectively). The result-
d u ced p rim arily by th e p icku p ele- relay is deenergized rapidly to guaran- in g n arrow in g of th e ban d w id th is
m en t. N ote th at th e resistan ce an d tee that the supply to the amplifiers is negated to a large extent by the use of
in d u ctan ce of an average d yn am ic switched off instantly. very fast operational amplifiers.
Resistors:
+20V 0
T1
S1 R1, R8 = 47.5 kΩ or 100 Ω (see text)
OUT1
R15 R2, R9 = 51.1 Ω
H7
H5
D1
C17
R16 R3, R10 = 49.9 kΩ
H1
H2
K3
RE1
L1
R5, R12 = 3.92 kΩ
990048-1 R6, R13 = 100 Ω
C10
R13
R14 R7, R14 = 220 kΩ
R15 = 3.3 kΩ
C5
C42
K4
C41 C3 R16, R17 = 33 kΩ
R7 R18 = see text
C4 R6
C11 C1 R19, R22 = 5.62 Ω
JP1 R20, R23 = 47.5 Ω
H10 H9
R5
R21, R24 = 475 Ω
C15
R
R25, R26 = 1 kΩ
R4
R3
1-840099 IC1 R27 = 6.8 kΩ
R1
TR1
K1
+
C2 R2
C8
C9
0
C12 K5
C13 Capacitors:
-
K2
R12
C1, C6 = 100 pF, 63 V, 1%
C16
R8
R27
L
IC2
C3, C8 = 0.018 µF, 63 V, 1%
C7
R11
R10
D2
C39
H6
H8
R28
C32
-
0
H12
C20
IC4
radial
+20V
R22
C27 C18, C20 = 0.01 µF
C24
C23
R24
0
IC5 +
C29 C28
-15V
H4
0 R20
H3 H11
Inductors:
L1 = 2×27 mH, 400 mA, 250 VAC
Semiconductors:
D1 = 1N4148
D2 = LED, green, high efficiency
D3, D4 = 1N4002
B1 = B80C1500 (straight)
T1 = BC547B
T2 = BC550C
T3 = BC560C
Integrated circuits:
IC1, IC2 = LT1115CN6 (Linear Tech-
nology)
IC3, IC4 = LT1028CN8 (Linear Tech-
nology)
(C) ELEKTOR IC5 = 7815
990048-1 IC6 = 7915
Miscellaneous:
JP1, JP2 = 2-way pin header and
jumper
K1, K2 = audio socket for board
mounting
K3, K4 = 3.5 mm PCB mounting audio
socket
K5, K6 = 8-way SIL (see text)
K7 = 2-way terminal block for PCB
mounting, pitch 7.5 mm
S1 = single-pole, single-throw switch
Re1 = 24 V relay, 2.2 kΩ
Tr1 = mains transformer, 2×15 V
secondary, 3.3 VA
Table 1.
To lower the gain to 30 dB, alter
the values of the following com-
ponents as indicated.
R2, R9 = 162 Ω
R3, R10 = 49.9 kΩ
R4, R11 = 845 kΩ
R5, R12 = 3.83 kΩ
C3, C8 = 0.02 µF
C4, C9 = 0.0012 µF
weather-satellite
decoder
a PLL-based intelligent interface
The decoder dis-
cussed in this article
sits between the out-
put of a weather-satel-
lite receiver and a free
RS232 port on your
computer. Featuring a
phase-locked loop
(PLL), extensive filter-
ing and a microcon-
troller for time-critical
functions, it will faith-
fully translate demod-
ulated audio signals
into a serial datas-
tream that can be
processed by many of
the popular wefax
image processing
programs like JVFAX.
1 fixed
dish
PC
LO
printer
1691 MHz RS232
METEOSAT
converter
DET. decoder
tracking LO
antenna
137 MHz
AM/FM
receiver or scanner 990021 - 12
2 5V
R3 D3
A 2V C4 5V
120k
IC5 = 4066
B 3V8 R4
4 IC1, IC4 = TL072 TEST DECODE
100n
1k
C 4V R2 C3 D8 D9 D10 D11
3 5V
4k7 IN
D 2V3 A IC2 8 2400Hz
100n OUT R21 R22 R23 R24
2 C13
E 0V4 C2 D 14
1k
1k
1k
1k
R5 C1
567 5
B R 22k IC5
1 100n
C3 7 100n
P2
8 8
C RC JP1
P1 IC1 IC4
D1 D2 C5 C6 7 6
22k INT 4 4 1
C2
250k C7
4µ7 10µ D
16V 63V 15
Tr1 3 PB0
100n 14 7
1 33n PB1 RESET
IC1a 13
2 2x BAT85 PB2
12 2
P3 R8 5V PB3 TIMER
11
R1 10k PB4
R6 10 IC6 5
22k 5V PB5 NMI
1k
10k
9
5V PB6
8
R7 PB7
4 6 C23 ST62T10
10k
DIV BAT85 D6 19
D4 C8 PA0
1 7 12n 13 18
C9
FB OUT PA1
R10 2 1 17 6
10n IC3 PA2 VPP/TEST
AA119 12n
18k2
16
6 MAX280 R11 R12 PA3
D5 R9 5 8 5 IC5a C11 D7 OSC
7 3 COSC BOUT 3k3 17k8 IN OUT
IC1b 10k 7
5 1 E IC4b 330n 3 X1 4 20
AA119 IC4a 6 R13 BAT85
2
2 3
5k23
C15 C14
IC7 C12 K2
78L05 12n 5V 5V
K5 LP2950-5
1µ
1
S1 8
R25 R16 R17 R18 R19 6
1k
4k7
2k2
4k7
33Ω
2
2 1 D13
C+ BOOST C22 7
C20 C21 IC8
7 6 T1 3
OSC LV IC5b IC5c IC5d
10µ
10µ 10µ 4 ICL7660 5V6 8
5 63V 4 3 11 10 8 9
C16 C19 D12 63V C– VOUT 400mW 4
C17 C18 63V
MAX1044 JP2 9
5 12 6 BC327
100µ 100n 100n 10µ R20 5
25V 63V 3
680Ω
5V
POWER
5V 990021 - 11
C10
C9
1-120099
ROTKELE )C(
P3 R8
layout and component
H1
D5
R12
R11
R10
R13
R14
R18
R19
R9
R7 mounting plan of the sin-
D4
990021-1
R6 C23 gle-sided PCB for the
IC5
TR1 C2 C1 decoder (board available
K2
R1
P1
ready-made).
IC1 IC3 IC4 T1
C8
R20
R17
R2
R4 P2
C22
R15
C3
COMPONENTS LIST
D6
D7
IC8 IC2 C12
D13
D2
D1
C11 C14 Resistors:
R25 D3
C6 R1,R4,R14,R21-R25 = 1 kΩ
C15
C21 C5 C7 R2,R16,R18 = 4kΩ7
D12 X1
R5
IC7 C20 R3 C4
JP2
R3 = 120 kΩ
C13
C16 C19 R5 = 22 kΩ
IC6
R6-R9 = 10 kΩ
S1 C18 R10 = 18kΩ2 1%
9V
R11 = 3kΩ3
R21
R22
R23
R24
R16
C17 K5
JP1
R12 = 17kΩ8 1%
R13 = 5kΩ23 1%
H2
H3
Capacitors:
C1-C4,C13,C17,C18 = 100 nF
C5 = 4µF7 16V radial
C6,C19-C22 = 10 µF 63V radial
C7 = 33 nF
C8 = 10 nF
C9,C10,C23 = 12 nF
C11 = 330 nF
C12 = 1 µF MKT
C14,C15 = 22 pF
C16 = 100 µF 25V radial
Semiconductors:
D1,D2,D6,D7 = BAT85
D3 = LED red, 3mm, low current
D4,D5 = AA119 or BAT85
D8-D11 = LED, yellow, 3mm, low
(C) ELEKTOR
990021-1
current
D12 = LED, green, 3mm, low current
D13 = zener diode, 5V6, 400mW
T1 = BC327
IC1,IC4 = TL072 CP
IC2 = LM567CM
IC3 = MAX280CPA
APT format (Automatic Picture Trans- weather-satellite signal has been prop- IC5 = 4066
mission), which is a mix of FM (fre- erly d em od u lated before it is ap p lied IC6 = ST62T10 B6-HWD (order code
quency mod ulation) and AM (ampli- to th e p resen t d ecod er, a d etailed 996513-1)
tude modulation). The picture informa- an alysis of its stru ctu re is beyon d th e IC7 = 78L05 or LP2950 CZ5.0
tion is amplitud e-mod ulated on a scope if this article. IC8 = ICL7660 CPA or MAX1044
carrier, which, in turn, is frequency
Miscellaneous:
mod ulated . Cumbersome and hope- H A R D WA R E JP1 = 3-way SIL pinheader with
lessly outdated as it may seem, this ‘AM- DESCRIPTION jumper
in-FM’ packaging is actually pretty inge- The circuit diagram of the converter is JP2 = 2-way pinheader with jumper
nious because it avoid s the complex shown in Figure 2. The circuit is a com- K2 = 9-way sub-D socket (female),
compensation of Doppler shift at the bination of analogue and d igital com- angled pins, PCB mount
receiver side. Remember, all low-orbit- ponents. K5 = mains adaptor socket, PCB
ing satellites travel at very high ground Th e au d io in p u t sign al reach es mount
S1 = on/off switch, 1 contact
speeds, typically covering a horizon-to- in p u t am p lifier IC1a via a lin e tran s-
TR1 = line transformer, Monacor
horizon arc in just a few minutes. former, Tr1. This is included for electri- (Monarch) type LTR110 or MTR120
The picture transmission rate is usu- cal isolation an d to keep d igital n oise X1 = 8MHz quartz crystal
ally tw o lin es p er secon d . Th e sign al (8-MH z ST6 clock) aw ay from th e Clip-on lead for 9V PP3 battery
w ill typ ically sou n d like a h iss in ter- receiver. Preset P1 allow s an ou tp u t 9 volt PP3 battery or 9V 300mA
rupted by two 2400-Hz beeps per sec- level of 2.3 V to be set. The opamp out- mains adaptor
on d . Th e 2400-H z ton e is also d om i- p u t sign al is sen t to a PLL (p h ase- PCB, order code 990021-1 (see
Readers Services page)
n an t in th e p ictu re lead er an d trailer locked loop), IC2, and a rectifier/buffer,
Disk, contains ST6 source code file
syn cs. Th e h igh est frequ en cy of th e IC1b-IC4a, which is followed by a filter and Satview program, order code
picture information proper (‘pixels’) is built around IC3 and IC4b. 996019-1 (see Readers Services
about 1200 Hz. Let’s first look at what the PLL does. page).
Becau se it is assu m ed th at th e The inexpensive and well-tried NE567
r ou t in e counter is returned to ‘loop’ and the micro waits for NMI again.
The A/D conversion takes place while the micro waits for a new
NMI pulse edge.
The main grey-level decoding routine executed by the ST micro-
controller in this project performs the following sequence:
1.Initialise register x with value 00 (aux. value for jump instructions) 208 µs 208 µs
is u sed h ere in a stan d ard con figu ra- (2400 H z) an d th e h igh est d ata fre- be found on the Datasheets on page 61-
tion . Diod es D1 an d D2 limit its in p u t quency (approx. 1200 Hz). Remember, 62 of ou r March 1999 issu e. Th e filter
signal to about 0.4 V. Preset P2 sets the in traditional transmission technology, arou n d IC4b is a Bu tterw orth section
centre frequency to 2400 Hz, enabling a rule of thumb is that carrier frequen- which further adds to the selectivity for
the carrier reference clock to be recov- cies are at least 10 tim es h igh er th an the pixel component in the APT signal.
ered from the composite APT signal. the highest modulation frequency. This The filtered picture data represents
Th e sign al rectifier (IC1b) is an is done to facilitate extracting the mod- grey levels. It is used to charge a capac-
active 2-p h ase typ e w h ose h alf-p h ase ulation signal. The filter consists of itor, C11, via electron ic sw itch IC5a.
ou tp u t levels can be m ad e equ al by three elements: (1) low-pass R10-C8, (2) This capacitor acts as a memory device
adjusting preset P3. IC2 an d (3) Bu tterw orth section IC4b. when the microcontroller is busy per-
Alth ou gh it em p loys ju st on e IC The first is dimensioned for cut-off fre- form in g an A-D con version . Th e
and an opamp, the filter is a seven-pole qu en cy of abou t 1400 Hz. Th e secon d switch is controlled by microcontroller
typ e! Exten sive filterin g is requ ired element, says Maxim Inc., is a ‘5th order port line PB4.
becau se of th e relatively sm all d iffer- all-pole instrumentation lowpass filter with The average value of the pixel grey
en ce betw een th e carrier frequ en cy no dc error’. Its main technical data may levels is read by th e ST6 via p ort lin e
Figure 5. Example of a
weather satellite
image received with
the decoder in combi-
nation with the
‘Satview’ program.
conductive plastics
Of luminescent plastics
and plastic transistors
D E VE LO P M E N TS p olymers.
T O D AT E Tod ay, CDT is d evelop in g flexible d is-
After con d u ctive p olym ers h ad been p lays based on PolyLEDs an d h as
d iscovered by accid en t in Jap an in already demonstrated a prototype of a
1977, research ers at th e Un iversity of p olym er d isp lay, w h ich w as d evel-
Cam brid ge in En glan d d iscovered op ed in coop eration w ith Seiko-
lu m in escen t p olym ers in th e late Ep son . It con cern s a sm all, m on o-
1980s. In lin e w ith m od ern p ractice, ch rom e d isp lay th at as yet d oes n ot
the university hived off this discovery con sist solely of p olym ers: th e elec-
trod es are m ad e of in d iu m tin oxid e
for com m ercial exp loitation to Cam -
(In Sn O 2) an d alu min iu m (Al). Never-
brid ge Disp lay Tech n ologies (CDT).
th eless, th e p erform an ce is rem ark-
Th e first lu m in escen t p olym er, able: its lu m in osity is fou r tim es as
p olyp h en yl-vin yl or PPV, is p aten ted great as th at of liqu id -crystal d isp lays
by CDT. Th e com p an y h as gran ted a (LCDs) an d d oes n ot su ffer from th e
Based on ‘Plastic chips & luminous licen ce to Ph ilip s of th e N eth erlan d s lim ited view in g an gle th at is so ch ar-
plastics’ a report from Philips Research for the commercial exploitation of the acteristic of LCDs.
2 H H H H H H H H H H H H
C C C C C C C C C C C C
C C C C C C C C C C C C
H H H H H H n H H H H H H n
990039 - 12
luminescent
polymer
Figure 4. A PolyLED consists of a
anode luminous polymer sandwiched
between two electrodes with the
substrate
combination bonded to a substrate
990039 - 14 of glass or transparent plastic.
photon
3. illuminating
isolating
conducting
4. heating
isolator
semiconductor
polyphenylamine
electrode
UV
7. illuminating
gate
* Spin-coating is a technique that enables a virtually homogeneous film of liqui-
fied material 100–200 nm thick to be deposited on to another material, The isolator
solid material, such as the substrate of a diode or transistor, is made circular semiconductor
and the resulting disc is made to rotate at very high speed. A drop of the liqui- source drain substrate
fied material is dropped on to the disc and spreads out into a thin, homoge-
electrodes
neous film. When the solvent (used to liquify the material to be deposited) has 990039 - 15
8. transistor
vaporized, the film solidifies. There are virtually no limitations to the size of sub-
strate that can be used in spin-coating. See Figure 6.
Dip-coating is a similar process in which use is made of the bond that can be
formed between substrate and film material. In this process, however, the sub-
strate is briefly immersed into the soluble polymer.
development system
for 68HC11F1
accepts eight different
memory devices
Motorola’s 68HC11
microcontroller is a
highly valued device
when it comes to
developing applica-
tions based on micro-
controllers. This article
present a low-cost way
for you to start creating
such applications
based on the 68HC11.
Unusually, the present
development system is
marked by a relatively
large amount of system
memory.
THE ELECTRONICS
Although the basic design of the board
is relatively simple, it will be adequate
for those of you who limit themselves
to assem bly cod e p rogram m in g. Th e
arch itectu re m ay also be exten d ed if
necessary.
As you can see from the circuit dia-
gram in Figure 2, th e board is bu ilt
arou n d five in tegrated circu its: a
68H C11F1, a MAX232, a 74H C139, a
memory d evice an d a voltage regu la-
tor.
In ad d ition to w h at h as been said
abou t th e 68HC11F1 in th e p reviou s
paragraphs, we now get down to busi-
ness by showing the internal structure
and device pinout in Figure 1. Of all 17
m em bers of th e 68H C11 fam ily, th e
H C11F1 version is w ith ou t d ou bt th e
best kn ow n an d best sellin g d evice in
amateur circles.
Lookin g at th e in tern al stru ctu re
you will agree with us that the 68HC11
is a fairly complex d evice. At about 10
years of age th e H C11F1 is on e of th e
you n ger m em bers of th e fam ily. It is
also one of the most powerful because
multiplexing is not used, plus a 1-kByte
RAM an d a 512-byte EEPRO M are
available on the chip. The chip is sup-
plied in a 68-pin case. The HC11F1 has
no internal RO M or EPRO M. Instead,
it can take m an y d ifferen t extern al
memory devices of impressive capaci-
ties. Finally, the HC11F1 micro contains
no fewer than four ports, a number of
w h ich can be u sed in bid irection al
mode.
The second essential part in the cir-
cuit diagram is the MAX232. This inte-
grated circu it allow s th e
board to be con n ected to Figure 1. Pinout and
a serial PC p ort (RS232). architecture of the
As w ill be d iscu ssed fu r- 68HC11F1 microcontroller
th er on , th e ‘M11’ soft- (courtesy Motorola).
ware allows you to down- devices. Arguably, p resen t d evelop men t system, it is h as
load object cod e to th e this feature is one been m od ified to allow extern al EEP-
H C11, p lace breakp oin ts, u se sin gle- of th e m ost attractive of th e d evelop - ROMs to be programmed. This is useful
step p rogram execu tion , an d d isp lay ment system described in this article. for th ose of you lackin g th e m ean s to
the contents of program variables, reg- In fact, th e m em ory d evice can be p rogram EPRO Ms. In th at case, a
isters, and lots more. an y RAM, EEPRO M or EPRO M, as 28C64 EEPROM is a perfect substitute.
Th e th ird circu it is an ad d ress long as the relevant chip comes in a 28- Th at brin gs u s to a n ew an d u n ex-
decoder type 74HC139, of which only p in DIL case. Th is in clu d es EPRO Ms p ected ap p lication of th is p roject: th e
one half is used. It supplies the RD and w ith a cap acity of 8, 16, 32 an d board m ay be u sed to p rogram EEP-
WR signals that make the bus compat- 64 kBytes, RAMs with a capacity of 8 or RO Ms in ten d ed for u se in oth er cir-
ible with ‘Intel’ components. Indepen- 32 kBytes, as well as 8 or 32-kByte EEP- cuits. O nce the external EEPRO M has
d en t ReaD an d WRite sign als are RO Ms. Th e selection of th e m em ory been p rogram m ed w ith cod e, it m ay
required for EEPRO M type 2864. d evice inserted in the socket reserved be protected against (accid ental) writ-
In the circuit diagram, the memory for IC2 is by means of two jumpers on in g by p u llin g th e WR ju m p er from
socket is sh ow n to h old a 32-kByte connector K7 (see Table 1 further on). con n ector K7. An oth er, sm aller, EEP-
RAM type 62256. However, this is just Th e softw are called ‘M11’ m ay be RO M is available in sid e th e H C11 for
an exam p le as th e socket can accom - familiar to those of you who have built semi-permanent storage of configura-
modate one of eight different memory the circuit described in Ref. [2]. For the tion data.
4K7
K2 5V V+ 1 3
16 C1+ C4 1N4001 D2 D3
C15 C14
1 C8 IC3 3
C1–
6 14 11 47µ 47µ
RS1OUT T1IN 25V 6V8 1W3 10V
2 8 9 RXD
RS2IN R2OUT
7 13 12
RS1IN R1OUT
3 7 10 TXD CSPROG
RS2OUT T2IN
8 4 K6
C2+ C5
4 MAX232 5V
15 1
9 5
C2– 2
5 V-
5V D7 3
6 C9 C10 C11
C7 D6 4
10µ C12
10n 100n D5 5
63V
C4 ... C8 = 10µ / 63V
100n D4 6
34
K4 D3 7
28
1 42 9 D0 D2 8
PA0 PC0
2 41 10 D1 A0 10 D1 9
PA1 PC1 A0
3 40 11 D2 A1 9 20 D0 10
PA2 PC2 A1 CS
4 39 12 D3 A2 8 A0 11
PA3 PC3 A2
5 38 IC1 13 D4 A3 7 11 D0 A1 12
PA4 PC4 A3 D0
6 37 14 D5 A4 6 IC2 12 D1 A2 13
PA5 PC5 A4 D1
7 36 15 D6 A5 5 13 D2 A3 14
PA6 PC6 A5 D2
8 35 16 D7 A6 4 15 D3 A4 15
PA7 PC7 A6 RAM D3
9 A7 3 16 D4 A5 16
A7 D4
10 28 58 A0 A8 25 17 D5 A6 17
PD0/RXD PF0 A8 D5
11 29 57 A1 A9 24 62256 18 D6 A7 18
PD1/TXD PF1 A9 D6
12 30 56 A2 A10 21 19 D7 A8 19
PD2/MISO PF2 A10 D7
13 31 55 A3 A11 23 A9 20
PD3/MOSI PF3 A11
14 32 54 A4 A12 2 A10 21
PD4/SCK PF4 A12
15 33 53 A5 A13 26 A11 22
PD5/SS PF5 A13
16 52 A6 BUSY 1 A12 23
PF6 A14
17 20 51 A7 A13 24
PG7 PF7 OE WR
18 21 A14 25
PG6 22 14 27
19 22 50 A8 A15 26
PG5 PB0 RD A14/WR
20 23 49 A9
PG4 PB1 5V
21 24 48 A10
PG3 PB2
22 25 47 A11
PG2 PB3 R12
23 26 46 A12 5V
PG1 PB4
10K
24 27 45 A13
PG0 PB5
25 44 A14 R13 K7
K3 PB6 10K WR
26 43 A15
PB7 A14/WR
5V 68HC11F1 A14
1 18 68
XIRQ VREFH BUSY
R10 R9 R8 R7 K5
5V A15
10k
10k
10k
10k
8 59 10
4XOUT PE0 IC5a
61 9 R11
PE1 DMUX
10k
63 8 1 4
PE2 0
JP1 5V 65 7 5
PE3 1
2 60 C13 2 6
MODB PE4 6 2
0 0
3 62 5 3 1 G3 7 5V
MODA PE5 3
10µ 5V
17 64 4 63V
RES PE6
19 66 3
IRQ PE7
4 1 16
E
5 67 2 IC5
R/W VREFL IC5 = 74HC139
5V 8
5V EXTAL XTAL
K8
6 7 1
R6 R1 R3 10 5V
MC33064
IC4 2 10M
10k
100Ω
9
IC5b
X1 8
DMUX
1 WR 7 15 12
RES 0
MC33064 S1 C1 C2 RD 6
1
11
IRQ 5 14 10
RESET 0 0 2
27p 8MHz 27p
1 3 3 R/W 4 13 1 G 3 9
3
2 RESET E 3
2
1
990042 - 11
H1
H2
R3
K5 Resistors:
S1 C11 K8 R1 = 10MΩ
R2 = 4kΩ7
IC5
R8 R9 R4 R3 = 100Ω
R6 R10 C13 R4 = SIL array, 8 x 10kΩ
X1 K3
R5 = 1kΩ
IC2
990042-1
C2
Capacitors:
K2 C1
R1 IC1 C1,C2 = 27pF
C4-C8, C11,C13 = 10µF 63V
C6
C4 R7 C9 C9 = 10nF
JP1 C10,C12 = 100nF
C10 C12 R12
K7
IC4 R11 C14 = 47µF 10V
K9
D2 C15 = 47µF 25V
C8
IC3
C15
R5
D1 Semiconductors:
R2
H3
H4
K4
D3 D3 = LED
IC6
IC1 = 68HC11F1 (Motorola)
IC2 = 62256 (RAM)
IC3 = MAX232 (Maxim)
IC4 = MC33064 (Motorola)
IC5 = 74HC139
IC6 = 7805
Miscellaneous:
JP1 = 4-way SIL pinheader
K2 = 9-way female sub-D con-
nector (socket), PCB mount
K3 = 2-way pinheader with
jumper
K4,K6 = 26-way boxheader or
dual-row pinheader
K5,K8 = 10-way boxheader or
dual-row pinheader
K7,K9 = 5-way SIL pinheader
K10 = mains adaptor socket
S1 = pushbutton, 1 make con-
tact
(C) ELEKTOR
X1 = 8MHz quartz crystal
990042-1
68-pin PLCC socket
PCB, order code 990042-1 (see
Readers Services page)
Disk, order code 996005-1 (see
Readers Services page)
990042-1
Figure 3. Component
mounting plan and
track layouts of the
double-sided through-
plated board supplied
through the Readers
Services.
ad d ress areas (rare th ou gh ). If th at taneously programming several mem- tors: K4, K5, K6 and K8. In most cases,
happens, a small area of about 40 bytes ory devices of different technology. only K4 and K5 will be used.
should be left free before the border. In N ote: the M 11 software assumes that K4 is for th e free bin ary in p u t ou t-
th is w ay, you force th e assem bler to RAM is available in areas not declared in put lines of ports A, D and G, while K5
separate the relevant memory blocks in the ‘hc11_set’ menu. covers port E. The inputs that may be
the S19 output file. This may look like u sed to con vey an alogu e sign als are
a sh ortcom in g, bu t rem em ber th at THE CONNECTORS sep arately rou ted (K5 is very close to
there are few utilities capable of simul- Th e card h as fou r exten sion con n ec- p ort E). Th e referen ces u sed by th e
A4 6
2764
23 A11 A4 6
2864
23 A11
beyond specified limits, however, rais-
A3 7 (27128) 22 OE A3 7 22 OE
in g th e d evice temp eratu re an d cau s-
A2 8 21 A10 A2 8 21 A10 ing erratic behaviour of the memory.
A1 9 20 CE A1 9 20 CE
A0 10 19 O7 A0 10 19 I/O7
Using the assembler to program EEP-
O0 11 18 O6 I/O0 11 18 I/O6
ROMs for other applications
O1 12 17 O5 I/O1 12 17 I/O5
O2 13 16 O4 I/O2 13 16 I/O4
K7 It is possible to generate an S19 file con-
GND 14 15 O3 GND 14 15 I/O3
1
WR tain in g any cod e an d em p loy th e
A14/WR assem bler ’s FCB, FDB or FCC d irec-
A14
tives at th e en d of an O RG statem en t
RAM 6264 / 62256
EEPROM 28256 EPROM 27512 / 27256
A14/A15
which is offset with respect to the base
(NC) A14 1 28 VC C (VPP) A15 1 28 VC C ad d ress of th e m em ory d evice on th e
A15
A12 2 27 WE A12 2 27 A14 HC11 board.
A7 3 26 A13 (CS2) A7 3 26 A13
990042 - 14 (990042-1)
A6 4 25 A8 A6 4 25 A8
A5 5 24 A9 A5 5 24 A9
A4 6
62256
23 A11 A4 6
27512
23 A11
References:
(6264)
A3 7 22 OE A3 7 22 OE/VPP (OE)
(27256)
A2 8 28256 21 A10 A2 8 21 A10 [1] Motorola: Microcontrollers 68HC11,
A1 9 20 CE (CS1) A1 9 20 CE 68HC12, 68HC16 & M PC500 Families
A0 10 19 I/O7 A0 10 19 O7
(CD-RO M)
I/O0 11 18 I/O6 O0 11 18 O6
I/O1 12 17 I/O5 O1 12 17 O5
I/O2 13 16 I/O4 O2 13 16 O4
[2] 68HC11 Emulator, Elektor Electronics
GND 14 15 I/O3 GND 14 15 O3 February 1997, pages 22-27.
990042 - 15
Semiconductors:
K1 IC1,IC2 = DS2107 (Dallas
Semiconductor)
Miscellaneous:
50-way socket, IDC (for flatcable
connection).
Figure 4. The single-sid ed b oa rd d esigned for the SCSI term ina tor. Grea t c a re is req uired
in sold ering!
trac k layout and c omponent mounting b oa rd . As with the SMA ICs, the fine c a se, g rea t c a re should b e ta ken to
p la n a re g iven in Figure 4. This PCB is d eta il of the c op p er tra c ks req uires a p revent a ny p a rt or c op p er tra c k
not a va ila b le rea d y-ma d e throug h stea d y ha nd , a low-p ower sold ering touc hing the c ase.
Elektor Elec tronic s’ Rea d ers Servic es. iron with a sma ll b it, a nd g ood eye- (992035-1)
The two SMA (surfac e-mounted assem- sight. Note that pin 37 is not connected
b ly) ICs a re c a refully sold ered to the to g round (the c op p er ‘fing er’ is very Literature:
underside of the board. As shown, the c lose to the ground plane). [1] Produc t & Applic ations handbook 1995 –
other p a rts g o to the top sid e. Do not The pins that make up the other c on- 1996, Unitrode, Merrim ac k, USA.
forg et the wire links, they a re ea sily nec tor row (pins 1 through 25, exc ept [2] 1998 Short From Catalog, Dallas Sem i-
overlooked! pin 13) are joined with a horizontally c onduc tor, Dallas, Texas, USA.
One c ontac t row of the 50-way soc ket running wire which is soldered to ground [3] SCSI, the ins and outs, Elektor Elec tronic s
(pins 26 through 50) is soldered direc tly on the board (see c irc uit diagram). (Publishing), ISBN 905705-44-0.
to the trac ks at the c opper side of the If the b oa rd is fitted into a meta l p lug
CORRECTIONS
& updates
Evaluation System for 80C166 gested solutions are (1) to use a 40-MHz bus K1. Likewise pin 3 of D9 is connected
(parts 1 and 2) crystal oscillator module, (2) use a differ- to pin 3BC via bus K1. The correct con-
March & April 1999, 990028 ent 40-MHz crystal or (3) adapt the value nections are shown in the illustration.
of C18 and C19 until oscillation occurs at
Errors in Components List the third overtone. Development System for
IC9 and IC10 should be type 74HC573, not The battery may be a 3.6-V NiCd type, but 68HC11F1
HCT573. note that this is very slowly charged by the June 1999, 990042
C1 and C2 should be 10µF 16 tantalum MAX690. A better solution is to use a Lithi- JP1 is a simple jumper. In the text and parts
bead. um battery. list, it is erroneously referred to as K3.
R20 should be an 8-way SIL array, value The circuit diagram does not make it clear Part K3 is a 4-way SIL pinheader. In the text
4kΩ7. how the serial connection is made via D9. and parts list, it is erroneously referred to
The crystal frequency mentioned with C18, Pins 2 and 3 of this as JP1
C19 should be 40MHz, not 100MHz. connector 10µ
5V6
10µ R4 is erroneously listed as a SIL array with
IC3, MAX690 should be listed as MAX690 should not be a value of 10kΩ. The PCB however only
11B
(BATT), not MAX690 (I/O) connected D9 10A accommodates eight discrete resistors.
TxD1 and 1
10BC
14BC
These are numbered R4 and R6-R12.
Miscellaneous RxD1 (i.e. 6 15BC Resistor R13 in the circuit diagram equals
2 2BC
Pull-up resistors R1-R4 need not be mount- the TTL 7 R4 on the PCB.
ed with the serial channels. side of the 3
8
3BC
When a 40-MHz crystal is used for X1, it MAX232), 4 PC-Controlled Model Railway:
may oscillate at the fundamental frequen- but to the
9
5 EEDTS Pro
cy (13.333 MHz) instead of the third over- other June 1999, 990082-2
tone. If this happens the system baudrate (RS232) side of On page 60, the text references t S3, D1 and
990028-11
will not be correct and the serial commu- the MAX232. Pin 2 S4 should read S2, D2 and S1 respectively.
nication will fail to work as described. Sug- of D9 is therefore connected to pin 2BC via
BASIC S TAMP PROGRAMMING should be taken directly to A batterypack consisting of voltage regulator to be re-
COURSE (1) the Vin pin of the Stamp four 1.5 V batteries should placed by a low-drop type
Septem ber 1999, 990050-1 module. The circuit diagram be used instead of the 9-volt like the 4805.
The positive battery voltage and PCB are modified as battery originally indicated.
behind the on/off switch shown in the illustrations. This also requires the 7805
5V
2
S2
1
-
H2
6 Bt1
2 ROTKE
Sout 1 24 Vin +
7
Sin 2 23 K1
3 IC2 D1
ATN 3 22 R1 K5 K4
G
8 + +
C2 4 21
4 P15
P0 5 20 P15 P14
9 0 S1 P13
100n P1 6 BASIC 19 P14
C3 C4 P12
5
P2 7 STAMP 18 P13 P11
C1 K2 P10
P3 8 II 17 P12 P9
P4 9 16 P11 P8
100n P7
1-050099
P5 10 15 P10 P6
IC1
P5
P6 11 14 P9
P4
P7 12 13 P8 P3
P2
990050-1 P1
S2 S1
P0 +
C2 C1 Vin K3 K6
5V
K7
IC2
H1
K1 4805 R1
Bt1 2k2
C3 C4
9V D1
47µ 1µ
40V 25V
Elektuur 2/97 37
GENERAL INTEREST
Titan 2000
Part 5: half-bridging
two single amplifiers
In the introduction to
Part 1 it was stated
that the Titan 2000
could deliver up to
2000 watts of ‘music
power’, a term for
which there is no stan-
dard definition but
which is still used in
emerging markets.
Moreover, without
elaboration, this state-
ment is rather misleading, since the reader will BRIDGING:
P RO S AN D CO N S
by now have realized that the single amplifier Bridging, a technique that became fash-
cannot possibly provide this power. That can ion able in th e 1950s, is a w ay of con -
n ectin g tw o sin gle ou tp u t am p lifiers
be attained only when two single Titan ampli- (valve, transistor, BJT, MOSFET, push-pull,
complementary) so that they together
fiers are linked in a half-bridge circuit. The true con trol th e p assage of an altern atin g
power, that is, the product of the r.m.s. voltage current through the loud speaker. This
article d escribes wh at is strictly a h alf-
across the loudspeaker and the r.m.s current brid ge configuration, a term not often
flowing into the loudspeaker, is then 1.6 kilo- used in audio electronics. When audio
en gin eers sp eak of brid ge mod e, th ey
watts into a 4-ohm loudspeaker. m ean th e fu ll-brid ge m od e in w h ich
four amplifiers are used.
In early tran sistor au d io p ow er
am p lifiers, brid gin g w as a m ean s of
achieving what in the 1960s were called
Design by T. Giesberts public-address power levels as high as,
T35
T39
T36
T40
T37
T41
T38
T42
T29
T32
T31
T34
T30 T33
R39
R42
R36
R40
R37
R43
R41
R44
R38
R45
R49
R46
R50
R47
R51
R48
R52
- +
C43
C46
C44
C47
C45
C48
R79
R74
R75
0 0
LS+
++
--
R78
P-LS
C42
T27 T28
T
+5V I
D15
D14
R53
C28 C34 LS+ C41 C35
C15
T24
IC2
*
R56
R65
LS-
R76
C27
L1
R33 R35
R11
990001-1
R77
T21
LS-
IC1 R34 T18 C19
D17
C17 T15 C23
JP2
C21
D19
R24 P3
RE4 R27
R30
R10
T25
C24
C36
T16 C26 T19
1R
K1
C29 D10 D13
T50
C14
T46 R25 R31 R32 R28
R57
R66
C37
C30
T22
R71
C3
D9
R9
D12
R26 RE3 C22 R29
P2
C20
D16
R18 JP1 C7 R20
LS+
T26
T43 T47 T52 T48
C5
T11 D1 R14 T8
T45 R12 P1 T51
C4
R63
R72
R16 T7 T5 T6 R17
T
T3 T4
R60
R61
T23
R69
R70
R67
R5 R7
D8
D11
D18
T2 D2 RE2
C32 R19 R54 R4 T1 C12 R21 C39
R6 C1
C1
C31 D5 C2 D7 C38
3
D4 C25 R55 D6
R59 R2
R64
R73
C16 C9 C18 R68
mute
T44 C10 R3
D3
T RE1 T49
C8 R22 R1 R23 C11
P4 T10 P5
P-IN
T9
T13 T14
T
T
T14 T13
P5 T10 T9 P4
C11 R23 R1 R22 C8
mute
RE1
T
D3
T49 T44
R3 C10
R73
R64
R68 C18 C9 C16 R59
R2
D6 D7 C2 R55 C25 D5 D4 C31
C38
3
C1 R6
C1
RE2 D2 T2
R67
R70
R69
T23
R61
R58
D8
R7 R5
R60
R15 T12 T4 T3 R13
R72
R63
T
R17 T6 T5 T7 R16
C4
T51 T8 P1 R12 D1 T45
R14 T11
C5
T26
C7
LS+
P2
R62
R9
D9
C3
T22
C30
T20 T17
C37
R66
R57
C40 R8 C6 C33
R28 R32 R31 R25 T46
T50
C14
C36
K1
C24
R10
R30
D19
P3
JP2
C23
T18 C19 C17 T15
LS-
R34 IC1
T21
R77
R11
990001-1
R35 R33
R76
R65
R56
L1
LS- C27
*
IC2
T24
C15
R53
LS+
D14
D15
I +5V
R78
++
LS+
0 0
R75
R74
C48
C45
C47
C44
C46
C43
R79
+ -
R52
R48
R51
R47
R50
R46
R49
R45
R38
R44
R41
R43
R37
R40
R36
R42
R39
T33 T30
T34
T31
T32
T29
T42
T38
T41
T37
T40
T36
T39
T35
990001 - 4 - 11
4k
2k
1k
500
200
100
W
50
20
10
A comparison of these parameters with the specifications given in Part 4 ((May 1999 issue) show that they are gener-
ally in line. In fact, the intermodulation distortion figures are slightly better. Because of this, no new curves are given
here other than power output (1 kW into 8 Ω and 1.6 kW into 4 Ω) vs frequency characteristics for 1 per cent total har-
monic distortion.
During listening tests, it was not possible to judge the half-bridge amplifier at full volume, simply because there were
no loudspeakers available that can handle this power output. However, up to 200 W true power output, the half-bridge
amplifier sounds exactly the same as the single amplifier. Instrument test figures show no reason to think that the per-
formance at higher output powers will be degraded.
Bridge-tied-load
(BTL) amplifier
Type TDA8552
high voltage on chip
The TDA8552 from Philips Semiconductors is a two-channel audio
power amplifier that provides an output power of 2×1.4 W into an 8 Ω
load with a 5 V power supply. The circuit contains two BTL power ampli-
fiers, two digital volume controls and standby/mute logic. Volume and
balance of the amplifiers are controlled via two digital input pins which
can be driven by simple push-buttons or by a microcontroller. It is con-
tained in a 20-pin small outline package (SOP).
INTRODUCTION p ow er su p p ly.
Th e TDA8552T is a Brid ge-Tied Load The gain of the amplifier can be set
(BTL) au d io p ow er am p lifier cap able by the digital volume control. The gain
of d eliverin g 2×1.4 W in to an 8 Ω in th e m axim u m volu m e settin g is
A Philips Semiconductors load at a Total H arm on ic Distortion 20 d B (low gain ) or 30 d B (h igh gain ).
Application (TH D) of 10% op eratin g from a 5 V The maximum gain is selected via the
PINNING
SYMBOL PIN DESCRIPTION 1
GND1 1 ground 1, substrate/leadframe
OUT2+ 2 positive loudspeaker terminal output channel 2
VDD1 3 supply voltage 1
HPS 4 digital input for headphone sensing
MODE 5 digital trinary input for mode selection (standby, mute and operating)
UP/DOWN1 6 digital trinary input for volume control channel 1
UP/DOWN2 7 digital trinary input for volume control channel 2
VDD2 8 supply voltage 2
OUT2- 9 negative loudspeaker terminal output channel 2
GND2 10 ground 2, substrate/leadframe
GND3 11 ground 3, substrate/leadframe
OUT1+ 12 positive loudspeaker terminal output channel 1
VDD3 13 supply voltage 3
GAINSEL 14 digital input for gain selection
IN2 15 audio input channel 2
SVR 16 half supply voltage, decoupling ripple rejection
IN1 17 audio input channel 1
VDD4 18 supply voltage 4
OUT1- 19 negative loudspeaker terminal output channel 1 Figure 1. Pin configuration of
GND4 20 ground 4, substrate/leadframe the TDA8552.
does not fall below the minimum sup- th e m u te con d ition w h ile th e in p u t that the slave power amplifiers at out-
ply voltage. capacitor is being charged. This can be puts OUT1 and OUT2 are switched to
After the device has been switched achieved by holding the MODE pin at the standby mode. This results in float-
back to the operating mode, the previ- a level of 0.5 VDD, or by w aitin g abou t in g ou tp u ts: th e lou d sp eaker sign al is
ou s volu m e settin g is m ain tain ed . In 100 m s before ap p lyin g th e first vol- th en atten u ated by abou t 80 d B an d
the standby mode, the volume setting is ume-UP pulses. only the headphone can operate.
m ain tain ed as lon g as th e m in im u m O ne of the benefit of this system is
supply voltage is available. The current H E AD P H O N E S E N S I N G that the loudspeaker current does not
drain is very low: about 1 µA (typical). A headphone can be connected to the flow th orou gh th e socket sw itch ,
In battery-op erated ap p lication s, amplifier by using a coupling capacitor which could cause some power loss. Te
the volume setting can be maintained for each channel. The common ground other benefit is that the quiescent cur-
d u rin g battery exch an ge if th ere is a p in of th e h ead p h on e is con n ected to ren t is red u ced w h en th e h ead p h on e
supply capacitor available. th e grou n d of th e am p lifier—see Fig- plug is inserted into the socket.
ure 2. Wh en th e H PS p in is u sed as [990012]
MODE SELECTION illu strated in th is d iagram , th e
Th e d evice is in th e stan d by m od e TDA8552T detects if a headphone plug
(w ith a very low cu rren t d rain ) if th e is inserted into the socket.
voltage at th e MO DE p in is betw een When no headphone is plugged in,
VDD an d VDD –0.5 V. At a m od e select th e voltage level at th e H PS p in w ill
voltage of ≤ 0.5 V, the amplifier is fully remain low. A voltage ≤ VDD–1 V at the
operational. H PS p in w ill keep th e d evice in th e
In th e ran ge betw een 1 V an d BTL mode: the loudspeakers can then
VDD –1 V, th e am p lifier is in th e m u te be op eration al. If th e H PS p in is n ot Source: Data sheet ‘TDA8552T; TDA8552TS
con d ition . Th e mu te con d ition is u se- con n ected , th e d evice w ill rem ain in 2×1.4 W BTL audio amplifiers with digital
fu l for u sin g it as a ‘fast m u te’; in th is the BTL mode. volume control and headphone sensing’
mode, the output signal is suppressed, When a headphone is plugged into Philips Semiconductors, 276 Bath Road,
w h ile th e volu m e settin g retain s its th e socket, th e voltage at th e HPS p in Hayes, England UB3 5BX; telephone + 44 181
value. w ill be set to VDD . Th e d evice th en 730 5000; fax + 44 181 754 8421;
It is advisable to keep the device in switches to the SE mode, which means Internet: www.semiconductors.philips.com
Table 2. AC characteristics.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Po output power THD = 10%; RL = 8 Ω 1.0 1.4 - W
THD = 10%; RL = 16 Ω - 0,8 - W
THD = 0,5%; RL = 8 Ω 0.6 1.0 - W
THD = 0,5%; RL = 16 Ω - 0.6 - W
THD total harmonic distortion Po = 0.1 W; note 1 - 0.15 0.4 %
Po = 0.5 W; note 1 - 0.1 0.3 %
Vo(n) noise output voltage GAINSEL. = 0 V; note 2 - 60 100 µV
GAINSEL. = VDD ; note 2 - 100 - µV
SVRR supply voltage ripple rejection note 3 50 55 - dB
Vi(max) a maximum input voltage THD = 1%; - - 1.75 V
Gv = –50 to 0 dB
asup channel suppression VHPS = VDD ; note 4 70 80 - dB
acs channel separation 50 - - dB
Notes
1. Volume setting at maximum.
2. The noise output voltage is measured at the output in a frequency band from 20 Hz to 20 kHz (unweighted), Rsource = 0 Ω.
3. Supply voltage ripple rejection is measured at the output, with a source impedance of Rsource = 0 Ω at the input. The ripple voltage is
a sine wave with a frequency of 1 kHz and an amplitude of 100 mV (RMS) is applied to the positive supply rail, gain select pin is LOW
(0 V).
4. Channel suppression is measured at the output with a source impedance of Rsource = 0 Ω at the input and a frequency of 1 kHz. The
output level in the operating single-ended channel (OUT+ ) is set at 1 V (RMS).
PC-controlled
model railway:
EEDTS Pro
Part 1: the hardware
The Elektor Electron-
ics Digital Train Sys-
tem published in this
magazine in 1989/90
was warmly received
by the regrettably
declining core of
model train enthusi-
asts. Now, almost ten
years later, much of
the electronics tech-
nology has changed
and it is, therefore,
felt necessary to
update a number of
key elements of that
system. One of the
more important
changes is the promi-
INTRODUCTION etary systems: locomotives fitted with
nent role given to the Mod ern electron ics an d m od el train a Märklin decoder may be readily inte-
personal computer systems get along well together. This is
primarily because most electronic com-
grated into the EEDTS. This means that
th e u ser h as all th e freed om h e/sh e
(PC). This develop- p on en ts h ave becom e so sm all th at wants in building up a model train sys-
they can easily be fitted into a locomo- tem.
ment also opens the tive, turnouts (points; USA: switches), EEDTS Pro con tin u es alon g th ese
way to a number of or sign als to give th ese som e in telli- lines by replacing those components of
gence. Developments in this field were th e earlier system th at h ave become a
new applications. the subject of an article in the May 1999 little long in the tooth, technologically
issue of this magazine. speaking.
Th e sn ag w ith m an y p rop rietary In the design, great importance was
m od el train system s is th at th ey are attached to retaining or obtaining com-
fairly exp en sive. Th e EEDTS of yester- p atibility w ith existin g system s. Th e
year showed that it is possible to build result of this policy is that many items
a much less expensive alternative. As a of th e EEDTS, su ch as th e booster, an d
bon u s, th e system is tran sp aren t so th e d ecod ers for tu rn ou ts (sw itch es)
Design by S van de Vries that it can be incorporated into propri- an d sign als, can be u sed w ith EEDTS
return
signal
module
up to eight
manual controls
up to eight
manual controls buffer
buffer return signallers switch/signal
return signallers decoder
manual
manual control
control
microcontroller
microcontroller booster
booster
locomotive
decoder
optoisolator locomotive
optoisolator RS-232 decoder
RS-232 super engine decoder
980085 - 2 - 11 PC software
control
980085 - 2 - 12
5V 5V
3 5V R2 5V
C7 C4, C9...C12 = 47µ / 25V
100k
C9
100n
8 10 15
14 C6 2
S1 C1 VRH VPP6
IC2 C10 1 V+
18 19 C1+ 16
7 100n RESET IRQ
100n K6
22 IC3
RESET K2 TCAP1 3
39 23 C1–
PB0 TCAP2 11 14
38 52 T1IN T1OUT
PB1 TDO 10 7
IC2 = 74HCT04 37 IC1 50 T2IN T2OUT
PB2 RDI 12 13
36 R1OUT R1IN
PB3 9 8
R3 1 8x 47k 35 2 R2OUT R2IN C12
PB4 TCMP1 C11 4
34 1 C2+
PB5 TCMP2
33 40 MAX232 15
PB6 VPP1 5
32 51 C2– K8
PB7 SCLK 8 V-
2 3 4 5 6 7 8 9 IC2d
K4 MC68HC705B16 6
49 C4
PC0 1
48
PC1
47 9
PC2 R5
46
PC3 4k7
45
PC4 PA0
31 5V
44 30 IC2a
PC5 PA1
43 29 1 2 5V
PC6 PA2 1
42 28 K7
PC7 PA3
27
PA4 IC2e IC2b
14 26
PD0/AN0 PA5 11 10 3 4
13 25 1 1
PD1/AN1 PA6
12 24
PD2/AN2 PA7
11 IC2c
PD3/AN3
9 20 5 6
PD4/AN4 PLMA 1
5 21
PD5/AN5 PLMB
4
PD6/AN6 IC2f
3 7
PD7/AN7 VRL 12 13
1
2 3 4 5 6 7 8 9 OSC1 OSC2
16 17 41
R1 K1
K5 D3 D4 IC4
1M5
7805 5V
X1
5V R4 1 8x 47k
D2 D1
C2 4MHz C3 C5 C8
4x 1N4001 980085 - 2 - 13
12k
D1 d igital sign als on th e track in to an a-
logu e con trol voltages for th e en gin e.
K1
8V2 Th is m ay take tw o form s: on e th at is
3 Re1 D3 fitted in the locomotive during manu-
5
facture, or one that is built at home and
2
12V then fitted into the locomotive.
4
1
D2 1N4148 Those readers who use Märklin equip-
ment may note that the EEDTS Pro sup-
ports the C80, C81, and C90 decoders (old
S2 M otorola format) and the 60901, 60902,
C95, and C95/2 decoders (new M otorola
format). Compatible decoders and Lenz
980085 - 2 - 14 decoders are also supported.
A n ew su p er en gin e d ecod er is in
Figure 6. Circuit dia-
Figure 4. Circuit dia- gram of the manual
gram of the booster control: potentiometer
interface. 6 R1
1k
P1
and six switches.
8
Resistors:
R1 = 12 kΩ 15
7 S1
F0
Semiconductors: 14
manual control
D1 = zener, 8.2 V, 400 mW 6
S2
D2 = LED 13 F1 DB15 connector:
D3 = 1N4148 5
12 pin 1: to K4 pin 1
S3 pin 2: to K4 pin 2
Miscellaneous: 4 F2 pin 3: to K4 pin 3
S1 = push-button switch with break 11
pin 4: to K4 pin 4
contact 3 pin 5: to K4 pin 5
S4
S2 = push button switch with make 10 F3 pin 6: to K4 pin 6
contact 2 pin 7: to K4 pin 7
pin 8: to K2 pin 1...8 (up to eight manual controls)
K1 = 5≠ pole DIN connector for board 9
S5
mounting 1 F4 pin13: GND (e.g., K5 pin 9)
Re1 = relay, 12 V pin14: to K5 pin 1...8 (up to eight manual controls)
pin15: + 5V (e.g., K5 pin 10)
S6
TURN
980085 - 2 - 16
B1
B2
1-580089 Resistors:
K1 K5 ROTKELE )C(
R3 R1 = 1.5 MΩ
R4
IC1
K2 R2 = 100 kΩ
C7 R3, R4 = SIL array, 8×47 kΩ
R5 = 4.7 kΩ
D3
D2
Capacitors:
C2
C1, C6, C7 = 0.1 µF
C2, C3 = 0.022 µF
D4
D1
IC3
C12 D1–D4 = 1N4001
R2
S1 K8
IC2
C6
Integrated circuits:
IC4 IC1 = MC68HC705B16 (available via
C4 C11 our Reader Services, Order No
B3
B4
K7
C8 986518-1
IC2 = 74HCT04
IC3 = MAX232
IC4 = 7805
Miscellaneous:
X1 = crystal, 4 MHz
S1 = single-pole switch with make con-
tact
K1 = 2-fold SIL header
K2, K4 = 8-pole SIL header
K5 = 10-pole SIL header
K6 = 3-pole SIL header
K7 = 6-pole SIL header
K8 = 4-pole SIL header
Diskette, 3.5”, with Windows software,
available via our Reader Services,
Order No 986027-1a+ b
(C) ELEKTOR
980085-1
Figure 7. Printed-circuit
board for the controller.
15
14
13
12
11
10
15
14
13
12
11
10
15
14
13
12
11
10
15
14
13
12
11
10
8
2
9
1
2
9
1
2
9
1
2
9
1
1
2
K2
3
4
5
6
7
8
1
2
K4
3
4
5
6
7
8
1
2
K5
3
4
5
6
7
8
9
10
15
14
13
12
11
10
15
14
13
12
11
10
15
14
13
12
11
10
15
14
13
12
11
10
8
2
9
1
2
9
1
2
9
1
2
9
1
R5 R6 R7 R8
K6
2
3
1
13
25
12
24
11
23
10
22
21
20
19
18
17
16
15
14
9
980085 - 2 - 17
ad d s a start-stop fu n ction to th e sig- GN D term in als. Th e w ip ers are in d i- th e Märklin booster w ill also be su p -
n als. Wh en th e booster is actu ated by vid u ally con n ected to a relevan t an a- ported . The TTL signals on head er K8
briefly closin g sw itch S3, th e relay is logue input on the microcontroller. are intended for this booster.
energized, whereupon diode D 1 lights. Each m an u al con trol con tain s six
The relevant data is then passed by the fu n ction keys an d a w ire brid ge. Tw o CONSTRUCTION
controller to the booster. of the function keys – reverse and F0 – Th e con troller is best bu ilt on th e
Wh en sw itch S4 is p ressed briefly, are u sed w ith both th e old an d th e p rin ted -circu it board sh ow n in Fig-
the relay is deactuated, whereupon the n ew Motorola form at. F0 is in d ep en - ure 7. Carefu l atten tion to th e d raw -
booster is d ecou p led from th e con - d en t of th e d irection of travel an d is in gs an d p arts list sh ou ld en su re th at
troller. m ostly u sed for con trollin g th e fron t no problems will be encountered.
When the short-circuit protection of lights of the locomotive. Figu re 8 sh ow s h ow th e m an u al
th e booster is actu ated , th e relay is Th e oth er fou r keys can be u sed controls are interconnected and linked
automatically deenergized. on ly w ith en gin e d ecod ers th at su p - to the various headers.
Con n ection s PA0–PA (p ort A) are p ort th e n ew Motorola form at. Th is
u sed for com m u n ication w ith th e format is selected by a wire link on the R A I L WA Y M O D E L L I N G
m on itor u n its. Th e lin ks betw een th e h ead er betw een p in s 7 an d 8. Wh en IN THE UK
p ort an d th e u n its are 6-core cables, this link is in place, the manual controls Th ere are a n u mber of mod el railw ay
conforming to the Märklin design. The m ay be con n ected as relevan t by a magazin es, bu t th ese may n ot alw ays
EEDTS monitor units may also be used, 10-core flatcable. The wire link enables be available from newsagents without
bu t th ey m u st be lin ked via a sp ecial en gin es d riven via th e old form at or being ordered.
ad ap tor cable, sin ce th ey u se a 5-core the new format to be used on the same
cable. How this cable is converted to a track. Railway Modeller • Peco Publications &
6-w ay on e is sh ow n in Figure 5. If a Th e in d ivid u al term in als of th e Pu blicity Ltd • Un d erleys • Beer •
mixture of EEDTS and Märklin monitors function keys are linked to the C-port Seaton • Devon EX12 3NA.
is u sed , in sert th e Märklin d ecod ers as relevant, while their common termi-
betw een th e EEDTS m on itors an d n als are con n ected to th e B-p ort. Th is M odel Railway Journal • Wild Sw an
header K7 on the controller. arrangement enables cyclical scanning Pu blication s Ltd • 1–3 H agbou rn e
of the manual controls. Road • Didcot • O xon OX11 8DP.
M AN UAL CO N TRO LS It is clear th at if on ly th e old
Ports B, C, and D, on the controller are Motorola form at is goin g to be u sed , Model Railway Enthusiast • Link House
used for communication with the eight function keys F1–F4 may be omitted. Magazin es Ltd • Lin k H ou se • Din g-
manual controls. The circuit diagram of wall Ave • Croydon • Surrey CR9 2TA.
such a control is shown in Figure 6. BOOSTER
Each m an u al con trol con sists of a Th e booster, th at is th e am p lifier th at Fu rth er in form ation m ay be glean ed
potentiometer, with which the speed of con verts th e d igital sign als to an an a- from:
th e associated locom otive is varied , logu e voltage w h ich is sw itch ed http://www.geocities.com/CapeCanaveral/
and a number of switches. betw een + 15 V an d –15 V, w ill n ot be 7045/railmodel.html
Th e VCC term in als of all p oten - discussed in this part of the article, but [980085]
tiom eters are in terlin ked , as are th e in the next. It is intended that in future
Semiconductors:
K1 IC1,IC2 = DS2107 (Dallas
Semiconductor)
Miscellaneous:
50-way socket, IDC (for flatcable
connection).
Figure 4. The single-sid ed b oa rd d esigned for the SCSI term ina tor. Grea t c a re is req uired
in sold ering!
trac k layout and c omponent mounting b oa rd . As with the SMA ICs, the fine c a se, g rea t c a re should b e ta ken to
p la n a re g iven in Figure 4. This PCB is d eta il of the c op p er tra c ks req uires a p revent a ny p a rt or c op p er tra c k
not a va ila b le rea d y-ma d e throug h stea d y ha nd , a low-p ower sold ering touc hing the c ase.
Elektor Elec tronic s’ Rea d ers Servic es. iron with a sma ll b it, a nd g ood eye- (992035-1)
The two SMA (surfac e-mounted assem- sight. Note that pin 37 is not connected
b ly) ICs a re c a refully sold ered to the to g round (the c op p er ‘fing er’ is very Literature:
underside of the board. As shown, the c lose to the ground plane). [1] Produc t & Applic ations handbook 1995 –
other p a rts g o to the top sid e. Do not The pins that make up the other c on- 1996, Unitrode, Merrim ac k, USA.
forg et the wire links, they a re ea sily nec tor row (pins 1 through 25, exc ept [2] 1998 Short From Catalog, Dallas Sem i-
overlooked! pin 13) are joined with a horizontally c onduc tor, Dallas, Texas, USA.
One c ontac t row of the 50-way soc ket running wire which is soldered to ground [3] SCSI, the ins and outs, Elektor Elec tronic s
(pins 26 through 50) is soldered direc tly on the board (see c irc uit diagram). (Publishing), ISBN 905705-44-0.
to the trac ks at the c opper side of the If the b oa rd is fitted into a meta l p lug
CORRECTIONS
& updates
Evaluation System for 80C166 gested solutions are (1) to use a 40-MHz bus K1. Likewise pin 3 of D9 is connected
(parts 1 and 2) crystal oscillator module, (2) use a differ- to pin 3BC via bus K1. The correct con-
March & April 1999, 990028 ent 40-MHz crystal or (3) adapt the value nections are shown in the illustration.
of C18 and C19 until oscillation occurs at
Errors in Components List the third overtone. Development System for
IC9 and IC10 should be type 74HC573, not The battery may be a 3.6-V NiCd type, but 68HC11F1
HCT573. note that this is very slowly charged by the June 1999, 990042
C1 and C2 should be 10µF 16 tantalum MAX690. A better solution is to use a Lithi- JP1 is a simple jumper. In the text and parts
bead. um battery. list, it is erroneously referred to as K3.
R20 should be an 8-way SIL array, value The circuit diagram does not make it clear Part K3 is a 4-way SIL pinheader. In the text
4kΩ7. how the serial connection is made via D9. and parts list, it is erroneously referred to
The crystal frequency mentioned with C18, Pins 2 and 3 of this as JP1
C19 should be 40MHz, not 100MHz. connector 10µ
5V6
10µ R4 is erroneously listed as a SIL array with
IC3, MAX690 should be listed as MAX690 should not be a value of 10kΩ. The PCB however only
11B
(BATT), not MAX690 (I/O) connected D9 10A accommodates eight discrete resistors.
TxD1 and 1
10BC
14BC
These are numbered R4 and R6-R12.
Miscellaneous RxD1 (i.e. 6 15BC Resistor R13 in the circuit diagram equals
2 2BC
Pull-up resistors R1-R4 need not be mount- the TTL 7 R4 on the PCB.
ed with the serial channels. side of the 3
8
3BC
When a 40-MHz crystal is used for X1, it MAX232), 4 PC-Controlled Model Railway:
may oscillate at the fundamental frequen- but to the
9
5 EEDTS Pro
cy (13.333 MHz) instead of the third over- other June 1999, 990082-2
tone. If this happens the system baudrate (RS232) side of On page 60, the text references t S3, D1 and
990028-11
will not be correct and the serial commu- the MAX232. Pin 2 S4 should read S2, D2 and S1 respectively.
nication will fail to work as described. Sug- of D9 is therefore connected to pin 2BC via
BASIC S TAMP PROGRAMMING should be taken directly to A batterypack consisting of voltage regulator to be re-
COURSE (1) the Vin pin of the Stamp four 1.5 V batteries should placed by a low-drop type
Septem ber 1999, 990050-1 module. The circuit diagram be used instead of the 9-volt like the 4805.
The positive battery voltage and PCB are modified as battery originally indicated.
behind the on/off switch shown in the illustrations. This also requires the 7805
5V
2
S2
1
-
H2
6 Bt1
2 ROTKE
Sout 1 24 Vin +
7
Sin 2 23 K1
3 IC2 D1
ATN 3 22 R1 K5 K4
G
8 + +
C2 4 21
4 P15
P0 5 20 P15 P14
9 0 S1 P13
100n P1 6 BASIC 19 P14
C3 C4 P12
5
P2 7 STAMP 18 P13 P11
C1 K2 P10
P3 8 II 17 P12 P9
P4 9 16 P11 P8
100n P7
1-050099
P5 10 15 P10 P6
IC1
P5
P6 11 14 P9
P4
P7 12 13 P8 P3
P2
990050-1 P1
S2 S1
P0 +
C2 C1 Vin K3 K6
5V
K7
IC2
H1
K1 4805 R1
Bt1 2k2
C3 C4
9V D1
47µ 1µ
40V 25V
Elektuur 2/97 37
O . Box
P. 14
14
We can only answer questions or remarks of general interest to our readers, concerning projects not older than
two years and published in Elektor Electronics. In view of the amount of post received, it is not possible to
answer all letters, and we are unable to respond to individual wishes and requests for modifications to, or addi-
tional information about, Elektor Electronics projects.
PCB design and mains voltage is laudable, but cannot be defended by any fested itself as sh ort rep etitive w h istles
(April 1999) regulation or standard. But, again, even if superimposed as it were on the music.
Dear Ed itor—In th e article ‘PCB d esign there are no legal requirements to do so, it is More recently, I listened to a MiniDisc
and mains voltage’ you state that the dis- always advisable to maximize spacings. recorder in a hi-fi retail shop. This system
tance between the mains termination on u ses ATRAC com p ression , w h ich is also
a board to an y oth er con d u ctor m u st be similar to MP3. I was perhaps even more
n ot less th an 6 m m . H ow ever, I w ou ld Joystick and MIDI interface aston ish ed th an th e salesm an th at I
not like to be responsible for the d esigns (December 1998) cou ld h ear th e com p ression straigh t-
sh ow n . In Figu re 4, th e circu it is m ad e Dear Ed itor—I h ave n oticed th at on aw ay. In th is case, it m an ifested itself in
u n n ecessarily d an gerou s by sp ecifyin g a qu ite a few sou n d card s, su ch as several very sh ort in terru p tion s at certain fre-
minimum d istance of 3 mm between the from Yam ah a, th e MIDI-IN d oes n ot quencies. For instance, in normal speech,
m ain s term in als an d th e secon d ary cir- w ork if R10 at p in 4 of K4 h as a valu e of th e s- or f- sou n d is seam less, bu t in th e
cu it. It m ay w ell be th at th e in ten tion 220 Ω as sp ecified . If th e valu e is in - case of th e Min iDisc it sou n d s as if th ey
h ere is to u se a 3-core m ain s cable w ith creased to 470 Ω, all work well. are su bd ivid ed in to m an y p arts w h ich
the protective earth securely connected. G, Huizinga are not connected seamlessly. In the con-
Although the concept behind the arti- sequent ‘seams’ the high frequencies that
cle is correct and useful, I would suggest Thanks for this tip, which many readers will should be there are all but absent.
th at it is better (an d safer) to sp ecify a no doubt find very useful. MP3 sou n d s id en tical if th e comp res-
d istan ce betw een m ain s-carryin g tracks sion takes p lace w ith less th an 256 kbp s
and terminals of at least 10 mm. (6:1); at that compression, I don’t hear it,
G. v. Hamersfeld Digital audio formats bu t at 128 kbp s (12:1) it is qu ite au d ible
(February 1999) (at least to me). I don’t know anyone else
We have indicated in the article that the legal Dear Ed itor—In the article ‘Digital aud io w h o can h ear th e com p ression th at
regulations must be seen (as intended) as formats’ MPEG 1 Layer 3 (MP3) is d is- clearly (without an A/B comparison).
minimum dimensions. That is why the draw- cu ssed an d it is in tim ated th at th is for- I sh ou ld like to h ear from oth er read -
ings show > 3 mm and > 6 mm respectively. m at u ses lossy com p ression w h ich is, ers with similar experiences at
Any constructor or designer is, of course, free h ow ever, n ot au d ible. I can n ot agree lweekers@yahoo.com
to increase these minimum spacings. This is with this. L. Weekers
particularly so if there is a likelihood that the Some years ago, I had a DCC recorder
minimum spacings may be inadequate (such w h ich u ses PASC com p ression . Th is is Compression always affects the signal. In
as use in a damp atmosphere). It is, of course, sim ilar to MP3 in th at it u ses a m askin g MP3 and other systems, a method was sought
sensible to make the layout of a printed-cir- effect, combined with loss-free reduction, and found in which the inescapable effect is
cuit board so that the spacings between tracks based on th e th resh old of h earin g. I inaudible for virtually everybody. Your expe-
are not reduced needlessly. cou ld d efin itely h ear th e com p ression . riences show that there are people with such
Your suggestion of a minimum of 10 mm With complex pieces of music, this mani- good hearing that they can discern the effect.
AT90S2313 AT90S2313
can sink 20 mA. As inputs, Port D pins that are exter- AT90S2313 ➥ Programmable Watchdog Timer with On-Chip
nally pulled low will source current if the pull-up resis- 8-bit AVR® Microcontroller with 2K bytes In-System Oscillator
tors are activated. Port D also serves the functions of Programmable Flash ➥ On-Chip Analog Comparator
various special features of the AT90S2313 (see full ➥ Low Power Idle and Power Down Modes
datasheet, page 43). Manufacturer ➥ Programming Lock for Software Security
Atmel. ➥ 20-Pin Device
RESET Website: www.atmel.com
6/99
Reset input. A low on this pin for two machine cycles Application Example
while the oscillator is running resets the device. Wave File Player, Elektor Electronics February 1999
Description
XTAL1 The AT90S2313 is a low-power CMOS 8-bit micro-
Input to the inverting oscillator amplifier and input to controller based on the AVR enhanced RISC architec-
the internal clock operating circuit. ture. By executing powerful instructions in a single
Features clock cycle, the AT90S2313 achieves throughputs
XTAL2 ➥ AVR® - High Performance and Low Power RISC approaching 1 MIPS per MHz allowing the system
Figure 3. External clock drive configuration.
Output from the inverting oscillator amplifier. Architecture designer to optimize power consumption versus pro-
➥ 118 Powerful Instructions — Most Single Clock cessing speed.
Crystal Oscillator Cycle Execution The AVR core combines a rich instruction set with 32
automatic pre-decrement and post-increment, the
XTAL1 and XTAL2 are input and output, respectively, of ➥ 2K bytes of In-System Repro-
address registers X, Y and Z are used and decrement-
an inverting amplifier which can be configured for use grammable Flash
ed and incremented.
as an on-chip oscillator, as shown in Figure 2. Either a – SPI Serial Interface for Pro-
The 32 general purpose working registers, 64 I/O reg-
quartz crystal or a ceramic resonator may be used. To gram Downloading
isters and the 128 bytes of data SRAM in the
drive the device from an external clock source, XTAL2 – Endurance: 1,000 Write/Erase
AT90S2313 are all directly accessible through all these
should be left unconnected while XTAL1 is driven as Cycles
addressing modes.
shown in Figure 3. ➥ 128 bytes EEPROM
– Endurance: 100,000
Write/Erase Cycles
➥ 128 bytes Internal RAM
The SRAM Data Memory ➥ 32 x 8 General Purpose Work-
Figure 4 shows how the AT90S2313 Data Memory is ing Registers
organized. ➥ 15 Programmable I/O Lines
65
The 224 Data Memory locations address the Register ➥ VCC : 2.7 - 6.0V
file, I/O Memory and the data SRAM. The first 96 loca- ➥ Fully Static Operation
tions address the Register File + I/O memory, and the – 0 - 10 MHz, 4.0 - 6.0V
next 128 address the data SRAM. – 0 - 4 MHz, 2.7 - 6.0V
The five different addressing modes for the data mem- ➥ Up to 10 MIPs Throughput at
ory cover: Direct, Indirect with Displacement, Indirect, 10 MHz
Indirect with Pre-Decrement and Indirect with Post- ➥ One 8-Bit Timer/Counter with
Increment. In the register file, registers R26 to R31 Separate Prescaler
feature the indirect addressing pointer registers. ➥ One 16-Bit Timer/Counter with
The Direct addressing reaches the entire data address Separate Prescaler and Com-
space. pare and Capture Modes
The Indirect with Displacement mode features 63 ➥ Full Duplex UART
address locations reach from the base address given ➥ Selectable 8, 9 or 10 bit PWM
by the Y and Z register. ➥ External and Internal Interrupt
When using register indirect addressing modes with Figure 4. SRAM organization. Sources
Figure 1. AT90S2313 block diagram.
✃
AT90S2313 AT90S2313
6/99
Integrated circuits Integrated circuits
Microcontrollers Microcontrollers
D ATA S H E E T 6 /9 9 D ATA S H E E T 6 /9 9
general purpose working registers. All the 32 registers provide internal pull-up resistors (selected for each I/O Memory
are directly connected to the Arithmetic Logic Unit
The I/O space definition of the AT90S2313 is shown in the following table.
(ALU), allowing two independent registers to be
accessed in one single instruction executed in one Address Hex Name Function
clock cycle. The resulting architecture is more code $3F ($5F) SREG Status Register
Elektor Electronics
efficient while achieving throughputs up to ten times $3D ($5D) SPL Stack Pointer Low
faster than conventional CISC microcontrollers. $3B ($5B) GIMSK General Interrupt MaSK register
The AT90S2313 provides the following features: 2K $3A ($5A) GIFR General Interrupt Flag Register
bytes of In-System Programmable Flash, 128 bytes $39 ($59) TIMSK Timer/Counter Interrupt MaSK register
EEPROM, 128 bytes SRAM, 15 general purpose I/O $38 ($58) TIFR Timer/Counter Interrupt Flag register
lines, 32 general purpose working registers, flexible $35 ($55) MCUCR MCU general Control Register
$33 ($53) TCCR0 Timer/Counter 0 Control Register
timer/counters with compare modes, internal and exter-
$32 ($52) TCNT0 Timer/Counter 0 (8-bit)
nal interrupts, a programmable serial UART, program-
$2F ($4F) TCCR1A Timer/Counter 1 Control Register A
mable Watchdog Timer with internal oscillator, an SPI $2E ($4E) TCCR1B Timer/Counter 1 Control Register B
serial port for Flash Memory downloading and two $2D ($4D) TCNT1H Timer/Counter 1 High Byte
software selectable power saving modes. The Idle Pin configuration
$2C ($4C) TCNT1L Timer/Counter 1 Low Byte
Mode stops the CPU while allowing the SRAM, $2B ($4B) OCR1H Output Compare Register 1 High Byte
timer/counters, SPI port and interrupt system to contin- bit). PB0 and PB1 also serve as the positive input $2A ($4A) OCR1L Output Compare Register 1 Low Byte
ue functioning. The power down mode saves the regis- (AIN0) and the negative input (AIN1), respectively, of $25 ($45) ICR1H T/C 1 Input Capture Register High Byte
ter contents but freezes the oscillator, disabling all other the on-chip analog comparator. The Port B output $24 ($44) ICR1L T/C 1 Input Capture Register Low Byte
chip functions until the next interrupt or hardware reset. buffers can sink 20mA and can drive LED displays $21 ($41) WDTCR Watchdog Timer Control Register
The device is manufactured using Atmel’s high density directly. When pins PB0 to PB7 are used as inputs and $1E ($3E) EEAR EEPROM Address Register
non-volatile memory technology. The on-chip In-Sys- are externally pulled low, they will source current if the $1D ($3D) EEDR EEPROM Data Register
tem Programmable Flash allows the program memory internal pull-up resistors are activated. Port B also $1C ($3C) EECR EEPROM Control Register
to be reprogrammed in-system through an SPI serial serves the functions of various special features of the $18 ($38) PORTB Data Register, Port B
interface or by a conventional nonvolatile memory pro- AT90S2313 (see full datasheet, page 38). $17 ($37) DDRB Data Direction Register, Port B
grammer. By combining an enhanced RISC 8-bit CPU $16 ($36) PINB Input Pins, Port B
with In-System Programmable Flash on a monolithic Port D (PD6..PD0) $12 ($32) PORTD Data Register, Port D
chip, the Atmel AT90S2313 is a powerful microcon- Port D has seven bi-directional I/O pins with internal $11 ($31) DDRD Data Direction Register, Port D
$10 ($30) PIND Input Pins, Port D
troller that provides a highly flexible and cost effective pull-up resistors, PD6..PD0. The Port D output buffers
$0C ($2C) UDR UART I/O Data Register
solution to many embedded control applications.
$0B ($2B) USR UART Status Register
The AT90S2313 AVR is supported with a full suite of $0A ($2A) UCR UART Control Register
program and system development tools including: C $09 ($29) UBRR UART Baud Rate Register
compilers, macro assemblers, program debugger/sim- $08 ($28) ACSR Analog Comparator Control and Status Register
ulators, in-circuit emulators, and evaluation kits.
66
All the different AT90S2313 I/O and peripherals are placed in the I/O space. The different I/O locations are
accessed by the IN and OUT instructions transferring data between the 32 general purpose working registers and
Pin Descriptions the I/O space. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI
instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
VCC Refer to the instruction set chapter for more details. When using the I/O specific commands, IN, OUT, SBIS and
Supply voltage pin. SBIC, the I/O addresses $00 - $3F must be used. When addressing I/O registers as SRAM, $20 must be added to
this address. All I/O register addresses are shown with the SRAM address in parentheses.
GND The different I/O and peripherals control registers are explained in the following sections. When using the I/O spe-
Ground pin. cific commands, IN, OUT, SBIS and SBIC, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
Port B (PB7..PB0) ters as SRAM, $20 must be added to this address. All I/O register addresses are shown with the SRAM address
Port B is an 8-bit bi-directional I/O port. Port pins can Figure 2. Oscillator connections in parentheses.
✃