Topic Introduction : Functional units of digital system and their interconnections, buses, bus architecture, types of buses and bus arbitration. Register, bus and memory transfer. Processor Organization : general registers organization, stack organization and addressing modes. Arithmetic and Logic Unit : Look ahead carries adders. Multiplication: Signed operand multiplication, Booths algorithm and array multiplier. Division and logic operations. Floating point arithmetic operation, Arithmetic & logic unit design. IEEE Standard for Floating Point Numbers. Control Unit : Instruction types, formats, instruction cycles and sub cycles (fetch and execute etc), micro operations, execution of a complete instruction. Program Control, Reduced Instruction Set Computer, Pipelining. Hardwire and micro programmed control: micro-program sequencing, concept of horizontal and vertical microprogramming. Memory : Basic concept and hierarchy, semiconductor RAM memories, 2D & 2 1/2D memory organization. ROM memories. Cache memories: concept and design issues & performance, address mapping and replacement Auxiliary memories: magnetic disk, magnetic tape and optical disks Virtual memory: concept implementation. Input / Output : Peripheral devices, 1/0 interface, I/O ports, Interrupts; interrupt hardware, types of interrupts and exceptions. Modes of Data Transfer: Programmed W/O, interrupt initiated /O and Direct Memory Access., vo channels and processors. Serial Communication. : Synchronous & asynchronous communication, standard communication interfaces.INTRODUCTION / PROCESSOR ORGANIZATION Computer architecture and Computer set of rules and methods that describe the functionality, organization, and * implementation of computer systems. Some definitions of architecture define it as describing the capabilities and programming model of a computer but not a particular implementation. In other definitions computer architecture involves instruction set architecture design, micro architecture design, logic design, and implementation. ‘Computer architecture is a specification detailing how a set of software and hardware technology standards interact to form a computer system or platform, In short, computer architecture refers to how a computer system is designed and what technologies it is compatible with. As with other contexts and meanings of the word architecture, computer architecture is likened to the art of determining the needs of the user/system/technology, and creating a logical design and standards based on those requirements. Data nput Pamary —+ pata Fiow Tt Sentrriowwal EGE ronnica og of tools available for any operator ganization will be the way the ore ehose cataloged tools can be i 3 of m ‘computers. Discuss various categories of modern on y classified by size and s fc ie overlap : Bee eal Computer +A smal, single-user computer rocessor. opTowerful, single-user computer. A ‘evn personal computer, but it has a processor and, in general: @ wser computer capable of ‘of users simultaneously. i ter: ‘owerful multi-user comput 2s nt many hundreds or thousands of 6) @ Supercomputer can perform hundi cae i omputer is a 1 uter and Mainframe : Supercomp' Supercom Poe one of the fastest computers currently available. Supercomputers are very expensive and af | employed for specialized applications that require imment ‘mounts of mathematical calculations (number crunching). For example, weather foreeasting requires a Supercomputer. Other uses of supercomputers scientific Simulations, (animated) graphics, fluid dy ealeulations, nuclear energy research, electronic design, and analysis of geological data in_ petrochemic: ‘reds of millions of instructions per prospecting). Pechaps the best known supercomputer] ‘manufacturer is Cray Research. : i < Mainframe was a term originally referring to, hi cabinet containing the central processor unit or “main Couputer OncANATION AYO ARCHITECTURE frame" of a room, emergence of sm 1970s, the tradit "mainframe computers’ ‘mainframes. Nowadays a expensive computer capable of supporting hundreds, or éven thousands, of users simultaneously. The chief difference between a supercomputer and a mainframe is that a supercomputer channels all its power into executing |. a few programs as fast as possible, whereas a mainframe uses its power to execute many programs concurrently. In some ways, mainframes are more powerful than "supercomputers because they support more simultaneous programs. But supercomputers can execute a single program faster than a mainframe. The distinction between small mainframes and minicomputers is vague, depending really on how the manufacturer wants to market its machines. Minicomputer : It is a midsize computer. In the past decade, the distinction between large minicomputers and small mainframes has blurred, however, as has the distinction between small minicomputers and workstations. But in general, a minicomputer is a multiprocessing system capable of supporting from up to 200 users simultaneously. Workstation’ : Tt is a type of computer used for engineering applications (CAD/CAM), desktop publishing, software development, and other types of applications that require a moderate amount of computing power and relatively high quality graphics capabilities. Workstations generally come with a large, high-resolution graphics sereen, at large amount of RAM, built-in network support and a graphical-user interface. Most workstations also have a mass storage device such as a disk drive, but a special type of workstation, called a diskless workstation, comes without a disk drive. The most common operating systems for workstations aré UNIX and Windows NT. Like personal computers, most workstations are single-user ‘computers. However, workstations are typically linked together to form a local-area network, although they can also be used as stand-alone systems.[LGD ron ica signed for an rs range anywhere “je to over five thousand pounds. ccroprocessor technology that van entire CPU on one chip. onal -computers for word processing, Fktop publishing, and for running ee and database management applications. At saa most popular use for personal computers is for tec and recently for surfing the Internet. computers first appeared in the late 1970s. st and most popular personal computers was duced in 1977 by Apple Computer. ‘Qs and early 1980s, new models and competing operating systems seemed to appear daily. ‘Then, in 1951, IBM entered the fray with its first personal Computer, known as the IBM PC. The IBM PC quickly fecame the personal computer of choicé, and most other personal computer manufacturers fell by the wayside Pc. zs short for personal computer or IBM PC. One of the few companies to survive IBM's onslaught was Apple Computer, which remains « major player in the personal compute: marketplace. Other companies adjusted to TBM's Guminance oy building IBM clones, computers that were ~ almost the same as the IBM PG, but that cost ess » [BM clones used the same microprocessors as IBM PCs, they wore capable of running the same software. Over the years, IBM has lost much of its influence in rng the evalution of PCs. Therefore after the release the first PC by IBM the term PC increasingly came to jnean IBM or IBM-compatible personal computers, to the exclusion of other types of personal computers, such as Macintoshes, In recent years, the term PC has become more end more difficult to pin down. In general, though, it applies to any personal computer based on an Intel microprocessor, or on an Intel-compatible microprocessor. For nearly every other component, including the operatin system, there are several options, all of which fall und © the rubric of PC Today, the world of personal computers is basically divided between Apple Macintoshes and PCs. The principal intern Jess, Beca CouruteR Oxctnzaron ns Ancyarecrune ‘ Aa characteristics of porsonal computers However, although personal computers are designed. as singlowrer astm is common to link them together a network. In terms of power, there is gre variety, At the high end, the distinction bethec herent computers and workstations has fade, Highnd models of the Macintosh and PC offer the same computing power and graphics capability as low-end workstations by Sun Microsystems, Hewlett-Packard, and DEC. 3. A digital computer has a common bi i -ommon bus system for 16 registers of 32 bit each. The bus istructe eens is constructed with () How many selection inputs are there ii multiplexer (MUX)? eer (2) What size of MUXs are needed? (8) How many MUXs are there in the bus? Show the organization of the bus for the above. st 80 aatcfeaaltient teat Bus (Figure) Numerical Solution : (1) 6 zegisters = 2!= 4 selection inputs (2) 16 registers = 16 x 1 line multiplexers (3) 32 bits / register = 32 multiplexers Discuss the functions of Program counter, Stack pointer and Flag register. © What is the use of the following registers?GG osc, @ a @) Program Cout 0 perform. An puter processor jer, an address is a A register is processor uses ‘Some engineers refer to a program co n address register or an address ; stack pointer is a small register stores the address of the last program request in ‘A stack is a specialized buffer which stores and the program re atack (also called a pushdown stack) operates in a last-in/first-out sense. When a new data item is entered or "pushed" onto the top of a stack, the stack pointer increments to the next physical memory address, and the new item is copied to that address. When a data item is "pulled" or "popped" from the top of a stack, the item is copied from the address of the stack pointer, and the stack pointer decrements to the next available item at the top of the stack. Instruction Register : An instruction register is an clement in the central processing unit (CPU) of computer or other device that holds the programming COMPUTER ORGANZATON AND ARCHETECTURE eee an 1s are given to the nother part of the CPU r, which serves a very vad to the next le information the instruction register holding is executed, (4) Accumulator : An accumulator is a register for short-term, intermediate storage of arithmetic and logic data in a computer's CPU (central processing ). The term "accumulator" is rarely used in reference to contemporary CPUs, having been replaced around the turn of the millennium by the term “register.” In modern computers, any register can function as an accumulator. The most elementary use for an accumulator is adding @ sequence of numbers. The numerical value in the accumulator increases as each number is added, exactly as it happens in a simple desktop calculator (but much faster, of course). Once the sum has been determined, it is written to the main memory or to another register. The term “accumulator” is used in a wide variety of non-computing applications and activities, such as electrical engineering (an energy storage device such as a recharge able battery or ultra-capacitor hydraulics (a mechanical energy storage device), in stock trading (a contract or agreement), and even in ‘gambling (a parlay bet). Function of Flag Register : The flags register is the status register in Intel x86 microprocessors that contains the current state of the processor.Coupuren Oncaniza’ OncANZATION Ao ARCHITECTURE wa Jain the block diagram of a (2017-18) Draw and ex d computer with 5 functional units. A computer can process data, pictures, sound and cv can solve highly complicated problems and accurately. A computer as shown in Figure forms five major computer operations or Jone irrespective of their size and make, ‘These are Tr accepts data or instructions by way of input, It stores data, It can process data as required by the user, It gives results in the form of output, and It controls all operations inside a computer. We discuss below each of these Computer operation : (2) Input : This is the process of entering data and programs in to the computer system. You should [now that computer is an electronic machine like any other machine which takes as inputs raw data and performs some processing giving out processed data. Therefore, the input unit takes data from us to the computer in an organized manner for processing. (2) Storage : The process of saving data and instructions permanently is known as storage. Data has to be fed yhe actual processing starts. It into the system before tl is because the processing speed of Central Processing Unit (CPU) is 60 fast that the data has to be provided to CPU with the same speed. Therefore the data is first stored in the storage unit for faster access and processing. This storage unit or the primary storage Br ehe computer system is designed to do the above functionality. It provides space for storing data and instructions. ‘The storage unit per! functions : (a) All data and instructions are and after processing. (b) Intermediate results of processing are here. (3) Processing : The task of performing operations like arithmetic and logical operations is called processing. ‘The Central Processing Unit (CPU) takes data and instructions from the storage unit and makes all sorts oy) graphics. forms the following major tored here before also stored tructions given and Tt is then sent back to the (4) Output : This is the proce: ante cess of producing results fom for gotting useful inf similarly the output produced mputer afte processing must lao be kept eomewhons werd ar computer before being iven to eauiayiaeas lable form. Again the output is also stored inside co ecampster or ther preening ieee Control: The manner how iastrictions are executed {and the above operations ate performed. Contoling ll eperation like input, processing and output, performed by control unit. Tt takes eare of step by step processing ofall operations inside the comparer, In order to carry out th 1 operations mentioned in above computer allocates the task between its waroua fnew its. The computer system is divide c units for its operation. ie eee ceo Logical Unit : After you enter data through the input device iti lord in the primary storage vit, The actual sing of the data and instruction are performed & rion are performed Arithmetic Lgieal Uni, The major operations performed by the ALU are addition, subtraction, multiplication, vision, logic and comparison. Data is transferred to ALU from storage unit when required. After processing. the output is returned back to storage uni processing or getting stored. 7 ag Control Unit (CU) : The (CU) : The next component of computer is the Control Unit, which at ike the suprvisor seing that things are done in proper fashion. Control Unit is responsible for coordinating various operations using time signal, The control unit determines the sequence in which computer programs and instructions are executed. Things like processing of programs stored in the main memory, interpretation of the instructions and issuing of signals for other units of the computer to execute them. It also acts as, ‘a switch board operator when several users access theWhat are Registers? purpose resistera used Explain general central processing 4 "i of is Register? Explain different types irs seer eorking. of there registers also ao ne effect of number of registers and tl igth of register. 7 by processor memory of a CPY is served of the key differences itiong various rogister sots. Some e whole, ane “ay be classified under two basic : i jistere ca Je Register : These regist “Framer vse, Reese The i programmers to minimize the references to main memory. « a @) ie Registers : The ger for various functions desired by the irpose register can contain calculations of address of code of an instruct ‘ated to floating point ines, the pers ta reginters are used only for iate results or data, These data registers are not used for tho ister may be a general Purpose register, but some dedicated address register are also used in several machines, Examples of dedicated uddresa registers can be : Segment Pointer : Used fo point out a segment of memory. Index Register addressing scheme, Stack Pointer : (When programmer visible stack + ‘These are used for index + The issue related to the register set design is the number of general purpose registers or data and address registers to be provided in a micro-processor. The number of registers also affects the instruction design as the number of registers determines the number of bits needed in an instruction to specify a register reference, In general, it has been found that optimum number of registers ina CPU is in the range 8 to 32. In case registers fall3 jisters are used. These as of aractoristics. Reduced = (RISC) exhibits this co of having less red for memory ‘execution of a program, foe important characteristic randire’ ter Length : Anotl use. ‘maxim coeke jong enough to hold the ma neetble Pee ‘Similarly, the length of ee possi should ough to hold the data types a d to hold. In certain cases, we ee vopistere may be used to hold data w sonra aeuibensearinge dition Code Registers : de (9) Condit only be. partially avaiable to the reeryammers, ‘These registers contail 3 Perce also known a8 ‘Those fags re comes wine CPU hardware while performing ‘n addition operation may, peration. For example, an_ addition operates Fe codes are collected ne or more registers. RISC machines have several in one or more set of conditional code bits. In the instruction specifies the se is to be used. Independent 0 ‘enable the provisions of ‘having paral instruction exocution unit, register + 2 Stina several registers are used: These rested tT used in data manipulations; ywever,, Hy caniot OF come of these registors can be sed yt rogrammer. Some of the control register for 0 Neumann machine can be the Program anor Memory Address Register (MAR) and Data Regis! j For control of various ouputen ORGAWZAHON ao ARCHTECTURE tas a——ramee aa Almost all the CPUs have status register, a part o sthich may be programmer visible. A register which es bo formed by conditions codes Ned conditions code register. Some of the commonly used flage or condition codes in such a register may be Sign Flag : This indicates whether the sign of previous arithmetic operations was positive (0) or negative (1) Zero Flag : This fag bit will be set if the result of last arithmetic operations was zero. Carry Flag : This is set, if a carry results from the addition of the highest order bits or a borrow is taken on subtraction of highest order bit. Equal Flag : This bit fag will be sot if a logic comparison operation finds out that both of its operands are equal Interrupt : This flag is used for enabling or disabling interrupts, Flag Supervisor : This flag is used in certain computers to determine whether the CPU is flag executing in supervisor or user mode, In ease, the CPU is in supervisor mode it will be allowed to execute certain privileged instructions, In most CPUs, on encountering a subroutine call or interrupt handling routine, it is desired that the states information such as conditional codes and other register information be stored and restored on initiation and end of these routines respectively. The register often known as Program Status Word (PSW) contains conditions eode plus other status information. There can be several other status and control registers such as interrupt vector registers in the machines using vectored interrupt, stack pointer if a stack is used to implement subroutine calls, ete. The status and control register design is also dependent on the Operating Systems (OS) support, The functional understanding of OS helps in tailoring the register organization. In fact, some control information is only specific use to the operating system. ‘One major decision to be taken for designing status and control registers organization is : How to allocate control information between rogisters and the memory. Generally, first few hundred or. thousands words of memory are allocated for storing control information. It is the responsibility of the designer to determine how much_ GEM Forma n rogisters and how much in. eoff between the cost and the Cowruten Onaaezntion 0 Aneecr c tA19) MOV ks, # ADD R3, 6 DIV ii, Ra rithme MOV X,R1 Te Write a program to evaluate the 4 ithmetic oy NON statement . LOAD D a A-B+C*(D*E-F) (2018-19) MULE G4 HFK 7 SUBF (a) Using general register computer with OLA three address instruction. : STORET (2) Using general register computer with 490 LOAD A ‘ess instruction. SUBB @ 1g general register computer with one ADD T AC—AC+ M7] ness instruction. Fee STORET ances @ Write « program to evaluate the arithmetic ROADIE, ri statement: : MULK ACH X=(A-B+ 0" D*E- PG + HE ADDG aoe = iMG Using a general register computer with 1100 STORE X 4] AC adress instruction. 01617) LOAD 7 AG Divx AC — AC) 32] yy AcBeCND*E-P) storex my ao ir G+H*K a : (2) Three-Address Instruction + seuss immediate addressing with le. SUB Ri, A, B Rie MA] - MIB) a : “oan MUL R2, D, E ‘R2— MUD) * MIB) © Explain different tynes of displacement SUB R2, R2, F Ra R2— MIA addressing modes with examples. (2020-21) MUL R2, R2, C R2— R2* MIE) ‘@ Explain Addressing es ADD RI, Ri, R RUC EIS Re types. Design ¢bit Bidivouttonel ait egie MULRO, HK Ro- MUM" MK) it bi-directional shift register. ADD R2, G, R2 R2— M{G] + R2 (2018-19) DIVX, RI, RY ‘MIXI— RIR2 REET The program using general register computer with two address instruction is as follows = (2) Two Address Instructions ‘The operation field of en inst Id of on instruction specifies the operation to be performed. This operation will be executed on some data which is stored in computer registers or the MOV RIA Rie MA} ‘main memory. The way any operand is soleet SUB Ri, B Ric R1-MIB} proptam exozcion i depenienton tne at erian ane MOV #2, D F2 specified address to the instruction has the format POP stack. The POP24 [EGE ronmica CowPUTeR ORGANZATION ANO ARCHMTECTURE A295 SPE SP Spe 13. Explain how processor responda to an interrupt, (2011-12) wet ca) vo species eres swe the effects of these two operatior ‘The POP operat aTopetstack (Figure) vantages : i @ ‘Sfhelent computation of complex arith expressions. ie es to) Exvcutve of instructions is fas, rome crore (©) Tits are etored in eoncecative memory loca : (c) Since instructions do not have address field, the length of instructions i short Disadvantages : Program size lengthens. 12. an address space is specified by 24 bits and esponding memory space by 16 bits: Gy "How mony words ere there in the address (2) Hoe many words are there tn the memory space? (3) If @ page consists of 2K words, how many |* there in the system? pete Se ee (2010-11, 2011-12) 24= 16M words (2) Memory space = 16 bits, 21° = 64 K words (1) Address space = 24 bits, Maskable Interrupts allow a programmer to specify that the CPU does ignore it, while Non-Maskeable Interrupt Tequests must be serviced. 1s is important to note that an Interrupt is a way to {ummunicate asynchronously with the CPU - very much like sending an email. When you send an email to a person, you cannot know at which time the person reads the message, let ~ alone when the person reacts, A phone call, on the other hand is synchronous (happening at the same time): when I eall you, you nace answer right now. Interrupts where introduced to allow tg is emaillike Themunication with slower hardware, like a hard-disk, ‘This way, the CPU can order something from the HD lice jf to this location’, the CPU can then return to more f portant stuff, while the HD seeks. When the HD is done, it sende the CPU an IRQ, which tells the CPU “I an done, talk to me”, all the data it was working on earlier in some secure 112% normally on the stack and then begin to execute the so-called Interrupt. Handler, a piece of associated with the number of the After executing it, it can carry on doing what it did earlier (after having loaded all the data back into its registers).[EGE ror mica Computer OncavizAnion avo ARCHIE Local Bus in each field of the [Networ tC rand give a general encoding | ay ls =a = | a that specify the le Cisse] Eipanson Be (Figure) High Performance Hierarchical Bus Ar Q) Incorporates a high-speed bus specific support high-capacity 1/0 devices, (2) Bring high-demand devi RnE high stack and that ‘The stack pointe! zero, the stack is empty, | receives the I erroneous operation Ww: FULL = 1 or popped w! a ARITHMETIC AND nce 1. Show the block di loge sie nt nd cleo expla is fase sie ‘plain its functional @or12) TSE Cn Bo ereea| design of arithmetic and logic circuits ferasinnle ALU. Dy combining both circuits with the help of multiplexer we can got the arithmetic and logic cireuit as ghown in the Fig. The Fig. chows one stage of sic shift unit, The subscript 1 designates a typical stage. Inputs A. arithmetic i are applied to tenet and oie unite Inputs Sand Se aed ‘a particular micro-operation. jo sre-uused to PLLE {=} One stage of. arithmetic circuit [% is (Faure 1 One Stage Logic Shift Circuit) woe Ad multiplexer at the output chooses between ai ic output in ¥; and a logic output in Zi. The data inKGB ron ica for ehift left operation and Av for shift | ‘rtant to note that the diagram | shows just one typical stage. The circuit | ge must be repeated n times for an n-bit | ave ALU, the output carry of a previous must be connected to the input carry C; of | performed using ‘arithmetic logic shift circuit) how in Fig. Function Table For Arithmetic Logie Shift Circult Subject inputs ‘Operation Function zi er STS | S| S| ee (igure) 3 F=R Transtar eee lol tl reas Increment A How the fast adders are designed? Discuss. spetett Lo | Fars | Add Aang. (2020-21) o SPT) FSAe Bet | Aaa A ond B wih : @) A carry-look ahead adder (CLA) or fast adder is a B type of adder used in digital k a ary ital logic. EALe (@) Acarry-look ahead adder improves speed by reducing TTO Tt} oO] 1 | Feasiet the amount of time required to determine carry bits. Tpept[ap oy} Feat Decrement (Ie can be contrasted wi apetatay4 Zz Transfer A Hipple-carry adder opr polo] x] FA AB ‘AND, calculated aloi bit, and each stage Shown in” the Table first eight| wait unt previous carry bit has been calculated to begin calculating its own sum bit and operation are arithmetic operations and are selected when} S,S,=00. The next four are logic operatio and are selected when S,$)=01. The last two operations} ‘are chift operatins and are selected when S,S,=10 and $,S,=11. The carry inputs has no effe during logic and shift operations and hence marked don't care. Design the 16-bit Carry Look-ahead adder using| four 4-bit Carry Look-ahead adders you have discussed. (2010-11) | carry bit. () The carry-lookahead adder eal carry bits before the sum, which reduces the wait time to calculate the result of the larger-value bits of the adder (5) Accarry-Lookahead adder is « fast parallel adder as it reduces the propagation delay by more complex hardware, hence it is costlier. (8) This method makes usinal © IEEE standards for floating} also represent the floating} 1.01101x2" in IEEE. single! point number ae ‘rds for representing floating point nur shave been developed by the instil of electrical and electronics engineers, referred to as, IEEH 754 standards. Figure shows these IEEE standard form Single Precision : }&-———— 2 bits —— 0 M 25-bit CCouPuTER ORGANZANON 210 ARCIETECTURE ea Double Precisi Value Represented = =1 Numerical Solutio precision format éan bs mx 2e=+(0.10110 Representation in IEEE Single Pri Precision Format : @) 179.125810 179),9=(10110011), (125810), =(.0010), =(10110011.9010), in IEEE single 10110011.0010=1.01100110010«2" Now represent the above floating point in single precision & double precision. Single Precision : From the above floating point ‘s=0 E=7 ‘M= 01100110010 ‘The modified exponent F = 127 +E = 127+ 7= (310 = (10000110)2 Number in single precision format s1e[w To an Be 10 [roooorro[ orrc0110070....0] (Figure) ‘Double Precision : S=0 E=7 + M= 01100110010f Bs THOOHOOTS (Figure) 1001110001110.01 =(L111001110 00111001195 x 28 joort100071700111..0] 23 (Figure) $=0,E= 10011100011100111 E’=E + 1023 = 15 + 1028 + 1038 = (10000001110)2 the help of a flowchart discuss booth) lication algorithm. (2020-21) | Explain how Booth’s algorithms is suitable for} signed number maltislieaian in compari sntional shi add method. | to conventional shift an oneal @ Write flowchart based booth multiplicati algorithm, and also multiply the two numbers) - 9 and -13 using booth multiplication algorithm. és (2016-17 ,0,,] R-1017 | AC] OR ]o,, | Se BR + 1= 01004 oie 1fo Ashe Fee ae a] 1 | ashe go | ao of | adder 01 007 Ash 11100 0 ow fo | Asnr an10 0 foot 1/0 | suotacter — | o1001 cont Ashe coors | roror] 1 __[e00 Booth’s Algorithi for multiplying binary integers in signed 2's complement representation. A powerful algorithm for signed number multiplication is a booth’s algorithm, which generates a2 n bits product and treat both positive and negative number uniformly. In general for Booth’s algorithm recoding scheme can be given as : “-] times the shifted multiplicand is selected when moving from 0 to 1, +1 times the shifted when moving from 1 to 0, and 0 iplicand is selected for none of the seanned from rig