1 /**

2 ********************************************************************************
3 * @file stm8s_uart4.c
4 * @author MCD Application Team
5 * @version V2.3.0
6 * @date 16-June-2017
7 * @brief This file contains all the functions for the UART4 peripheral.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12 *
13 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 * You may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at:
16 *
17 * http://www.st.com/software_license_agreement_liberty_v2
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *
25 ******************************************************************************
26 */
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm8s_uart4.h"
30
31 /** @addtogroup STM8S_StdPeriph_Driver
32 * @{
33 */
34 /* Private typedef -----------------------------------------------------------*/
35 /* Private define ------------------------------------------------------------*/
36 /* Private macro -------------------------------------------------------------*/
37 /* Private variables ---------------------------------------------------------*/
38 /* Private function prototypes -----------------------------------------------*/
39 /* Private functions ---------------------------------------------------------*/
40 /* Public functions ----------------------------------------------------------*/
41
42 /**
43 * @addtogroup UART4_Public_Functions
44 * @{
45 */
46
47 /**
48 * @brief Deinitializes the UART peripheral.
49 * @param None
50 * @retval None
51 */
52
53 void UART4_DeInit(void)
54 {
55 /* Clear the Idle Line Detected bit in the status register by a read
56 to the UART4_SR register followed by a Read to the UART4_DR register */
57 (void)UART4->SR;
58 (void)UART4->DR;
59
60 UART4->BRR2 = UART4_BRR2_RESET_VALUE; /* Set UART4_BRR2 to reset value 0x00 */
61 UART4->BRR1 = UART4_BRR1_RESET_VALUE; /* Set UART4_BRR1 to reset value 0x00 */
62
63 UART4->CR1 = UART4_CR1_RESET_VALUE; /* Set UART4_CR1 to reset value 0x00 */
64 UART4->CR2 = UART4_CR2_RESET_VALUE; /* Set UART4_CR2 to reset value 0x00 */
65 UART4->CR3 = UART4_CR3_RESET_VALUE; /* Set UART4_CR3 to reset value 0x00 */
66 UART4->CR4 = UART4_CR4_RESET_VALUE; /* Set UART4_CR4 to reset value 0x00 */
67 UART4->CR5 = UART4_CR5_RESET_VALUE; /* Set UART4_CR5 to reset value 0x00 */
68 UART4->CR6 = UART4_CR6_RESET_VALUE; /* Set UART4_CR6 to reset value 0x00 */
69 }
70
71 /**
72 * @brief Initializes the UART4 according to the specified parameters.
73 * @param BaudRate: The baudrate.
 74 * @param WordLength : This parameter can be any of the
75 * @ref UART4_WordLength_TypeDef enumeration.
76 * @param StopBits: This parameter can be any of the
77 * @ref UART4_StopBits_TypeDef enumeration.
78 * @param Parity: This parameter can be any of the
79 * @ref UART4_Parity_TypeDef enumeration.
80 * @param SyncMode: This parameter can be any of the
81 * @ref UART4_SyncMode_TypeDef values.
82 * @param Mode: This parameter can be any of the @ref UART4_Mode_TypeDef values
83 * @retval None
84 */
85 void UART4_Init(uint32_t BaudRate, UART4_WordLength_TypeDef WordLength,
UART4_StopBits_TypeDef StopBits, UART4_Parity_TypeDef Parity, UART4_SyncMode_TypeDef
SyncMode, UART4_Mode_TypeDef Mode)
86 {
87 uint8_t BRR2_1 = 0, BRR2_2 = 0;
88 uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0;
89
90 /* Check the parameters */
91 assert_param(IS_UART4_BAUDRATE_OK(BaudRate));
92 assert_param(IS_UART4_WORDLENGTH_OK(WordLength));
93 assert_param(IS_UART4_STOPBITS_OK(StopBits));
94 assert_param(IS_UART4_PARITY_OK(Parity));
95 assert_param(IS_UART4_MODE_OK((uint8_t)Mode));
96 assert_param(IS_UART4_SYNCMODE_OK((uint8_t)SyncMode));
97
98 /* Clear the word length bit */
99 UART4->CR1 &= (uint8_t)(~UART4_CR1_M);
100 /* Set the word length bit according to UART4_WordLength value */
101 UART4->CR1 |= (uint8_t)WordLength;
102
103 /* Clear the STOP bits */
104 UART4->CR3 &= (uint8_t)(~UART4_CR3_STOP);
105 /* Set the STOP bits number according to UART4_StopBits value */
106 UART4->CR3 |= (uint8_t)StopBits;
107
108 /* Clear the Parity Control bit */
109 UART4->CR1 &= (uint8_t)(~(UART4_CR1_PCEN | UART4_CR1_PS ));
110 /* Set the Parity Control bit to UART4_Parity value */
111 UART4->CR1 |= (uint8_t)Parity;
112
113 /* Clear the LSB mantissa of UART4DIV */
114 UART4->BRR1 &= (uint8_t)(~UART4_BRR1_DIVM);
115 /* Clear the MSB mantissa of UART4DIV */
116 UART4->BRR2 &= (uint8_t)(~UART4_BRR2_DIVM);
117 /* Clear the Fraction bits of UART4DIV */
118 UART4->BRR2 &= (uint8_t)(~UART4_BRR2_DIVF);
119
120 /* Set the UART4 BaudRates in BRR1 and BRR2 registers according to UART4_BaudRate
value */
121 BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4));
122 BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4));
123
124 /* The fraction and MSB mantissa should be loaded in one step in the BRR2 register*/
125 /* Set the fraction of UARTDIV */
126 BRR2_1 = (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100))
127 << 4) / 100) & (uint8_t)0x0F);
128 BRR2_2 = (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0);
129
130 UART4->BRR2 = (uint8_t)(BRR2_1 | BRR2_2);
131 /* Set the LSB mantissa of UARTDIV */
132 UART4->BRR1 = (uint8_t)BaudRate_Mantissa;
133
134 /* Disable the Transmitter and Receiver before setting the LBCL, CPOL and CPHA bits
*/
135 UART4->CR2 &= (uint8_t)~(UART4_CR2_TEN | UART4_CR2_REN);
136 /* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */
137 UART4->CR3 &= (uint8_t)~(UART4_CR3_CPOL | UART4_CR3_CPHA | UART4_CR3_LBCL);
138 /* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */
139 UART4->CR3 |= (uint8_t)((uint8_t)SyncMode & (uint8_t)(UART4_CR3_CPOL | \
140 UART4_CR3_CPHA | UART4_CR3_LBCL));
141
142 if((uint8_t)(Mode & UART4_MODE_TX_ENABLE))
143 {
144 /* Set the Transmitter Enable bit */
145 UART4->CR2 |= (uint8_t)UART4_CR2_TEN;
146 }
147 else
148 {
149 /* Clear the Transmitter Disable bit */
150 UART4->CR2 &= (uint8_t)(~UART4_CR2_TEN);
151 }
152 if((uint8_t)(Mode & UART4_MODE_RX_ENABLE))
153 {
154 /* Set the Receiver Enable bit */
155 UART4->CR2 |= (uint8_t)UART4_CR2_REN;
156 }
157 else
158 {
159 /* Clear the Receiver Disable bit */
160 UART4->CR2 &= (uint8_t)(~UART4_CR2_REN);
161 }
162 /* Set the Clock Enable bit, lock Polarity, lock Phase and Last Bit Clock
163 pulse bits according to UART4_Mode value */
164 if((uint8_t)(SyncMode & UART4_SYNCMODE_CLOCK_DISABLE))
165 {
166 /* Clear the Clock Enable bit */
167 UART4->CR3 &= (uint8_t)(~UART4_CR3_CKEN);
168 }
169 else
170 {
171 UART4->CR3 |= (uint8_t)((uint8_t)SyncMode & UART4_CR3_CKEN);
172 }
173 }
174
175 /**
176 * @brief Enable the UART4 peripheral.
177 * @param NewState : The new state of the UART Communication.
178 * This parameter can be any of the @ref FunctionalState enumeration.
179 * @retval None
180 */
181 void UART4_Cmd(FunctionalState NewState)
182 {
183 if(NewState != DISABLE)
184 {
185 /* UART4 Enable */
186 UART4->CR1 &= (uint8_t)(~UART4_CR1_UARTD);
187 }
188 else
189 {
190 /* UART4 Disable */
191 UART4->CR1 |= UART4_CR1_UARTD;
192 }
193 }
194
195 /**
196 * @brief Enables or disables the specified UART4 interrupts.
197 * @param UART4_IT specifies the UART4 interrupt sources to be enabled or disabled.
198 * This parameter can be one of the following values:
199 * - UART4_IT_LBDF: LIN Break detection interrupt
200 * - UART4_IT_LHDF: LIN Break detection interrupt
201 * - UART4_IT_TXE: Transmit Data Register empty interrupt
202 * - UART4_IT_TC: Transmission complete interrupt
203 * - UART4_IT_RXNE_OR: Receive Data register not empty/Over run error
interrupt
204 * - UART4_IT_IDLE: Idle line detection interrupt
205 * - UART4_IT_PE: Parity Error interrupt
206 * @param NewState new state of the specified UART4 interrupts.
207 * This parameter can be: ENABLE or DISABLE.
208 * @retval None
209 */
210 void UART4_ITConfig(UART4_IT_TypeDef UART4_IT, FunctionalState NewState)
211 {
212 uint8_t uartreg = 0, itpos = 0x00;
213
214 /* Check the parameters */
215 assert_param(IS_UART4_CONFIG_IT_OK(UART4_IT));
216 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
217
218 /* Get the UART4 register index */
219 uartreg = (uint8_t)((uint16_t)UART4_IT >> 0x08);
220
221 /* Get the UART4 IT index */
222 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART4_IT & (uint8_t)0x0F));
223
224 if(NewState != DISABLE)
225 {
226 /* Enable the Interrupt bits according to UART4_IT mask */
227 if(uartreg == 0x01)
228 {
229 UART4->CR1 |= itpos;
230 }
231 else if(uartreg == 0x02)
232 {
233 UART4->CR2 |= itpos;
234 }
235 else if(uartreg == 0x03)
236 {
237 UART4->CR4 |= itpos;
238 }
239 else
240 {
241 UART4->CR6 |= itpos;
242 }
243 }
244 else
245 {
246 /* Disable the interrupt bits according to UART4_IT mask */
247 if(uartreg == 0x01)
248 {
249 UART4->CR1 &= (uint8_t)(~itpos);
250 }
251 else if(uartreg == 0x02)
252 {
253 UART4->CR2 &= (uint8_t)(~itpos);
254 }
255 else if(uartreg == 0x03)
256 {
257 UART4->CR4 &= (uint8_t)(~itpos);
258 }
259 else
260 {
261 UART4->CR6 &= (uint8_t)(~itpos);
262 }
263 }
264 }
265
266 /**
267 * @brief Enables or disables the UART’s Half Duplex communication.
268 * @param NewState new state of the UART Communication.
269 * This parameter can be: ENABLE or DISABLE.
270 * @retval None
271 */
272 void UART4_HalfDuplexCmd(FunctionalState NewState)
273 {
274 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
275
276 if (NewState != DISABLE)
277 {
278 UART4->CR5 |= UART4_CR5_HDSEL; /**< UART4 Half Duplex Enable */
279 }
280 else
281 {
282 UART4->CR5 &= (uint8_t)~UART4_CR5_HDSEL; /**< UART4 Half Duplex Disable */
283 }
284 }
285
286 /**
287 * @brief Configures the UART4’s IrDA interface.
288 * @param UART4_IrDAMode specifies the IrDA mode.
289 * This parameter can be any of the @ref UART4_IrDAMode_TypeDef values.
290 * @retval None
291 */
292 void UART4_IrDAConfig(UART4_IrDAMode_TypeDef UART4_IrDAMode)
293 {
294 assert_param(IS_UART4_IRDAMODE_OK(UART4_IrDAMode));
295
296 if(UART4_IrDAMode != UART4_IRDAMODE_NORMAL)
297 {
298 UART4->CR5 |= UART4_CR5_IRLP;
299 }
300 else
301 {
302 UART4->CR5 &= ((uint8_t)~UART4_CR5_IRLP);
303 }
304 }
305
306 /**
307 * @brief Enables or disables the UART4’s IrDA interface.
308 * @param NewState new state of the IrDA mode.
309 * This parameter can be: ENABLE or DISABLE.
310 * @retval None
311 */
312 void UART4_IrDACmd(FunctionalState NewState)
313 {
314 /* Check parameters */
315 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
316
317 if(NewState != DISABLE)
318 {
319 /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
320 UART4->CR5 |= UART4_CR5_IREN;
321 }
322 else
323 {
324 /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
325 UART4->CR5 &= ((uint8_t)~UART4_CR5_IREN);
326 }
327 }
328
329 /**
330 * @brief Sets the UART4 LIN Break detection length.
331 * @param UART4_LINBreakDetectionLength specifies the LIN break detection length.
332 * This parameter can be any of the
333 * @ref UART4_LINBreakDetectionLength_TypeDef values.
334 * @retval None
335 */
336 void UART4_LINBreakDetectionConfig(UART4_LINBreakDetectionLength_TypeDef
UART4_LINBreakDetectionLength)
337 {
338 /* Check parameters */
339 assert_param(IS_UART4_LINBREAKDETECTIONLENGTH_OK(UART4_LINBreakDetectionLength));
340
341 if(UART4_LINBreakDetectionLength != UART4_LINBREAKDETECTIONLENGTH_10BITS)
342 {
343 UART4->CR4 |= UART4_CR4_LBDL;
344 }
345 else
346 {
347 UART4->CR4 &= ((uint8_t)~UART4_CR4_LBDL);
348 }
349 }
350
351 /**
352 * @brief Configure the UART4 peripheral.
353 * @param UART4_Mode specifies the LIN mode.
354 * This parameter can be any of the @ref UART4_LinMode_TypeDef values.
355 * @param UART4_Autosync specifies the LIN automatic resynchronization mode.
356 * This parameter can be any of the @ref UART4_LinAutosync_TypeDef values.
357 * @param UART4_DivUp specifies the LIN divider update method.
358 * This parameter can be any of the @ref UART4_LinDivUp_TypeDef values.
359 * @retval None
360 */
361 void UART4_LINConfig(UART4_LinMode_TypeDef UART4_Mode,
362 UART4_LinAutosync_TypeDef UART4_Autosync,
363 UART4_LinDivUp_TypeDef UART4_DivUp)
364 {
365 /* Check parameters */
366 assert_param(IS_UART4_SLAVE_OK(UART4_Mode));
367 assert_param(IS_UART4_AUTOSYNC_OK(UART4_Autosync));
368 assert_param(IS_UART4_DIVUP_OK(UART4_DivUp));
369
370 if(UART4_Mode != UART4_LIN_MODE_MASTER)
371 {
372 UART4->CR6 |= UART4_CR6_LSLV;
373 }
374 else
375 {
376 UART4->CR6 &= ((uint8_t)~UART4_CR6_LSLV);
377 }
378
379 if(UART4_Autosync != UART4_LIN_AUTOSYNC_DISABLE)
380 {
381 UART4->CR6 |= UART4_CR6_LASE ;
382 }
383 else
384 {
385 UART4->CR6 &= ((uint8_t)~ UART4_CR6_LASE );
386 }
387
388 if(UART4_DivUp != UART4_LIN_DIVUP_LBRR1)
389 {
390 UART4->CR6 |= UART4_CR6_LDUM;
391 }
392 else
393 {
394 UART4->CR6 &= ((uint8_t)~ UART4_CR6_LDUM);
395 }
396 }
397
398 /**
399 * @brief Enables or disables the UART4 LIN mode.
400 * @param NewState is new state of the UART4 LIN mode.
401 * This parameter can be ENABLE or DISABLE
402 * @retval None
403 */
404 void UART4_LINCmd(FunctionalState NewState)
405 {
406 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
407
408 if(NewState != DISABLE)
409 {
410 /* Enable the LIN mode by setting the LINE bit in the CR2 register */
411 UART4->CR3 |= UART4_CR3_LINEN;
412 }
413 else
414 {
415 /* Disable the LIN mode by clearing the LINE bit in the CR2 register */
416 UART4->CR3 &= ((uint8_t)~UART4_CR3_LINEN);
417 }
418 }
419
420 /**
421 * @brief Enables or disables the UART4 Smart Card mode.
422 * @param NewState: new state of the Smart Card mode.
423 * This parameter can be: ENABLE or DISABLE.
424 * @retval None
425 */
426 void UART4_SmartCardCmd(FunctionalState NewState)
427 {
428 /* Check parameters */
429 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
430
431 if(NewState != DISABLE)
432 {
433 /* Enable the SC mode by setting the SCEN bit in the CR5 register */
434 UART4->CR5 |= UART4_CR5_SCEN;
435 }
436 else
437 {
438 /* Disable the SC mode by clearing the SCEN bit in the CR5 register */
439 UART4->CR5 &= ((uint8_t)(~UART4_CR5_SCEN));
440 }
441 }
442
443 /**
444 * @brief Enables or disables NACK transmission.
445 * @param NewState: new state of the Smart Card mode.
446 * This parameter can be: ENABLE or DISABLE.
447 * @retval None
448 */
449 void UART4_SmartCardNACKCmd(FunctionalState NewState)
450 {
451 /* Check parameters */
452 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
453
454 if(NewState != DISABLE)
455 {
456 /* Enable the NACK transmission by setting the NACK bit in the CR5 register */
457 UART4->CR5 |= UART4_CR5_NACK;
458 }
459 else
460 {
461 /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
462 UART4->CR5 &= ((uint8_t)~(UART4_CR5_NACK));
463 }
464 }
465
466 /**
467 * @brief Selects the UART4 WakeUp method.
468 * @param UART4_WakeUp: specifies the UART4 wakeup method.
469 * This parameter can be any of the @ref UART4_WakeUp_TypeDef values.
470 * @retval None
471 */
472 void UART4_WakeUpConfig(UART4_WakeUp_TypeDef UART4_WakeUp)
473 {
474 assert_param(IS_UART4_WAKEUP_OK(UART4_WakeUp));
475
476 UART4->CR1 &= ((uint8_t)~UART4_CR1_WAKE);
477 UART4->CR1 |= (uint8_t)UART4_WakeUp;
478 }
479
480 /**
481 * @brief Determines if the UART4 is in mute mode or not.
482 * @param NewState: new state of the UART4 mode.
483 * This parameter can be ENABLE or DISABLE
484 * @retval None
485 */
486 void UART4_ReceiverWakeUpCmd(FunctionalState NewState)
487 {
488 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
489
490 if(NewState != DISABLE)
491 {
492 /* Enable the mute mode UART4 by setting the RWU bit in the CR2 register */
493 UART4->CR2 |= UART4_CR2_RWU;
494 }
495 else
496 {
497 /* Disable the mute mode UART4 by clearing the RWU bit in the CR1 register */
498 UART4->CR2 &= ((uint8_t)~UART4_CR2_RWU);
499 }
500 }
501
502 /**
503 * @brief Returns the most recent received data by the UART4 peripheral.
504 * @param None
505 * @retval Received Data
506 */
507 uint8_t UART4_ReceiveData8(void)
508 {
509 return ((uint8_t)UART4->DR);
510 }
511
512 /**
513 * @brief Returns the most recent received data by the UART4 peripheral.
514 * @param None
515 * @retval Received Data
516 */
517 uint16_t UART4_ReceiveData9(void)
518 {
519 uint16_t temp = 0;
520
521 temp = ((uint16_t)(((uint16_t)((uint16_t)UART4->CR1 & (uint16_t)UART4_CR1_R8)) << 1
));
522
523 return (uint16_t)((((uint16_t)UART4->DR) | temp) & ((uint16_t)0x01FF));
524 }
525
526 /**
527 * @brief Transmits 8 bit data through the UART4 peripheral.
528 * @param Data: the data to transmit.
529 * @retval None
530 */
531 void UART4_SendData8(uint8_t Data)
532 {
533 /* Transmit Data */
534 UART4->DR = Data;
535 }
536
537 /**
538 * @brief Transmits 9 bit data through the UART4 peripheral.
539 * @param Data: the data to transmit.
540 * @retval None
541 */
542 void UART4_SendData9(uint16_t Data)
543 {
544 /* Clear the transmit data bit 8 */
545 UART4->CR1 &= ((uint8_t)~UART4_CR1_T8);
546
547 /* Write the transmit data bit [8] */
548 UART4->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART4_CR1_T8);
549
550 /* Write the transmit data bit [0:7] */
551 UART4->DR = (uint8_t)(Data);
552 }
553
554 /**
555 * @brief Transmits break characters.
556 * @param None
557 * @retval None
558 */
559 void UART4_SendBreak(void)
560 {
561 UART4->CR2 |= UART4_CR2_SBK;
562 }
563
564 /**
565 * @brief Sets the address of the UART4 node.
566 * @param UART4_Address: Indicates the address of the UART4 node.
567 * @retval None
568 */
569 void UART4_SetAddress(uint8_t UART4_Address)
570 {
571 /*assert_param for x UART4_Address*/
572 assert_param(IS_UART4_ADDRESS_OK(UART4_Address));
573
574 /* Clear the UART4 address */
575 UART4->CR4 &= ((uint8_t)~UART4_CR4_ADD);
576 /* Set the UART4 address node */
577 UART4->CR4 |= UART4_Address;
578 }
579
580 /**
581 * @brief Sets the specified UART4 guard time.
582 * @note SmartCard Mode should be Enabled
583 * @param UART4_GuardTime: specifies the guard time.
584 * @retval None
585 */
586 void UART4_SetGuardTime(uint8_t UART4_GuardTime)
587 {
588 /* Set the UART4 guard time */
589 UART4->GTR = UART4_GuardTime;
590 }
591
592 /**
593 * @brief Sets the system clock prescaler.
594 * @note IrDA Low Power mode or smartcard mode should be enabled
595 * @note This function is related to SmartCard and IrDa mode.
596 * @param UART4_Prescaler: specifies the prescaler clock.
597 * This parameter can be one of the following values:
598 * @par IrDA Low Power Mode
599 * The clock source is divided by the value given in the register (8 bits)
600 * - 0000 0000 Reserved
601 * - 0000 0001 divides the clock source by 1
602 * - 0000 0010 divides the clock source by 2
603 * - ...
604 * @par Smart Card Mode
605 * The clock source is divided by the value given in the register
606 * (5 significant bits) multiplied by 2
607 * - 0 0000 Reserved
608 * - 0 0001 divides the clock source by 2
609 * - 0 0010 divides the clock source by 4
610 * - 0 0011 divides the clock source by 6
611 * - ...
612 * @retval None
613 */
614 void UART4_SetPrescaler(uint8_t UART4_Prescaler)
615 {
616 /* Load the UART4 prescaler value*/
617 UART4->PSCR = UART4_Prescaler;
618 }
619
620 /**
621 * @brief Checks whether the specified UART4 flag is set or not.
622 * @param UART4_FLAG specifies the flag to check.
623 * This parameter can be any of the @ref UART4_Flag_TypeDef enumeration.
624 * @retval FlagStatus (SET or RESET)
625 */
626 FlagStatus UART4_GetFlagStatus(UART4_Flag_TypeDef UART4_FLAG)
627 {
628 FlagStatus status = RESET;
629
630 /* Check parameters */
631 assert_param(IS_UART4_FLAG_OK(UART4_FLAG));
632
633 /* Check the status of the specified UART4 flag*/
634 if(UART4_FLAG == UART4_FLAG_LBDF)
635 {
636 if((UART4->CR4 & (uint8_t)UART4_FLAG) != (uint8_t)0x00)
637 {
638 /* UART4_FLAG is set*/
639 status = SET;
640 }
641 else
642 {
643 /* UART4_FLAG is reset*/
644 status = RESET;
645 }
646 }
647 else if(UART4_FLAG == UART4_FLAG_SBK)
648 {
649 if((UART4->CR2 & (uint8_t)UART4_FLAG) != (uint8_t)0x00)
650 {
651 /* UART4_FLAG is set*/
652 status = SET;
653 }
654 else
655 {
656 /* UART4_FLAG is reset*/
657 status = RESET;
658 }
659 }
660 else if((UART4_FLAG == UART4_FLAG_LHDF) || (UART4_FLAG == UART4_FLAG_LSF))
661 {
662 if((UART4->CR6 & (uint8_t)UART4_FLAG) != (uint8_t)0x00)
663 {
664 /* UART4_FLAG is set*/
665 status = SET;
666 }
667 else
668 {
669 /* UART4_FLAG is reset*/
670 status = RESET;
671 }
672 }
673 else
674 {
675 if((UART4->SR & (uint8_t)UART4_FLAG) != (uint8_t)0x00)
676 {
677 /* UART4_FLAG is set*/
678 status = SET;
679 }
680 else
681 {
682 /* UART4_FLAG is reset*/
683 status = RESET;
684 }
685 }
686
687 /* Return the UART4_FLAG status*/
688 return status;
689 }
690
691 /**
692 * @brief Clears the UART4 flags.
693 * @param UART4_FLAG specifies the flag to clear
694 * This parameter can be any combination of the following values:
695 * - UART4_FLAG_LBDF: LIN Break detection flag.
696 * - UART4_FLAG_LHDF: LIN Header detection flag.
697 * - UART4_FLAG_LSF: LIN synchrone field flag.
698 * - UART4_FLAG_RXNE: Receive data register not empty flag.
699 * @note:
700 * - PE (Parity error), FE (Framing error), NE (Noise error),
701 * OR (OverRun error) and IDLE (Idle line detected) flags are cleared
702 * by software sequence: a read operation to UART4_SR register
703 * (UART4_GetFlagStatus())followed by a read operation to UART4_DR
704 * register(UART4_ReceiveData8() or UART4_ReceiveData9()).
705 *
706 * - RXNE flag can be also cleared by a read to the UART4_DR register
707 * (UART4_ReceiveData8()or UART4_ReceiveData9()).
708 *
709 * - TC flag can be also cleared by software sequence: a read operation
710 * to UART4_SR register (UART4_GetFlagStatus()) followed by a write
711 * operation to UART4_DR register (UART4_SendData8() or UART4_SendData9()).
712 *
713 * - TXE flag is cleared only by a write to the UART4_DR register
714 * (UART4_SendData8() or UART4_SendData9()).
715 *
716 * - SBK flag is cleared during the stop bit of break.
717 * @retval None
718 */
719 void UART4_ClearFlag(UART4_Flag_TypeDef UART4_FLAG)
720 {
721 assert_param(IS_UART4_CLEAR_FLAG_OK(UART4_FLAG));
722
723 /* Clear the Receive Register Not Empty flag */
724 if(UART4_FLAG == UART4_FLAG_RXNE)
725 {
726 UART4->SR = (uint8_t)~(UART4_SR_RXNE);
727 }
728 /* Clear the LIN Break Detection flag */
729 else if(UART4_FLAG == UART4_FLAG_LBDF)
730 {
731 UART4->CR4 &= (uint8_t)(~UART4_CR4_LBDF);
732 }
733 /* Clear the LIN Header Detection Flag */
734 else if(UART4_FLAG == UART4_FLAG_LHDF)
735 {
736 UART4->CR6 &= (uint8_t)(~UART4_CR6_LHDF);
737 }
738 /* Clear the LIN Synch Field flag */
739 else
740 {
741 UART4->CR6 &= (uint8_t)(~UART4_CR6_LSF);
742 }
743 }
744
745 /**
746 * @brief Checks whether the specified UART4 interrupt has occurred or not.
747 * @param UART4_IT: Specifies the UART4 interrupt pending bit to check.
748 * This parameter can be one of the following values:
749 * - UART4_IT_LBDF: LIN Break detection interrupt
750 * - UART4_IT_TXE: Transmit Data Register empty interrupt
751 * - UART4_IT_TC: Transmission complete interrupt
752 * - UART4_IT_RXNE: Receive Data register not empty interrupt
753 * - UART4_IT_IDLE: Idle line detection interrupt
754 * - UART4_IT_OR: OverRun Error interrupt
755 * - UART4_IT_PE: Parity Error interrupt
756 * @retval The state of UART4_IT (SET or RESET).
757 */
758 ITStatus UART4_GetITStatus(UART4_IT_TypeDef UART4_IT)
759 {
760 ITStatus pendingbitstatus = RESET;
761 uint8_t itpos = 0;
762 uint8_t itmask1 = 0;
763 uint8_t itmask2 = 0;
764 uint8_t enablestatus = 0;
765
766 /* Check parameters */
767 assert_param(IS_UART4_GET_IT_OK(UART4_IT));
768
769 /* Get the UART4 IT index*/
770 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART4_IT & (uint8_t)0x0F));
771 /* Get the UART4 IT index*/
772 itmask1 = (uint8_t)((uint8_t)UART4_IT >> (uint8_t)4);
773 /* Set the IT mask*/
774 itmask2 = (uint8_t)((uint8_t)1 << itmask1);
775
776 /* Check the status of the specified UART4 pending bit*/
777 if(UART4_IT == UART4_IT_PE)
778 {
779 /* Get the UART4_ITPENDINGBIT enable bit status*/
780 enablestatus = (uint8_t)((uint8_t)UART4->CR1 & itmask2);
781 /* Check the status of the specified UART4 interrupt*/
782
783 if(((UART4->SR & itpos) != (uint8_t)0x00) && enablestatus)
784 {
785 /* Interrupt occurred*/
786 pendingbitstatus = SET;
787 }
788 else
789 {
790 /* Interrupt not occurred*/
791 pendingbitstatus = RESET;
792 }
793 }
794 else if(UART4_IT == UART4_IT_LBDF)
795 {
796 /* Get the UART4_IT enable bit status*/
797 enablestatus = (uint8_t)((uint8_t)UART4->CR4 & itmask2);
798 /* Check the status of the specified UART4 interrupt*/
799 if(((UART4->CR4 & itpos) != (uint8_t)0x00) && enablestatus)
800 {
801 /* Interrupt occurred*/
802 pendingbitstatus = SET;
803 }
804 else
805 {
806 /* Interrupt not occurred*/
807 pendingbitstatus = RESET;
808 }
809 }
810 else if(UART4_IT == UART4_IT_LHDF)
811 {
812 /* Get the UART4_IT enable bit status*/
813 enablestatus = (uint8_t)((uint8_t)UART4->CR6 & itmask2);
814 /* Check the status of the specified UART4 interrupt*/
815 if(((UART4->CR6 & itpos) != (uint8_t)0x00) && enablestatus)
816 {
817 /* Interrupt occurred*/
818 pendingbitstatus = SET;
819 }
820 else
821 {
822 /* Interrupt not occurred*/
823 pendingbitstatus = RESET;
824 }
825 }
826 else
827 {
828 /* Get the UART4_IT enable bit status*/
829 enablestatus = (uint8_t)((uint8_t)UART4->CR2 & itmask2);
830 /* Check the status of the specified UART4 interrupt*/
831 if(((UART4->SR & itpos) != (uint8_t)0x00) && enablestatus)
832 {
833 /* Interrupt occurred*/
834 pendingbitstatus = SET;
835 }
836 else
837 {
838 /* Interrupt not occurred*/
839 pendingbitstatus = RESET;
840 }
841 }
842 /* Return the UART4_IT status*/
843 return pendingbitstatus;
844 }
845
846 /**
847 * @brief Clears the UART4 pending flags.
848 * @param UART4_IT specifies the pending bit to clear
849 * This parameter can be one of the following values:
850 * - UART4_IT_LBDF: LIN Break detection interrupt
851 * - UART4_IT_LHDF: LIN Header detection interrupt
852 * - UART4_IT_RXNE: Receive Data register not empty interrupt.
853 * @note
854 * - PE (Parity error), FE (Framing error), NE (Noise error),
855 * OR (OverRun error) and IDLE (Idle line detected) pending bits are
856 * cleared by software sequence: a read operation to UART4_SR register
857 * (UART4_GetITStatus()) followed by a read operation to UART4_DR register
858 * (UART4_ReceiveData8() or UART4_ReceiveData9()).
859 *
860 * - RXNE pending bit can be also cleared by a read to the UART4_DR
861 * register (UART4_ReceiveData8() or UART4_ReceiveData9()).
862 *
863 * - TC (Transmit complete) pending bit can be cleared by software
864 * sequence: a read operation to UART4_SR register
865 * (UART4_GetITStatus()) followed by a write operation to UART4_DR
866 * register (UART4_SendData8()or UART4_SendData9()).
867 *
868 * - TXE pending bit is cleared only by a write to the UART4_DR register
869 * (UART4_SendData8() or UART4_SendData9()).
870 * @retval None
871 */
872 void UART4_ClearITPendingBit(UART4_IT_TypeDef UART4_IT)
873 {
874 assert_param(IS_UART4_CLEAR_IT_OK(UART4_IT));
875
876 /* Clear the Receive Register Not Empty pending bit */
877 if(UART4_IT == UART4_IT_RXNE)
878 {
879 UART4->SR = (uint8_t)~(UART4_SR_RXNE);
880 }
881 /* Clear the LIN Break Detection pending bit */
882 else if(UART4_IT == UART4_IT_LBDF)
883 {
884 UART4->CR4 &= (uint8_t)~(UART4_CR4_LBDF);
885 }
886 /* Clear the LIN Header Detection pending bit */
887 else
888 {
889 UART4->CR6 &= (uint8_t)(~UART4_CR6_LHDF);
890 }
891 }
892
893 /**
894 * @}
895 */
896
897 /**
898 * @}
899 */
900
901
902 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
903