Advanced Power System Protection

Chapter 1: Introduction to Computer Relaying

Development of computer relaying, Historical background, Expected benefits of computer

relaying, Computer relay architecture, Protection Generations ,Analog to digital converters, Anti-
aliasing filters, Digital Signal Processing, Hierarchical Structure of Protection and Control.
10 Hrs.

Computer relay architecture

Computer relays consist of subsystems with defined functions. Although a specific relay may be
different in some of its details, these subsystems are most likely to be incorporated in its design in
some form.

The block diagram in Figure shows the principal subsystems of a computer relay.

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The processor is central to its organization. It is responsible for the execution of relay programs,
maintenance of various timing functions, and communicating with its peripheral equipment.

Several types of memories are shown in Figure each of them serves a specific need.

Random Access Memory (RAM): holds the input sample data as they are brought in and
processed. It may also be used to buffer data for later storage in a more permanent medium. In
addition, RAM is needed as a scratch pad to be used during relay algorithm execution.

The Read Only Memory (ROM) or Programmable Read Only Memory (PROM): used to store the
programs permanently. In some cases the programs may execute directly from the ROM, if its
read time is short enough. If this is not the case, the programs must be copied from the ROM into
the RAM during an initialization stage, and then the real-time execution would take place from
the RAM.

The Erasable PROM (EPROM): is needed for storing certain parameters (such as the relay
settings) which may be changed from time to time, but once set must remain fixed, even if the
power supply to the computer is interrupted. Either a core type memory or an on-board battery
backed RAM may be suitable for this function.

Consider the analog input system next. At the outset it should be pointed out that Figure is based
upon using conventional transducers.

If electronic CTs and CVTs are used, the input circuits may be significantly different and data are
likely to be entered directly in the processor memory. The relay inputs are currents and voltages
and digital signals indicating contact status.

The analog signals must be converted to voltage signals suitable for conversion to digital form.
This is done by the Analog to Digital Converter (ADC). Usually the input to an ADC is restricted
to a full scale value of ±10 volts. The current and voltage signals obtained from current and
voltage transformer secondary windings must be scaled accordingly. The largest possible signal
levels must be anticipated, and the relation between the rms (root mean square) value of the signal
and its peak must be reckoned with.
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It is not necessary to allow for high frequency transients in most cases, as these are removed by
anti-aliasing filters which have a low cut-off frequency. An exception to this is a wave relay,
which does use the high frequency (traveling wave) components. For such relays, the scaling of
signals must be such that the entire input signal with its largest anticipated high frequency
component must not exceed the ADC input range.

The current inputs must be converted to voltages – for example by resistive shunts. As the normal
current transformer secondary currents may be as high as hundreds of amperes, shunts of
resistance of a few milliohms are needed to produce the desired voltage for the ADCs.

An alternative arrangement would be to use an auxiliary current transformer to reduce the current
to a lower level. However, any inaccuracies in the auxiliary current transformer would contribute
to the total error of the conversion process, and must be kept as low as possible.

An auxiliary current transformer serves another function: that of providing electrical isolation
between the main CT secondary and the computer input system. In this case, the shunt may be
grounded at its midpoint in order to provide a balanced input to following amplifier and filter
stages. These considerations are illustrated in Figure (a) and (b).

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Figure (c) shows connections to the voltage transformer. A fused circuit is provided for each
instrument or relay, and a similar circuit may be provided for the computer relay as well. The
normal voltage at the secondary of a voltage transformer is 67 volts rms for a phase to neutral
connection. It can be reduced to the desired level by a resistive potential divider sized to provide
adequate source impedance to drive the following stages of filters and amplifiers.

Digital inputs to the computer relay are usually contact status, obtained from other relays or
subsystems from within the substation. If the other subsystems are computer based, then these
signals can be input to the computer relay without any special processing. An exception to this
may be an opto-isolation circuit provided to maintain isolation between the two systems. When
the digital inputs are derived from contacts within the yard (or control house), it is necessary to
apply surge filtering and (or) optical isolation in order to isolate the computer relay from the harsh
substation environment.

Digital output from the processor is used to provide relay output in the form of open or close
contacts. A parallel output port of the processor provides one word (typically two bytes) for these
outputs. Each bit can be used as a source for one contact. The computer output bit is a Transistor
to Transistor Logic (TTL) level signal, and would be optically isolated before driving a high speed
multi-contact relay, or thyristors, which in turn can be used to activate external devices such as
alarms, breaker trip coils, carrier control etc.

Finally, the power supply is usually a single DC input multiple DC output converter powered by
the station battery. The input is generally 125 volts DC, and the output could be 5 volts DC and
±15 volts DC. Typically the 5 volt supply is needed to power the logic circuits, while the 15 volt
supply is needed for the analog circuits. The station battery is of course continuously charged
from the station AC service.

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Analog to digital converters

The Analog to Digital Converter (ADC) converts an analog voltage level to its digital
representation. The principal feature of an ADC is its word length expressed in bits. Ultimately
this affects the ability of the ADC to represent the analog signal with a sufficiently detailed digital
representation.

Consider an ADC with 12 bit word length – which, along with the 16 bit converter – is the most
common word length in commercially available ADCs of today.

Using a two’s complement notation, the binary number 0111 1111 1111 (7FF in hexadecimal
notation) represents the largest positive number that can be represented by a 12 bit ADC, while
1000 0000 0000 (800 in hexadecimal notation) represents the smallest (negative) number.

In decimal notation, hexadecimal 7FF is equal to (211 − 1) = 2047, and hexadecimal 800 is equal
to −211 = −2048. Considering that the analog input signal may range between ±10 volts, it is clear
that each bit of the 12 bit ADC word represents 10/2048 volts, or 4.883 millivolts. Table below
shows input voltages and their corresponding converted values in two’s complement and decimal
equivalent for 12 and 16 bit ADCs.

The equivalent input change for one digit change in the output (4.883 millivolts in case of a 12 bit
A/D converter) is an important parameter of the ADC. It describes the uncertainty in the input

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signal for a given digital output. Thus an output of hexadecimal 001 represents any input voltage
between 2.442 and 7.352 millivolts. This is the quantization error of the ADC.

In general, if the word length of the ADC is N bits, and the maximum input voltage for the ADC
is V volts, the quantization error q is given by

and normalized to the largest possible input voltage of V, the per unit quantization error is per
unit q = . Clearly, the larger the number of bits in a converter word, the smaller is the
quantization error. Besides the quantization error, the ADC is prone to other errors as well. In
order to understand the source of these errors, it is helpful to examine the principle of operation of
an ADC.

Successive approximation ADC:

A common type of analog-to-digital converter is the successive approximation ADC. The analog
signal is amplified through an adjustable gain amplifier, as shown in Figure below. A Digital to
Analog Converter (DAC) converts the digital number in the output register of the ADC to an
analog value. This signal is compared with the input analog signal, and the difference is used to
drive up the count in the ADC output register. When the output of the DAC is within the
quantization range of the analog input, the output is stable, and is the converted value of the
analog signal.

The amplifier is a source of additional error in the ADC. It may have a DC offset error as well as
a gain error. In addition, the gain may have nonlinearity as well. The combined effect of all ADC
errors is illustrated in Figure below The offset error produces a shift in the input-output
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characteristic, whereas the gain error produces a change in the slope. The nonlinearity produces a
band of uncertainty in the input-output relationship. If the gain error and the nonlinearity error are
bounded by two straight lines as shown in Figure, the total error in the ADC for a given voltage
input V is given by εv

εv = K1 X FS + K2 X V

where FS is the full scale value of the input voltage, and K1 and K2 are constants depending upon
the actual uncertainties of the conversion process.

Delta-sigma ADC

The Delta-Sigma analog-to-digital converter has become the ADC of choice in recent years.
These converters use a 1 bit analog to digital converter, thus making the analog signal processing
simple and inexpensive. A very high sampling rate is used (over-sampling) and the digital signal
processing is used to provide appropriate anti-aliasing filters and decimation filters. The digital
circuitry in these ADCs are more complex, but are relatively inexpensive to manufacture.

The block diagram of a generic delta-sigma ADC is shown in Figure below.

The signal x1 is obtained by subtracting from the input signal x the output of the 1 bit ADC (y)
converted to analog form by the 1 bit Digital-to-Analog Converter. The signal x1 is integrated to
produce the signal x2 which is fed to the 1 bit ADC. The feed-back circuit ensures that the average
of the analog input is equal to that of the converted signal. The output of the 1 bit ADC is a 1 bit
data stream clocked at high frequency (over-sampling). A digital low-pass filter converts the 1 bit
data stream to a multi-bit data stream, which is finally filtered by a decimation filter to achieve the
sampling rate of interest in relaying applications.

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