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NPTEL DPEC Week 4

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0% found this document useful (0 votes)
108 views51 pages

NPTEL DPEC Week 4

Uploaded by

manan jee
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Design of Power Electronic

Converters
Course Instructor: Prof. Shabari Nath, IIT Guwahati

NPTEL Problem Solving Session - Week 4

By Saleh Khan
PMRF Scholar, IIT Delhi
Summary of Week 4

● Desat protection (from Week 3)


● Bootstrapping
● Other gate drive related aspects
● Introduction to snubbers
● RC and RCD snubbers
Summary of Week 3
Desat Protection

● Overcurrent protection
● What is desaturation?
○ High current -> high voltage drop
● Detecting the voltage drop can detect
overcurrent
Summary of Week 3
Desat Protection: Example

● DESAT pin of gate driver connected to


collector terminal via a high voltage diode
● DESAT protection is activated only during
ON state
● VCE voltage is compared with an internal
threshold voltage
UCC21750
● Blanking capacitor provided for turn ON
transients
Summary of Week 4
Bootstrapping: Why it is used?

● High side gate driving requires gate


voltage referenced to a switching voltage
● Bootstrapping provides an inexpensive
alternative for high side gate driving
Summary of Week 4
Bootstrapping: basic operation

● When S2 is ON, CBST gets charged to vG via


DBST
● When S1 is ON, DBST gets reverse biased,
and CBST provides gate voltage to S1
Summary of Week 4
Bootstrapping: limitations

● No isolation -> low noise immunity


● Can be used only for half-bridge based
circuits
● Used for low gate currents and low
switching frequencies
Summary of Week 4
Other gate driver related aspects

● Pulse transformer based gate drivers


Summary of Week 4
Other gate driver related aspects

● Pulse transformer based gate drivers


● Effect of parasitic components
Summary of Week 4
Other gate driver related aspects

● Pulse transformer based gate drivers


● Effect of parasitic components
● Speed enhancement circuits
Summary of Week 4
Introduction to Snubbers

● Presence of parasitic components:


Lp, Rp, Cds
● RLC circuit (usually underdamped)
● Leads to voltage spikes and ringing,
mainly during turn OFF
● Can damage the device
Summary of Week 4
Introduction to Snubbers

● Snubbers - change the RLC circuit:


RC snubber, RCD snubber
● Advantages:
○ Reduce voltage spike
○ Limit dv/dt, di/dt
○ Transfer power dissipation from
switch to resistor
○ Total losses may be reduced
○ Reduce EMI
Summary of Week 4
RC Snubber Analysis
Summary of Week 4
RC Snubber Analysis: Steps

● Solve differential equation for i(t) for different cases (underdamped, overdamped,
critically damped) using initial conditions
● Find e(t) using i(t)
● Find the time t1 at which e is maximum (E1) by setting de/dt = 0
● Then find E1 using t1
● Find E1/E and (dv/dt)av=E1/t1
Summary of Week 4
RC Snubber Analysis: Terms
Summary of Week 4
RC Snubber Analysis: Solutions
Summary of Week 4
RC Snubber Analysis: Design

● Based on minimum voltage spike


● Based on minimum dv/dt
● Compromise design (minimize product of voltage spike and dv/dt)
Summary of Week 4
RC Snubber Analysis: Minimize voltage spike
Summary of Week 4
RC Snubber Analysis: Further details

W. McMurray, "Optimum Snubbers for Power Semiconductors," in IEEE Transactions on


Industry Applications, vol. IA-8, no. 5, pp. 593-600, Sept. 1972, doi:
10.1109/TIA.1972.349788
Problem Solving

A buck converter is designed using two MOSFETs (IRF540NPbF). One MOSFET is


used like a switch by giving gate pulses. Second MOSFET is used like a diode i.e. its
body diode is only used and no gate pulse is given. The input voltage of the buck
converter is 50 V. The value of parasitic inductance is estimated as Lp = 8 nH.
Problem Solving

1. From the datasheet, the dv/dt limit for the body diode is obtained as (V/ns)
Problem Solving

1. From the datasheet, the dv/dt limit for the body diode is obtained as (V/ns)
Problem Solving

2. Using the typical values of Qrr and trr given in datasheet, the reverse recovery
current Irr is calculated as (A)
Problem Solving

2. Using the typical values of Qrr and trr given in datasheet, the reverse recovery
current Irr is calculated as (A)
Problem Solving

The power electronics engineer uses the following limits to design RC snubber for
the body diode:

● Peak voltage limit, E1 = 2 x Input voltage


● (dv/dt)av limit = half of dv/dt limit given in datasheet for body diode

First, design the snubber by limiting the peak voltage


Problem Solving

3. The value of E1/E is


Problem Solving

3. The value of E1/E is

E1 = 2 x E

E1/E = 2
Problem Solving

Let the corresponding values of χo = 2


and ζo = 0.4 are obtained using the
respective curves to design snubbers by
this method.
Problem Solving

4. Find the value of Cs (pF)


Problem Solving

4. Find the value of Cs (pF)


Problem Solving

5. Find the value of Rs (Ω)


Problem Solving

5. Find the value of Rs (Ω)


Problem Solving

Second, design the snubber by limiting (dv/dt)av. Cs = 2 nF is chosen for the snubber.

6. Calculate A
Problem Solving

Second, design the snubber by limiting (dv/dt)av. Cs = 2 nF is chosen for the snubber.

6. Calculate A
Problem Solving

Let the corresponding values of χo = 0.9 and ζo = 0.15 are obtained using the
respective curves to design snubbers by this method.
Problem Solving

7. Find the value of Rs (Ω)


Problem Solving

7. Find the value of Rs (Ω)


Problem Solving

Third, do a compromised design of the snubber for limiting both peak voltage and
(dv/dt)av.

8. Calculate
Problem Solving

Third, do a compromised design of the snubber for limiting both peak voltage and
(dv/dt)av.

8. Calculate
Problem Solving

Let the corresponding values of χo = 0.1and ζo = 0.9 are obtained using the
respective curves to design snubbers by this method.
Problem Solving

9. Find the value of Cs (nF)


Problem Solving

9. Find the value of Cs (nF)


Problem Solving

10. Find the value of Rs (Ω)


Problem Solving

10. Find the value of Rs (Ω)


Problem Solving

11. From the datasheet, the typical turn OFF time of the MOSFET is (ns)
Problem Solving

11. From the datasheet, the typical turn OFF time of the MOSFET is (ns)
Problem Solving

12. Bootstrapping method has the disadvantage(s) of

(a) Low noise immunity

(b) Cannot drive high side switch

(c) Applicable only where gate drive requires low power

(d) Can drive MOSFETs but not IGBTs


Problem Solving

12. Bootstrapping method has the disadvantage(s) of

(a) Low noise immunity

(b) Cannot drive high side switch

(c) Applicable only where gate drive requires low power

(d) Can drive MOSFETs but not IGBTs


Problem Solving

13. Main role of snubbers in power electronics converter is to:

(a) Reduce spikes during turn ON and turn OFF times

(b) Reduce conduction losses

(c) Reduce inductor size

(d) Change voltage gain of converter


Problem Solving

13. Main role of snubbers in power electronics converter is to:

(a) Reduce spikes during turn ON and turn OFF times

(b) Reduce conduction losses

(c) Reduce inductor size

(d) Change voltage gain of converter


Questions?

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