ASIAN
COLLEGE OF ENGINEERING AND TECHNOLOGY
Kondayampalayam, Coimbatore – 641 1110
Approved by AICTE & Affiliated to Anna University, Chennai
CS3352 DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION
UNIT III COMPUTER FUNDAMENTALS
QUESTION BANK
PART- A
1.Interpret the instruction set Architecture.
An Instruction Set Architecture (ISA) is part of the abstract model of a computer that defines
how the CPU is controlled by the software. The ISA acts as an interface between the hardware
and the software.
2. Tabulate the components of computer system
Computer systems consist of three components as shown in below image: Central Processing
Unit, Input devices and Output devices
3. What are the functions of control unit?
The control unit of the central processing unit regulates and integrates the operations of the
computer.
4. Classify the instructions based on the operations they perform.
These instructions can be classified into the following five functional categories: data transfer
(copy) operations, arithmetic operations, logical operations, branching operations, and
machine-control operations.
5. Identify general characteristics of Relative addressing mode with an example.
Relative address means an address specified by indicating its distance from another address,
called the base address. For example, a relative address might be B+15, B being the base
address and 15 the distance
6.Give the addressing modes in MIPS.
(i) Register addressing mode (ii) Immediate addressing mode (iii) Base addressing mode.
7. Differentiate register direct and indirect addressing
Direct Addressing Mode Indirect Addressing Mode
This addressing mode has fast
addressing compared to indirect It is slower than direct addressing mode.
addressing mode
Address field contains the effective Address field contains reference of
address of operand effective address
Eg. Add R1, (1001) Eg. LOAD R1, @500
8. Give the difference between auto increment and auto decrement addressing mode
Increment Mode: after operand addressing , the contents of the register is incremented.
Decrement Mode: before operand addressing, the contents of the register is decrement.
9. Compose the CPU performance equation.
CPU Time = I * CPI / R.
R = 1/T the clock rate
o T or R are usually published as performance measures for a processor
o I requires special profiling software
o CPI depends on many factors (including memory).
10. Describe about the various logical operators.
A logical operator is a symbol or word used to connect two or more expressions such that the
value of the compound expression produced depends only on that of the original expressions and
on the meaning of the operator. Common logical operators include AND, OR, and NOT.
11. What are the various types of decision making instructions?
Types of Decision Making – Routine, Strategic, Policy, Operating, Organisational, Personal,
Programmed, Non-Programmed, Individual and Group Decisions.
PART B
1.Evaluate the various techniques to represent instructions in a computer system(12)
2. i)List the various components of computer system and explain with neat diagram (7)
ii)List the applications of computers (5)
3. i). Identify the various operations in computer system. (6)
ii). Examine the operands of computer hardware. (6)
4. i).Illustrate the different types of instruction set architecture in detail (6)
ii).Examine the basic instruction types with examples (6)
5. Analyze the various instruction formats and illustrate with an example (12)
Instruction Set Architecture (ISA)
The Instruction Set Architecture (ISA) is the part of the processor that is visible to the
programmer or compiler writer. The ISA serves as the boundary between software
and hardware. We will briefly describe the instruction sets found in many of the
microprocessors used today. The ISA of a processor can be described using 5
catagories:
The 3 most common types of ISAs are:
1. Stack - The operands are implicitly on top of the stack.
2. Accumulator - One operand is implicitly the accumulator.
3. General Purpose Register (GPR) - All operands are explicitely mentioned, they
are either registers or memory locations.
Lets look at the assembly code of
C = A + B;
in all 3 architectures:
Stack Accumulator GPR
PUSH A LOAD A LOAD R1,A
PUSH B ADD B ADD R1,B
ADD STORE C STORE R1,C
POP C - -
Not all processors can be neatly tagged into one of the above catagories. The i8086
has many instructions that use implicit operands although it has a general register set.
The i8051 is another example, it has 4 banks of GPRs but most instructions must have
the A register as one of its operands.
What are the advantages and disadvantages of each of these approachs?
StackAdvantages: Simple Model of expression evaluation (reverse polish). Short
instructions.
Disadvantages: A stack can't be randomly accessed This makes it hard to generate
eficient code. The stack itself is accessed every operation and becomes a bottleneck.
AccumulatorAdvantages: Short instructions.
Disadvantages: The accumulator is only temporary storage so memory traffic is the
highest for this approach.
GPR
Advantages: Makes code generation easy. Data can be stored for long periods in
registers.
Disadvantages: All operands must be named leading to longer instructions.
Earlier CPUs were of the first 2 types but in the last 15 years all CPUs made are GPR
processors. The 2 major reasons are that registers are faster than memory, the more
data that can be kept internaly in the CPU the faster the program wil run. The other
reason is that registers are easier for a compiler to use.
Class & Semester: III Year & V Date: 13.09.2022(FN)
Duration: 1.5 Hrs Maximum: 50 Marks
PART – A (7 x 2 = 14)
Sl.
ANSWER ALL QUESTIONS Marks CO BTL
No.
Marks)
1 Describe Computer Networks 2 CO1 Re (K1)
2 What differentiate a computer networks from other types of networks 2 CO1 Re (K1)
3 Discuss the Different Network Criteria 2 CO1 Un (K2)
4 Can you list five components of data communication? 2 CO1 Re (K1)
5 Define protocol 2 CO1 Re (K1)
6 List four major components of packet switch and their functions 2 CO1 Re (K1)
7 How would you demonstrate internet and intranet? 2 CO1 Ap (K3)
PART – B (3 x 12 = 36 Marks)
Sl.
ANSWER ALL QUESTIONS Marks CO BTL
No.
8 a.
12 CO1 Un (K2)
What is network topology the different network? Explain topologies
Or
Explain in detail about TCP/IP protocol suite with neat diagram?
b. 12 CO1 Ap (K3)
Draw the OSI network architecture and explain the functionalities of every
9 a. layer in detail. 12 CO2 Re (K1)
Or
b. Analyze the different types of switching networks and mention its 12 CO2 Un (K2)
Advantages and disadvantages..
Explain the two approaches of packet switching and circuit switching
10 a. techniques. 12 CO3 Ap (K3)
Or
b Explain the Shielded twisted pair (STP) and Unshielded twisted pair
12 CO5 An (K4)
(UTP).
Prepared by
Teaching Coordinator/ Approved by
Mr.K.Madeswaran /
IQAC Coordinator HoD – CSE
CSE
