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Answerkey CIA 2

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18 views11 pages

Answerkey CIA 2

Uploaded by

Geetha M
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CIA-II ELECTRON DEVICES ANSWER KEY

1. It is important because: 1. its values are used on specification sheets 2. it is one model that
may be used to analyze circuit behavior 3. it may be used to form the basis of a more
accurate transistor model.
2.
3.

4. In junction field-effect transistors (JFETs), "pinch-off" refers to the threshold voltage


below which the transistor turns off. the pinch off voltage is the value of Vds when
drain current reaches constant saturation value.
5.
6.

7.

.
The Ebers-Moll Bipolar Junction Transistor Model 2.1 Introduction The bipolar junction
transistor can be considered essentially as two pn junctions placed back-to-back, with the
base p-type region being common to both diodes. This can be viewed as two diodes having
a common third terminal as shown in Fig. 2.1. Fig. 2.1 Bipolar Transistor Shown as Two Back-
to-Back p-n Junctions However, the two diodes are not in isolation, but are interdependent.
This means that the total current flowing in each diode is influenced by the conditions
prevailing in the other. In isolation, the two junctions would be characterized by the normal
Diode Equation with a suitable notation used to differentiate between the two junctions as
can be seen in Fig.

When the two junctions are combined, however, to form a transistor, the base region is
shared internally by both diodes even though there is an external connection to it. As seen
previously, in the forward active mode, αF of the emitter current reaches the collector. This
means that αF of the diode current passing through the base-emitter junction contributes to
the current flowing through the base-collector junction. Typically, αF has a value of between
0.98 and 0.99. This is shown as the forward component of current as it applies to the normal
forward active mode of operation of the device. Note this current is shown as a
conventional current in Fig. 2.2. It is equally possible to reverse the biases on the junctions
to operate the transistor in the “reverse active mode”. In this case, αR times the collector
current will contribute to the emitter current. For the doping ratios normally used the
transistor will be much less efficient in the reverse mode and αR would typically be in the
range 0.1 to 0.5.

JFET WORKING PRINCIPLE:

Working of JFET
One best example to understand the working of a JFET is to imagine the garden hose
pipe. Suppose a garden hose is providing a water flow through it. If we squeeze the
hose the water flow will be less and at a certain point if we squeeze it completely there
will be zero water flow. JFET works exactly in that way. If we interchange the hose
with a JFET and the water flow with a current and then construct the current-carrying
channel, we could control the current flow.

When there is no voltage across gate and source, the channel becomes a smooth path
which is wide open for electrons to flow. But the reverse thing happens when a
voltage is applied between gate and source in reverse polarity, that makes the P-N
junction reversed biased and makes the channel narrower by increasing the depletion
layer and could put the JFET in cut-off or pinch off region.
D-MOSFET:

Depletion Mode
When there is no voltage across the gate terminal, the channel shows its
maximum conductance. Whereas when the voltage across the gate
terminal is either positive or negative, then the channel conductivity
decreases.

Enhancement Mode
When there is no voltage across the gate terminal, then the device does
not conduct. When there is the maximum voltage across the gate terminal,
then the device shows enhanced conductivity.
E-MOSFET:

When drain is applied with positive voltage with respect to source and no potential is
applied to the gate two N-regions and one P-substrate from two P-N junctions
connected back to back with a resistance of the P-substrate. So a very small drain
current that is, reverse leakage current flows. If the P-type substrate is now connected
to the source terminal, there is zero voltage across the source substrate junction, and
the–drain-substrate junction remains reverse biased.
When the gate is made positive with respect to the source and the substrate, negative
(i.e. minority) charge carriers within the substrate are attracted to the positive gate and
accumulate close to the-surface of the substrate. As the gate voltage is increased, more
and more electrons accumulate under the gate. Since these electrons can not flow
across the insulated layer of silicon dioxide to the gate, so they accumulate at the
surface of the substrate just below the gate. These accumulated minority charge
carriers N -type channel stretching from drain to source. When this occurs, a channel
is induced by forming what is termed an inversion layer (N-type). Now a drain
current start flowing. The strength of the drain current depends upon the channel
resistance which, in turn, depends upon the number of charge carriers attracted to the
positive gate. Thus drain current is controlled by the gate potential.
CHANNEL LENGTH MODULATION:

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